Radiation Mask Patents (Class 430/5)
  • Patent number: 10101649
    Abstract: A mask plate is disclosed. The mask plate includes a via hole pattern, the via hole pattern includes a body portion and at least two protruding portions extending outward from the body portion; a dimension of the body portion is greater than a resolution dimension of an exposure machine, and each of the protruding portions includes a first protruding portion having a dimension greater than the resolution dimension of the exposure machine. Upon exposure of the mask plate, the protruding portions themselves and zones between adjacent protruding portions form convex portions and concave portions of a via hole, respectively; in this way, a circumstance and also an edge area of the via hole as formed is increased and an electric resistance of the via hole is reduced effectively.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: October 16, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQUING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhuo Xu, Yajie Bai, Xiaoyuan Wang, Jaikwang Kim, Fei Shang
  • Patent number: 10101648
    Abstract: A method and system for fracturing or mask data preparation is disclosed in which a desired substrate pattern for a substrate is input. A plurality of charged particle beam shots is then determined which will form a reticle pattern on a reticle, where the reticle pattern will produce a substrate pattern on the substrate using an optical lithography process, wherein the substrate pattern is within a predetermined tolerance of the desired substrate pattern. A similar method and a similar system for forming a pattern on a reticle are also disclosed.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: October 16, 2018
    Assignee: D2S, Inc.
    Inventor: Akira Fujimura
  • Patent number: 10100399
    Abstract: A cathode assembly is provided in which, while preventing the occurrence of abnormal electric discharging between a projected portion of a backing plate and a side surface of a target, particles can be prevented from being generated. The cathode assembly for a sputtering apparatus of this invention has: a target made of an insulating material; a backing plate bonded to one surface of the target; and, where such a side of the backing plate as is on the side of the target is defined as a lower side, an annular shield plate disposed to lie opposite to the lower side of that projected portion of the backing plate which is projected outward beyond an outer peripheral end of the target. The cathode assembly has a bonding portion arranged to be protruded relative to the projected portion.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: October 16, 2018
    Assignee: ULVAC, INC.
    Inventors: Shinya Nakamura, Hiroki Yamamoto
  • Patent number: 10095105
    Abstract: There is provided a method for manufacturing a master on which an arbitrary pattern is formed, the method including: forming a thin-film layer on an outer circumferential surface of a base material in a round cylindrical or round columnar shape; generating a control signal corresponding to an object on the basis of an input image in which the object is depicted; irradiating the thin-film layer with laser light on the basis of the control signal and thereby forming a thin-film pattern corresponding to the object on the thin-film layer; and forming a pattern corresponding to the object on the outer circumferential surface of the base material using, as a mask, the thin-film layer on which the thin-film pattern is formed.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: October 9, 2018
    Assignee: DEXERIALS CORPORATION
    Inventors: Yutaka Muramoto, Masanao Kikuchi
  • Patent number: 10093044
    Abstract: In an imprinting apparatus according to one embodiment, rear surfaces of first and second templates are suctioned. A correction information calculating device calculates a second response coefficient of the second template out of first response coefficients based on a flatness relational expression and flatness of the second template. The first response coefficients are actual amounts of positional slippage of the first template from a first input adjustment value. The flatness relational expression indicates a relationship between flatness of the first template and the first response coefficients. A shape and a size of the second template are adjusted using the second response coefficient.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: October 9, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Yoshio Mizuta, Manabu Takakuwa, Masato Suzuki
  • Patent number: 10095101
    Abstract: A method of correcting a critical dimension (CD) variation in extreme ultraviolet (EUV) photolithography includes mapping the CD variation of a wafer exposure field formed by a photolithography system that includes an EUV photolithography photomask. Parameters of a treatment to produce a change in reflectance at a working wavelength of EUV radiation in a region of a reflective multilayer of the photomask are determined, the change in reflectance being calculated to correct the mapped CD variation. A treatment beam is directed to the region. The region is treated with the beam in accordance with the determined parameters.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: October 9, 2018
    Assignee: Carl Zeiss SMT GmbH
    Inventors: Sergey Oshemkov, Vladimir Kruglyakov, Frederik Blumrich, Yuval Perets
  • Patent number: 10095102
    Abstract: In some embodiments, a patterned photomask has a plurality of shielding layers. In some embodiments, a photomask for mask patterning is described. The photomask includes a phase shift layer overlying a transparent layer. The photomask also includes a first shielding layer overlying the phase shift layer. The first shielding layer has a first thickness and a first optical density. The photomask further includes a second shielding layer overlying the first shielding layer. The second shielding layer has a second thickness and a second optical density. The second thickness is less that than the first thickness and the second optical density is less than the first optical density.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: October 9, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chiang Tu, Chun-Lang Chen
  • Patent number: 10088745
    Abstract: There is provided a pellicle for EUV lithography, which has a filter attached to a vent hole made through a pellicle frame bar for air pressure adjustment, and this filter is designed to be heat-resistant by being made of either a metal or a ceramic material, and is adhered to the pellicle frame by weldering or soldering, and also the filter has a filtration accuracy of 0.1 through 0.3 ?m.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: October 2, 2018
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Akinori Nishimura, Toru Shirasaki
  • Patent number: 10088744
    Abstract: A mask blank having a structure in which, on a transparent substrate, a light shielding film and a hard mask film are laminated in the stated order from the transparent substrate side. The hard mask film is formed of a material containing at least one element selected from silicon and tantalum, and the light shielding film is formed of a material containing chromium. The mask blank has a structure of three layers wherein a lower layer, an intermediate layer, and an upper layer are laminated in the stated order from the transparent substrate side. The upper layer has a lowest content of chromium in the light shielding film, the intermediate layer has a highest content of chromium in the light shielding film. It contains at least one metallic element selected from indium, tin, and molybdenum.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: October 2, 2018
    Assignee: HOYA CORPORATION
    Inventors: Hiroaki Shishido, Osamu Nozawa, Takashi Uchida
  • Patent number: 10083833
    Abstract: Various implementations described herein are directed to a method for manufacturing an integrated circuit. The method may include defining multiple lithographic regions for the integrated circuit, and the multiple lithographic regions may include a first lithographic region and a second lithographic region. The method may include defining an anchor in the first lithographic region and defining a target in the second lithographic region. The method may include defining a spacing interval between the anchor and the target. The method may include inserting an integration fill in the spacing interval.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: September 25, 2018
    Assignee: ARM Limited
    Inventors: Ronald Paxton Preston, Marlin Wayne Frederick, Jr.
  • Patent number: 10078260
    Abstract: In a phase shift mask blank comprising a transparent substrate and a phase shift film deposited thereon and having a phase shift of 150-200° with respect to sub-200 nm light, the phase shift film is composed of a silicon base material consisting of silicon, nitrogen and optionally oxygen, has a thickness of up to 70 nm, and provides a warpage change of up to 0.2 ?m in a central region of a surface of the substrate before and after the deposition of the phase shift film on the substrate.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: September 18, 2018
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Yukio Inazuki, Takuro Kosaka
  • Patent number: 10073338
    Abstract: A method for repairing a lithography mask includes determining a defect region in the mask, selecting a predetermined peripheral region of the defect region, depositing a barrier layer on the predetermined peripheral region, and repairing the defect region. The mask may be a MoSi-binary type mask. The barrier layer may compensate for uncertainty occurring during the repair of the defect region. Because the repair processes only require determining the defect region and forming the barrier layer on the periphery of the defect region, and etching the defect, the novel method has a shorter repair time period, better repair effect and improved repair efficiency than conventional methods.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: September 11, 2018
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Kuaixia Ren, Mingjing Tian
  • Patent number: 10073936
    Abstract: A generation method of generating, by a computer, data of a pattern of a mask used for an exposure apparatus including a projection optical system. The method includes dividing an effective light source formed on a pupil plane of the projection optical system into a plurality of point sources; generating a plurality of shifted pupil functions by shifting a pupil function corresponding to each of the plurality of point sources by a shift amount in accordance with a position of each point source; defining a matrix by arranging each of the plurality of shifted pupil functions in each row or each column of the matrix; calculating an eigenvalue and an eigenfunction by performing singular value decomposition of the matrix; calculating a map representing, when elements of a target pattern are inserted on an object plane of the projection optical system, an influence the elements inflict on each other.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: September 11, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kenji Yamazoe
  • Patent number: 10067416
    Abstract: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool is described. The BAA includes three distinct aperture arrays of different pitch.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: September 4, 2018
    Assignee: Intel Corporation
    Inventors: Yan A. Borodovsky, Donald W. Nelson, Mark C. Phillips
  • Patent number: 10067419
    Abstract: A method of manufacturing a reflective mask blank comprising a multilayer reflective film formed on a substrate so as to reflect EUV light; and a laminated film formed on the multilayer reflective film. The method includes the steps of depositing the multilayer reflective film on the substrate to form a multilayer reflective film formed substrate; carrying out defect inspection for the multilayer reflective film formed substrate; depositing the laminated film on the multilayer reflective film of the multilayer reflective film formed substrate; forming a fiducial mark for an upper portion of the laminated film to thereby form a reflective mask blank comprising the fiducial mark, the fiducial mark serving as a reference for a defect position in defect information; and carrying out defect inspection of the reflective mask blank by using the fiducial mark as a reference.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: September 4, 2018
    Assignee: HOYA CORPORATION
    Inventors: Tsutomu Shoki, Kazuhiro Hamamoto, Yohei Ikebe
  • Patent number: 10070447
    Abstract: A method and apparatus are provided. The method includes receiving reference signal resource elements from a transceiver, determining a channel impulse response (CIR) signal based on the received reference signal resource elements, estimating a coarse value of a FAP of the reference signal resource elements based on the CIR signal, estimating a fine value of the FAP of the reference signal resource elements based on CIR samples around the FAP location, and combining the coarse value estimate and the fine value estimate to determine the FAP estimate.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: September 4, 2018
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Abhik K. Das, Dongwoon Bai, Jungwon Lee
  • Patent number: 10061193
    Abstract: A method includes loading a mask having a defect into a chamber. The defect of the mask is repaired by forming a repair feature in a repair region of the mask. The forming the repair feature includes irradiating the repair region of the mask with a radiation beam. The forming the repair feature further includes while irradiating the repair region, injecting a precursor gas into the chamber to form a first film of the repair feature on the repair region, and while irradiating the repair region, injecting a cleaning gas into the chamber. The cleaning gas reacts with an impurity material in the first film to transform the first film into a first cleaned film.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: August 28, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsun-Chuan Shih, Sheng-Chi Chin, Yuan-Chih Chu, Yueh-Hsun Li
  • Patent number: 10061190
    Abstract: A mask for an extreme ultraviolet (EUV) lithography process is provided. The mask includes a substrate, a reflection layer including first material layers and second material layers which are alternately and repeatedly stacked on the substrate, a capping layer on the reflection layer, and a phase shift layer and an absorber layer sequentially stacked on the capping layer. Sidewalls of the phase shift layer and the absorber layer may be oblique to a top surface of the capping layer.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: August 28, 2018
    Assignee: IUCF-HYU(INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Jung Sik Kim, Jinho Ahn, Seongchul Hong, Hyun Min Song, Jae Uk Lee, Seung Min Lee, Jung Hwan Kim
  • Patent number: 10061192
    Abstract: The invention relates to a method for correcting at least one error on wafers processed by at least one photolithographic mask, the method comprises: (a) measuring the at least one error on a wafer at a wafer processing site, and (b) modifying the at least one photolithographic mask by introducing at least one arrangement of local persistent modifications in the at least one photolithographic mask.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: August 28, 2018
    Assignees: Carl Zeiss SMT GmbH, Carl Zeiss SMS Ltd.
    Inventors: Dirk Beyer, Vladimir Dmitriev, Ofir Sharoni, Nadav Wertsman
  • Patent number: 10048580
    Abstract: The present invention provides a halftone mask comprising an assist pattern and a manufacturing method of the halftone mask, which uses an ArF excimer laser as an exposing source, is used for a projection exposure by an off axis illumination, does not resolve the assist pattern while keeping the focal depth magnification effect as the assist pattern, and may form a transferred image having high contrast of a main pattern.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: August 14, 2018
    Assignee: DAI NIPPON PRINTING CO., LTD.
    Inventors: Takaharu Nagai, Hiroshi Mohri, Yasutaka Morikawa, Katsuya Hayano
  • Patent number: 10042210
    Abstract: A mask includes a base substrate, and a light shielding pattern including a light transmitting portion and a light shielding portion on the base substrate, wherein the light shielding portion includes a third source electrode portion, a third drain electrode portion spaced apart from the third source electrode portion and including at least a portion parallel to the third source electrode portion, a first auxiliary light shielding portion at an end portion of the third source electrode portion facing the third drain electrode portion, and a second auxiliary light shielding portion at an end portion of the third drain electrode portion facing the third source electrode portion.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: August 7, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Inho Park, Sehwan Yu, Kyoungjun Kim, Jihyeon Son
  • Patent number: 10043652
    Abstract: A method for cleaning a substrate, includes supplying to a substrate having a hydrophilic surface a film-forming processing liquid which includes a volatile component and forms a film on the substrate, vaporizing the volatile component in the film-forming processing liquid such that the film-forming processing liquid solidifies or cures on the substrate and forms a processing film on the hydrophilic surface of the substrate, and supplying to the substrate having the processing film a strip-processing liquid for stripping the processing film from the substrate.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: August 7, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Miyako Kaneko, Keiji Tanouchi, Takehiko Orii, Itaru Kanno
  • Patent number: 10036951
    Abstract: A method for fabricating a pellicle assembly for a lithography process includes fabricating a pellicle frame including a sidewall having a porous material. In some embodiments, the pellicle frame is subjected to an anodization process to form the porous material. The porous material includes a plurality of pore channels extending, in a direction perpendicular to an exterior surface of the sidewall, from the exterior surface to an interior surface of the sidewall. In various embodiments, a pellicle membrane is formed, and the pellicle membrane is attached to the pellicle frame such that the pellicle membrane is suspended by the pellicle frame. Some embodiments disclosed herein further provide a system including a membrane and a pellicle frame that secures the membrane across the pellicle frame. In some examples, a portion of the pellicle frame includes a porous material, where the porous material includes the plurality of pore channels.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: July 31, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pei-Cheng Hsu, Chih-Cheng Lin, Hsin-Chang Lee, Ta-Cheng Lien, Anthony Yen
  • Patent number: 10036959
    Abstract: According to one embodiment, there is provided a reflection mask including a multilayer reflection film configured to reflect EUV light or soft X-rays. The reflection mask includes a periodic pattern arrangement region in which first patterns are periodically arranged, and a non-periodic pattern arrangement region in which second patterns are non-periodically arranged. The non-periodic pattern arrangement region and the periodic pattern arrangement region differ from one another in reflectivity for the EUV light or the soft X-rays.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: July 31, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Masaru Suzuki, Hiroyuki Mizuno, Kazuyuki Yoshimochi
  • Patent number: 10036947
    Abstract: Disclosed are a blankmask and a photomask, in which compositions of metal and light elements of a light-shielding film are controlled so that the light-shielding film can guarantee a light-shielding efficiency, increase an etching speed, become thinner, and have a minimum sheet-resistance. To this end, the blankmask according to the present invention includes at least a light-shielding film on a transparent substrate, and the light-shielding film includes a first light-shielding layer adjacent to the transparent substrate and a second light-shielding layer formed on the first light-shielding layer, in which the first and the second light-shielding film contains chrome (Cr) and molybdenum (Mo).
    Type: Grant
    Filed: October 8, 2015
    Date of Patent: July 31, 2018
    Assignee: S&S TECH CO., LTD.
    Inventors: Kee-Soo Nam, Cheol Shin, Jong-Hwa Lee, Chul-Kyu Yang, Min-Ki Choi, Chang-Jun Kim, Young-Jo Jeon
  • Patent number: 10031410
    Abstract: A mask fabricating method includes dividing an outline of a first design layout for a target layer into plural segments, selecting interest segments to be biased in a direction of approaching an outline of a second design layout for a lower layer of the target layer, performing optical proximity correction for the target layer based on a first cost function given to each of normal segments and a second cost function given to each of the interest segments, and fabricating the mask corresponding to the first design layout updated based on a result of the optical proximity correction. The second cost function includes a model of a margin between each of the interest segments and the outline of the second design layout. Performing the optical proximity correction includes biasing each of the interest segments up to a boundary defined by the margin.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: July 24, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyejin Shin, Noyoung Chung
  • Patent number: 10031409
    Abstract: A reflective photomask includes a substrate with a substrate layer of a low thermal expansion material. The substrate layer includes a main portion of a first structural configuration and an auxiliary portion of a second structural configuration of the low thermal expansion material. The auxiliary portion is formed in a frame section surrounding a pattern section of the substrate. A multilayer mirror is formed on a first surface of the substrate. A reflectivity of the multilayer mirror is at least 50% at an exposure wavelength below 15 nm. A frame trench extending through the multilayer mirror exposes the substrate in the frame section. The auxiliary portion may include scatter centers for out-of-band radiation.
    Type: Grant
    Filed: June 10, 2016
    Date of Patent: July 24, 2018
    Assignee: ADVANCED MASK TECHNOLOGY CENTER GmbH & CO. KG
    Inventors: Markus Bender, Thorsten Schedel
  • Patent number: 10026656
    Abstract: A semiconductor die comprises two or more active regions over a substrate. A first set of dummy blocks are over the substrate, in contact with one another, and completely surrounding at least one of the two or more active regions. A second set of dummy blocks are over the substrate and farther from the at least one active region surrounded by the first set of dummy blocks than the dummy blocks of the first set of dummy blocks. Each of the dummy blocks of the first set of dummy blocks has individual surface areas, each of the dummy blocks of the second set of dummy blocks has individual surface areas, and the individual surface areas of each of the dummy blocks of the second set of dummy blocks is larger than the individual surface areas of each of the dummy blocks of the first set of dummy blocks.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: July 17, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Harry-Hak-Lay Chuang, Cheng-Cheng Kuo
  • Patent number: 10018905
    Abstract: Disclosed is a phase-shift blankmask for manufacturing a photomask, which can achieve a fine pattern of not greater than 32 nm, preferably not greater than 14 nm, and more preferably not greater than 10 nm. To this end, a phase-shift film, a light-shielding film, an etch-stopping film and a hard film are provided on a transparent substrate, in which the light-shielding film has a multi-layered structure of two or more layers different in composition, one of which essentially contains oxygen (O), a light-shielding layer essentially having oxygen (O) occupies 50%˜100% of the whole thickness of the light-shielding film, and the phase-shift film has a transmissivity of 10%˜50%.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: July 10, 2018
    Assignee: S & S TECH CO., LTD
    Inventors: Kee-Soo Nam, Cheol Shin, Jong-Hwa Lee, Chul-Kyu Yang, Min-Ki Choi, Chang-Jun Kim, Kyu-Jin Jang
  • Patent number: 10012599
    Abstract: Methods and systems for detecting defects on a wafer are provided. One system includes one or more computer subsystems configured for generating a rendered image based on information for a design printed on the wafer. The rendered image is a simulation of an image generated by the optical inspection subsystem for the design printed on the wafer. The computer subsystem(s) are also configured for comparing the rendered image to an optical image of the wafer generated by the optical inspection subsystem. The design is printed on the wafer using a reticle. In addition, the computer subsystem(s) are configured for detecting defects on the wafer based on results of the comparing.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: July 3, 2018
    Assignee: KLA-Tencor Corp.
    Inventors: Keith Wells, Xiaochun Li, Lisheng Gao, Tao Luo, Markus Huber
  • Patent number: 10012898
    Abstract: Obtaining optimal focus for exposing a photoresist in an EUV lithography with an EUV mask containing a pattern with an assist feature is disclosed. The EUV mask contains a repeating pattern, wherein the repeating pattern has two different pitches, i.e. a first pitch and a second pitch, and contains an assist feature between main features. Because the two different pitches have different focus offsets, the difference between linewidths of said gratings provides a calibration curve which is a measure of focus. The method for monitoring focus is performing a EUV exposure using a focus position with a pre-determined focus position as calibrated using the linewidth difference between the two gratings. The EUV mask for monitoring focus of present invention is applicable to both test and product masks.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: July 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Timothy Allan Brunner, Martin Burkhardt
  • Patent number: 10012899
    Abstract: A method includes depositing a first material layer over a first substrate; and depositing a graphene layer over the first material layer. The method further includes depositing an amorphous silicon layer over the graphene layer and bonding the amorphous silicon layer to a second substrate, thereby forming an assembly. The method further includes annealing the assembly, thereby converting the amorphous silicon layer to a silicon oxide layer. The method further includes removing the first substrate from the assembly and removing the first material layer from the assembly, thereby exposing the graphene layer.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: July 3, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Chiang Tu, Chun-Lang Chen, Chue San Yoo, Jong-Yuh Chang, Chia-Shiung Tsai, Ping-Yin Liu, Hsin-Chang Lee, Chih-Cheng Lin, Yun-Yue Lin
  • Patent number: 10012896
    Abstract: A lithography mask production method includes (a) forming, in a reflection layer of a blank substrate, a reference pattern used as a reference in reflectivity measurement and a reflection pattern used for lithography; (b) measuring a reflectivity Rref of the reflection layer at the reference pattern and a reflectivity RLS of the reflection layer at the reflection pattern; and (c) determining an effective width of the reflection layer at the reflection pattern based on the reflectivity Rref and the reflectivity RLS.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: July 3, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Kosuke Takai
  • Patent number: 10007175
    Abstract: A mask and a method for manufacturing a thin film transistor of a pixel area of an array substrate using the mask are disclosed. The mask comprises a mask body having a pattern area. The pattern area includes a photoresist partially removing area for removing photoresist partially; a photoresist completely removing area for removing photoresist completely and a first photoresist reserving area located between the photoresist partially removing area and the photoresist completely removing area and adjoining the photoresist partially removing area and the photoresist completely removing area for reserving photoresist, the first photoresist reserving area being designed to adjust a profile of a part of the photoresist corresponding to the photoresist partially removing area after exposure and development.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: June 26, 2018
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Xiang Liu
  • Patent number: 10007176
    Abstract: A method includes depositing a first material layer over a substrate; and depositing a graphene layer over the first material layer, thereby forming a first assembly. The method further includes attaching a carrier to the graphene layer; removing the substrate from the first assembly; and removing the first material layer from the first assembly.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: June 26, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chih-Chiang Tu, Chun-Lang Chen
  • Patent number: 10007174
    Abstract: A mask for extreme ultraviolet lithography (EUVL) is disclosed. The mask includes a low thermal expansion material (LTEM) layer; and a reflective multilayer (ML) above one surface of the LTEM layer, wherein the reflective ML has a first thickness in a first reflective region and a second thickness in a second reflective region, wherein the second thickness is different from the first thickness.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: June 26, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Tsung Shih, Shinn-Sheng Yu, Jeng-Horng Chen, Anthony Yen
  • Patent number: 10001700
    Abstract: A pellicle film for extreme ultraviolet (EUV) lithography includes a graphite-containing thin film.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: June 19, 2018
    Assignees: Samsung Electronics Co., Ltd., Research & Business Foundation Sungkyunkwan University, Fine Semitech Co., Ltd.
    Inventors: Mun Ja Kim, Ji-beom Yoo, Seul-gi Kim, Sang-jin Cho, Myung-shik Chang, Jang-dong You
  • Patent number: 10001701
    Abstract: A structure including an EUV mask and a pellicle attached to the EUV mask. The pellicle includes a pellicle frame and a plurality of pellicle membrane layers attached to the pellicle frame. The plurality of pellicle membrane layers include at least one core pellicle membrane layer and an additional pellicle membrane layer is disposed on the at least one core pellicle membrane layer. In some embodiments, the additional pellicle membrane layer is a material having a thermal emissivity greater than 0.2, a transmittance greater than 80%, and a refractive index (n) for 13.5 nanometer source of greater than 0.9.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: June 19, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pei-Cheng Hsu, Hsin-Chang Lee, Yun-Yue Lin, Hsuan-Chen Chen, Hsuan-I Wang, Anthony Yen
  • Patent number: 10001711
    Abstract: A method and apparatus for obtaining focus information relating to a lithographic process. The method includes illuminating a target, the target having alternating first and second structures, wherein the form of the second structures is focus dependent, while the form of the first structures does not have the same focus dependence as that of the second structures, and detecting radiation redirected by the target to obtain for that target an asymmetry measurement representing an overall asymmetry of the target, wherein the asymmetry measurement is indicative of focus of the beam forming the target. An associated mask for forming such a target, and a substrate having such a target.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: June 19, 2018
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Youri Johannes Laurentius Maria Van Dommelen, Peter David Engblom, Lambertus Gerardus Maria Kessels, Arie Jeffrey Den Boef, Kaustuve Bhattacharyya, Paul Christiaan Hinnen, Marco Johannes Annemarie Pieters
  • Patent number: 9983473
    Abstract: A photomask and method for fabricating an integrated circuit is provided. A design layout is provided, wherein the design layout has a plurality of main features. A plurality of assistant features are added in an assistant region of the design layout to form a first layout, wherein the assistant region has no main feature and a width of the assistant region is larger than five times of a width of the main feature. A plurality of optical proximity correction (OPC) features are added on the first layout to form a second layout. And a photomask is formed according to the second layout.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: May 29, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Yu Lin, Yi-Jie Chen, Feng-Yuan Chiu, Ying-Chou Cheng, Kuei-Liang Lu, Ya-Hui Chang, Ru-Gun Liu, Tsai-Sheng Gau
  • Patent number: 9978134
    Abstract: A sampling method and apparatus applied to optical proximity correction of a lithography layout are provided in the present disclosure. The sampling method includes: performing wavelet decomposition to a pattern in the layout to be corrected, to acquire wavelet matrixes of different orders; and performing wavelet reconstruction according to the wavelet matrixes of the different orders for discrete sampling, wherein results of the discrete sampling are applied to simulation in the OPC. The sampling method and apparatus can improve the accuracy and efficiency of sampling of the layout to be corrected in a conventional technology.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: May 22, 2018
    Assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corporation
    Inventors: Xiaoliang Jin, Chunyu Yuan
  • Patent number: 9977326
    Abstract: A pellicle is proposed in which an adhesive layer which adheres a pellicle film to a pellicle frame is mixed (filled) with powder of thermally conductive material such as metallic compound so that the heat generated by the strong EUV ray is quickly passed to the pellicle frame from the pellicle film lest the latter is deformed by the heat.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: May 22, 2018
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventor: Jun Horikoshi
  • Patent number: 9977324
    Abstract: A method of forming a pattern includes: preparing a target substrate including a photoresist layer on a base substrate; aligning a phase shift mask to the target substrate, the phase shift mask including a mask substrate comparted into a first region including a first sub region and second sub regions at sides of the first sub region, and second regions at sides of the first region, the phase shift mask including a phase shift layer on the mask substrate corresponding to the first region; fully exposing the photoresist layer at the first sub region and the second regions by utilizing the phase shift mask; and removing the photoresist layer at the first sub region and the second regions to form first and second photoresist patterns corresponding to the second sub regions. Transmittance of the phase shift layer is selected to fully expose the photoresist layer in the first sub region.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: May 22, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: DongEon Lee, Min Kang, Bong Yeon Kim, Yong Son, Junhyuk Woo, Hyunjoo Lee, Jinho Ju
  • Patent number: 9971238
    Abstract: The present invention provides a mask blank including: a transparent substrate, a half-transparent layer for controlling a phase and a transmittance of the exposure light, formed on the transparent substrate, a middle layer formed on the half-transparent layer, and a light-shielding layer formed on the middle layer, wherein the light-shielding layer is constituted with a single metal material not including a transition metal; a film thickness of the light-shielding layer is 40 nm or less; and an optical density of a laminated body, in which three kinds of layers: the half-transparent layer, the middle layer, and the light-shielding layer are laminated, with respect to the exposure light is a value to the extent that the laminated body functions as a light-shielding region or more; the mask blank is used for producing a half tone type phase shift mask, and suitable for a lithography technique on a wafer from 40 nm half pitch and on for its high light-shielding property even thinning the light-shielding pattern
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: May 15, 2018
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Hiroshi Watanabe, Katsuya Hayano, Hideyoshi Takamizawa, Youhei Ohkawa, Takashi Adachi, Ayako Tani, Yoichi Miura
  • Patent number: 9964847
    Abstract: The present disclosure relates to lithographic masks and, more particularly, to a lithographic mask substrate structure and methods of manufacture. The mask includes a sub-resolution assist feature (SRAF) formed on a quartz substrate and composed of a patterned transition film and absorber layer.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: May 8, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Richard Wistrom, Mark S. Lawliss, A. Gary Reid
  • Patent number: 9958770
    Abstract: A pellicle for EUV lithography is provided. The pellicle for EUV lithography may improve strength of a pellicle film by having a strength reinforcing layer including a first coupling layer and a carbon nanostructure disposed on a first inorganic layer, the first coupling layer here increase coupling strength between the first inorganic layer and the strength reinforcing layer, and a strength reinforcing layer including a carbon nanostructure. Also, a pellicle for EUV lithography according to another embodiment and a method of fabricating the same are provided. The pellicle for EUV lithography includes a plurality of holes and is a porous thin film made of a material with an extinction coefficient less than or equal to 0.02, and a diameter of the holes is less than or equal to 1 ?m. Accordingly, improved strength is achievable because thickness may be made large with still having high EUV transmission.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: May 1, 2018
    Assignee: INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY
    Inventors: Jinho Ahn, Jaeuk Lee, Seongchul Hong, Seungmin Lee, Kilbock Lee, Jungsik Kim, Junghwan Kim
  • Patent number: 9958784
    Abstract: Provided are apparatuses and methods for super resolution imaging photolithography. An exemplary apparatus may include an illumination light generation device configured to generate illumination light for imaging a pattern included in a mask through the mask. The illumination light may include a high-frequency spatial spectrum such that a high-frequency evanescent wave component of spatial spectrum information for the light is converted to a low-frequency evanescent wave component after being transmitted through the mask pattern. For example, the illumination light generation device may be configured to form the illumination in accordance with a high numerical aperture (NA) illumination mode and/or a surface plasmon (SP) wave illumination mode.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: May 1, 2018
    Assignee: THE INSTITUTE OF OPTICS AND ELECTRONICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Xiangang Luo, Changtao Wang, Zeyu Zhao, Yanqin Wang, Mingbo Pu, Na Yao, Ping Gao, Chenggang Hu, Xiong Li, Cheng Huang, Leilei Yang, Liqin Liu, Jiong Wang, Jiayu He, Yunfei Luo, Kaipeng Liu, Chengwei Zhao, Ling Liu, Xiaoliang Ma, Min Wang
  • Patent number: 9952502
    Abstract: A pellicle for lithography processes, including extreme ultraviolet (EUV) lithography may mitigate thermal accumulation in a membrane of the pellicle. The pellicle includes a membrane and at least one thermal buffer layer on at least one surface of the membrane. An emissivity of the thermal buffer layer may be greater than an emissivity of the membrane. A carbon content of the thermal buffer layer may be greater than a carbon content of the membrane. Multiple thermal buffer layers may be on separate surfaces of the membrane, and the thermal buffer layers may have different properties. A capping layer may be on at least one thermal buffer layer, and the capping layer may include a hydrogen resistant material. A thermal buffer layer may extend over some or all of a surface of the membrane. A thermal buffer layer may be between at least two membranes.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: April 24, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hwanchul Jeon, Munja Kim, Sungwon Kwon, Byunggook Kim, Roman Chalykh, Yongseok Jung, Jaehyuck Choi
  • Patent number: 9952501
    Abstract: A photomask blank comprising a transparent substrate (1), an etching stop film (2), a light-shielding film (3), and an etching mask film (4) has on the substrate side a reflectance of up to 35% with respect to exposure light. The etching stop film (2) consists of a first layer (21) which is disposed contiguous to the substrate and functions as an antireflective layer and a second layer (22) functioning as a fluorine-base dry etching-resistant layer, one of the first and second layers is a layer having compressive stress and the other is a layer having tensile stress.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: April 24, 2018
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Souichi Fukaya, Shinichi Igarashi, Takashi Yoshii
  • Patent number: 9952499
    Abstract: A mask fabricating method includes dividing an outline of a design layout into segments, setting comparison areas with respect to an evaluation point corresponding to each of the segments, for each segment, calculating an overlapping area between the design layout and each of the comparison areas, classifying the segments into groups based on the calculated overlapping areas, wherein segments having a characteristic of the same overlapping area are included in a first group, calculating bias values for each of the segments, obtaining a representative bias value for each group, for each group, assigning the representative bias value obtained for that group to each of its segments, updating the design layout based on the segments with their assigned representative bias values, and fabricating a mask based on the updated design layout.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: April 24, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Moon-Gyu Jeong, So-Rang Jeon