Abstract: Embodiments of the present invention provide methods for optimizing a lithographic projection apparatus including optimizing projection optics therein. The current embodiments include several flows including optimizing a source, a mask, and the projection optics and various sequential and iterative optimization steps combining any of the projection optics, mask and source. The projection optics is sometimes broadly referred to as “lens”, and therefore the optimization process may be termed source mask lens optimization (SMLO). SMLO may be desirable over existing source mask optimization process (SMO) or other optimization processes that do not include projection optics optimization, partially because including the projection optics in the optimization may lead to a larger process window by introducing a plurality of adjustable characteristics of the projection optics.

Abstract: The present invention provides a halftone mask comprising an assist pattern and a manufacturing method of the halftone mask, which uses an ArF excimer laser as an exposing source, is used for a projection exposure by an off axis illumination, does not resolve the assist pattern while keeping the focal depth magnification effect as the assist pattern, and may form a transferred image having high contrast of a main pattern.

Abstract: A wafer element fabrication method is provided. The wafer element fabrication method includes forming a device element on a substrate such that the device element includes an upper surface and a sidewall extending from the upper surface to the substrate. The wafer element fabrication method further includes forming an adjusted print resolution assist feature (APRAF) on the substrate such that the APRAF is smaller than the device element in at least one dimension. In addition, the wafer element fabrication method includes depositing surrounding material, which is different from materials of the APRAF, to surround the APRAF and to lie on the upper surface in abutment with the sidewall of the device element.

Abstract: An object of the present invention is to obtain a reflective mask blank capable of obtaining high contrast at the edges of a phase shift film pattern. Provided is a reflective mask blank comprising a multilayer reflective film and a phase shift film that shifts the phase of EUV light formed in that order on a substrate, wherein root mean square roughness (Rms), obtained by measuring a 1 ?m×1 ?m region on the surface of the phase shift film with an atomic force microscope, is not more than 0.50 nm, and power spectrum density at a spatial frequency of 10 to 100 ?m?1 is not more than 17 nm4.

Abstract: A pellicle film for extreme ultraviolet (EUV) lithography includes a graphite-containing thin film.

Abstract: An imprint method includes: placing a light-curable composition on a workpiece substrate (placement); bringing the light-curable composition and a mold into contact with each other an atmosphere of a condensable gas (contact); aligning the mold and the workpiece substrate (alignment); irradiating the light-curable composition with light to obtain a light-cured composition (irradiation); and separating the light-cured composition and the mold from each other after the irradiation (release). The film thickness of the light-curable composition during the alignment is 20% or more greater than that of the light-cured composition after the release.

Abstract: Various aspects include vectorization approaches for model-based mask proximity correction (MPC). In some cases, a computer-implemented method includes: assigning a set of vectors to geometry data describing at least one mask for forming an integrated circuit (IC); adjusting a statistical predictive model of the at least one mask based upon the set of vectors and the geometry data; predicting an adjustment to the at least one mask with the statistical predictive model; and adjusting instructions for forming the at least one mask in response to a predicted mask result of the statistical predictive model deviating from a target mask result for the at least one mask.

Abstract: Lithographic apparatuses suitable for, and methodologies involving, complementary e-beam lithography (CEBL) are described. In an example, a blanker aperture array (BAA) for an e-beam tool includes a first column of openings along a first direction and having a pitch. The BAA also includes a second column of openings along the first direction and staggered from the first column of openings. The second column of openings has the pitch. A scan direction of the BAA is along a second direction, orthogonal to the first direction.

Abstract: Embodiments of the disclosure provide an apparatus and methods for localized stress modulation for overlay and substrate distortion using electron or ion implantation directly to a glass substrate. In one embodiment, a process for modifying a bulk property of a glass substrate generally includes identifying a stress pattern of a glass substrate, determining doping parameters to correct a defect (e.g., overlay error or substrate distortion) based on the stress pattern, and providing a treatment recipe to a treatment tool, wherein the treatment recipe is formulated according to the doping parameters. The process may further include performing a doping treatment process on the glass substrate using the treatment recipe to correct the overlay error or substrate distortion. In some embodiments, the treatment recipe is determined by comparing the stress pattern with a database library containing data correlating stress changes in glass substrates to various doping parameters.

Abstract: The invention relates to a method and an apparatus for determining a position of at least one structure element of a photolithographic mask, wherein the method comprises the following steps: (a) providing a reference image of the at least one structure element; (b) deriving a data record for the reference image, said data record comprising metadata relating to the reference image; (c) providing at least one measured image of the at least one structure element of the photolithographic mask; and (d) optimizing the reference image by use of the derived data record and correlating the at least one measured image and the optimized reference image.

Abstract: Embodiments of the present invention provide a liquid crystal display device and a fabricating method thereof, the display device comprising: a liquid crystal cell, including a color filter substrate and an array substrate provided opposite to each other and liquid crystal material provided between the two substrates; a lower polarizer, provided on a lower surface of the liquid crystal cell, i.e. a light incident side; an upper polarizer, provided on an upper surface of the liquid crystal cell, i.e. a light exiting side; and a light shielding pattern layer, including light shielding lines and being provided above the upper polarizer, i.e., at a light exiting side of the upper polarizer, wherein the color filter substrate is formed with a black matrix and a color filter thereon, and the array substrate is formed with gate lines, data lines, and thin film transistors thereon.

Abstract: There are provided a reflective mask and a reflective mask blank reducing reflection of out-of-band light and a manufacturing method therefor. A light shielding frame is formed on a mask region corresponding to a multiply exposed boundary region between a chip and a semiconductor substrate. The frame is provided with an antireflective layer causing surface reflection in antiphase to out-of-band light reflected from the surfaces of a rear-surface conductive film and the substrate to provide a reflective mask reducing reflection of out-of-band light. The antireflective layer of the present disclosure has an electrical conductivity of 1×104/m? or greater to minimize charging occurring in a pattern region in observing the region using an electron microscope.

Abstract: In a mask blank having a structure in which a light-semitransmissive film and a light-shielding film are laminated on a main surface of a transparent substrate, the light-semitransmissive film is made of a material that can be dry-etched with an etching gas containing a fluorine-based gas, the light-shielding film is made of a material that contains tantalum and one or more elements selected from hafnium and zirconium and contains no oxygen except in a surface layer thereof, an etching stopper film is provided between the light-semitransmissive film and the light-shielding film, and the etching stopper film is made of a material that contains chromium with an oxygen content of 20 at % or less.

Abstract: Provided is a mask blank including a phase shift film on a transparent substrate. This phase shift film includes a phase shift layer at least containing a transition metal and silicon, and a silicon layer, which is configured to attenuate exposure light with which the phase shift layer is irradiated, and the silicon layer is formed to be in contact with the substrate side of the phase shift layer. This mask blank is used in manufacturing a phase shift mask to which laser exposure light having a wavelength of 200 nm or less is applied.

Abstract: Provided is a film formation method including the steps of: forming a resist film on an object to be applied, forming a layer of a protecting material removable by a first dissolving liquid on the upper surface of the resist film, removing the resist film from a region not having, on the upper surface thereof, the layer of the protecting material by side rinsing with a second dissolving liquid capable of dissolving the resist film therein, and removing the protecting material remaining on the upper surface of the resist film by the first dissolving liquid.

Abstract: The disclosure is related to a lithographic mask for EUV lithography, to a method for producing the mask, to a method for printing a pattern with the mask, to a stepper/scanner configured to print a pattern with the mask as well as to a computer-implemented method for calculating a deformation of the pattern. The mask comprises an absorber pattern, which is intentionally deformed in the 2-dimensional plane of the EUV mask, with respect to the intended pattern. The deformation of the pattern is based on a previous measurement of the location of multilayer defects on the blank, and calculated so that in the deformed pattern, a maximum of multilayer defects are covered by absorber material. When the pattern is subsequently printed on a semiconductor wafer in a stepper/scanner, the scanner operation is modulated so that the pattern deformation is not reproduced on the wafer.

Abstract: A structure including an EUV mask and a pellicle attached to the EUV mask. The pellicle includes a pellicle frame and a plurality of pellicle membrane layers attached to the pellicle frame. The plurality of pellicle membrane layers include at least one core pellicle membrane layer and an additional pellicle membrane layer is disposed on the at least one core pellicle membrane layer. In some embodiments, the additional pellicle membrane layer is a material having a thermal emissivity greater than 0.2, a transmittance greater than 80%, and a refractive index (n) for 13.5 nanometer source of greater than 0.9.

Abstract: Provided are an adhesive comprising substantially no surface modifier and leaving a less residue behind after a pellicle is separated; a pellicle; and a method of selecting an adhesive leaving a less residue behind. More specifically, provided are an adhesive for a pellicle having a ratio of a peel strength to a tensile strength of from 0.10 to 0.33; a pellicle comprising a pellicle frame, a pellicle film provided over an upper end face of the pellicle frame, and the adhesive adhered to a lower end face of the pellicle frame; and a method of selecting an adhesive, comprising the steps of: measuring a peel strength and a tensile strength of an adhesive, and selecting an adhesive having a ratio of the former to the latter of from 0.10 to 0.33 as the adhesive for a pellicle.

Abstract: An optical element includes: a base; a multilayer film which is provided on the base and in which a plurality of unit laminate structures are laminated, each laminate structure having a first layer and a second layer provided on the first layer; and a plurality of spacer layers which are each provided at a different one of a plurality of interlaminar positions located between the unit laminate structures.

Abstract: A method for generating a predetermined three-dimensional contour of a component and/or a wafer comprises: (a) determining a deviation of an existing three-dimensional contour of the component and/or the wafer from the predetermined three-dimensional contour; (b) calculating at least one three-dimensional arrangement of laser pulses having one or more parameter sets defining the laser pulses for correcting the determined existing deviation of the three-dimensional contour from the predetermined three-dimensional contour; and (c) applying the calculated at least one three-dimensional arrangement of laser pulses on the component and/or the wafer for generating the predetermined three-dimensional contour.

Abstract: The present invention aims to provide a reflective mask blank and a reflective mask which have a highly smooth multilayer reflective film as well as a low number of defects, and methods of manufacturing the same, and aims to prevent charge-up during a mask defect inspection using electron beams.

Abstract: The present disclosure describes a method to form alignment marks on or in the top layer of an extreme ultraviolet (EUV) mask blank without the use of photolithographic methods. For example, the method can include forming a metal structure on the top layer of the EUV mask blank by dispensing a hexacarbonylchromium vapor on the top layer of the EUV mask and exposing the hexacarbonylchromium vapor to an electron-beam. The hexacarbonylchromium vapor is decomposed to form the metal structure at an area which is proximate to where the hexacarbonylchromium vapors interact with the electron-beam. In another example, the method can include forming a patterned structure in the top layer of an EUV mask blank with the use of an etcher aperture and an etching process.

Abstract: A method of fabricating a photomask includes depositing a phase shifter over a light transmitting substrate, depositing a shading layer over the light transmitting substrate, and removing a portion of the shading layer and a portion of the phase shifter to expose a portion of the light transmitting substrate. The phase shifter having at least two semiconductor layers and at least two dielectric layers.

Abstract: A lithographic patterning method includes forming a multi-layer patterning material film stack on a semiconductor substrate, the patterning material film stack including a resist layer formed over one or more additional layers, and forming a metal-containing top coat over the resist layer. The method further includes exposing the multi-layer patterning material film stack to patterning radiation through the metal-containing top coat to form a desired pattern in the resist layer, removing the metal-containing top coat, developing the pattern formed in the resist layer, etching at least one underlying layer in accordance with the developed pattern, and removing remaining portions of the resist layer. The metal-containing top coat can be formed, for example, by atomic layer deposition or spin-on deposition over the resist layer, or by self-segregation from the resist layer.

Abstract: There is provided a pellicle frame which prevents particles such as carbon black particles or filler particles from contaminating a photomask even when stray light hits the inside face of the pellicle frame in the exposure step of photolithography. More specifically, provided are a pellicle frame including a frame base, and a polymer coating layer coating at least an inner circumferential surface of the frame base, the polymer coating layer including an outermost polymer layer on a side farthest away from the frame base and one or more inner polymer layers between the frame base and the outermost polymer layer, wherein at least one of the one or more inner polymer layers contains particles, and the outermost polymer layer contains no particles or has a particle concentration lower than a highest particle concentration among the one or more inner polymer layers; and a pellicle including the pellicle frame.

Abstract: A photomask includes a light transmission substrate, a plurality of pattern regions disposed over the light transmission substrate, a shape of the plurality of pattern regions being transferred onto a wafer during an exposure process, and a light blocking region surrounding the plurality of pattern regions. Each of the plurality of pattern regions is a light transmitting region that exposes a portion of the light transmission substrate. The light blocking region includes first light blocking patterns that respectively surround the plurality of pattern regions to have closed loop shapes and second light blocking patterns that are disposed between adjacent first light blocking patterns, adjacent second light blocking patterns being spaced apart from each other by a first distance in a first direction. And the first light blocking patterns have a first thickness and the second light blocking patterns have a second thickness which is smaller than the first thickness.

Abstract: A mask for photolithography includes: a transparent substrate; a phase shift pattern on the transparent substrate and configured to change a phase of light; a dielectric layer on the transparent substrate; and a negative refractive-index meta material layer on the dielectric layer.

Abstract: A method of fabricating a multi-tone amplitude photomask includes providing a mask substrate. The method includes providing a stepped pattern in at least one layer of material on a surface of the mask substrate. The stepped pattern includes at least two steps and at least three levels. Each level of the stepped pattern provides a different intensity of light when a light source shines light on the stepped pattern.

Abstract: Disclosed are systems, methods, and computer program products for electronic systems with through-substrate interconnects and mems device. An interconnect formed in a substrate having a first surface and a second surface, the interconnect includes: a bulk region; a via extending from the first surface to the second surface; an insulating structure extending through the first surface into the substrate and defining a closed loop around the via, wherein the insulating structure comprises a seam portion separated by at least one solid portion; and an insulating region extending from the insulating structure toward the second surface, the insulating region separating the via from the bulk region, wherein the insulating structure and insulating region collectively provide electrical isolation between the via and the bulk region.

Abstract: A pattern forming method includes forming a first film patterned in a line and space shape on an underlayer film, the line and space shape including lines and a space arranged therebetween, forming a second film to cover the first film, removing the second film to form the second film on a side surface of the first film in a line shape, forming a third film to cover the first film and the second film, removing the third film formed on the first film and the second film to form the third film on a side surface of the second film, and converting the third film after removing the third film formed on the first film and the second film, wherein the third film is comprised of an organic metal compound, the organic metal compound having characteristic to increase etching tolerance when the organic metal compound undergoes a predetermined process.

Abstract: Embodiments of the present invention discloses a touch-controlled panel and a method of manufacturing the same, and a display device, to reduce the number of masks and production cost. The method of manufacturing a touch-controlled panel includes: forming a first electrode and a second electrode on a substrate through a patterning process, the first electrode and the second electrode being broken at a position where they are overlapped; depositing a layer of an organic film and forming an organic film fully remained region, an organic film partially remained region and an organic film removed region from the organic film through a mask; depositing a conductive layer and coating a photoresist on the conductive layer, and then forming a photoresist fully remained region, a photoresist partially remained region and a photoresist removed region through the mask.

Abstract: Disclosed is a mask blank substrate for use in lithography, wherein the main surface on which the transfer pattern of the substrate is formed has a root mean square roughness (Rms) of not more than 0.15 nm obtained by measuring an area of 1 ?m×1 ?m with an atomic force microscope, and has a power spectrum density of not more than 10 nm4 at a spatial frequency of not less than 1 ?m?1.

Abstract: A photomask includes a pattern region and a plurality of defects in the pattern region. The photomask further includes a first fiducial mark outside of the pattern region, wherein the first fiducial mark includes identifying information for the photomask, the first fiducial mark has a first size and a first shape. The photomask further includes a second fiducial mark outside of the pattern region. The second fiducial mark has a second size different from the first size, or a second shape different from the first shape.

Abstract: The present disclosure relates to an array substrate, a display device, and the manufacturing method thereof. The array substrate includes a substrate, and a first gate electrode layer, a first insulation layer, a trench layer, a source/drain electrode layer, a second insulation layer, a pixel electrode layer and a second gate electrode layer formed on the substrate in sequence. The pixel electrode layer and the second gate electrode layer are spaced apart from each other. The second gate electrode layer, the first gate electrode layer, and the source/drain electrode layer form at least one thin film transistor (TFT) having a dual-gate structure. With such configuration, the driving forces of the array substrate may be greatly enhanced.

Abstract: The embodiments of this disclosure provide a luminescent complex, a luminescent material, a substrate for display and a production method thereof, and a display apparatus. This disclosure relates to the technical field of display. It is possible to increase the dispersibility of the luminescent particles, such as quantum dots or the like in the main material of a color filter to solve problems, such as uneven light emission, low light emission efficiency or the like of a substrate for display comprising the luminescent particles, so as to further reduce the loss of the back light brightness.

Abstract: A support frame for a pellicle, in which a pellicle film is adhered to the front surface of an aluminum-alloy frame body, and a transparent substrate is adhered to the rear surface of the frame body. A recessed groove is formed in the rear surface of the frame body, the recessed groove extending along the periphery of the frame body, and a vent hole is formed from the outer peripheral surface of the frame body to the inner surface of the recessed groove. With this configuration, deformation of the support frame can be suppressed when the support frame is removed from the transparent substrate.

Abstract: A metal mask substrate includes a metal surface to which a resist is to be disposed. A specular reflectance of incident light to the surface is 45.2% or more.

Abstract: A pellicle for lithography processes, including extreme ultraviolet (EUV) lithography may mitigate thermal accumulation in a membrane of the pellicle. The pellicle includes a membrane and at least one thermal buffer layer on at least one surface of the membrane. An emissivity of the thermal buffer layer may be greater than an emissivity of the membrane. A carbon content of the thermal buffer layer may be greater than a carbon content of the membrane. Multiple thermal buffer layers may be on separate surfaces of the membrane, and the thermal buffer layers may have different properties. A capping layer may be on at least one thermal buffer layer, and the capping layer may include a hydrogen resistant material. A thermal buffer layer may extend over some or all of a surface of the membrane. A thermal buffer layer may be between at least two membranes.

Abstract: The present invention provides a method for manufacturing a semiconductor device including following steps. A substrate, a hard mask layer disposed on the substrate and a first mask pattern disposed on the hard mask layer are provided, and the substrate has a device region and a cutting line region. The first mask pattern has first gaps in the device region and second gaps in the cutting line region. Next, a spacer layer conformally covers the first mask pattern. Then, a second mask pattern is formed on the spacer layer in the first gaps, and a top surface of the second mask pattern is lower than a top surface of the first mask pattern. Thereafter, an etching process is performed to the spacer layer to remove the spacer layer between the first mask layer and the second mask layer and in the second gaps and expose the hard mask layer.

Abstract: A photolithography system includes a substrate stage for holding a workpiece, and a mask having main patterns and sub-resolution assistant patterns. The system further includes a diffractive optical element (DOE) for directing a radiation having an aerial image of the main patterns onto the workpiece. The DOE includes a first pair of poles that is positioned symmetrically about a center of the DOE along a first direction. The main patterns are oriented lengthwise along a second direction that is perpendicular to the first direction. The sub-resolution assistant patterns are oriented lengthwise along the first direction.

Abstract: Disclosed are a divisional exposure apparatus which allows for forming a PAC layer uniformly on RGBW subpixels by a single mask process, using divisional exposure, in a large-size liquid crystal display with a COT structure, and a method of manufacturing a liquid crystal display using the same. To this end, the sum of illumination intensities at the center of an overlap region is controlled in the range of 120% to 130%, and gradually increases from 100% at the edge (boundary) of the overlap region. Accordingly, the cell gap between the RGB subpixels and the W subpixel is made uniform, thus preventing the problem of spots.

Abstract: A reticle for a semiconductor lithography process includes a glass plate having regions with a reduced optical transmission factor. The regions may include arrays of elements comprising defects such as cracks or voids which are formed by laser pulses. The regions may be adjacent to openings in an opaque material at the bottom of the reticle to shield the openings from a portion of the light which illuminates the reticle from the top. As a result, the light which exits the reticle and is used to pattern a substrate has an asymmetric intensity. This allows the substrate to be patterned with an inspection mark which indicates whether a defocus condition exists, and whether there is a positive or negative defocus condition. Related methods use a reticle to form a pattern on a substrate and for adjusting a focus condition using a reticle.

Abstract: The present application discloses an ultraviolet (UV) mask device and a method for using the UV mask device. The UV mask device includes: a platform, configured for carrying a substrate thereon; a mask substrate, configured above the platform for fixing a mask corresponding to the substrate on the platform; and a light source array, configured above the mask substrate by a first distance and including a plurality of UV light-emitting diodes (UV LEDs) emitting light having a first single central wavelength.

Abstract: A method of providing self-aligned via (SAV) awareness in optical proximity correction (OPC) includes identifying non-SAV edges, identifying any lower metal structure that is within a critical distance from the non-SAV edges, and defining replacement non-SAV edges proximate to the lower metal structure using a distance constraint that is evaluated as part of the OPC objective function to redefine the mask solution and relocate at least one non-SAV edge away from the lower metal structure.

Abstract: A pellicle is contaminated with dust or the like for various reasons during the production thereof. Especially, there is a problem that the risk that the dust or the like is attached is high during trimming or various other processes performed on a pellicle film. The present invention provides a method for producing a pellicle for EUV that decreases the attachment of dust or the like. A method for producing a pellicle includes forming a pellicle film on a substrate; trimming the substrate; and removing at least a part of the substrate after trimming the substrate. Before the part of the substrate is removed, at least particles attached to a surface of the pellicle film are removed.

Abstract: A method for generating sub-resolution assist features (SRAFs) for target features of a photomask includes generating a 2D rules-based assist feature (RBAF) rules table that estimates results obtained from a model-based SRAF method. The 2D RBAF rules table defines seed skeletons using polar coordinates. Empty space surrounding the target features is divided into corresponding owned regions. Seed skeletons are placed in the owned regions using the 2D RBAF rules table. The seed skeletons are widened, and the resulting structure is re-skeletonized. A cleaning process is performed on the re-skeletonized structure, eliminating potentially troublesome features, including stubs, forks, triple-points and quad-points. The cleaned skeleton structure is straightened, and polygonal SRAFs are placed at locations specified by the straightened skeleton structure.

Abstract: A mask blank, which is capable of being formed with high transfer accuracy when a hard mask film pattern is used as a mask, and even when the mask blank includes a chromium-based light shielding film. A light-semitransmissive film, a light shielding film, and a hard mask film are laminated in the stated order on a transparent substrate. The light-semitransmissive film contains silicon, and the hard mask film contains any one or both of silicon and tantalum. The light shielding film has a laminate structure of a lower layer and an upper layer, and contains chromium. The upper layer has a content of chromium of 65 at % or more, and a content of oxygen of less than 20 at %, and the lower layer has a content of chromium of less than 60 at %, and a content of oxygen of 20 at % or more.

Abstract: Provided is a silica glass member which exhibits high optical transparency to vacuum ultraviolet light and has a low thermal expansion coefficient of 4.0×10?7/K or less at near room temperature, particularly a silica glass member which is suitable as a photomask substrate to be used in a double patterning exposure process using an ArF excimer laser (193 nm) as a light source. The silica glass member is used in a photolithography process using a vacuum ultraviolet light source, in which the fluorine concentration is 1 wt % or more and 5 wt % or less, and the thermal expansion coefficient at from 20° C. to 50° C. is 4.0×10?7/K or less.

Abstract: The apparatus includes a plurality of correlation processors configured to each receive a group of samples and generate correlations of each group of samples; a plurality of multipliers each configured to multiply the correlations of one of the plurality of correlation processors by a weight, wherein the weight of at least one of the plurality of multipliers is different from the weight of at least another one of the plurality of multipliers; a summation processor configured to sum the weight multiplied correlations of the plurality of multipliers for time n, where n is an integer; and a coarse timing and coarse frequency processor configured to generate a coarse timing and a coarse frequency based on the sum.

Abstract: Disclosed are methods of generating a proximity-corrected design layout for photoresist to be used in an etch operation. The methods may include identifying a feature in an initial design layout, and estimating one or more quantities characteristic of an in-feature plasma flux (IFPF) within the feature during the etch operation. The methods may further include estimating a quantity characteristic of an edge placement error (EPE) of the feature by comparing the one or more quantities characteristic of the IFPF to those in a look-up table (LUT, and/or through application of a multivariate model trained on the LUT, e.g., constructed through machine learning methods (MLM)) which associates values of the quantity characteristic of EPE with values of the one or more quantities characteristics of the IFPF. Thereafter, the initial design layout may be modified based on at the determined quantity characteristic of EPE.