Abstract: A memory device utilizing a phase change material as the storage medium, the phase change material based on antimony as the solvent in a solid solution.

Abstract: Integrated circuit devices are provided having a vertical diode therein. The devices include an integrated circuit substrate and an insulating layer on the integrated circuit substrate. A contact hole penetrates the insulating layer. A vertical diode is in a lower region of the contact hole and a bottom electrode in the contact hole has a bottom surface on a top surface of the vertical diode. The bottom electrode is self-aligned with the vertical diode. A top surface area of the bottom electrode is less than a horizontal section area of the contact hole. Methods of forming the integrated circuit devices and phase change memory cells are also provided.

Abstract: To provide an organic EL device capable of making uniform a dry speed of a liquid material coated in a display area. There is provided an organic EL device in which a plurality of pixels XR, XG, XB is arranged in an effective display area of a substrate and each of the pixels XR, XG, XB is provided with a first organic EL element having a functional film formed by a liquid phase method, wherein a dummy area D having a plurality of dummy pixels D1R, D1G, D1B, D2R, D2G, D2B for inspection of characteristics is provided around the effective display area and each dummy pixel is provided with a second organic EL element having a functional film formed using the same process as the functional film of the first organic EL element.

Abstract: A phase change memory cell includes a phase change region of a phase change material, a heating element of a resistive material, arranged in contact with the phase change region and a memory element formed in said phase change region at a contact area with the heating element. The contact area is in the form of a frame that has a width of sublithographic extent and, preferably, a sublithographic maximum external dimension. The heating element includes a hollow elongated portion which is arranged in contact with the phase change region.

Abstract: Phase change memory devices having cell diodes and related methods are provided, where the phase change memory devices include a semiconductor substrate of a first conductivity type and a plurality of parallel word lines disposed on the semiconductor substrate, the word lines have a second conductivity type different from the first conductivity type and have substantially flat top surfaces, a plurality of first semiconductor patterns are one-dimensionally arrayed on each word line along a length direction of the word line, the first semiconductor patterns have the first conductivity type or the second conductivity type, second semiconductor patterns having the first conductivity type are stacked on the first semiconductor patterns, an insulating layer is provided on the substrate having the second semiconductor patterns, the insulating layer fills gap regions between the word lines, gap regions between the first semiconductor patterns and gap regions between the second semiconductor patterns, a plurality of p

Abstract: A method of manufacturing a thin-film circuit substrate, containing: (a) gouging a surface of a circuit substrate in a depth at least approximately equal to a thickness of a final product of the substrate, to form a section to be formed a penetrating section; (b) providing a protecting adhesive tape to adhere to the gouged surface of the substrate, before a backing surface of the substrate is ground; (c) grinding the backing surface in such a thickness that the gouged section would not penetrate; (d) dry etching entirely the backing surface, while the tape adheres to the substrate, after completion of the grinding for the backing surface; and (e) making the gouged section of the substrate to penetrate, by the dry etching, thereby forming the penetrating structure section; and, a protecting adhesive tape usable in the method.

Abstract: A memory device, such as a PCRAM, including a chalcogenide glass backbone material with germanium telluride glass and methods of forming such a memory device.

Abstract: The invention includes a device displaying differential negative resistance characterized by a current-versus-voltage profile having a peak-to-valley ratio of at least about 9. The invention also includes a semiconductor construction comprising a substrate, and a first layer over the substrate. The first layer comprises Ge and one or more of S, Te and Se. A second layer is over the first layer. The second layer comprises M and A, where M is a transition metal and A is one or more of O, S, Te and Se. A third layer is over the second layer, and comprises Ge and one or more of S, Te and Se. The first, second and third layers are together incorporated into an assembly displaying differential negative resistance. Additionally, the invention includes methodology for forming assemblies displaying differential negative resistance, such as tunnel diode assemblies.

Abstract: A method is describe for fabricating memory components including memory cells based on an active material of an active layer, the phase state of which can be changed and which is enclosed between a bottom electrode and a top electrode. To reduce the current intensity of the programming current and the erase current required for programming and erasing of the memory element and therefore the quantity of heat which is required to change the phase state, a nanoporous aluminium oxide layer is used as a mask during the production of the active layer or the interface with the electrodes. The nanoporous aluminium oxide layer can be used as a positive mask, as a negative mask, or used directly as an insulating current aperture. The contact surface between electrode and active layer can be set in virtually any desired form by varying the process parameters of the aluminium oxide mask.

Abstract: The invention relates to a method for manufacturing at least one phase change memory cell. The method at least fabricating at least one first lamellar spacer of conductive material, which is electrically coupled to the PCM material of the memory cell; fabricating at least one second lamellar spacer on top of the first lamellar spacer, wherein the second lamellar spacer crosses the first lamellar spacer in the area of the PCM material; partially removing the first lamellar spacer, wherein the second lamellar spacer serves as a hardmask for partially removing the first lamellar spacer, so that the first lamellar spacer forms at least one electrode contacting an area of PCM material.

Abstract: A semiconductor bear chip having a bump subjected to high temperatures is pressed, from the upper side, onto a wiring board including a wiring pattern, a thermosetting resin film covering an electrode area on the wiring pattern and having insulating particles dispersed and included and a thermoplastic resin film covering the thermosetting resin film, while applying a ultrasonic wave, thereby inserting the bumps of the semiconductor bear chip through the thermoplastic resin film and the thermosetting resin film to bond the top end portion of the bump with the electrode area.

Abstract: A non-volatile memory comprising: a first substrate (100) and a second substrate (110), the first substrate (100) having a plurality of switching elements (4) arranged in matrix, and a plurality of first electrodes (18) connected to the switching element (4), the second substrate (110) having a conductive film (32), and a recording layer (34) whose resistance value changes by application of an electric pulse, wherein the plurality of first electrodes (18) are integrally covered by the recording layer (34), the recording layer (34) thereby being held between the plurality of first electrodes (18) and the conductive film (32); the first substrate (100) further comprising a second electrode (22), the second electrode (22) being electrically connected to the conductive film (32), the voltage of which is maintained at a set level while applying current to the recording layer (34). This non-volatile memory achieves high integration at low cost.

Abstract: Processes for effecting thermal transfer of electroactive organic material are disclosed wherein unwanted portions of a layer of electroactive organic material supported by a donor element are removed or transferred from the layer by thermal transfer, particularly laser-induced thermal transfer, leaving a desired pattern of the electroactive organic material on the donor element. The electroactive organic material may be an organic material exhibiting electroluminescence, charge transport, charge injection, electrical conductivity, semiconductivity and/or exciton blocking. The layer of electroactive organic material may comprise more than one layer of different types of electroactive organic material. The exposure pattern is a negative image of the desired pattern. The electroactive organic material of the desired pattern is not, therefore, exposed to the heat which can cause decomposition.

Abstract: When an electronic component is mounted on a substrate, the electronic component is first placed on the substrate with a solid support interposed between the electronic component and the substrate. The solid support serves to space a terminal conductor of the electronic component from a corresponding terminal pad on the substrate. A conductive bonding material is then melted on the terminal pad. The melted conductive bonding material gets exposed to the peripheral atmosphere over a larger area. Even if a bubble is generated within the melted conductive bonding material, the bubble is allowed to easily get out of the melted conductive bonding material. Removal of the gas is promoted in the melted conductive bonding material. The solid support is subsequently melted. The electronic component is moved down toward the substrate, thereby contacting the terminal conductor with the melted conductive bonding material on the corresponding terminal pad.

Abstract: A method for fabrication and a structure of a self-aligned (crosspoint) memory device comprises lines (wires) in a first direction and in a second direction. The wires in the first direction are formed using a hard mask material that is resistant to the pre-selected etch processes used for creation of the lines in both the first and the second direction. Consequently, the hard mask material for the lines in the first direction form part of the memory stack.

Abstract: The present invention relates to a non-volatile memory comprising: a first electrode (11); a second electrode (12); and a phase-change recording medium (14) sandwiched between the first electrode (11) and the second electrode (12), in which resistance value is varied by applying an electrical pulse across the first electrode (11) and the second electrode (12), at least one of the first electrode (11) and the second electrode (12) contains as a main ingredient at least one member selected from the group consisting of ruthenium, rhodium and osmium, and the phase-change recording medium (14) is formed of a phase-change material that contains chalcogen(s). This non-volatile memory exhibits improved durability and reliability by preventing deterioration of property (i.e., mutual impurity diffusion between the electrode and the phase-change recording medium) caused by application of current.

Abstract: The invention provides an electro-optical device and a manufacturing method therefor which makes it possible to manufacture power source wiring lines more simply. Power source wiring lines are formed by an inkjet method.

Abstract: There is disclosed a semiconductor light emitting element formed by selective growth and being high in light emitting efficiency, in which at least one GaN-based layer grown by ELO in stacked/formed on a sapphire substrate, and a fluorescent substance for converting an ultraviolet light to a visible light is contained in a selective growth mask material layer for use in this case. Since this fluorescent substance converts the ultraviolet light to the visible light, a binding efficiency of the ultraviolet light to the fluorescent substance is enhanced in either one of a center light emitting type and UV light emitting type of light emitting elements. By further containing the fluorescent substance into a passivation film, the efficiency is further enhanced.

Abstract: A first conductive electrode material is formed on a substrate. Chalcogenide comprising material is formed thereover. The chalcogenide material comprises AxSey. A silver comprising layer is formed over the chalcogenide material. The silver is irradiated effective to break a chalcogenide bond of the chalcogenide material at an interface of the silver comprising layer and chalcogenide material and diffuse at least some of the silver into the chalcogenide material. After the irradiating, the chalcogenide material outer surface is exposed to an iodine comprising fluid effective to reduce roughness of the chalcogenide material outer surface from what it was prior to the exposing. After the exposing, a second conductive electrode material is deposited over the chalcogenide material, and which is continuous and completely covering at least over the chalcogenide material, and the second conductive electrode material is formed into an electrode of the device.

Abstract: A light emitting display comprising a first electrode layer on a substrate. The electrode layer is patterned to form a plurality of laterally spaced apart strips in a first direction. A plurality of spacedly disposed light emitting organic elements with a second electrode layer atop are disposed on the first electrode layer in a second direction. An undercut structure made of an undercut pattern transfer layer and an overlaying pattern transfer layer. The undercut structure is disposed between the plurality of spacedly disposed light emitting organic elements. A light emitting display having a color isolation well. The color isolation well is characterized by a first well layer and a second well layer in which the first well layer matches a property of an emissive polymer or small molecule dye held by the well whereas the second well layer does not match the property.

Abstract: A method of making an electrically operated memory element. The memory element having a contact in electrical communication with a memory material programmable to at least a first resistance state and a second resistance state. Preferably, the contact includes at least a first region having a first resistivity and a second region having a second resistivity greater than the first resistivity where the more resistive region is adjacent to the memory material.

Abstract: We introduce an alternative concept to increase the efficiency and brightness of thin-film electroluminescent (TFEL) devices. The method utilizes bandgap engineering of the active layer of the device. First steps of our work using a ZnSxSe1−x alloy are also presented to demonstrate workability of the method. The related obstacles and future potentials of the bandgap engineering for monochrome and color TFEL devices, are discussed.

Abstract: A method of forming an electrode and a ferroelectric thin film thereon, includes preparing a substrate; depositing an electrode on the substrate, wherein the electrode is formed of a material taken from the group of materials consisting of iridium and iridium composites; and forming a single-phase, c-axis PGO ferroelectric thin film thereon, wherein the ferroelectric thin film exhibits surface smoothness and uniform thickness.

Abstract: Systems and methods are described for synthesis of films, coatings or layers using electrostatic fields. A method includes applying an electrostatic field across a first precursor layer that is coupled to a first substrate and a second precursor layer that is coupled to a second substrate; forming a composition layer; and moving the first substrate relative to the second substrate, wherein the composition layer remains coupled to the second substrate.

Abstract: A p-type ZnO film is formed on a sapphire substrate by RF magnetron sputtering in an atmosphere of a mixture of Ar and N2 gases, using a Zn metal target doped with Y2O3. The p-type ZnO film can be easily formed even on a large-sized substrate.

Abstract: Annular, linear, and point contact structures are described which exhibit a greatly reduced susceptibility to process deviations caused by lithographic and deposition variations than does a conventional circular contact plug. In one embodiment, a standard conductive material such as carbon or titanium nitride is used to form the contact. In an alternative embodiment, a memory material itself is used to form the contact. These contact structures may be made by various processes, including chemical mechanical planarization and facet etching.

Abstract: An exemplary embodiment of the present invention includes a method for forming a programmable cell by forming an opening in a dielectric material to expose a portion of an underlying first conductive electrode, forming a recessed chalcogenide-metal ion material in the opening and forming a second conductive electrode overlying the dielectric material and the chalcogenide-metal ion material. A method for forming a recessed chalcogenide-metal ion material comprises forming a glass material to be recessed approximately 50% or less, in the opening in the dielectric material, forming a metal material on the glass material within the opening and diffusing metal ions from the metal material into the glass material by using ultraviolet light or ultraviolet light in combination with a heat treatment, to cause a resultant metal ion concentration in the glass material.

Abstract: A multi-part lead frame die assembly is disclosed including a die bonded to a die paddle. A second lead frame including leads is superimposed and bonded onto the first lead frame. Also disclosed is a method for fabricating the multi-part lead frame assembly which utilizes equipment designed for single lead frame processing. If desired, the materials for the multi-part lead frame may be dissimilar.

Abstract: The invention relates to a method for forming a telescoped multiwall nanotube. Such a telescoped multiwall nanotube may find use as a linear or rotational bearing in microelectromechanical systems or may find use as a constant force nanospring. In the method of the invention, a multiwall nanotube is affixed to a solid, conducting substrate at one end. The tip of the free end of the multiwall nanotube is then removed, revealing the intact end of the inner wall. A nanomanipulator is then attached to the intact end, and the intact, core segments of the multiwall nanotube are partially extracted, thereby telescoping out a segment of nanotube.

Abstract: A method for growing nitride semiconductor crystals according to the present invention includes the steps of: a) forming a first metal single crystal layer on a substrate; b) forming a metal nitride single crystal layer by nitrifying the first metal single crystal layer; and c) epitaxially growing a first nitride semiconductor layer on the metal nitride single crystal layer.

Abstract: A cost-competitive, dense, CMOS compatible ZPROM memory array design and method of manufacture is disclosed. The method of manufacture includes a novel method for forming extremely thin diodes and thin strips of other materials such as conductors by using oxide spacers as an etching mask.

Abstract: A wafer comprising a semiconductor layer formed on a substrate is diced on the back surface of the substrate to a depth of about ¾ thickness of the substrate. Thus a separation groove 21 is formed in a direction of a dicing line. A groove 22 is formed at the portion of the semiconductor layer corresponding to the groove 21. The groove 22 reaches the substrate. The back surface 11b of the substrate 11 is polished until the substrate become a lamella having only a trace of the groove 22. A metal layer 10 is formed by depositing aluminum (Al) so as to cover the entire back 11b of the substrate 11, and a groove 23 formed at the portion of the metal layer corresponding to the groove 21. An adhesive sheet 24 is adhered on an electrode pad 20. A scribe line is formed by scribing the metal layer 10 along the groove 23. The wafer is loaded by a roller in a breaking process. Accordingly, a wafer having the metal layer on the back surface 11b of the substrate can be obtained.

Abstract: A method is disclosed for generating light in one or more buried layers of a multilayer compound semiconductor material by contacting the material with a tansparent, electrically conducting fluid and passing current between the fluid and the semiconductor material. The measured characteristics of the light emitted from a first semiconductor material may be compared with those measured from a second semiconductor material of known properties, and the properties of the first semiconductor material calculated. Uniformity maps of the compound semiconductor material may be prepared using the patterns of various light emission characteristics measured across the surface of the material.

Abstract: Known MBE methods of heat-treating semiconductor crystal of a group II-group VI compound for crystal growth are accompanied by a problem of releasing the component elements during the heat-treatment to produce a coarse crystal surface that adversely affects the subsequent crystal growth steps. According to the invention, this problem is eliminated by irradiating a substrate of a group II-group VI compound, specifically ZnSe, with Zn beams and Se beams depending on the vapor pressures of the elements between the respective starting points and the respective terminating points to compensate the released Zn and Se so that consequently no oxide film is formed on the ZnSe substrate when the heat-treatment is completed to produce a plane crystal surface that is free from coarseness.