Abstract: A charge transfer device 1 has an P-type region, an N-type well provided to the surficial portion of the P-type region, and transfer electrodes having P-type conductivity, provided over the N-type substrate while placing an insulating film in between.

Abstract: A method of manufacturing a solid-state image pickup device according to an embodiment includes forming first and second holes in a semiconductor substrate, forming insulating films on surfaces of the first and second holes, forming a contact and an alignment mark by embedding a conducting material in the first and second holes, forming a photodiode in the semiconductor substrate, forming a wiring layer including a connecting part for connecting to the contact and a wiring for connecting to the connecting part, bonding a supporting substrate on the wiring layer, exposing the contact and the alignment mark on the surface of the semiconductor substrate by reducing the semiconductor substrate in thickness, and forming a filter and a lens on the photodiode based on the alignment mark.

Abstract: Methods for manufacturing thin film transistor arrays utilizing three steps of lithography and one step of laser ablation while the lithography procedure is used four to five times in conventional processes are disclosed. The use of the disclosed methods assists in improving throughput and saving of manufacturing cost.

Abstract: A first oxide film (102) is formed on a semiconductor substrate (101). A first nitride film (103) is formed on first gate electrode formation regions of the first oxide film (102). A plurality of first gate electrodes (104) are provided on the first nitride film (103) so as to be spaced apart from one another with a predetermined distance therebetween. A second oxide film (105) covers upper part and side walls of each of the first gate electrodes (104). A sidewall spacer (106) of a third oxide film is buried in an overhang portion generated on each side wall of each of the first gate electrodes (104) covered by the second oxide film (105). A second nitride film (107) covers the second oxide film (105), the sidewall spacer (106) and part of the first oxide film (102) located between the first gate electrodes (104). A plurality of second gate electrodes (108) are formed on at least part of the second nitride film (107) located between adjacent two of the first gate electrodes (104).

Abstract: In an example embodiment, an image sensor includes a semiconductor layer and isolation regions disposed in the semiconductor layer. The isolation regions define active regions of the semiconductor layer. The image sensor further includes photoelectric converters disposed in the semiconductor layer and at least one wiring layer disposed over a top surface of the semiconductor layer. The image sensor also includes color filters disposed below a bottom surface of the semiconductor layer and lenses disposed below the color filters. Each lens is arranged to concentrate incoming light into an area spanned by a corresponding photoelectric converter.

Abstract: A method of fabricating an image sensor may include providing a substrate including light-receiving and non-light-receiving regions; forming a plurality of gates on the non-light-receiving region; ion-implanting a first-conductivity-type dopant into the light-receiving region to form a first dopant region of a pinned photodiode; primarily ion-implanting a second-conductivity-type dopant, different from the first-conductivity-type dopant, into an entire surface of the substrate, using the gates as a first mask; forming spacers on both side walls of the gates; and secondarily ion-implanting the second-conductivity-type dopant into the entire surface of the substrate, using the plurality of gates including the spacers as a second mask, to complete a second dopant region of the pinned photodiode.

Abstract: The present invention provides a display comprising a panel having a display region for displaying an image and a peripheral region defined therein, a plurality of thin film transistors (TFTs) formed in the display region, p-type and n-type TFTs formed in the peripheral region, and at least one photo diode formed in a horizontal structure in the display or peripheral region; and a method of manufacturing the display. According to the present invention, n-type and p-type TFTs and a photo diode can be together formed without an additional process when forming the TFTs using a polycrystalline silicon thin film, and various peripheral circuits can be configured using such elements.

Abstract: An image sensor and fabricating method thereof are provided. The image sensor can include a color filter on a semiconductor substrate, a microlens on the color filter layer, and a carbon-doped low temperature oxide layer on the microlens.

Abstract: Embodiments relate to an image sensor and a method for manufacturing an image sensor. According to embodiments, a method may include forming a semiconductor substrate including a pixel part and a peripheral part, forming an interlayer dielectric film including a metal wire on and/or over the semiconductor substrate, forming photo diode patterns on and/or over the interlayer dielectric film and connected to the metal wire in the pixel part, forming a device isolation dielectric layer on and/or over the interlayer dielectric film including the photo diode patterns, forming a first via hole on and/or over the device isolation dielectric layer to partially expose the photo diode patterns, and forming a second via hole on and/or over the device isolation dielectric layer to expose the metal wire in the peripheral part. According to embodiments, vertical integration of transistor circuitry and a photo diode may be achieved.

Abstract: Disclosed herein is a solid-state image pickup device which includes: a light-receiving unit for photoelectric conversion of incident light; and a charge transfer unit of an n-channel insulating gate type configured to transfer a signal charge photoelectrically converted in the light-receiving unit; wherein the charge transfer unit has an insulating film formed on a transfer electrode and having a negative fixed charge.

Abstract: A pixel of an image sensor includes a polysilicon layer, and an active region which needs to be electrically coupled with the polysilicon layer, wherein the polysilicon layer extends over a portion of the active region, such that the polysilicon layer and the active region are partially overlapped, and the polysilicon layer and the active region are coupled through a buried contact structure.

Abstract: A method and structure of providing a doped plug to improve the performance of CCD gaps is discussed. A highly-doped region is implemented in a semiconductor, aligned beneath a gap. The plug provides a highly-conductive region at the semiconductor surface, therefore preventing the development of a region where potential is significantly influenced by surface charges.

Abstract: Disclosed is a CMOS image sensor including a gate electrode of a finger type transfer transistor for controlling the saturation state of a floating diffusion region according to the luminance level (i.e. low luminance or high luminance). The CMOS image sensor includes first and second photodiode regions for generating electrons in response to incident light, and a transfer transistor positioned between the first and second photodiodes for receiving the generated electrons transferred from the first and/or second photodiode.

Abstract: There are provided a MOS transistor and a manufacturing method thereof. The MOS transistor includes a substrate on which an insulating layer is formed, a gate embedded in the insulating layer, wherein the top surface of the gate is exposed, a gate oxide layer formed on the insulating layer and the gate, a silicon layer formed on the gate oxide layer, and a source region and a drain region formed in the silicon layer to be in contact with the gate oxide layer.

Abstract: A method for manufacturing a semiconductor device includes steps of forming an embedded channel 12 in a semiconductor substrate 11, forming a resist layer on the embedded channel 12 through an oxide film 14, exposing the resist layer using a grating mask the light transmissivity of which varies toward transfer directions of electric charges, developing the exposed resist layer to form a resist mask having a gradient, forming a first impurity region 13 having a concentration gradient by injecting ions into the embedded channel 12 through the resist mask, and arranging transfer electrodes 15 at prescribed positions on the first impurity region 13 through the oxide film 14 after removing the resist mask, wherein a potential profile becomes deeper toward the transfer directions of the electric charges.

Abstract: A copper gate electrode, applied in a thin-film-transistor liquid crystal display (LCD) device, at least comprises a patterned copper layer formed on a glass substrate, and a barrier layer formed on the patterned copper layer. The barrier layer comprises at least one of nitrogen and phosphorus, or comprises an alloy formularized as M1M2R wherein M1 is cobalt (Co) or molybdenum (Mo), M2 is tungsten (W), molybdenum (Mo), rhenium (Re) or vanadium (V), and R is boron (B) or phosphorus (P).

Abstract: Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which would aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon.

Abstract: A co-planar waveguide structure is integrated with an upwardly extending resonant pillar to produce transfer cells that provide controlled transmission of electricity between adjacent structures of the co-planar waveguide in order to produce easily fabricated electronic devices operating at megahertz and gigahertz speeds for filtration, modulation, rectification, and mixing of high-frequency signals.

Abstract: A method for fabricating a back-illuminated semiconductor imaging device and resulting imaging device is disclosed, which includes the steps providing a substrate having a front surface and a back surface; growing an epitaxial layer substantially overlying the front surface of the substrate; forming at least one barrier layer substantially within the epitaxial layer; fabricating at least one imaging structure overlying and extending into the epitaxial layer, the imaging structure at least one charge transfer region, the at least one barrier layer substantially underlying the at least one charge transfer region, wherein light incident on the back surface of the substrate generates charge carriers which are diverted away from the at least one charge transfer region by the at least one barrier layer. At least a portion of the epitaxial layer is grown using an epitaxial lateral overgrowth technique.

Abstract: A method of manufacturing a photodiode sensor and an associated charge transfer transistor includes forming an insulation region on a substrate, forming the diode on a first side of the insulation region with the diode being self-aligned on the insulation region, and replacing the insulation region by a gate of the charge transfer transistor. The invention has particular utility in the manufacture of CMOS or CCD image sensors.

Abstract: The invention provides CCD type solid-state imaging apparatus comprises: photoelectric conversion elements; a plurality of first transfer paths extending in a first direction; and second transfer paths extending in a first direction; the first transfer paths and the second transfer paths respectively including a plurality of discretely formed first layer transfer electrode films and second layer transfer electrode films formed between the first layer transfer electrode films and whose ends are laminated on the ends of the adjacent first layer transfer electrode films via insulating films. The thickness of the insulating film between the first layer transfer electrode film and the second layer transfer electrode film constituting the second transfer path shown is smaller than the thickness of the insulating film between the first layer transfer electrode film and the second layer transfer electrode film constituting the first transfer path shown.

Abstract: A CMOS image sensor and manufacturing method thereof are disclosed. The present CMOS image sensor comprises: a semiconductor substrate including an active region having a photo diode region and a transistor region; a gate on the active region, comprising a gate insulating layer and a gate electrode thereon; a first source/drain diffusion region in the transistor region at one side of the gate electrode, including a first conductivity type dopant; a second photo diode diffusion region in the region at the other side of the gate electrode, the second diffusion region including a first conductivity type dopant; insulating sidewalls on sides of the gate electrode; and a third diffusion region over or in the second diffusion region, extending below one of the insulating sidewalls (e.g., closest to the photo diode region), and including a second conductivity type dopant.

Abstract: The method for manufacturing a CMOS image sensor is employed to prevent bridge phenomenon between adjacent microlenses by employing openings between the microlenses. The method includes the steps of: preparing a semiconductor substrate including isolation regions and photodiodes therein obtained by a predetermined process; forming an interlayer dielectric (ILD), metal interconnections and a passivation layer formed on the semiconductor substrate in sequence; forming a color filter array having a plurality of color filters on the passivation layer; forming an over-coating layer (OCL) on the color filter array by using a positive photoresist or a negative photoresist; forming openings in the OCL by patterning the OCL by using a predetermined mask; and forming dome-typed microlenses on a patterned OCL.

Abstract: A CMOS image sensor array and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack with improved thickness uniformity to result in a pixel array exhibiting increased light sensitivity. In the sensor array, each Cu metallization level includes a Cu metal wire structure formed at locations between each array pixel and, a barrier material layer is formed on top each Cu metal wire structure that traverses the pixel optical path. By implementing a single mask or self-aligned mask methodology, a single etch is conducted to completely remove the interlevel dielectric and barrier layers that traverse the optical path. The etched opening is then refilled with dielectric material.

Abstract: An image sensor can include a gate insulation layer, a gate electrode, a photodiode, and a floating diffusion region. The gate insulation layer can be formed on and/or over a semiconductor substrate for a transfer transistor. The gate insulation layer includes a first gate insulation layer having a central opening and a second gate insulation layer formed on and/or over an uppermost surface of the first gate insulation layer including the opening. The gate electrode can be formed on and/or over the gate insulation layer. The photodiode can be formed in the semiconductor substrate at one side of the gate electrode so as to generate an optical charge. The floating diffusion region can be formed in the semiconductor at the other side of the gate electrode opposite to the photodiode. The floating diffusion region can be electrically connected to the photodiode through a channel so as to store the optical charge generated from the photodiode.

Abstract: Provided are a capacitorless DRAM (dynamic random access memory) and a fabrication method thereof. In a capacitorless DRAM, a pair of cylindrical auxiliary gates is formed within a bulk substrate. Thus, a volume of a channel body formed at a region where the cylindrical auxiliary gates contact with each other can be increased, while an area of a junction region where the channel body contact source and drain regions can be reduced. As a result, capacitance of the channel body can be increased, and a generation of leakage current through the second junction region can be reduced. The application of a back bias to the cylindrical auxiliary gates can improve a charge storage capability of the channel body.

Abstract: A hydrogen gas sensor and/or switch fabricated from arrays nanowires composed of metal or metal alloys that have stable metal hydride phases. The sensor and/or switch response times make it quite suitable for measuring the concentration of hydrogen in a flowing gas stream. The sensor and/or switch preferably operates by measuring the resistance of several metal nanowires arrayed in parallel in the presence of hydrogen gas. The nanowires preferably comprise gaps or break junctions that can function as a switch that closes in the presence of hydrogen gas. Consequently, the conductivity of the nanowires of the sensor and/or switch increases in the presence of hydrogen.

Abstract: More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region on between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.

Abstract: An image sensor and a method of manufacturing the image sensor, wherein the image sensor can electrically connect a light receiving portion and a printed circuit board (PCB) including circuits by forming holes and filling the holes with a conductive material, without using a wire for the electrical connection between the light receiving portion and the PCB. The light receiving portion converts lights into electrical signals and the PCB electrically processes signals. That is, since a distance for a wire between a sealing structure and because a filter is unnecessary, a thickness may be reduced. Also, since a space for wire bonding is unnecessary on the outside of an image sensor, a fill factor may increase. Also, since a process that may cause contaminates is removed, average yield may increase and production cost may decrease. The manufacturing productivity may be improved.

Abstract: A method for fabricating a CMOS image sensor may include forming an isolation layer defining an active area on a semiconductor substrate, forming first and second gate electrodes in the transistor area of the semiconductor substrate, forming a photodiode area in the semiconductor substrate at a first side of the first gate electrode, forming an oxide layer over the photodiode area, the oxide layer having a thickness greater than that of the dielectric layer, forming a source/drain extension area in the semiconductor substrate at a second side of the second gate electrode and between the first and second gate electrodes, forming source/drain regions in the transistor area of the semiconductor substrate by ion implantation through the dielectric layer, and forming a complementary ion implantation region in the photodiode area through the oxide layer.

Abstract: Provided is a CMOS image sensor with an asymmetric well structure of a source follower. The CMOS image sensor includes: a well disposed in an active region of a substrate; a drive transistor having one terminal connected to a power voltage and a first gate electrode disposed to cross the well; and a select transistor having a drain-source junction between another terminal of the drive transistor and an output node, and a second gate electrode disposed in parallel to the drive transistor. A drain region of the drive transistor and a source region of the select transistor are asymmetrically arranged.

Abstract: Provided is a manufacturing method of a CCD solid-state imaging device having such an impurity concentration distribution with which shading is reduced and formation of a buried channel endowed with a large saturation signal charge amount is made possible. The manufacturing method includes: an oxide layer forming step of forming an oxide layer (12) on a semiconductor substrate (11); an ion implantation step of performing ion implantation through the oxide layer (12) to the semiconductor substrate (11) thereby forming a well in a position corresponding to a charge transfer portion; and an insulation layer forming step of performing insulation layer forming processing to the oxide layer (12) having undergone the ion implantation step, at least in a position corresponding to the well.

Abstract: A pixel cell having a substrate with a isolation channel formed of higher carbon concentrate such as SiC or carbonated silicon. The channel comprising SiC or carbonated silicon is provided over the substrate of the pixel cell to reduce the dark current leakage.

Abstract: The prevent invention is to provide a solid-state imaging device having a electrode configuration applicable to a progressive scan, and able to reduce a obstruction of incident light at the periphery of a light receiving portion, a method of producing the same, a camera including the same. A first transfer electrode, a second transfer electrode, and a third transfer electrode which have a single layer transfer electrode configuration are repeatedly arranged in a vertical direction. The first transfer electrodes are connected in a horizontal direction by an inter-pixel interconnection formed in the same layer. Shunt interconnections are formed in the horizontal direction and in the vertical direction above the transfer layers. The shunt interconnection connected to the second transfer interconnection is formed on the inter-pixel interconnection. The shunt interconnection connected to the third transfer electrode is formed above the transfer electrodes.

Abstract: A semiconductor device having high operating performance and reliability, and a manufacturing method thereof are provided. An LDD region 207 provided in an n-channel TFT 302 forming a driving circuit enhances the tolerance for hot carrier injection. LDD regions 217-220 provided in an n-channel TFT (pixel TFT) 304 forming a pixel portion greatly contribute to the decrease in the OFF current value. Here, the LDD region of the n-channel TFF of the driving circuit is formed such that the concentration of the n-type impurity element becomes higher as the distance from an adjoining drain region decreases.

Abstract: A method for manufacturing a semiconductor device includes steps of forming an embedded channel 12 in a semiconductor substrate 11, forming a resist layer on the embedded channel 12 through an oxide film 14, exposing the resist layer using a grating mask the light transmissivity of which varies toward transfer directions of electric charges, developing the exposed resist layer to form a resist mask having a gradient, forming a first impurity region 13 having a concentration gradient by injecting ions into the embedded channel 12 through the resist mask, and arranging transfer electrodes 15 at prescribed positions on the first impurity region 13 through the oxide film 14 after removing the resist mask, wherein a potential profile becomes deeper toward the transfer directions of the electric charges.

Abstract: More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.

Abstract: An image sensor and a method of manufacturing the same, in which, a planarized layer is formed on a semiconductor substrate including a pixel array region, an optical black region, and a logic region to cover a photo sensing unit array in the pixel array region, a patterned metal layer is formed on the planarized layer corresponding to the pixel array region and the logic region, but not the optical black region. An optical black layer is formed in the optical black region after a passivation layer is formed and before a color filter array is formed at a temperature less than about 400° C., and preferably contains metal material.

Abstract: A semiconductor device and a method for manufacturing the same are disclosed. The semiconductor device suitable for preventing a threshold voltage of a recess gate from decreasing due to a voltage of an adjacent storage node comprises a semiconductor substrate having an active region which includes a gate area and a storage node contact area and is recess in the gate area; a device isolation structure formed in the semiconductor substrate to define the active region and having a shield layer therein; a recess gate formed in the gate area of the semiconductor substrate; and a storage node formed to be connected with the storage node contact area of the active region.

Abstract: A semiconductor device, including: a semiconductor material and an electrode structure electrically coupled to the semiconductor material. The electrode structure includes: a first portion formed of a first conductive material and a second portion formed of a second conductive material. Both the first portion and the second portion of the electrode structure are in direct contact with the semiconductor material. The first conductive material has a first work function and the second conductive material has a second work function that is different from the first work function, so that the second portion of the electrode structure forms a junction with the first portion. The first portion and the second portion of the electrode structure are arranged such that the fringe field from the edge of this junction between the first portion and the second portion extends into the semiconductor material.

Abstract: A CCD containing circuit and method for making the same. The circuit includes a CCD array and a protection circuit. The CCD array is constructed on an integrated circuit substrate and includes a plurality of gate electrodes that are insulated from the substrate by an insulating layer. The gate electrodes are connected to a conductor bonded to the substrate. The protection circuit is also constructed on the substrate. The protection circuit is connected to the conductor and to the substrate and protects the CCD array from both negative and positive voltage swings generated by electrostatic discharge events and the like. The protection circuit and the CCD can be constructed in the same integrated circuit fabrication process.

Abstract: Provided are methods for producing multiple distinct transistors from a single semiconductor layer, and apparatus incorporating transistors so produced.

Abstract: A method of forming a fin field effect transistor on a semiconductor substrate includes forming an active region in the substrate, forming an epitaxial layer on the active region, and removing a portion of the epitaxial layer to form a vertical fin on the active region. The fin has a width that is narrower than a width of the active region. Removing a portion of the epitaxial layer may include oxidizing a surface of the epitaxial layer and then removing the oxidized surface of the epitaxial layer to decrease the width of the fin. The epitaxial layer may be doped in situ before removing a portion of the epitaxial layer. The method further includes forming a conductive layer on a top surface and on sidewalls of the fin. Related transistors are also discussed.

Abstract: A solid-state image pick-up unit comprises: a semiconductor substrate comprising an area in which a photoelectric converting portion is formed; and an electric charge transfer portion that transfers an electric charge formed by the photoelectric converting portion, wherein the electric charge transfer portion comprises: an electric charge transfer electrode including a first layer electrode and a second layer electrode; and a gate oxide film, the gate oxide film comprises a second gate oxide film formed under the second layer electrode, the second gate oxide film comprising an ONO film which comprises a SiO film, a SiN film and a SiO film in this order, and the second gate oxide film is continuously formed to cover whole of a region between the first layer electrode and the second layer electrode and a region under the second layer electrode.

Abstract: According to various embodiments, two-print two-etch methods and devices are disclosed that can be used to form features, such as ghost features, on a substrate. The disclosed methods can be incorporated into, for example, altPSM, attPSM, and binary lithographic method for making semiconductor devices. a method of forming a semiconductor device is provided. The exemplary methods can include defining a plurality of first features and at least one ghost feature on a photosensitive layer by exposing a first mask to a light, wherein the first mask comprises a plurality of phase shift areas that change a phase of the light. A portion of a layer disposed under the photosensitive layer can be removed by etching to form the plurality of first features and the at least one ghost feature. One or more structures not requiring phase shifting can then be defined on the photosensitive layer by exposing a second mask to the light, wherein the second mask removes the at least one ghost feature.

Abstract: The present invention provides a power-thrifty IT-CCD having a charge transfer electrode area thinned for improving the light reception efficiency of a photoelectric conversion section and being capable of executing high-speed and high-sensitivity transfer without lowering withstand voltage between charge transfer electrodes. A first insulation film is formed on the surface of a silicon substrate, and inter-electrode insulation films made of silicon oxide films and charge transfer electrodes made of polycrystalline silicon films are formed on the surface of the first insulation film. The inter-electrode insulation films are formed from side walls of the polycrystalline silicon films.

Abstract: A CMOS image sensor and a method for fabricating the same is disclosed, to decrease a darkcurrent generated in the boundary between a diffusion area of a photodiode and a device isolation layer, which includes a first conductive type semiconductor substrate having an active area and a device isolation area, the active area including a photodiode and a transistor; a device isolation layer formed in the device isolation area of the semiconductor substrate; a second conductive type diffusion area formed in the photodiode of the semiconductor substrate at a predetermined interval from the device isolation layer; a gate insulating layer and a gate electrode formed in the transistor of the semiconductor substrate; and a first conductive type first diffusion area formed in the semiconductor substrate of the boundary between the second conductive type diffusion area and the device isolation layer.

Abstract: Provided are a semiconductor device and a method for its manufacture. In one example, the method includes forming an isolation structure having a first refraction index over a sensor embedded in a substrate. A first layer having a second refraction index that is different from the first refraction index is formed over the isolation structure. The first layer is removed from at least a portion of the isolation structure. A second layer having a third refraction index is formed over the isolation structure after the first layer is removed. The third refraction index is substantially similar to the first refraction index.

Abstract: In accordance with the invention, an electrically conducting charge transfer channel is formed in a semiconductor substrate and an electrically insulating layer is formed on a surface of the substrate; a layer of gate electrode material is formed on the insulating layer. On the gate material layer is formed a first patterned masking layer having apertures that expose regions of the underlying gate material layer that are to form gate electrodes, and the first-pattern-exposed regions of the gate material layer are electrically doped. In addition, on the gate material layer is formed a second patterned masking layer having apertures that expose regions of the underlying gate material layer that are to form gaps between gate electrodes, and the second-pattern-exposed regions of the gate material layer are etched.

Abstract: An electron transfer device is implemented in a structure which is readily capable of achieving charge transfer cycle frequencies in the range of several hundred MHz or more and which can be formed by conventional semiconductor integrated circuit manufacturing processes. The device includes a substrate having a horizontal extent and a pillar on the substrate extending from the substrate vertically with respect to the horizontal extent of the substrate. The pillar is formed to vibrate laterally with respect to the vertical length of the pillar at a resonant frequency which can be several hundred MHz. Drain and source electrodes extend from the substrate vertically with respect to the horizontal extent of the substrate, and have innermost ends on opposite sides of the pillar. The pillar is free to vibrate laterally back and forth between the innermost ends of the drain and source electrodes to transfer charge between the electrodes.