Abstract: The invention comprises a method for forming a metal-semiconductor ohmic contact (18) for use in a semiconductor device (10) having a plurality of epitaxial layers (14a-c) wherein the ohmic contact (18) is preferably formed after deposition of the epitaxial layers (14a-c). The invention also comprises a semiconductor device comprising a plurality of epitaxial layers and an ohmic contact.

Abstract: A method for fabricating a field emission structure is disclosed. A first dielectric layer and a second material layer are disposed over a substrate and at least one emitter tip thereon. Planarization of the second layer exposes regions of the first layer that cover the emitter tip, which regions may then be removed through the second layer. Substantial removal of the second layer reduces any conductive defects that protrude from a surface of the first layer. A third, dielectric layer and fourth, grid layer are then formed. Planarization of the fourth layer forms grid openings and exposes dielectric material of the third layer which overlies the emitter tip. Dielectric material of one or both underlying layers may then be removed to expose the outer surfaces of the emitter tip.

Abstract: A separator layer of Ti is formed on an auxiliary substrate of sapphire or the like. An undercoat layer of TiN is formed on the separator layer. The undercoat layer is provided so that a Group III nitride compound semiconductor layer can be grown with good crystallinity on the undercoat layer. TiN is sprayed on the undercoat layer to form a thermal spray depositing layer. Then, the separator layer is chemically etched to reveal the undercoat layer. Then, a Group III nitride compound semiconductor layer is grown on a surface of the undercoat layer.

Abstract: Gated field emission devices and systems and methods for their fabrication are described. A method includes growing a substantially vertically aligned carbon nanostructure, the substantially vertically aligned carbon nanostructure coupled to a substrate; covering at least a portion of the substantially vertically aligned carbon nanostructure with a dielectric; forming a gate, the gate coupled to the dielectric; and releasing the substantially vertically aligned carbon nanostructure by forming an aperture in the gate and removing a portion of the dielectric.

Abstract: An emitter has a rapid thermal process (RTP) formed emission layer of SiO2, SiOxNy or combinations thereof. The emission layer formed by rapid thermal processing does not require electroforming to stabilize the film. The RTP grown films are stable and exhibit uniform characteristics from device to device.

Abstract: A manufacturing method of an electronic device is to improve test efficiency using test structure and improve yield. The manufacturing method performs test using a first lead wire disposed on an insulating layer formed on a substrate and a second lead wire electrically connected to the substrate and disposed on the insulating layer and manages the electronic device on the basis of results of the test to manufacture the electronic device. The manufacturing method includes a step of testing whether the first lead wire is disconnected or not by measuring an electric resistance between both ends of the first lead wire and a step of testing whether the first and second lead wires are short-circuited or not by measuring an electric resistance between the first lead wire and the substrate.

Abstract: The invention provides a nanostructure including an anodized film including nanoholes. The anodized film is formed on a substrate having a surface including at least one material selected from the group consisting of semiconductors, noble metals, Mn, Fe, Co, Ni, Cu and carbon. The nanoholes are cut completely through the anodized film from the surface of the anodized film to the surface of the substrate. The nanoholes have a first diameter at the surface of the anodized film and a second diameter at the surface of the substrate. The nanoholes are characterized in that either a constriction exists at a location between the surface of the anodized film and the surface of the substrate, or the second diameter is greater than the first diameter.

Abstract: An electronic device of a preferred embodiment includes a tip emitter formed in a well defined in a substrate. An extractor disposed about the well extracts emissions from the tip emitter. A wide lens is spaced apart from the extractor for focusing the emissions through an opening defined the wide lens. The opening has a diameter greater than a diameter of the well. An aperture is disposed between the extractor and the wide lens.

Abstract: The invention provides an electron beam device 1 comprising at least one field emission cathode 3 and at least one extracting electrode 5, whereby the field emission cathode 5 comprises a p-type semiconductor region 7 connected to an emitter tip 9 made of a semiconductor material, an n-type semiconductor region 11 forming a pn-diode junction 13 with the p-type semiconductor region 7 a first electric contact 15 on the p-type semiconductor region 7 and a second electric contact 17 on the n-type semiconductor region 11. The p-type semiconductor region 7 prevents the flux of free electrons to the emitter unless electrons are injected into the p-type semiconductor region 7 by the pn-diode junction 13. This way, the field emission cathode 3 can generate an electron beam where the electron beam current is controlled by the forward biasing second voltage V2 across the pn-diode junction. Such electron beam current has an improved current value stability.

Abstract: A method for making an emitter for a display device, an emitter array produced by such method, an etch mask used during such method, and a method for making such an etch mask. The method for making the emitter comprising providing a substrate, forming a conducting layer on the substrate, forming an emitting layer on the conducting layer, forming an etch mask having a controlled distribution of a plurality of mask sizes over the emitting layer, and forming at least one emitter by removing portions of the emitting layer using the etch mask. The method for making the etch mask comprising forming an etch mask layer over an emitting layer, forming a patterning layer having a controlled distribution of mask sizes over the etch mask layer, and forming the etch mask by removing portions of the etch mask layer using the controlled distribution of mask sizes in the patterning layer.

Abstract: A photocathode includes a first layer having a first energy band gap for providing absorption of light of wavelengths shorter than or equal to a first wavelength, a second layer having a second energy band gap for providing transmission of light of wavelengths longer than the first wavelength, and a third layer having a third energy band gap for providing absorption of light of wavelengths between the first wavelength and a second wavelength. The first wavelength is shorter than the second wavelength. The first, second and third layers are positioned in sequence between input and output sides of the photocathode.

Abstract: For manufacturing a semiconductor device, such as thin-film solar battery, comprising a base body made of an organic high polymer material, an oxide electrode film and semiconductor thin film each containing at least one kind of group IV elements on the oxide electrode film, one of the semiconductor thin films in contact with the oxide electrode film is stacked by sputtering in a non-reducing atmosphere such as atmosphere not containing hydrogen gas, for example. Thereby, it is ensured that granular products as large as and beyond 3 nm are not contained substantially at the interface between the oxide electrode film and that semiconductor thin film. Therefore, a semiconductor thin film such as amorphous semiconductor thin film can be stacked with enhanced adherence on a plastic substrate having an oxide electrode film like ITO film on its surface.

Abstract: Novel uses of diamondoid-containing materials in the field of microelectronics are disclosed. Embodiments include, but are not limited to, thermally conductive films in integrated circuit packaging, low-k dielectric layers in integrated circuit multilevel interconnects, thermally conductive adhesive films, thermally conductive films in thermoelectric cooling devices, passivation films for integrated circuit devices (ICs), and field emission cathodes. The diamondoids employed in the present invention may be selected from lower diamondoids, as well as the newly provided higher diamondoids, including substituted and unsubstituted diamondoids. The higher diamondoids include tetramantane, pentamantane, hexamantane, heptamantane, octamantane, nonamantane, decamantane, and undecamantane.

Abstract: An enhanced Spindt-tip field emitter tip and a method for producing the enhanced Spindt-tip field emitter. A thin-film resistive heating element is positioned below the field emitter tip to allow for resistive heating of the tip in order to sharpen the tip and to remove adsorbed contaminants from the surface of the tip. Metal layers of the enhanced field emission device are separated by relatively thick dielectric bilayers, with the metal layers having increased thickness in the proximity of a cylindrical well in which the field emitter tip is deposited. Dielectric material is pulled back from the cylindrical aperture into which the field emitter tip is deposited in order to decrease buildup of conductive contaminants and the possibility of short circuits between metallic layers.

Abstract: A method of manufacturing a field emission device. In the method, emitters are formed using a lift-off process, and an isolation layer is formed between a sacrificial layer for patterning the emitters and emitter materials. The isolation layer prevents the sacrificial layer from reacting on the emitter materials to facilitate the lift-off process. Thus, the field emission device, which uniformly emits light having a high brightness, can be obtained.

Abstract: A flat panel display device having a high capacitance and a high aperture ratio. A thin film transistor and a capacitor are formed on an insulating substrate. The thin film transistor includes a semiconductor layer, a gate electrode and source and drain electrodes. The capacitor has first and second capacitor electrodes and a dielectric layer. An insulating layer is formed over the transistor to insulate the gate electrode from the source and drain electrodes, and a portion of the insulating layer is formed as the dielectric layer between the first and second capacitor electrodes. A non-planar shape of the first capacitor electrode and a conforming shape of the dielectric layer and a second capacitor electrode increase a capacitance of the capacitor. The portion of the insulating layer serving as the capacitor dielectric is formed to be thinner than the portion of the insulating layer formed over the gate electrode.

Abstract: A field emission display device and a method of fabricating the same are provided. The field emission display device includes a substrate, a transparent cathode layer, an insulation layer, a gate electrode, a resistance layer, and carbon nanotubes. The transparent cathode layer is deposited on the substrate. The insulation layer is formed on the cathode layer and has a well exposing the cathode layer. The gate electrode is formed on the insulation layer and has an opening corresponding to the well. The resistance layer is formed to surround the surface of the gate electrode and the inner walls of the opening and the well so as to block ultraviolet rays. The carbon nanotube field emitting source is positioned on the exposed cathode layer. An alignment error between the gate electrode and the cathode is removed, and carbon nanotube paste is prevented from remaining during development, thereby preventing current leakage and short circuit between the electrodes and diode emission.

Abstract: An emitter has an electron supply layer and a tunneling layer formed on the electron supply layer. Optionally, an insulator layer is formed on the electron supply layer and has openings defined within in which the tunneling layer is formed. A cathode layer is formed on the tunneling layer to provide a surface for energy emissions of electrons and/or photons. Preferably, the emitter is subjected to an annealing process thereby increasing the supply of electrons tunneled from the electron supply layer to the cathode layer.

Abstract: A preferred method for making a carbon nanotube-based field emission device in accordance with the invention includes the following steps: providing a substrate (22) with a surface; depositing a catalyst layer (24) on a predetermined area on the surface of the substrate; forming a carbon nanotube array (30) extending from the predetermined area; forming a cathode electrode (40) on top of the carbon nanotube array; and removing the substrate so as to expose the carbon nanotube array.

Abstract: A method for forming an ohmic contact to silicon carbide for a semiconductor device comprises implanting impurity atoms into a surface of a silicon carbide substrate thereby forming a layer on the silicon carbide substrate having an increased concentration of impurity atoms, annealing the implanted silicon carbide substrate, and depositing a layer of metal on the implanted surface of the silicon carbide. The metal forms an ohmic contact “as deposited” on the silicon carbide substrate without the need for a post-deposition anneal step.

Abstract: A field emission backplate formed by laser crystallizing of an area of amorphous semiconductor based material. Emitter sites result from the rough surface texture caused by the crystallization process. The crystallization may be localized using laser interferometry, and profiled emitter tips grown on the localized crystalline areas. Such backplates can be used in field emission devices emitting into either a vacuum or a wide band gap light-emitting polymer. Furthermore, a backplate having self-aligned gates can be formed by depositing an insulator layer and a metal layer over the emitter tips, removing the top of the metal layer and etching away the insulator, leaving each tip surrounded by a metal rim. A planarizing agent can be used to refine this process.

Abstract: A light-emitting element (24) is disclosed. A light emitting diode (LED) includes a sapphire substrate (26) having front and back sides (33, 35), and a plurality of semiconductor layers (28, 30, 32) deposited on the front side (33) of the sapphire substrate (26). The semiconductor layers (28, 30, 32) define a light-emitting structure that emits light responsive to an electrical input. A metallization stack (40) includes an adhesion layer (34) deposited on the back side (35) of the sapphire substrate (26), and a solderable layer (38) connected to the adhesion layer (34) such that the solderable layer (38) is secured to the sapphire substrate (26) by the adhesion layer (34). A support structure (42) is provided on which the LED is disposed. A solder bond (44) is arranged between the LED and the support structure (42). The solder bond (44) secures the LED to the support structure (42).

Abstract: A field emissive display (40) having an anode plate (10) coupled to a cathode plate (20) and a method for manufacturing the field emissive display (40). A substrate (21) of the cathode plate (20) is manufactured or selected such that its coefficient of thermal expansion substantially matches that of the anode plate (10), i.e., the coefficients of thermal expansion of the cathode plate (20) and the anode plate (10) are within ten percent of each other. The cathode plate (20) is coupled to the anode plate (10) by means of a frit structure (41) whose coefficient of thermal expansion preferably substantially matches that of the cathode plate (20) and the anode plate (10). A control circuit can be mounted to the bottom surface of the field emissive display (40).

Abstract: This invention provides an image-forming apparatus manufacturing method capable of simplifying the electron-emitting device forming process and manufacturing a low-cost image-forming apparatus exhibiting high display quality for a long term. A plurality of electrode pairs each formed from electrodes are formed on a first substrate. Polymer films for connecting the electrodes are arranged. Then, the polymer films are irradiated with a laser beam or particle beam to reduce the resistances at least partially and change the polymer films into conductive films containing carbon as a main component. A current is flowed between the electrodes to form gaps in parts of the conductive films. The first substrate, and the second substrate on which an image-forming member is arranged are joined via bonding in a reduced-pressure atmosphere, constituting an image-forming apparatus.

Abstract: A method of forming a floating structure lifting up from a substrate and a method of manufacturing a field emission device (FED) employing the floating structure are provided. The method of forming a floating structure includes forming an expansion causer layer, which can generate a byproduct from the reacting with a predetermined reactant gas causing volume expansion, on the substrate; forming an object material layer for the floating structure on a resultant stack; forming a hole through which the reactant gas is supplied on a resultant stack; supplying the reactant gas through the hole so that the object material layer partially lifts up from the substrate due to the byproduct generated from the reaction of the expansion causer layer with the reactant gas; and removing the byproduct through the hole so that the portion of the object material layer lifting up from the substrate can be completely separated from the substrate to form the floating structure.

Abstract: An improved nanotip structure and method for forming the nanotip structure and a display system using the improved nanotip structure is described. The described nanotip is formed from a semiconductor having a crystalline structure such as gallium nitride. The crystalline structure preferably forms dislocations oriented in the direction of the nanotips. One method of forming the nanotip structure uses the relatively slow etching rates that occur around the dislocations compared to the faster etch rates that occur in other parts of the semiconductor structure. The slower etching around dislocations enables the formation of relatively high aspect ratio nanotips in the dislocation area.

Abstract: A method of manufacturing a field emission device. In the method, emitters are formed using a lift-off process, and an isolation layer is formed between a sacrificial layer for patterning the emitters and emitter materials. The isolation layer prevents the sacrificial layer from reacting on the emitter materials to facilitate the lift-off process. Thus, the field emission device, which uniformly emits light having a high brightness, can be obtained.

Abstract: A method of forming emitter tips for use in a field emission display. A dielectric layer, an insulating layer, and a conductor layer are formed on a substrate in sequence. An annular groove is formed the conductive layer and the insulating layer. A tip cavity with an insulating tip within is formed by isotropic wet etching. A molybdenum metal layer is formed on the insulating tip. The method of the present invention can substantially reduce the consumption of molybdenum.

Abstract: The present invention relates to a field emitter array used in various devices including a nanotube-based display and a microwave-amplifying device. In prior art, an electron accelerated by an electric field collides, for example, with a phosphor on the screen. Light is emitted as a positive ion drops out of the phosphor. Destruction or deformation of the emitter's structure can occur if the positive ion becomes accelerated and collides with the emitter, which results in instability or interruption of the emitter's operation. According to the present invention, coating a carbon nanotube with a very thin semiconductor or insulating material with a high degree of hardness can protect the carbon nanotube from the external particles (particularly, positive ions). The thin layer also provides for easy electron emission under low voltage, thereby greatly improving the uniformity and stability of electron emission.

Abstract: An emitter includes an electron supply layer, a dielectric layer on the electron supply layer defining an emission area, and a filled zeolite emission layer within the defined emission area and in contact with the electron supply layer. The filled zeolite emission layer holds a semiconductor material within the cage of the zeolite.

Abstract: A field emission device, a field emission display for displaying images with good quality adopting the same, and a manufacturing method thereof are provided. The field emission device allows a mesh grid to closely contact the surface of a field emission array on a substrate and for this purpose, applies a tensile force to the mesh grid using a predetermined tension member.

Abstract: Provided are a low-temperature formation method for emitter tips including copper oxide nanowires or copper nanowires and a display device or a light source manufactured using the same. The low-temperature formation method includes preparing a substrate having an exposed copper surface. The copper surface contacts an oxide solution at a low temperature of 100° C. or less to grow copper oxide nanowires on the surface of the substrate. Optionally, a reduction gas or a heat is supplied to the copper oxide nanowires, or plasma processing is performed on the copper oxide nanowires, thereby reducing the copper oxide nanowires to copper nanowires. Thus, emitter tips including copper oxide nanowires or copper nanowires are formed densely at a low temperature such that the emitter tips have a shape and length suitable for emission of electrons.

Abstract: A semiconductor device includes a transistor junction formed in a substrate adjacent to an isolation region. A region between the transistor junction and the isolation region includes an area susceptible to hot carrier effects. The transistor junction extends from a surface of the substrate to a first depth. A buried conductive channel layer is formed within the transistor junction between the surface of the substrate and the first depth. The buried conductive channel layer has a peak conduction depth, which is different from a depth of the area susceptible to hot carrier effects.

Abstract: The invention consists of a flat panel display device that combines the simplicity of manufacture of a TFEL display with the phosphor stimulation capabilities of an FED. A phosphor such a ZnS:Mn can act as both an EL phosphor and as a cathodoluminescent phosphor. The phosphor is deposited on a porous silicon underlayer that contains a labyrinth of fissures, voids, hillocks, and microscopically rough surfaces. At the phosphor-porous silicon interface, the labyrinthine surface possesses hundreds to thousands of electric field line compression points that can be characterized by an average field enhancement. When this underlayer is the cathode, high energy electrons are injected into the phosphor producing substantial light emission even at low applied fields. Additionally, the surrounding silicon is available to integrate drive circuitry and provide a TFT at each pixel, if needed.

Abstract: An electron source 10 has an n-type silicon substrate 1, a drift layer 6 formed on one surface of the substrate 1, and a surface electrode 7 formed on the drift layer 6. A voltage is applied so that the surface electrode 7 becomes positive in polarity relevant to the substrate 1, whereby electrons injected from the substrate 1 into the drift layer 6 drift within the drift layer 6, and are emitted through the surface electrode 7. In a process for manufacturing this electron source 10, when the drift layer 6 is formed, a porous semiconductor layer containing a semiconductor nanocrystal is formed in accordance with anodic oxidation. Then, an insulating film is formed on the surface of each semiconductor nanocrystal. Anodic oxidation is carried out while emitting light that essentially contains a wavelength in a visible light region relevant to the semiconductor layer.

Abstract: There is provided a field emitter device formed over a semiconductor substrate. The field emitter device includes at least one field emitter tip disposed over the substrate, and a conducting gate electrode layer disposed over the substrate. The field emitter device also includes a protective electronic component disposed over and integral to the substrate and electrically connecting the conducting gate electrode layer to the substrate such that if the conducting gate electrode layer experiences a voltage greater than a breakdown voltage of the field emitter device, the protective electronic component conducts current between the conducting gate electrode layer and the substrate.

Abstract: A cold cathode field emission device comprising a cathode electrode 11 formed on a supporting member 10, a gate electrode 13 which is formed above the cathode electrode 11 and has an opening portion 14, and an electron emitting portion 15 formed on a surface of a portion of the cathode electrode 11 which portion is positioned in a bottom portion of the opening portion 14, said electron emitting portion 15 comprising a carbon-group-material layer 23, and said carbon-group-material layer 23 being a layer formed from a hydrocarbon gas and a fluorine-containing hydrocarbon gas.

Abstract: In a method of manufacturing matrix electron emitter arrays, each array comprising a plurality of scanning lines formed on a glass substrate and arranged in parallel with each other, a plurality of signal lines formed in a direction to cross the scanning lines and arranged in parallel with each other, and field-emission type electron emitters formed in the pixel areas which are arranged at the intersections of the scanning lines and the signal lines, a pulse voltage with a specific polarity and another pulse voltage with the reverse polarity are applied to any two of the scanning lines and current is caused to flow through electron emitters connected in series-via a signal line, thereby subjecting the conductive thin film constituting an electron emitter to a conductive activation process for forming an electron emitting section.

Abstract: Systems and methods are described for carbon tips with expanded bases. A method includes producing an expanded based carbon containing tip including: fabricating a carbon containing expanded base on a substrate; and then fabricating a carbon containing fiber on the expanded base. An apparatus includes a carbon containing expanded base coupled to a substrate; and a carbon containing fiber coupled to said carbon containing expanded base.

Abstract: The invention provides a method for manufacturing a display device that includes a light-transmitting substrate and, above the light-transmitting substrate, a plurality of light-emitting elements arrayed in a plane, driving elements connected to the light-emitting elements, a bank layer disposed in the boundary areas between the plurality of light-emitting elements, and wires connected to the driving elements. In this method, the wires are formed by patterning a light-shielding, conductive layer on the light-transmitting substrate so as to have a shape in plan view corresponding to the shape of the bank layer in plan view. Then, the wires, acting as a mask, are exposed from the rear surface of the substrate to form the bank layer by self-aligning above the wires. Then, the light-emitting elements are formed in the areas surrounded by the bank layer.

Abstract: An apparatus for emitting electrons is provided. The apparatus includes a subsurface emitter having a sharp tip, a substrate including a base, and electrical continuity between the tip, the base, and an external circuit. This emitter structure may be used to form individual emitters or arrays of emitters. Also provided is a method of making electron emitters which is comprised of implanting energetic ions into a diamond lattice to form cones or other continuous regions of damaged diamond. These regions are more electrically conducting than the surrounding diamond lattice, and have locally sharp tips at or near the point of entry of the ion into the diamond. The tips may then also be additionally coated with a layer of a wide band-gap semiconductor.

Abstract: A method of implanting metallic nanowires or nanotube upon substrate with assistance of an electric field is proposed. The resulting structure having implanted and/or oriented nanowires or nanotubes has excellent electron emission behavior, and thus can be used as the electron field emission source in the application of a field emission display or lighting products.

Abstract: The present invention relates to a field emission device and a method of fabricating the same. The method includes forming a hole having a nanometer size using silicon semiconductor process and then forming an emitter within the hole to form a field emission device. Therefore, the present invention can reduce the driving voltage and thus lower the power consumption.

Abstract: A method and structure are provided for simultaneously fabricating polysilicon cones for a field emitter and a porous insulating oxide layer for supporting a gate material. The porous insulating oxide is fabricated by first making the polysilicon porous in the field regions by an anodic etch and then oxidation. This is a fully self-aligned process and only one masking is used. Shaping of the gate material in close proximity to the top of the cone is achieved by a lift-off technique and requires no special deposition techniques like depositions at a grazing incidence to improve the emitter.

Abstract: An impurity precipitation region is formed by introducing an impurity, e.g., oxygen, into a silicon substrate or a silicon layer and thermally treating it, and performing high selectivity anisotropic etching with the precipitation region used as a micro mask. Thus, a cone (conic body or truncated conic body having an annular leading end) having a very sharp and slender needle shape with an aspect ratio of about 10 and a diameter of about 10 nm to 30 nm in the vicinity of its leading end is obtained with the micro mask used as the top. By forming an insulation layer and a drive electrode such as a gate electrode around the cone, the cone can be used for a field emission device, a single electron transistor, a memory device, a high frequency switching device, a probe of a scanning type microscope or the like.

Abstract: The invention comprises a method of fabricating a vacuum microtube device comprising the steps of forming a cathode layer comprising an array of electron emitters, forming a gate layer comprising an array of openings for passing electrons from the electron emitters, and forming an anode layer for receiving electrons from the emitters. The cathode gate layer and the anode layer are vertically aligned and bonded together with intervening spacers on a silicon substrate so that electrons from respective emitters pass through respective gate openings to the anode. The use of substrate area is highly efficient and electrode spacing can be precisely controlled. An optional electron multiplying structure providing secondary electron emission material can be disposed between the gate layer and the anode in the path of emitted electrons.

Abstract: A fabrication method for an electron source substrate comprises: a measurement step wherein at least one of a substrate, having a plurality of pairs of electrodes on the surface thereof, and measurement means for measuring the position of the substrate in at least one direction of the mutually orthogonal XYZ directions, is scanned relatively in one direction, thereby measuring the substrate position; a control step for controlling the discharge position of droplets containing electroconductive thin-film material onto the substrate from an ink-jet head, based on the measurement results; and a discharge step for discharging the droplets between the pairs of electrodes while relatively scanning at least one of the ink-jet head and substrate in one direction; wherein the scanning direction in the measurement step and the scanning direction in the discharge step are generally parallel; and wherein the measurement step and the discharge step are performed in a single scan.

Abstract: Gated field emission devices and systems and methods for their fabrication are described. A method includes growing a substantially vertically aligned carbon nanostructure, the substantially vertically aligned carbon nanostructure coupled to a substrate; covering at least a portion of the substantially vertically aligned carbon nanostructure with a dielectric; forming a gate, the gate coupled to the dielectric; and releasing the substantially vertically aligned carbon nanostructure by forming an aperture in the gate and removing a portion of the dielectric.

Abstract: A method for fabricating field emitters from a conductive or semiconductive substrate. A layer of low work function material may be formed on the substrate. Emission tips that include such a low work function material may have improved performance. An etch mask appropriate for forming emission tips is patterned at desired locations over the substrate and any low work function material thereover. An anisotropic etch of at least the substrate is conducted to form vertical columns therefrom. A sacrificial layer may then be formed over the vertical columns. A facet etch of each vertical column forms an emission tip of the desired shape. If a sacrificial layer was formed over the vertical columns prior to formation of emission tips therefrom, the remaining material of the sacrificial layer may be utilized to facilitate the removal of any redeposition materials formed during the facet etch.

Abstract: A method for fabricating field emission arrays employs a single mask to define emitter tips, their corresponding resistors, and, optionally, conductive lines. One or more material layers from which the emitter tips and resistors will be defined are formed over and laterally adjacent substantially parallel conductive lines. The exposed surface of the layer or layers of emitter tip and resistor material or materials may be planarized. The emitter tips and underlying resistors are then defined. Substantially longitudinal center portions of the conductive lines may be exposed between adjacent lines of emitter tips, with at least a lateral edge portion of each conductive line being shielded by material that remains following the formation of the emitter tips and resistors. The exposed portions of the conductive lines may be removed in order to define conductive traces. Field emission arrays and display devices fabricated by such methods are also disclosed.