Optical Waveguide Structure Patents (Class 438/31)
-
Patent number: 12259472Abstract: This application discloses a LiDAR and a mobile device, where LiDAR includes a lens and a photonic chip, an optical axis of the lens extends along a first preset direction; the photonic chip and the lens are spaced apart along the first preset direction, the photonic chip includes a cladding layer and multiple receiving waveguide core layers, all the receiving waveguide core layers are located at an end of the cladding layer that is closer to the lens and are spaced apart along a second preset direction, each receiving waveguide core layer has a first end surface and a second end surface opposite to each other, the first end surface is closer to the lens than the second end surface; and there is a distance between a first end surface of at least one receiving waveguide core layer and a focal plane of the lens.Type: GrantFiled: November 21, 2023Date of Patent: March 25, 2025Assignee: SUTENG INNOVATION TECHNOLOGY CO., LTD.Inventors: Lin Zhu, Jing Wang
-
Patent number: 12259631Abstract: Provided is an optical control element that can minimize an optical path difference between branched waveguides while reducing a difference in structure between the branched waveguides by disposing an input portion and an output portion of an optical waveguide on the same side of a substrate on which the optical waveguide is formed.Type: GrantFiled: December 4, 2020Date of Patent: March 25, 2025Assignee: SUMITOMO OSAKA CEMENT CO., LTD.Inventors: Norikazu Miyazaki, Yu Kataoka
-
Patent number: 12253786Abstract: An integrated electro-optic frequency comb generator based on ultralow loss integrated, e.g. thin-film lithium niobate, platform, which enables low power consumption comb generation spanning over a wider range of optical frequencies. The comb generator includes an intensity modulator, and at least one phase modulator, which provides a powerful technique to generate a broad high power comb, without using an optical resonator. A compact integrated electro-optic modulator based frequency comb generator, provides the benefits of integrated, e.g. lithium niobate, platform including low waveguide loss, high electro-optic modulation efficiency, small bending radius and flexible microwave design.Type: GrantFiled: June 23, 2023Date of Patent: March 18, 2025Assignee: HyperLight CorporationInventors: Mian Zhang, Christian Reimer, Kevin Luke
-
Patent number: 12253696Abstract: An optical filter includes a substrate including a plurality of pixel areas spaced apart from each other and a light-blocking area between the plurality of pixel areas, a plurality of color filters arranged on a first surface of the substrate and corresponding to the plurality of pixel areas, and a plurality of conversion layers arranged on the first surface of the substrate and corresponding to the plurality of color filters. Each of the conversion layers includes inclined side surfaces. The optical filter further includes a reflective layer on the inclined side surfaces of each of the plurality of conversion layers. The reflective layer extends to the light-blocking area and is arranged consecutively on two adjacent inclined side surfaces from among the inclined side surfaces of the plurality of conversion layers and the light-blocking area between the two adjacent inclined side surfaces.Type: GrantFiled: October 27, 2023Date of Patent: March 18, 2025Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Minsik Jung, Ohjeong Kwon, Sanggyun Kim, Byoungseong Jeong, Minju Han
-
Patent number: 12228768Abstract: Methods of fabricating optical devices with high refractive index materials are disclosed. The method includes forming a first oxide layer on a substrate and forming a patterned template layer with first and second trenches on the first oxide layer. A material of the patterned template layer has a first refractive index. The method further includes forming a first portion of a waveguide and a first portion of an optical coupler within the first and second trenches, respectively, forming a second portion of the waveguide and a second portion of the optical coupler on a top surface of the patterned template layer, and depositing a cladding layer on the second portions of the waveguide and optical coupler. The waveguide and the optical coupler include materials with a second refractive index that is greater than the first refractive index.Type: GrantFiled: December 8, 2022Date of Patent: February 18, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Weiwei Song, Chan-Hong Chern, Chih-Chang Lin, Stefan Rusu, Min-Hsiang Hsu
-
Patent number: 12183803Abstract: A gate structure includes a first gate electrode including a metal, a gate barrier pattern on the first gate electrode and including a metal nitride, and a second gate electrode on the gate barrier pattern. The gate structure is buried in an upper portion of a substrate. The gate barrier pattern has a flat upper surface and an uneven lower surface.Type: GrantFiled: May 18, 2022Date of Patent: December 31, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jaejin Lee, Youngjun Kim, Hunyoung Bark, Taekyung Yoon, Eunok Lee
-
Patent number: 12140799Abstract: A ring resonator electro-optical device includes a first silicon nitride waveguide and a second annular silicon waveguide that comprises a first section running under a second section of the first waveguide. The second waveguide also includes an annular silicon strip having a cross-section increasing in the first section from a minimum cross-section located under the second section.Type: GrantFiled: September 15, 2021Date of Patent: November 12, 2024Assignee: STMicroelectronics (Crolles 2) SASInventors: Patrick Le Maitre, Nicolas Michit
-
Patent number: 12074124Abstract: An integrated circuit package comprising an encapsulant, a semiconductor die in the encapsulant the semiconductor die comprising a plurality of die terminals, an integrated waveguide launcher, wherein the integrated waveguide launcher is connected to one of the die terminals and a land grid array provided on a bottom surface of the package. The land grid array comprises a plurality of package terminals, each package terminal configured to be soldered to a printed circuit board, and an opening, wherein the opening is aligned with the integrated waveguide launcher.Type: GrantFiled: December 7, 2021Date of Patent: August 27, 2024Assignee: NXP B.V.Inventors: Abdellatif Zanati, Adrianus Buijsman, Dominik Xaver Simon
-
Patent number: 12050344Abstract: Embodiments of the present disclosure generally relate to augmented reality waveguide combiners. The waveguides includes a waveguide substrate, having a substrate refractive index (RI) nsub, a slab waveguide layer disposed over the waveguide substrate, the slab waveguide layer having a slab RI nswg and a slab depth dswg, the slab depth dswg from a lower surface to an upper surface of the slab waveguide layer, at least one grating defined by a plurality of grating structures, the grating structures are disposed in, on, or over the slab waveguide layer, and a superstrate between and over the grating structures, the superstrate having a superstrate RI nsuperstrate and an interface with the slab waveguide layer. The slab RI nswg is greater than the substrate RI nsub and the slab RI nswg is greater than the superstrate RI nsuperstrate.Type: GrantFiled: October 27, 2023Date of Patent: July 30, 2024Assignee: Applied Materials, Inc.Inventors: Kevin Messer, David Alexander Sell, Samarth Bhargava
-
Patent number: 12025831Abstract: End-face coupling structures within an electrical backend are provided via photonic integrated circuit (PIC), comprising: a first plurality of spacer layers; a second plurality of etch-stop layers, wherein each etch-stop layer of the second plurality of etch-stop layers is located between two spacer layers of the first plurality of spacer layers; and an optical coupler comprising a plurality of waveguides arranged as a waveguide array configured to receive an optical signal in a direction of travel, wherein each waveguide of the plurality of waveguides is located at a layer interface defined between an etch-stop layer and a spacer layer. Portions of the PIC can be formed by depositing layers of spacer and etch-stop materials in which cavities are formed to define the waveguides when the waveguide material is deposited or interconnects when a metal is deposited therein.Type: GrantFiled: April 7, 2023Date of Patent: July 2, 2024Assignee: Cisco Technology, Inc.Inventors: Roman Bruck, Thierry J. Pinguet, Attila Mekis
-
Patent number: 12025865Abstract: Provided is a distributed optical phase modulator, comprising: a substrate (10); an optical waveguide (20) arranged on the substrate (10); a drive electrode (30) that is arranged on the substrate (10) and comprises a plurality of sub drive electrodes (31) arranged at intervals; and at least one shielding electrode (40), wherein at least some shielding electrodes and the sub drive electrodes (31) are arranged at intervals. The optical waveguide (20) sequentially passes through the sub drive electrodes (31) and the shielding electrodes (40). The length of each part of the drive electrode (30) is far less than the total length of an equivalent traditional modulator, and the drive signal voltage of each part is also far less than the drive signal voltage of the equivalent traditional modulator. In each part of the drive electrode (30), the propagation of an optical signal and the propagation of an electrical signal can be approximately synchronous, even synchronous.Type: GrantFiled: March 30, 2020Date of Patent: July 2, 2024Assignee: SUZHOU LYCORE TECHNOLOGIES CO., LTD.Inventors: Hanxiao Liang, Yipin Song
-
Patent number: 11973074Abstract: A package includes an interposer structure including a first via; a first interconnect device including conductive routing and which is free of active devices; an encapsulant surrounding the first via and the first interconnect device; and a first interconnect structure over the encapsulant and connected to the first via and the first interconnect device; a first semiconductor die bonded to the first interconnect structure and electrically connected to the first interconnect device; and a first photonic package bonded to the first interconnect structure and electrically connected to the first semiconductor die through the first interconnect device, wherein the first photonic package includes a photonic routing structure including a waveguide on a substrate; a second interconnect structure over the photonic routing structure, the second interconnect structure including conductive features and dielectric layers; and an electronic die bonded to and electrically connected to the second interconnect structure.Type: GrantFiled: August 10, 2022Date of Patent: April 30, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chen-Hua Yu, Hsing-Kuo Hsia
-
Patent number: 11955773Abstract: The invention relates to a laser device (100) comprising a substrate (10), on the surface of which an optical waveguide (11) is arranged, which has an optical resonator (12, 13) with such a resonator length that at least one resonator mode forms a stationary wave in the resonator (12, 13), and an amplification medium that is arranged on a surface of the optical waveguide (11), wherein the amplification medium comprises a photonic crystal (20) having a plurality of column- and/or wall-shaped semiconductor elements (21) which are arranged periodically on the surface of the optical waveguide (11) while protruding from the optical waveguide (11), and wherein the photonic crystal (20) is designed to optically interact with the at least one resonator mode of the optical resonator (12, 13) and to amplify light having a wavelength of the at least one resonator mode of the optical resonator (12, 13). The invention also relates to methods for the operation and production of the laser device.Type: GrantFiled: December 13, 2017Date of Patent: April 9, 2024Assignee: Forschungsverbund Berlin e.V.Inventors: Ivano Giuntoni, Lutz Geelhaar
-
Patent number: 11940707Abstract: A high-speed and low-voltage electro-optical modulator based on a lithium niobate-silicon wafer. A silicon wafer is located above a lithium niobate wafer; a lithium niobate-silicon hybrid waveguide is formed by etching a silicon waveguide; and the power of light waves is differently distributed in the lithium niobate-silicon hybrid waveguide by changing the structure of the silicon waveguide. When higher power is distributed in the silicon waveguide, the high-speed and low-voltage electro-optical modulator is suitable for realizing a compact wave splitting function, a wave combining function and a thermo-optical modulation function; and when higher power is distributed in the lithium niobate waveguide, the high-speed and low-voltage electro-optical modulator is suitable for realizing a high-speed and low-voltage electro-optical modulation function.Type: GrantFiled: December 9, 2021Date of Patent: March 26, 2024Assignee: Shanghai Jiao Tong UniversityInventors: Weiwen Zou, Jing Wang, Shaofu Xu
-
Patent number: 11906781Abstract: A method includes providing a photonic wafer that includes an electrical layer and a layer disposed on a substrate. The layer includes at least one optical waveguide that is disposed between the electrical layer and the substrate. The method also includes removing a portion of the substrate underneath the at least one optical waveguide and forming an end-face coupler. A portion of the end-face coupler is within the removed portion of the substrate. The end-face coupler transmits an optical signal to, or receives an optical signal from, an external optical device.Type: GrantFiled: December 12, 2022Date of Patent: February 20, 2024Assignee: Cisco Technology, Inc.Inventors: Roman Bruck, Gianlorenzo Masini
-
Patent number: 11886787Abstract: A system and method for adjusting the shapes of polygons in a design. In some embodiments, the method includes inverting a first layer of the design, the first layer comprising one or more polygons, the inverting of the first layer forming a region complementary to the union of the polygons of the first layer, and including one or more inverse polygons. The method may further include performing a rounding operation on a first corner of a first inverse polygon of the one or more inverse polygons, to form a modified polygon.Type: GrantFiled: October 27, 2021Date of Patent: January 30, 2024Assignee: Rockley Photonics LimitedInventors: Gazi Mostafa Huda, Troy Vytautas Tamas
-
Patent number: 11846804Abstract: Structures including an optical component and methods of fabricating a structure including an optical component. The structure includes an optical component having a waveguide core, and multiple features positioned adjacent to the waveguide core. The waveguide core contains a first material having a first thermal conductivity, and the features contain a second material having a second thermal conductivity that is greater than the first thermal conductivity.Type: GrantFiled: February 24, 2022Date of Patent: December 19, 2023Assignee: GlobalFoundries U.S. Inc.Inventors: Yusheng Bian, Hemant Dixit, Theodore Letavic
-
Patent number: 11808989Abstract: A method for producing a microoptoelectromechanical component and a corresponding microoptoelectromechanical component. The microoptoelectromechanical component is equipped with a base substrate comprising a cavity which is formed therein and is closed by a covering substrate, an optical waveguide on the covering substrate above the cavity, which optical waveguide comprises a sheathed waveguide core, an electrical contact element in the region of the surrounding covering substrate, wherein a contact pad formed by an electrically conductive polysilicon layer is arranged underneath the electrical contact element, wherein the optical waveguide and the covering substrate located thereunder are divided into a stationary portion and a deflectable portion, which can be docked to the stationary portion by electrically deflecting the corresponding portion of the covering wafer.Type: GrantFiled: June 17, 2021Date of Patent: November 7, 2023Assignee: ROBERT BOSCH GMBHInventor: Rafel Ferré i Tomà s
-
Patent number: 11789205Abstract: An optical device includes a first multi-mode waveguide, a first optical coupler coupled to the first multi-mode waveguide, the first coupler being tapered and curved, and a first single-mode waveguide having a first end coupled to the first optical coupler. The optical device maybe used in an optical delay device. A method of propagating light in a first multi-mode waveguide toward a first optical coupler, propagating the light in the first optical coupler toward a first single-mode waveguide, the first optical coupler being tapered and curved, and propagating the light along the first single-mode waveguide is also disclosed.Type: GrantFiled: June 17, 2022Date of Patent: October 17, 2023Assignees: PSIQUANTUM CORP., UNIVERSITY OF BRISTOLInventors: Damien Bonneau, Mark Thompson
-
Patent number: 11757074Abstract: To extract light from a light-emitting diode (and thereby improve efficiency of the display), a microlens stack may be formed over the light-emitting diode. The microlens stack may include an array of microlenses that is covered by an additional single microlens. Having stacked microlenses in this way increases lens power without increasing the thickness of the display. The array of microlenses may be formed from an inorganic material whereas the additional single microlens may be formed from an organic material. The additional single microlens may conform to the upper surfaces of the array of microlenses. An additional low-index layer may be interposed between the light-emitting diode and the array of microlenses. A diffusive layer may be formed around the light-emitting diode to capture light emitted from the light-emitting diode sidewalls.Type: GrantFiled: April 8, 2021Date of Patent: September 12, 2023Assignee: Apple Inc.Inventors: Jaein Choi, Joy M. Johnson, Lai Wang, Ben-Li Sheu, Hairong Tang, Steven E. Molesa, Sunggu Kang, Young Cheol Yang
-
Patent number: 11719903Abstract: A system comprises a first mechanism configured to hold a first block including a plurality of lenses located on or near a first surface of the first block. The plurality of lenses are configured to receive light to generate a plurality of light spots at or near a second surface of the first block opposite the first surface. The system includes a second mechanism configured to hold a second block including a plurality of waveguides, and to move the second block to bring the plurality of waveguides in alignment with the plurality of lenses using the plurality of light spots as alignment marks.Type: GrantFiled: March 8, 2021Date of Patent: August 8, 2023Assignee: MELLANOX TECHNOLOGIES, LTD.Inventor: Avner Badihi
-
Patent number: 11715728Abstract: A package includes an interposer structure including a first via; a first interconnect device including conductive routing and which is free of active devices; an encapsulant surrounding the first via and the first interconnect device; and a first interconnect structure over the encapsulant and connected to the first via and the first interconnect device; a first semiconductor die bonded to the first interconnect structure and electrically connected to the first interconnect device; and a first photonic package bonded to the first interconnect structure and electrically connected to the first semiconductor die through the first interconnect device, wherein the first photonic package includes a photonic routing structure including a waveguide on a substrate; a second interconnect structure over the photonic routing structure, the second interconnect structure including conductive features and dielectric layers; and an electronic die bonded to and electrically connected to the second interconnect structure.Type: GrantFiled: July 15, 2020Date of Patent: August 1, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chen-Hua Yu, Hsing-Kuo Hsia
-
Patent number: 11695250Abstract: A thermally tunable laser includes: a substrate; a laser resonator, wherein the laser resonator includes a gain section, and wherein the laser resonator includes a tuning section; a heating arrangement; a heat sink arrangement for dissipating a heat flow from the laser resonator to the heat sink arrangement; and a hole arrangement for influencing the heat flow from the laser resonator to the heat sink arrangement, wherein the hole arrangement is arranged between the substrate and the heat sink arrangement, wherein one or more holes of the hole arrangement include at least one hole being arranged within a horizontal range of the tuning section, so that a thermal resistance between the tuning section and the heat sink arrangement is increased.Type: GrantFiled: October 21, 2020Date of Patent: July 4, 2023Assignee: Fraunhofer—Gesellschaft zur F rderung der angewandten Forschung e.V.Inventors: Martin Möhrle, Moon-Hyeok Lee
-
Patent number: 11693153Abstract: The disclosed structure is configured such that it does not support electromagnetic waves having frequencies within a selected band gap; those electromagnetic waves are thus reflected. Some variations provide an omnidirectional infrared reflector comprising a three-dimensional photonic crystal containing: rods of a first material that has a first refractive index, wherein the rods are arranged to form a plurality of lattice periods in three dimensions, and wherein the rods are connected at a plurality of nodes; and a second material that has a refractive index that is lower than the first refractive index, wherein the rods are embedded in the second material. The lattice spacing and the rod radius or width are selected to produce a photonic band gap within a selected band of the infrared spectrum. Methods of making and using the three-dimensional photonic crystal are described. Applications include thermal barrier coatings and blackbody emission signature control.Type: GrantFiled: August 11, 2020Date of Patent: July 4, 2023Assignee: HRL Laboratories, LLCInventors: Shanying Cui, Sean M. Meenehan, Tobias A. Schaedler, Phuong Bui
-
Patent number: 11662584Abstract: A waveguide display includes a waveguide, an input coupler configured to couple display light into the waveguide, and a surface-relief grating on the waveguide and configured to couple the display light out of the waveguide towards an eyebox of the waveguide display on a first side of the waveguide. The surface-relief grating is formed in a plurality of grating layers having uniform or non-uniform thickness profiles. The plurality of grating layers is characterized by a refractive index modulation that increases and then decreases as the distance of the grating layer from the waveguide increases.Type: GrantFiled: December 17, 2020Date of Patent: May 30, 2023Assignee: META PLATFORMS TECHNOLOGIES, LLCInventors: Hee Yoon Lee, Yu Shi, Elliott Franke
-
Patent number: 11664477Abstract: An electrode structure includes: an indium tin oxide (ITO) electrode that includes ITO; an Al electrode that includes Al and covers the ITO electrode; and a barrier electrode that includes at least one of TiN and Cr and is interposed in a region between the ITO electrode and the Al electrode.Type: GrantFiled: January 10, 2020Date of Patent: May 30, 2023Assignee: ROHM CO., LTD.Inventors: Ryosuke Ishimaru, Yohei Ito, Yasuo Nakanishi
-
Patent number: 11659740Abstract: An organic light-emitting display device includes a plurality of pixels, each of which includes an organic light-emitting device including a pixel electrode, an organic emission layer, and an opposing electrode; a pixel defining layer covering an edge of the pixel electrode and being configured to define a light-emission region by having an opening which exposes a portion of the pixel electrode; and a reference line overlapping the pixel electrode with an insulating layer between the reference line and the pixel electrode and extending in a first direction. The reference line overlaps with a center point of the opening, and the opening is shifted to one side of the pixel electrode in a second direction perpendicular to the first direction.Type: GrantFiled: October 19, 2020Date of Patent: May 23, 2023Assignee: Samsung Display Co., Ltd.Inventors: Sangmin Hong, Heeseong Jeong
-
Patent number: 11573373Abstract: A photonic structure is provided. The photonic structure includes a first oxide layer in a semiconductor substrate, a second oxide layer over an upper surface of the semiconductor substrate and an upper surface of the first oxide layer, and an optical coupling region over an upper surface of the second oxide layer. The optical coupling region is made of silicon, and an area of the optical coupling region is confined within an area of the first oxide layer in a plan view.Type: GrantFiled: November 8, 2021Date of Patent: February 7, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chan-Hong Chern, Min-Hsiang Hsu
-
Patent number: 11567262Abstract: A method includes providing a photonic wafer that includes an electrical layer and a layer disposed on a substrate. The layer includes at least one optical waveguide that is disposed between the electrical layer and the substrate. The method also includes removing a portion of the substrate underneath the at least one optical waveguide and forming an end-face coupler. A portion of the end-face coupler is within the removed portion of the substrate. The end-face coupler transmits an optical signal to, or receives an optical signal from, an external optical device.Type: GrantFiled: January 29, 2021Date of Patent: January 31, 2023Assignee: Cisco Technology, Inc.Inventors: Roman Bruck, Gianlorenzo Masini
-
Patent number: 11552451Abstract: A semiconductor laser device includes a laser section and a modulator section. The laser section has: a first mesa stripe which is formed on a semiconductor substrate; semi-insulative burying layers which are placed to abut on both side surfaces of the first mesa stripe and are formed on the semiconductor substrate; n-type burying layers formed on respective surfaces of the semi-insulative burying layers; and a p-type cladding layer which covers surfaces of the n-type burying layers and the first mesa stripe. The modulator section has: a second mesa stripe which is formed on the semiconductor substrate; semi-insulative burying layers which are placed to abut on both side surfaces of the second mesa stripe and are formed on the semiconductor substrate; and a p-type cladding layer which covers surfaces of the semi-insulative burying layers and the second mesa stripe.Type: GrantFiled: May 28, 2018Date of Patent: January 10, 2023Assignee: Mitsubishi Electric CorporationInventors: Takeshi Yamatoya, Takashi Nagira, Shinya Okuda
-
Patent number: 11545595Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly contact structures for LED chips are disclosed. LED chips as disclosed herein may include contact structure arrangements that have reduced impact on areas of active LED structures within the LED chips. Electrical connections between an n-contact and an n-type layer may be arranged outside of a perimeter edge or a perimeter corner of the active LED structure. N-contact interconnect configurations are disclosed that form electrical connections between n-contacts and n-type layers of LED chips outside of lateral boundaries of the active LED structures. By electrically contacting n-type layers outside of the lateral boundaries of the active LED structures, LED chips are provided with improved current spreading and improved brightness.Type: GrantFiled: April 1, 2021Date of Patent: January 3, 2023Assignee: CreeLED, Inc.Inventor: Justin White
-
Patent number: 11502757Abstract: A method of manufacturing a device with a optical component disposed thereon, including following steps of: preparing a substrate, the substrate including a signal guide and an electric conductive structure; and mounting an optical component on the substrate and corresponding a light transmission face of the optical component to the signal guide, wherein the optical component and the substrate is connected by an adhesive material and the optical component is electrically connected with the electric conductive structure. A transmission device being made by the method of manufacturing the device with the optical component disposed thereon as described above is further provided.Type: GrantFiled: July 28, 2021Date of Patent: November 15, 2022Assignee: QUANTUMZ INC.Inventors: Chun-Chieh Chen, Ming-Che Hsieh, Po-Ting Chen, Chun-I Wu
-
Patent number: 11493686Abstract: Structures for an optical component of a photonics chip and methods of forming a structure for an optical component of a photonics chip. The structure includes a slotted waveguide component having a first and second waveguide cores over a dielectric layer. The first waveguide core separated from the second waveguide core by a slot. The structure further includes a third waveguide core over the dielectric layer. The third waveguide core is positioned in a different level relative to the dielectric layer than the slotted waveguide component, and the third waveguide core and the first slot have an overlapping arrangement.Type: GrantFiled: April 12, 2021Date of Patent: November 8, 2022Assignee: GlobalFoundries U.S. Inc.Inventor: Yusheng Bian
-
Patent number: 11435645Abstract: A semiconductor device has a first semiconducting layer including an optical waveguide, a dielectric layer formed on the optical waveguide, and a conductive layer formed on the dielectric layer. A refractive index of a material of the conductive layer is smaller than a refractive index of a material of the first semiconductor layer.Type: GrantFiled: May 12, 2020Date of Patent: September 6, 2022Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Tetsuya Iida, Yasutaka Nakashiba
-
Patent number: 11393967Abstract: A light emitting diode includes: a light emitting structure including a first semiconductor layer, a light emitting layer arranged on at least part of the first semiconductor layer, a second semiconductor layer arranged on the light emitting layer; a first metal layer arranged on at least part of the first semiconductor layer and in contact with the first semiconductor layer; an insulating layer covered a surface of the light emitting structure; and an electrode layer arranged on the insulating layer and having at least one region that is not overlapped with the first metal layer or the second metal layer in a vertical direction.Type: GrantFiled: December 30, 2020Date of Patent: July 19, 2022Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Anhe He, Suhui Lin, Jiansen Zheng, Kangwei Peng, Xiaoxiong Lin, Chenke Hsu
-
Patent number: 11283242Abstract: A semiconductor optical device may include a semiconductor substrate; a mesa stripe structure that extends in a stripe shape in a first direction on the semiconductor substrate and includes a contact layer on a top layer; an adjacent layer on the semiconductor substrate and adjacent to the mesa stripe structure in a second direction orthogonal to the first direction; a passivation film that covers at least a part of the adjacent layer; a resin layer on the passivation film; an electrode that is electrically connected to the contact layer and extends continuously from the contact layer to the resin layer; and an inorganic insulating film that extends continuously from the resin layer to the passivation film under the electrode, is spaced apart from the mesa stripe structure, and is completely interposed between the electrode and the resin layer.Type: GrantFiled: September 30, 2019Date of Patent: March 22, 2022Assignee: Lumentum Japan, Inc.Inventors: Shigetaka Hamada, Yasushi Sakuma, Kouji Nakahara
-
Photonic device having a photonic crystal lower cladding layer provided on a semiconductor substrate
Patent number: 11156775Abstract: An integrated photonic device is provided with a photonic crystal lower cladding on a semiconductor substrate.Type: GrantFiled: July 10, 2020Date of Patent: October 26, 2021Assignee: Micron Technology, Inc.Inventor: Yuval Saado -
Patent number: 11133225Abstract: An optical fiber adapter and method of fabricating the same from a wafer including a double silicon-on-insulator layer structure. The optical fiber adapter may include a mode converter, a trench, and a V-groove, the V-groove and the trench operating as passive alignment features for an optical fiber, in the transverse translational and rotational degrees of freedom, and in the longitudinal translational degree of freedom, respectively. The mode converter may include a buried tapered waveguide.Type: GrantFiled: May 1, 2020Date of Patent: September 28, 2021Assignee: Rockley Photonics LimitedInventors: John Drake, Damiana Lerose, Henri Nykänen, Gerald Cois Byrd
-
Patent number: 11079549Abstract: A device is provided for optical mode spot size conversion to optically couple a semiconductor waveguide with an optical fiber. The device includes a waveguide comprising a waveguide taper region, which comprises a shoulder portion and a ridge portion above the shoulder portion. The ridge portion has a width that tapers to meet a width of the shoulder portion. The waveguide taper region comprises a first material. The device also has a mode converter coupled to the waveguide. The mode converter includes a plurality of stages, and each of the plurality of stages tapers in a direction similar to a direction of taper of the waveguide taper region. The mode converter is made of a second material different from the first material.Type: GrantFiled: April 3, 2020Date of Patent: August 3, 2021Assignee: Skorpios Technologies, Inc.Inventors: Majid Sodagar, Stephen B. Krasulick, John Zyskind, Paveen Apiratikul, Luca Cafiero
-
Patent number: 10985294Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly contact structures for LED chips are disclosed. LED chips as disclosed herein may include contact structure arrangements that have reduced impact on areas of active LED structures within the LED chips. Electrical connections between an n-contact and an n-type layer may be arranged outside of a perimeter edge or a perimeter corner of the active LED structure. N-contact interconnect configurations are disclosed that form electrical connections between n-contacts and n-type layers of LED chips outside of lateral boundaries of the active LED structures. By electrically contacting n-type layers outside of the lateral boundaries of the active LED structures, LED chips are provided with improved current spreading and improved brightness.Type: GrantFiled: March 19, 2019Date of Patent: April 20, 2021Assignee: CreeLED, Inc.Inventor: Justin White
-
Patent number: 10971650Abstract: A light emitting device includes a stacked structure and a first insulating layer covering at least side surfaces of the stacked structure including a p-type and n-type semiconductor layers, a light emitting layer sandwiched between the p-type and n-type semiconductor layers, an n-type electrode on the n-type semiconductor layer, an n-type contact layer sandwiched between the n-type semiconductor layer and the n-type electrode, a p-type electrode on the p-type semiconductor layer, an n-type contact pad on the n-type electrode, a p-type contact pad on the p-type electrode, and a semiconductor reflector between the light emitting layer and the n-type contact layer including multiple periods, each period including at least a first layer and at least a second layer having a refractive index different from a refractive index of the first layer. The light emitting device could be applied to wide color gamut (WCG) backlight modules or ultra-thin backlight modules.Type: GrantFiled: July 29, 2019Date of Patent: April 6, 2021Assignee: Lextar Electronics CorporationInventor: Shiou-Yi Kuo
-
Patent number: 10819085Abstract: A ridge structure (9) having a ridge lower part (6), a ridge upper part (8) above the ridge lower part (6) and having a larger width than the ridge lower part (6), is formed on a semiconductor substrate (1). A recess (11) of the ridge structure (9), where the ridge lower part (6) is laterally set back from the ridge upper part (8) due to a difference in width between the ridge upper part (8) and the ridge lower part t (6), is completely filled with an insulating film (10) by an atomic layer deposition method to form a protrusion (19) from the semiconductor substrate (1), the ridge structure (9), and the insulating film (10) without any step in a side face of the protrusion (19).Type: GrantFiled: August 23, 2017Date of Patent: October 27, 2020Assignee: Mitsubishi Electric CorporationInventor: Tsutomu Yamaguchi
-
Patent number: 10725241Abstract: A spot-size converter includes: a support body that includes a main surface including a first to a fifth areas; a mesa structure that includes a first part on the first area and includes a second part on the second to the fourth areas; and an embedding structure that includes a first region and a second region in which a first and a second side-surfaces of the second part of the mesa structure are respectively embedded. The second part of the mesa structure includes a portion that has a width gradually decreasing in a direction from the third area toward the fifth area. The first region of the embedding structure extends along the first side-surface and terminates at one of the third and the fourth areas. The second region of the embedding structure extends along the second side-surface of the second part and is disposed on the fifth area.Type: GrantFiled: June 19, 2019Date of Patent: July 28, 2020Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Naoya Kono, Takuo Hiratani, Masataka Watanabe
-
Patent number: 10615572Abstract: A semiconductor laser diode is disclosed. In an embodiment a semiconductor laser diode includes a semiconductor layer sequence having at least one active layer and a ridge waveguide structure having a ridge extending in a longitudinal direction from a light output surface to a rear side surface and being delimited by ridge side surfaces in a lateral direction perpendicular to a longitudinal direction, wherein the ridge has a first region and a second region adjacent thereto in a vertical direction perpendicular to the longitudinal and lateral directions, wherein the ridge includes a first semiconductor material in the first region and at least one second semiconductor material different from the first semiconductor material in the second region, wherein the ridge has a first width in the first region, and wherein the ridge has a second width in the second region, the second width being larger than the first width.Type: GrantFiled: August 10, 2018Date of Patent: April 7, 2020Assignee: OSRAM OLED GMBHInventors: Sven Gerhard, Christoph Eichler, Christian Rumbolz
-
Patent number: 10608142Abstract: A method of manufacturing a light-emitting device includes: providing a substrate; forming a light-emitting structure comprising an active layer on the substrate; forming a protective layer having a first thickness on the light-emitting structure; etching the protective layer such that the protective layer has a second thickness less than the first thickness; and patterning the protective layer.Type: GrantFiled: September 13, 2017Date of Patent: March 31, 2020Assignee: EPISTAR CORPORATIONInventors: Jar-Yu Wu, Ching-Jang Su, Chun-Lung Tseng, Ching-Hsing Shen
-
Patent number: 10553816Abstract: According to one embodiment, a display device includes a display area, a first peripheral area, an organic insulating film. The display area is provided on a substrate and includes a plurality of organic electroluminescent (EL) elements aligned. The first peripheral area is provided on the substrate, around the display area. The organic insulating film is provided on the substrate and covers a circuit including a drive circuit driving the organic EL elements. The organic insulating film comprises a first groove provided in the organic insulating film, around the display area, in an area between the display area and the first peripheral area, and a dummy area to which at least one of functional materials of the organic EL elements is applied, on the first peripheral area.Type: GrantFiled: January 8, 2018Date of Patent: February 4, 2020Assignee: JOLED INC.Inventor: Isao Kamiyama
-
Patent number: 10431767Abstract: An organic light emitting display device can include an anode electrode disposed on a substrate; an auxiliary electrode disposed on the anode electrode, the auxiliary electrode having a first height and a second height being different from the first height; a bank disposed on one side of the auxiliary electrode and another side of the auxiliary electrode; an organic light emitting layer disposed on an upper surface of the auxiliary electrode in an opening area exposed by the bank; and a cathode electrode disposed on the organic light emitting layer, in which the auxiliary electrode has the first height in a covered area overlapping with the bank and the second height in the opening area exposed by the bank.Type: GrantFiled: December 7, 2017Date of Patent: October 1, 2019Assignee: LG DISPLAY CO., LTD.Inventor: JoungWon Woo
-
Patent number: 9979160Abstract: An optical circulator is a device that routes optical pulses from port to port in a predetermined manner, e.g. in a 3-port optical circulator, optical pulses entering port 1 are routed out of port 2, while optical pulses entering port 2 exit out of port 3 and optical pulses fed into port 3 exit out of port 3. Currently such an optical circulator is made of discrete components such as magnetooptic garnets, rare-earth magnets and optical polarizers that are packaged together with fiber optic elements. Disclosed herein is a different kind of optical circulator that is monolithically integrated on a single semiconductor substrate and that is applicable for the routing of optical pulses. The embodied invention will enable photonic integrated circuits to incorporate on-chip optical circulator functionality thereby allowing much more complex optical designs to be implemented monolithically.Type: GrantFiled: June 20, 2017Date of Patent: May 22, 2018Assignee: UNIVERSITY OF CENTRAL FLORIDA RESEARCH FOUNDATION, INC.Inventors: Demetrios Christodoulides, Patrick L. LiKamWa, Parinaz Aleahmad, Ramy El-Ganainy
-
Patent number: 9853179Abstract: Systems for reducing dark current in a photodiode include a heater configured to heat a photodiode above room temperature. A reverse bias voltage source is configured to apply a reverse bias voltage to the heated photodiode to reduce a dark current generated by the photodiode.Type: GrantFiled: October 28, 2016Date of Patent: December 26, 2017Assignee: International Business Machines CorporationInventors: Barry P. Linder, Jason S. Orcutt
-
Patent number: 9791642Abstract: A chip packaging includes a first part comprising a support; and a core polymer layer transversally structured so as to exhibit distinct residual portions comprising: first waveguide cores each having a first height and disposed within said inner region; and one or more first alignment structures disposed within said outer region. A second part of the packaging comprises: second waveguide cores, each having a same second height; and one or more second alignment structures complementarily shaped with respect to the one or more first alignment structures, and wherein, the first part structured such that said inner region is recessed with respect to the outer region, to enable: the second waveguide cores to contact the first waveguide cores; and the one or more second alignment structures to respectively receive, at least partly, the one or more first alignment structures. The invention is further directed to related passive alignment methods.Type: GrantFiled: February 20, 2017Date of Patent: October 17, 2017Assignee: International Business Machines CorporationInventors: Roger F. Dangel, Daniel S. Jubin, Antonio La Porta, Bert J. Offrein