Optical Waveguide Structure Patents (Class 438/31)
  • Patent number: 11955773
    Abstract: The invention relates to a laser device (100) comprising a substrate (10), on the surface of which an optical waveguide (11) is arranged, which has an optical resonator (12, 13) with such a resonator length that at least one resonator mode forms a stationary wave in the resonator (12, 13), and an amplification medium that is arranged on a surface of the optical waveguide (11), wherein the amplification medium comprises a photonic crystal (20) having a plurality of column- and/or wall-shaped semiconductor elements (21) which are arranged periodically on the surface of the optical waveguide (11) while protruding from the optical waveguide (11), and wherein the photonic crystal (20) is designed to optically interact with the at least one resonator mode of the optical resonator (12, 13) and to amplify light having a wavelength of the at least one resonator mode of the optical resonator (12, 13). The invention also relates to methods for the operation and production of the laser device.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: April 9, 2024
    Assignee: Forschungsverbund Berlin e.V.
    Inventors: Ivano Giuntoni, Lutz Geelhaar
  • Patent number: 11940707
    Abstract: A high-speed and low-voltage electro-optical modulator based on a lithium niobate-silicon wafer. A silicon wafer is located above a lithium niobate wafer; a lithium niobate-silicon hybrid waveguide is formed by etching a silicon waveguide; and the power of light waves is differently distributed in the lithium niobate-silicon hybrid waveguide by changing the structure of the silicon waveguide. When higher power is distributed in the silicon waveguide, the high-speed and low-voltage electro-optical modulator is suitable for realizing a compact wave splitting function, a wave combining function and a thermo-optical modulation function; and when higher power is distributed in the lithium niobate waveguide, the high-speed and low-voltage electro-optical modulator is suitable for realizing a high-speed and low-voltage electro-optical modulation function.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: March 26, 2024
    Assignee: Shanghai Jiao Tong University
    Inventors: Weiwen Zou, Jing Wang, Shaofu Xu
  • Patent number: 11906781
    Abstract: A method includes providing a photonic wafer that includes an electrical layer and a layer disposed on a substrate. The layer includes at least one optical waveguide that is disposed between the electrical layer and the substrate. The method also includes removing a portion of the substrate underneath the at least one optical waveguide and forming an end-face coupler. A portion of the end-face coupler is within the removed portion of the substrate. The end-face coupler transmits an optical signal to, or receives an optical signal from, an external optical device.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: February 20, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Roman Bruck, Gianlorenzo Masini
  • Patent number: 11886787
    Abstract: A system and method for adjusting the shapes of polygons in a design. In some embodiments, the method includes inverting a first layer of the design, the first layer comprising one or more polygons, the inverting of the first layer forming a region complementary to the union of the polygons of the first layer, and including one or more inverse polygons. The method may further include performing a rounding operation on a first corner of a first inverse polygon of the one or more inverse polygons, to form a modified polygon.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: January 30, 2024
    Assignee: Rockley Photonics Limited
    Inventors: Gazi Mostafa Huda, Troy Vytautas Tamas
  • Patent number: 11846804
    Abstract: Structures including an optical component and methods of fabricating a structure including an optical component. The structure includes an optical component having a waveguide core, and multiple features positioned adjacent to the waveguide core. The waveguide core contains a first material having a first thermal conductivity, and the features contain a second material having a second thermal conductivity that is greater than the first thermal conductivity.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: December 19, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Yusheng Bian, Hemant Dixit, Theodore Letavic
  • Patent number: 11808989
    Abstract: A method for producing a microoptoelectromechanical component and a corresponding microoptoelectromechanical component. The microoptoelectromechanical component is equipped with a base substrate comprising a cavity which is formed therein and is closed by a covering substrate, an optical waveguide on the covering substrate above the cavity, which optical waveguide comprises a sheathed waveguide core, an electrical contact element in the region of the surrounding covering substrate, wherein a contact pad formed by an electrically conductive polysilicon layer is arranged underneath the electrical contact element, wherein the optical waveguide and the covering substrate located thereunder are divided into a stationary portion and a deflectable portion, which can be docked to the stationary portion by electrically deflecting the corresponding portion of the covering wafer.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: November 7, 2023
    Assignee: ROBERT BOSCH GMBH
    Inventor: Rafel Ferré i Tomàs
  • Patent number: 11789205
    Abstract: An optical device includes a first multi-mode waveguide, a first optical coupler coupled to the first multi-mode waveguide, the first coupler being tapered and curved, and a first single-mode waveguide having a first end coupled to the first optical coupler. The optical device maybe used in an optical delay device. A method of propagating light in a first multi-mode waveguide toward a first optical coupler, propagating the light in the first optical coupler toward a first single-mode waveguide, the first optical coupler being tapered and curved, and propagating the light along the first single-mode waveguide is also disclosed.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: October 17, 2023
    Assignees: PSIQUANTUM CORP., UNIVERSITY OF BRISTOL
    Inventors: Damien Bonneau, Mark Thompson
  • Patent number: 11757074
    Abstract: To extract light from a light-emitting diode (and thereby improve efficiency of the display), a microlens stack may be formed over the light-emitting diode. The microlens stack may include an array of microlenses that is covered by an additional single microlens. Having stacked microlenses in this way increases lens power without increasing the thickness of the display. The array of microlenses may be formed from an inorganic material whereas the additional single microlens may be formed from an organic material. The additional single microlens may conform to the upper surfaces of the array of microlenses. An additional low-index layer may be interposed between the light-emitting diode and the array of microlenses. A diffusive layer may be formed around the light-emitting diode to capture light emitted from the light-emitting diode sidewalls.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: September 12, 2023
    Assignee: Apple Inc.
    Inventors: Jaein Choi, Joy M. Johnson, Lai Wang, Ben-Li Sheu, Hairong Tang, Steven E. Molesa, Sunggu Kang, Young Cheol Yang
  • Patent number: 11719903
    Abstract: A system comprises a first mechanism configured to hold a first block including a plurality of lenses located on or near a first surface of the first block. The plurality of lenses are configured to receive light to generate a plurality of light spots at or near a second surface of the first block opposite the first surface. The system includes a second mechanism configured to hold a second block including a plurality of waveguides, and to move the second block to bring the plurality of waveguides in alignment with the plurality of lenses using the plurality of light spots as alignment marks.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: August 8, 2023
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventor: Avner Badihi
  • Patent number: 11715728
    Abstract: A package includes an interposer structure including a first via; a first interconnect device including conductive routing and which is free of active devices; an encapsulant surrounding the first via and the first interconnect device; and a first interconnect structure over the encapsulant and connected to the first via and the first interconnect device; a first semiconductor die bonded to the first interconnect structure and electrically connected to the first interconnect device; and a first photonic package bonded to the first interconnect structure and electrically connected to the first semiconductor die through the first interconnect device, wherein the first photonic package includes a photonic routing structure including a waveguide on a substrate; a second interconnect structure over the photonic routing structure, the second interconnect structure including conductive features and dielectric layers; and an electronic die bonded to and electrically connected to the second interconnect structure.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: August 1, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Hua Yu, Hsing-Kuo Hsia
  • Patent number: 11693153
    Abstract: The disclosed structure is configured such that it does not support electromagnetic waves having frequencies within a selected band gap; those electromagnetic waves are thus reflected. Some variations provide an omnidirectional infrared reflector comprising a three-dimensional photonic crystal containing: rods of a first material that has a first refractive index, wherein the rods are arranged to form a plurality of lattice periods in three dimensions, and wherein the rods are connected at a plurality of nodes; and a second material that has a refractive index that is lower than the first refractive index, wherein the rods are embedded in the second material. The lattice spacing and the rod radius or width are selected to produce a photonic band gap within a selected band of the infrared spectrum. Methods of making and using the three-dimensional photonic crystal are described. Applications include thermal barrier coatings and blackbody emission signature control.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: July 4, 2023
    Assignee: HRL Laboratories, LLC
    Inventors: Shanying Cui, Sean M. Meenehan, Tobias A. Schaedler, Phuong Bui
  • Patent number: 11695250
    Abstract: A thermally tunable laser includes: a substrate; a laser resonator, wherein the laser resonator includes a gain section, and wherein the laser resonator includes a tuning section; a heating arrangement; a heat sink arrangement for dissipating a heat flow from the laser resonator to the heat sink arrangement; and a hole arrangement for influencing the heat flow from the laser resonator to the heat sink arrangement, wherein the hole arrangement is arranged between the substrate and the heat sink arrangement, wherein one or more holes of the hole arrangement include at least one hole being arranged within a horizontal range of the tuning section, so that a thermal resistance between the tuning section and the heat sink arrangement is increased.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: July 4, 2023
    Assignee: Fraunhofer—Gesellschaft zur F rderung der angewandten Forschung e.V.
    Inventors: Martin Möhrle, Moon-Hyeok Lee
  • Patent number: 11664477
    Abstract: An electrode structure includes: an indium tin oxide (ITO) electrode that includes ITO; an Al electrode that includes Al and covers the ITO electrode; and a barrier electrode that includes at least one of TiN and Cr and is interposed in a region between the ITO electrode and the Al electrode.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: May 30, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Ryosuke Ishimaru, Yohei Ito, Yasuo Nakanishi
  • Patent number: 11662584
    Abstract: A waveguide display includes a waveguide, an input coupler configured to couple display light into the waveguide, and a surface-relief grating on the waveguide and configured to couple the display light out of the waveguide towards an eyebox of the waveguide display on a first side of the waveguide. The surface-relief grating is formed in a plurality of grating layers having uniform or non-uniform thickness profiles. The plurality of grating layers is characterized by a refractive index modulation that increases and then decreases as the distance of the grating layer from the waveguide increases.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: May 30, 2023
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventors: Hee Yoon Lee, Yu Shi, Elliott Franke
  • Patent number: 11659740
    Abstract: An organic light-emitting display device includes a plurality of pixels, each of which includes an organic light-emitting device including a pixel electrode, an organic emission layer, and an opposing electrode; a pixel defining layer covering an edge of the pixel electrode and being configured to define a light-emission region by having an opening which exposes a portion of the pixel electrode; and a reference line overlapping the pixel electrode with an insulating layer between the reference line and the pixel electrode and extending in a first direction. The reference line overlaps with a center point of the opening, and the opening is shifted to one side of the pixel electrode in a second direction perpendicular to the first direction.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: May 23, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sangmin Hong, Heeseong Jeong
  • Patent number: 11573373
    Abstract: A photonic structure is provided. The photonic structure includes a first oxide layer in a semiconductor substrate, a second oxide layer over an upper surface of the semiconductor substrate and an upper surface of the first oxide layer, and an optical coupling region over an upper surface of the second oxide layer. The optical coupling region is made of silicon, and an area of the optical coupling region is confined within an area of the first oxide layer in a plan view.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: February 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chan-Hong Chern, Min-Hsiang Hsu
  • Patent number: 11567262
    Abstract: A method includes providing a photonic wafer that includes an electrical layer and a layer disposed on a substrate. The layer includes at least one optical waveguide that is disposed between the electrical layer and the substrate. The method also includes removing a portion of the substrate underneath the at least one optical waveguide and forming an end-face coupler. A portion of the end-face coupler is within the removed portion of the substrate. The end-face coupler transmits an optical signal to, or receives an optical signal from, an external optical device.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: January 31, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Roman Bruck, Gianlorenzo Masini
  • Patent number: 11552451
    Abstract: A semiconductor laser device includes a laser section and a modulator section. The laser section has: a first mesa stripe which is formed on a semiconductor substrate; semi-insulative burying layers which are placed to abut on both side surfaces of the first mesa stripe and are formed on the semiconductor substrate; n-type burying layers formed on respective surfaces of the semi-insulative burying layers; and a p-type cladding layer which covers surfaces of the n-type burying layers and the first mesa stripe. The modulator section has: a second mesa stripe which is formed on the semiconductor substrate; semi-insulative burying layers which are placed to abut on both side surfaces of the second mesa stripe and are formed on the semiconductor substrate; and a p-type cladding layer which covers surfaces of the semi-insulative burying layers and the second mesa stripe.
    Type: Grant
    Filed: May 28, 2018
    Date of Patent: January 10, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takeshi Yamatoya, Takashi Nagira, Shinya Okuda
  • Patent number: 11545595
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly contact structures for LED chips are disclosed. LED chips as disclosed herein may include contact structure arrangements that have reduced impact on areas of active LED structures within the LED chips. Electrical connections between an n-contact and an n-type layer may be arranged outside of a perimeter edge or a perimeter corner of the active LED structure. N-contact interconnect configurations are disclosed that form electrical connections between n-contacts and n-type layers of LED chips outside of lateral boundaries of the active LED structures. By electrically contacting n-type layers outside of the lateral boundaries of the active LED structures, LED chips are provided with improved current spreading and improved brightness.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: January 3, 2023
    Assignee: CreeLED, Inc.
    Inventor: Justin White
  • Patent number: 11502757
    Abstract: A method of manufacturing a device with a optical component disposed thereon, including following steps of: preparing a substrate, the substrate including a signal guide and an electric conductive structure; and mounting an optical component on the substrate and corresponding a light transmission face of the optical component to the signal guide, wherein the optical component and the substrate is connected by an adhesive material and the optical component is electrically connected with the electric conductive structure. A transmission device being made by the method of manufacturing the device with the optical component disposed thereon as described above is further provided.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: November 15, 2022
    Assignee: QUANTUMZ INC.
    Inventors: Chun-Chieh Chen, Ming-Che Hsieh, Po-Ting Chen, Chun-I Wu
  • Patent number: 11493686
    Abstract: Structures for an optical component of a photonics chip and methods of forming a structure for an optical component of a photonics chip. The structure includes a slotted waveguide component having a first and second waveguide cores over a dielectric layer. The first waveguide core separated from the second waveguide core by a slot. The structure further includes a third waveguide core over the dielectric layer. The third waveguide core is positioned in a different level relative to the dielectric layer than the slotted waveguide component, and the third waveguide core and the first slot have an overlapping arrangement.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: November 8, 2022
    Assignee: GlobalFoundries U.S. Inc.
    Inventor: Yusheng Bian
  • Patent number: 11435645
    Abstract: A semiconductor device has a first semiconducting layer including an optical waveguide, a dielectric layer formed on the optical waveguide, and a conductive layer formed on the dielectric layer. A refractive index of a material of the conductive layer is smaller than a refractive index of a material of the first semiconductor layer.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: September 6, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tetsuya Iida, Yasutaka Nakashiba
  • Patent number: 11393967
    Abstract: A light emitting diode includes: a light emitting structure including a first semiconductor layer, a light emitting layer arranged on at least part of the first semiconductor layer, a second semiconductor layer arranged on the light emitting layer; a first metal layer arranged on at least part of the first semiconductor layer and in contact with the first semiconductor layer; an insulating layer covered a surface of the light emitting structure; and an electrode layer arranged on the insulating layer and having at least one region that is not overlapped with the first metal layer or the second metal layer in a vertical direction.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: July 19, 2022
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Anhe He, Suhui Lin, Jiansen Zheng, Kangwei Peng, Xiaoxiong Lin, Chenke Hsu
  • Patent number: 11283242
    Abstract: A semiconductor optical device may include a semiconductor substrate; a mesa stripe structure that extends in a stripe shape in a first direction on the semiconductor substrate and includes a contact layer on a top layer; an adjacent layer on the semiconductor substrate and adjacent to the mesa stripe structure in a second direction orthogonal to the first direction; a passivation film that covers at least a part of the adjacent layer; a resin layer on the passivation film; an electrode that is electrically connected to the contact layer and extends continuously from the contact layer to the resin layer; and an inorganic insulating film that extends continuously from the resin layer to the passivation film under the electrode, is spaced apart from the mesa stripe structure, and is completely interposed between the electrode and the resin layer.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: March 22, 2022
    Assignee: Lumentum Japan, Inc.
    Inventors: Shigetaka Hamada, Yasushi Sakuma, Kouji Nakahara
  • Patent number: 11156775
    Abstract: An integrated photonic device is provided with a photonic crystal lower cladding on a semiconductor substrate.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: October 26, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Yuval Saado
  • Patent number: 11133225
    Abstract: An optical fiber adapter and method of fabricating the same from a wafer including a double silicon-on-insulator layer structure. The optical fiber adapter may include a mode converter, a trench, and a V-groove, the V-groove and the trench operating as passive alignment features for an optical fiber, in the transverse translational and rotational degrees of freedom, and in the longitudinal translational degree of freedom, respectively. The mode converter may include a buried tapered waveguide.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: September 28, 2021
    Assignee: Rockley Photonics Limited
    Inventors: John Drake, Damiana Lerose, Henri Nykänen, Gerald Cois Byrd
  • Patent number: 11079549
    Abstract: A device is provided for optical mode spot size conversion to optically couple a semiconductor waveguide with an optical fiber. The device includes a waveguide comprising a waveguide taper region, which comprises a shoulder portion and a ridge portion above the shoulder portion. The ridge portion has a width that tapers to meet a width of the shoulder portion. The waveguide taper region comprises a first material. The device also has a mode converter coupled to the waveguide. The mode converter includes a plurality of stages, and each of the plurality of stages tapers in a direction similar to a direction of taper of the waveguide taper region. The mode converter is made of a second material different from the first material.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: August 3, 2021
    Assignee: Skorpios Technologies, Inc.
    Inventors: Majid Sodagar, Stephen B. Krasulick, John Zyskind, Paveen Apiratikul, Luca Cafiero
  • Patent number: 10985294
    Abstract: Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly contact structures for LED chips are disclosed. LED chips as disclosed herein may include contact structure arrangements that have reduced impact on areas of active LED structures within the LED chips. Electrical connections between an n-contact and an n-type layer may be arranged outside of a perimeter edge or a perimeter corner of the active LED structure. N-contact interconnect configurations are disclosed that form electrical connections between n-contacts and n-type layers of LED chips outside of lateral boundaries of the active LED structures. By electrically contacting n-type layers outside of the lateral boundaries of the active LED structures, LED chips are provided with improved current spreading and improved brightness.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: April 20, 2021
    Assignee: CreeLED, Inc.
    Inventor: Justin White
  • Patent number: 10971650
    Abstract: A light emitting device includes a stacked structure and a first insulating layer covering at least side surfaces of the stacked structure including a p-type and n-type semiconductor layers, a light emitting layer sandwiched between the p-type and n-type semiconductor layers, an n-type electrode on the n-type semiconductor layer, an n-type contact layer sandwiched between the n-type semiconductor layer and the n-type electrode, a p-type electrode on the p-type semiconductor layer, an n-type contact pad on the n-type electrode, a p-type contact pad on the p-type electrode, and a semiconductor reflector between the light emitting layer and the n-type contact layer including multiple periods, each period including at least a first layer and at least a second layer having a refractive index different from a refractive index of the first layer. The light emitting device could be applied to wide color gamut (WCG) backlight modules or ultra-thin backlight modules.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: April 6, 2021
    Assignee: Lextar Electronics Corporation
    Inventor: Shiou-Yi Kuo
  • Patent number: 10819085
    Abstract: A ridge structure (9) having a ridge lower part (6), a ridge upper part (8) above the ridge lower part (6) and having a larger width than the ridge lower part (6), is formed on a semiconductor substrate (1). A recess (11) of the ridge structure (9), where the ridge lower part (6) is laterally set back from the ridge upper part (8) due to a difference in width between the ridge upper part (8) and the ridge lower part t (6), is completely filled with an insulating film (10) by an atomic layer deposition method to form a protrusion (19) from the semiconductor substrate (1), the ridge structure (9), and the insulating film (10) without any step in a side face of the protrusion (19).
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: October 27, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventor: Tsutomu Yamaguchi
  • Patent number: 10725241
    Abstract: A spot-size converter includes: a support body that includes a main surface including a first to a fifth areas; a mesa structure that includes a first part on the first area and includes a second part on the second to the fourth areas; and an embedding structure that includes a first region and a second region in which a first and a second side-surfaces of the second part of the mesa structure are respectively embedded. The second part of the mesa structure includes a portion that has a width gradually decreasing in a direction from the third area toward the fifth area. The first region of the embedding structure extends along the first side-surface and terminates at one of the third and the fourth areas. The second region of the embedding structure extends along the second side-surface of the second part and is disposed on the fifth area.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: July 28, 2020
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoya Kono, Takuo Hiratani, Masataka Watanabe
  • Patent number: 10615572
    Abstract: A semiconductor laser diode is disclosed. In an embodiment a semiconductor laser diode includes a semiconductor layer sequence having at least one active layer and a ridge waveguide structure having a ridge extending in a longitudinal direction from a light output surface to a rear side surface and being delimited by ridge side surfaces in a lateral direction perpendicular to a longitudinal direction, wherein the ridge has a first region and a second region adjacent thereto in a vertical direction perpendicular to the longitudinal and lateral directions, wherein the ridge includes a first semiconductor material in the first region and at least one second semiconductor material different from the first semiconductor material in the second region, wherein the ridge has a first width in the first region, and wherein the ridge has a second width in the second region, the second width being larger than the first width.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: April 7, 2020
    Assignee: OSRAM OLED GMBH
    Inventors: Sven Gerhard, Christoph Eichler, Christian Rumbolz
  • Patent number: 10608142
    Abstract: A method of manufacturing a light-emitting device includes: providing a substrate; forming a light-emitting structure comprising an active layer on the substrate; forming a protective layer having a first thickness on the light-emitting structure; etching the protective layer such that the protective layer has a second thickness less than the first thickness; and patterning the protective layer.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: March 31, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Jar-Yu Wu, Ching-Jang Su, Chun-Lung Tseng, Ching-Hsing Shen
  • Patent number: 10553816
    Abstract: According to one embodiment, a display device includes a display area, a first peripheral area, an organic insulating film. The display area is provided on a substrate and includes a plurality of organic electroluminescent (EL) elements aligned. The first peripheral area is provided on the substrate, around the display area. The organic insulating film is provided on the substrate and covers a circuit including a drive circuit driving the organic EL elements. The organic insulating film comprises a first groove provided in the organic insulating film, around the display area, in an area between the display area and the first peripheral area, and a dummy area to which at least one of functional materials of the organic EL elements is applied, on the first peripheral area.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: February 4, 2020
    Assignee: JOLED INC.
    Inventor: Isao Kamiyama
  • Patent number: 10431767
    Abstract: An organic light emitting display device can include an anode electrode disposed on a substrate; an auxiliary electrode disposed on the anode electrode, the auxiliary electrode having a first height and a second height being different from the first height; a bank disposed on one side of the auxiliary electrode and another side of the auxiliary electrode; an organic light emitting layer disposed on an upper surface of the auxiliary electrode in an opening area exposed by the bank; and a cathode electrode disposed on the organic light emitting layer, in which the auxiliary electrode has the first height in a covered area overlapping with the bank and the second height in the opening area exposed by the bank.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: October 1, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventor: JoungWon Woo
  • Patent number: 9979160
    Abstract: An optical circulator is a device that routes optical pulses from port to port in a predetermined manner, e.g. in a 3-port optical circulator, optical pulses entering port 1 are routed out of port 2, while optical pulses entering port 2 exit out of port 3 and optical pulses fed into port 3 exit out of port 3. Currently such an optical circulator is made of discrete components such as magnetooptic garnets, rare-earth magnets and optical polarizers that are packaged together with fiber optic elements. Disclosed herein is a different kind of optical circulator that is monolithically integrated on a single semiconductor substrate and that is applicable for the routing of optical pulses. The embodied invention will enable photonic integrated circuits to incorporate on-chip optical circulator functionality thereby allowing much more complex optical designs to be implemented monolithically.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: May 22, 2018
    Assignee: UNIVERSITY OF CENTRAL FLORIDA RESEARCH FOUNDATION, INC.
    Inventors: Demetrios Christodoulides, Patrick L. LiKamWa, Parinaz Aleahmad, Ramy El-Ganainy
  • Patent number: 9853179
    Abstract: Systems for reducing dark current in a photodiode include a heater configured to heat a photodiode above room temperature. A reverse bias voltage source is configured to apply a reverse bias voltage to the heated photodiode to reduce a dark current generated by the photodiode.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: December 26, 2017
    Assignee: International Business Machines Corporation
    Inventors: Barry P. Linder, Jason S. Orcutt
  • Patent number: 9791642
    Abstract: A chip packaging includes a first part comprising a support; and a core polymer layer transversally structured so as to exhibit distinct residual portions comprising: first waveguide cores each having a first height and disposed within said inner region; and one or more first alignment structures disposed within said outer region. A second part of the packaging comprises: second waveguide cores, each having a same second height; and one or more second alignment structures complementarily shaped with respect to the one or more first alignment structures, and wherein, the first part structured such that said inner region is recessed with respect to the outer region, to enable: the second waveguide cores to contact the first waveguide cores; and the one or more second alignment structures to respectively receive, at least partly, the one or more first alignment structures. The invention is further directed to related passive alignment methods.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: October 17, 2017
    Assignee: International Business Machines Corporation
    Inventors: Roger F. Dangel, Daniel S. Jubin, Antonio La Porta, Bert J. Offrein
  • Patent number: 9755100
    Abstract: Methods and systems for reducing dark current in a photodiode include heating a photodiode above room temperature. A reverse bias voltage is applied to the heated photodiode to reduce a dark current generated by the photodiode.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: September 5, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Barry P. Linder, Jason S. Orcutt
  • Patent number: 9570420
    Abstract: Methods and apparatus are disclosed for wirelessly communicating among integrated circuits and/or functional modules within the integrated circuits. A semiconductor device fabrication operation uses a predetermined sequence of photographic and/or chemical processing steps to form one or more functional modules onto a semiconductor substrate. The functional modules are coupled to an integrated waveguide that is formed onto the semiconductor substrate and/or attached thereto to form an integrated circuit. The functional modules communicate with each other as well as to other integrated circuits using a multiple access transmission scheme via the integrated waveguide. One or more integrated circuits may be coupled to an integrated circuit carrier to form Multichip Module. The Multichip Module may be coupled to a semiconductor package to form a packaged integrated circuit.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: February 14, 2017
    Assignee: Broadcom Corporation
    Inventors: Jesus Alfonso Castaneda, Arya Reza Behzad, Ahmadreza Rofougaran, Sam Ziqun Zhao, Michael Boers
  • Patent number: 9381057
    Abstract: A skin surface is treated with RF energy (e.g., unipolar, monopolar, bipolar or multipolar RF delivery). A first semiconductive cap disposed on a first distal end of a first electrode and, optionally, a second semiconductive cap disposed on a second distal end of a second electrode are applied to the skin surface. RF energy is delivered from the first electrode and the second electrode through the first semiconductive cap and the second semiconductive cap, respectively, through the skin surface. The first semiconductive cap and/or the second semiconductive cap have an electrical conductivity matched or substantially matched to the skin's electrical conductivity (e.g., about 0.1 to about 2 times that of the skin).
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: July 5, 2016
    Assignee: Candela Corporation
    Inventors: Kevin T. Schomacker, Avner Rosenberg
  • Patent number: 9316784
    Abstract: An MCM may include a single optical routing layer that provides point-to-point connectivity among N chips in the MCM, such as all-to-all connectivity or full-mesh point-to-point connectivity. Moreover, the optical routing layer may include: N optical waveguides optically coupled to the N chips and a cyclic de-multiplexer, optically coupled to the N optical waveguides, that routes optical signals among the N optical waveguides without optical-waveguide crossing in the optical routing layer. For example, the cyclic de-multiplexer may include: an array-waveguide-grating (AWG) wavelength router and/or an echelle-grating wavelength router.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: April 19, 2016
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Ashok V. Krishnamoorthy, Xuezhe Zheng
  • Patent number: 9268094
    Abstract: Optical system has a passive optical chip on the top surface with a first wave guide and a laser diode arranged on the edge of the chip. The chip has a reflecting structure on the top surface at the wavelength of the laser diode and a thin layer portion powered by the laser diode and covering a part of the first wave guide. The first wave guide input is linked to the laser diode, passing through the reflecting structure. The chip has a second wave guide on the top surface, a first coupler formed by two first portions of the first wave guide not covered by the thin layer portion and situated on either side of the thin layer portion along the optical path, and a second coupler formed by two second portions, respectively of the first and second wave guides, not covered by the thin layer portion.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: February 23, 2016
    Assignee: Thales
    Inventors: Thomas Nappez, Philippe Rondeau, Jean-Pierre Schlotterbeck, Elise Ghibaudo, Jean-Emmanuel Broquin
  • Patent number: 9246053
    Abstract: A light-emitting device of little aging electric leakage and high luminous efficiency and fabrication thereof, in which, the light-emitting device includes: a semiconductor epitaxial laminated layer that comprises an N-type semiconductor layer, a P-type semiconductor layer and a light-emitting layer between the N-type semiconductor layer and the P-type semiconductor layer, the surface of which has deflected dislocation; electromigration resistant metal that fills into the deflected dislocation over the N-type or/and P-type semiconductor layer surface through pretreatment to block the electromigration channel formed over the semiconductor epitaxial laminated layer due to deflected dislocation to eliminate electric leakage.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: January 26, 2016
    Assignee: Xiamen Sanan Optoelectronics Technology Co., Ltd.
    Inventors: Xinghua Liang, Te-Ling Hsia, Chenke Hsu, Chih-Wei Chao, Shuiqing Li
  • Patent number: 9224777
    Abstract: A method for manufacturing a solid-state image pickup device that includes a substrate including a photoelectric conversion unit and a waveguide arranged on the substrate, the waveguide corresponding to the photoelectric conversion unit and including a core and a cladding, includes a first step and a second step, in which in the first step and the second step, a member to be formed into the core is formed in an opening in the cladding by high-density plasma-enhanced chemical vapor deposition, and in which after the first step, in the second step, the member to be formed into the core is formed by the high-density plasma-enhanced chemical vapor deposition under conditions in which the ratio of a radio-frequency power on the back face side of the substrate to a radio-frequency power on the front face side of the substrate is higher than that in the first step.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: December 29, 2015
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tadashi Sawayama, Hiroshi Ikakura, Takaharu Kondo, Toru Eto
  • Patent number: 9177992
    Abstract: An LED module is disclosed containing an integrated driver transistor (e.g, a MOSFET) in series with an LED. In one embodiment, LED layers are grown over a substrate. The transistor regions are formed over the same substrate. After the LED layers, such as GaN layers, are grown to form the LED portion, a central area of the LED is etched away to expose a semiconductor surface in which the transistor regions are formed. A conductor connects the transistor in series with the LED. Another node of the transistor is electrically coupled to an electrode on the bottom surface of the substrate. In one embodiment, an anode of the LED is connected to one terminal of the module, one current carrying node of the transistor is connected to a second terminal of the module, and the control terminal of the transistor is connected to a third terminal of the module.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: November 3, 2015
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventors: Richard Austin Blanchard, Bradley Steven Oraw
  • Patent number: 9110201
    Abstract: This invention relates to a metamaterial structure, which can simultaneously cause resonance at a wavelength of light that excites quantum dots and a wavelength of light produced by the quantum dots in a local space where quantum dots are located. The metamaterial structure, which can resonate with two wavelengths unlike conventional metamaterial structures that resonate with a single wavelength, includes a substrate, a quantum dot layer, and a resonance layer formed between the substrate and the quantum dot layer and having two rectangular holes which are formed to cross each other so that resonance occurs at two different resonance wavelengths.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: August 18, 2015
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Choongi Choi, Jongho Choe
  • Patent number: 9099624
    Abstract: A semiconductor light emitting device and package containing the same include: a light emitting structure including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer. A light extraction layer is disposed on the light emitting structure and includes a light-transmissive thin film layer having light transmittance, a nano-rod layer including nano-rods disposed on the light-transmissive thin film layer, and a nano-wire layer including nano-wires disposed on the nano-rod layer.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: August 4, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Wan Ho Lee, Gi Bum Kim, Si Hyuk Lee
  • Patent number: 9082934
    Abstract: A semiconductor optoelectronic structure with increased light extraction efficiency, includes a substrate; a buffer layer is formed on the substrate and includes a pattern having plural grooves formed adjacent to the substrate; a semiconductor layer is formed on the buffer layer and includes an n-type conductive layer formed on the buffer layer, an active layer formed on the n-type conductive layer, and a p-type conductive layer formed on the active layer; a transparent electrically conductive layer is formed on the semiconductor layer; a p-type electrode is formed on the transparent electrically conductive layer; and an n-type electrode is formed on the n-type conductive layer.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: July 14, 2015
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Shih-Cheng Huang, Po-Min Tu, Peng-Yi Wu, Wen-Yu Lin, Chih-Pang Ma, Tzu-Chien Hong, Chia-Hui Shen
  • Patent number: 9054498
    Abstract: A method of fabricating an (Al,Ga,In)N laser diode, comprising depositing one or more III-N layers upon a growth substrate at a first temperature, depositing an indium containing laser core at a second temperature upon layers deposited at a first temperature, and performing all subsequent fabrication steps under conditions that inhibit degradation of the laser core, wherein the conditions are a substantially lower temperature than the second temperature.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: June 9, 2015
    Assignee: The Regents of the University of California
    Inventors: Daniel A. Cohen, Steven P. DenBaars, Shuji Nakamura