Optical Waveguide Structure Patents (Class 438/31)
-
Patent number: 8637335Abstract: A semiconductor structure includes a photonic modulator and a field effect transistor on a same substrate. The photonic modulator includes a modulator semiconductor structure and a semiconductor contact structure employing a same semiconductor material as a gate electrode of a field effect transistor. The modulator semiconductor structure includes a lateral p-n junction, and the semiconductor contact structure includes another lateral p-n junction. To form this semiconductor structure, the modulator semiconductor structure in the shape of a waveguide and an active region of a field effect transistor region can be patterned in a semiconductor substrate. A gate dielectric layer is formed on the modulator semiconductor structure and the active region, and is subsequently removed from the modulator semiconductor structure.Type: GrantFiled: August 15, 2012Date of Patent: January 28, 2014Assignee: International Business Machines CorporationInventors: Solomon Assefa, William M. J. Green, Marwan H. Khater, Yurii A. Vlasov
-
Patent number: 8637329Abstract: A method for producing a semiconductor optical integrated device includes the steps of forming a substrate product including first and second stacked semiconductor layer portions; forming a first mask on the first and second stacked semiconductor layer portions, the first mask including a stripe-shaped first pattern region and a second pattern region, the second pattern region including a first end edge; forming a stripe-shaped mesa structure; removing the second pattern region of the first mask; forming a second mask on the second stacked semiconductor layer portion; and selectively growing a buried semiconductor layer with the first and second masks. The second mask includes a second end edge separated from the first end edge of the first mask, the second end edge being located on the side of the second stacked semiconductor layer portion in the predetermined direction with respect to the first end edge of the first mask.Type: GrantFiled: June 29, 2012Date of Patent: January 28, 2014Assignee: Sumitomo Electric Industries LtdInventors: Yoshihiro Yoneda, Hirohiko Kobayashi, Kenji Koyama, Masaki Yanagisawa, Kenji Hiratsuka
-
Patent number: 8629475Abstract: In accordance with certain embodiments, semiconductor dies are embedded within polymeric binder to form, e.g., freestanding white light-emitting dies and/or composite wafers containing multiple light-emitting dies embedded in a single volume of binder.Type: GrantFiled: February 15, 2013Date of Patent: January 14, 2014Assignee: Cooledge Lighting Inc.Inventor: Michael A. Tischler
-
Publication number: 20140010253Abstract: Photonic integrated circuits on silicon are disclosed. By bonding a wafer of compound semiconductor material as an active region to silicon and removing the substrate, the lasers, amplifiers, modulators, and other devices can be processed using standard photolithographic techniques on the silicon substrate. A silicon laser intermixed integrated device in accordance with one or more embodiments of the present invention comprises a silicon-on-insulator substrate, comprising at least one waveguide in a top surface, and a compound semiconductor substrate comprising a gain layer, the compound semiconductor substrate being subjected to a quantum well intermixing process, wherein the upper surface of the compound semiconductor substrate is bonded to the top surface of the silicon-on-insulator substrate.Type: ApplicationFiled: September 13, 2013Publication date: January 9, 2014Applicant: The Regents of the University of CaliforniaInventors: Matthew N. Sysak, John E. Bowers, Alexander W. Fang, Hyundai Park
-
Publication number: 20140004638Abstract: Novel processing methods for production of high-refractive index contrast and low loss optical waveguides are disclosed. In one embodiment, a “channel” waveguide is produced by first depositing a lower cladding material layer with a low refractive index on a base substrate, a refractory metal layer, and a top diffusion barrier layer. Then, a trench is formed with an open surface to the refractory metal layer. The open surface is subsequently oxidized to form an oxidized refractory metal region, and the top diffusion barrier layer and the non-oxidized refractory metal region are removed. Then, a low-refractive-index top cladding layer is deposited on this waveguide structure to encapsulate the oxidized refractory metal region. In another embodiment, a “ridge” waveguide is produced by using similar process steps with an added step of depositing a high-refractive-index material layer and an optional optically-transparent layer.Type: ApplicationFiled: June 28, 2013Publication date: January 2, 2014Inventor: Payam Rabiei
-
Publication number: 20140003766Abstract: Inverted 45° semiconductor mirrors as vertical optical couplers for PIC chips, particularly optical receivers and transmitters. An inverted 45° semiconductor mirror functions to couple light between a plane in the PIC chip defined by thin film layers and a direction normal to a top surface of the PIC chip where it may be generated or collected by an off-chip component, such as a wire terminal. In an exemplary embodiment, a (110) plane of a cubic crystalline semiconductor may provide a 45° facet inverted relative to a (100) surface of the semiconductor from which light is to be emitted. In further embodiments, a (110) plane may be exposed by undercutting a device layer of a semiconductor on insulator (SOI) substrate. Alternatively, a pre-etched substrate surface may be bonded to a handling wafer, thinned, and then utilized for PIC waveguide formation.Type: ApplicationFiled: June 28, 2012Publication date: January 2, 2014Inventors: John HECK, Haisheng RONG
-
Patent number: 8619358Abstract: An optical amplifier on a silicon platform includes a first doped device layer and a second doped device layer. A gain medium is positioned between the first and second doped device layers. The gain medium comprises extrinsic gain materials so as to substantially confine in the gain medium a light signal and allow the optical amplifier to be electrically or optically pumped.Type: GrantFiled: November 3, 2009Date of Patent: December 31, 2013Assignees: Massachusetts Institute of Technology, California Institute of Technology, The Board of Trustees of the Leland Stanford Junior University, University of Rochester, Cornell UniversityInventors: Lionel C. Kimerling, Harry Atwater, Mark L. Brongersma, Luca Dal Negro, Thomas L Koch, Philippe Fauchet, Michal Lipson, Jurgen Michel, Carlos Angulo Barrios
-
Patent number: 8618638Abstract: A process to manufacture a semiconductor optical modulator is disclosed, in which the process easily forms a metal film including AuZn for the p-ohmic metal even a contact hole has an enhanced aspect ration. The process forms a mesa including semiconductor layers first, then, buries the mesa by a resin layer sandwiched by insulating films. The resin layer provides an opening reaching the top of the mesa, into which the p-ohmic metal is formed. Another metal film including Ti is formed on the upper insulating film along the opening.Type: GrantFiled: December 6, 2011Date of Patent: December 31, 2013Assignee: Sumitomo Electric Industries Ltd.Inventors: Yoshihiro Yoneda, Kenji Koyama, Hirohiko Kobayashi
-
Patent number: 8617912Abstract: A method for manufacturing a semiconductor laser includes the steps of preparing a mold with a pattern surface having recesses, forming a stacked semiconductor layer including a grating layer, forming a resin part on the grating layer, forming a resin pattern portion on the resin part, forming a diffraction grating by etching the grating layer using the resin part as a mask, and forming a mesa-structure on the stacked semiconductor layer. Each of the recesses includes two end portions and a middle portion between the two end portions. A depth of at least one of the two end portions from the pattern surface is greater than that of the middle portion. The step of forming the mesa-structure includes the step of etching the stacked semiconductor layer so as to remove end portions of the diffraction grating in a direction orthogonal to a periodic direction thereof.Type: GrantFiled: June 21, 2012Date of Patent: December 31, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventor: Masaki Yanagisawa
-
Patent number: 8614452Abstract: The light extraction efficiency of a typical light-emitting diode (LED) is improved by incorporating one-dimensional ZnO nanorods. The light extraction efficiency is improved about 31% due to the waveguide effect of ZnO sub-microrods, compared to an LED without the nanorods. Other shapes of ZnO microrods and nanorods are produced using a simple non-catalytic wet chemical growth method at a low temperature on an indium-tin-oxide (ITO) top contact layer with no seed layer. The crystal morphology of a needle-like or flat top hexagonal structure and the density and size of ZnO microrods and nanorods are easily modified by controlling the pH value and growth time. The waveguide phenomenon in each ZnO rod is observed using confocal scanning electroluminescence microscopy (CSEM) and micro-electroluminescence spectra (MES).Type: GrantFiled: April 26, 2011Date of Patent: December 24, 2013Assignee: Gwangju Institute of Science and TechnologyInventors: Ki-Seok Kim, Gun-Young Jung, Sang-Mook Kim, Mun-Seok Jeong, Hyun Jeong
-
Publication number: 20130336613Abstract: Described embodiments include photonic integrated circuits and systems with photonic devices, including thermal isolation regions for the photonic devices. Methods of fabricating such circuits and systems are also described.Type: ApplicationFiled: June 15, 2012Publication date: December 19, 2013Inventors: Roy Meade, Gurtej Sandhu
-
Publication number: 20130336614Abstract: An optical module and a fabrication method thereof, the optical module includes a sub-substrate which includes a support layer, an active layer, a BOX layer interposed between the support layer and the active layer, and a height adjusting layer, an optical fiber, and an optical device which is fixed to a silicon substrate, wherein the sub-substrate includes a fixing groove formed by the active layer and the BOX layer, the optical fiber is fixed to the fixing groove, and the optical fiber is optically coupled to the optical device by positioning the sub-substrate via the height adjusting layer with respect to the silicon substrate.Type: ApplicationFiled: June 18, 2013Publication date: December 19, 2013Inventors: Kaoru YODA, Kazuhiro TORIUMI
-
Publication number: 20130336346Abstract: Embodiments of the present disclosure provide optical connection techniques and configurations. In one embodiment, an opto-electronic assembly includes a first semiconductor die including a light source to generate light, and a first mode expander structure comprising a first optical material disposed on a surface of the first semiconductor die, the first optical material being optically transparent at a wavelength of the light, and a second semiconductor die including a second mode expander structure comprising a second optical material disposed on a surface of the second semiconductor die, the second material being optically transparent at the wavelength of the light, wherein the second optical material is evanescently coupled with the first optical material to receive the light from the first optical material. Other embodiments may be described and/or claimed.Type: ApplicationFiled: March 5, 2012Publication date: December 19, 2013Inventors: Mauro J. Kobrinsky, Jia-Hung Tseng, Bruce A. Block
-
Publication number: 20130330867Abstract: A semiconductor optical integrated device includes a first semiconductor optical device formed over a (001) plane of a substrate and a second semiconductor optical device which is formed over the (001) plane of the substrate in a (110) orientation from the first semiconductor optical device and which is optically connected to the first semiconductor optical device. The first semiconductor optical device includes a first core layer and a first clad layer which is formed over the first core layer and which has a crystal surface on a side on a second semiconductor optical device side that forms an angle ? greater than or equal to 55 degrees and less than or equal to 90 degrees with the (001) plane.Type: ApplicationFiled: August 14, 2013Publication date: December 12, 2013Applicant: FUJITSU LIMITEDInventors: Shigekazu OKUMURA, Mitsuru EKAWA, Shuichi TOMABECHI, Ayahito UETAKE
-
Publication number: 20130330034Abstract: An optical system includes a silicon substrate, a 45-degree or 54.7-degree reflector formed in the silicon substrate, deeply etched double U-shape trenches formed in the silicon substrate, a thin film disposed on the reflector surface with total or partial optical refection, a top and bottom surface contacted p-i-n structure formed in the silicon substrate for optical power monitoring, a plurality of rectangular or wedge shaped spacers formed on top surface of the silicon substrate, and a surface emitting light source flip-chip bonded on the silicon substrate via the spacers.Type: ApplicationFiled: June 12, 2012Publication date: December 12, 2013Applicant: LAXENSE INC.Inventors: Ningning Feng, Xiaochen Sun, Dawei Zheng
-
Publication number: 20130322811Abstract: Disclosed are a method and structure providing a silicon-on-insulator substrate on which photonic devices are formed and in which a core material of a waveguide is optically decoupled from a support substrate by a shallow trench isolation region.Type: ApplicationFiled: June 4, 2012Publication date: December 5, 2013Inventor: Roy Meade
-
Publication number: 20130322481Abstract: Laser diodes and methods of fabricating laser diodes are disclosed. A laser diode includes a substrate including (Al,In)GaN, an n-side cladding layer including (Al,In)GaN having an n-type conductivity, an n-side waveguide layer including (Al,In)GaN having an n-type conductivity, an active region, a p-side waveguide layer including (Al,In)GaN having a p-type conductivity, a p-side cladding layer including (Al,In)GaN having a p-type conductivity, and a laser cavity formed by cleaved facets. The substrate includes a crystal structure having a surface plane orientation within about 10 degrees of a 20 23 or a 20 23 crystallographic plane orientation. The laser cavity is formed by cleaved facets that have an orientation corresponding to a nonpolar plane of the crystal structure of the substrate.Type: ApplicationFiled: May 31, 2012Publication date: December 5, 2013Inventors: Rajaram Bhat, Dmitry Sergeevich Sizov, Chung-En Zah
-
Publication number: 20130322890Abstract: Described are embodiments of apparatuses and systems including a hybrid laser including anti-resonant waveguides, and methods for making such apparatuses and systems. A hybrid laser apparatus may include a first semiconductor region including an active region of one or more layers of semiconductor materials from group III, group IV, or group V semiconductor, and a second semiconductor region coupled with the first semiconductor region and having an optical waveguide, a first trench disposed on a first side of the optical waveguide, and a second trench disposed on a second side, opposite the first side, of the optical waveguide. Other embodiments may be described and/or claimed.Type: ApplicationFiled: March 26, 2012Publication date: December 5, 2013Inventor: Hyundai Park
-
Patent number: 8600198Abstract: The invention provides a semiconductor optical modulator including a two-step mesa optical waveguide having a first clad layer (101); a mesa-like core layer (102) formed over the first clad layer (101); and a second clad layer (103) formed into a mesa shape over the core layer (102), and having a mesa width smaller than that of the core layer (102). The two-step mesa optical waveguide includes a multi-mode optical waveguide region to which an electric field is applied or into which an electric current is injected, and a single-mode optical waveguide region to which the electric field is not applied and into which the electric current is not injected. When the mesa width of the core layer in the multi-mode optical waveguide region is defined as Wmesa1, and the mesa width of the core layer in the single-mode optical waveguide region is defined as Wmesa2, Wmesa1>Wmesa2 is satisfied.Type: GrantFiled: March 5, 2010Date of Patent: December 3, 2013Assignee: NEC CorporationInventors: Shinya Sudo, Tomoaki Kato, Kenji Sato, Takao Morimoto
-
Patent number: 8597966Abstract: A method for producing a semiconductor optical device includes a first etching step of etching a stacked semiconductor layer with a first mask to form a stripe-shaped optical waveguide, the stripe-shaped optical waveguide including first and second stripe-shaped optical waveguides formed on first and second regions of a substrate, respectively; a step of forming a second mask on the stacked semiconductor layer with the first mask left; and a second etching step of etching the stacked semiconductor layer on the first region with the first and second masks. The second mask has a pattern for forming a mesa structure and includes an opening including first and second opening edges remote from side surfaces of the first stripe-shaped optical waveguide. The mesa structure is formed of the first stripe-shaped optical waveguide in the second etching step. The second stripe-shaped optical waveguide formed in the first etching step has a ridge structure.Type: GrantFiled: January 11, 2013Date of Patent: December 3, 2013Assignee: Sumitomo Electric Industries Ltd.Inventor: Kenji Hiratsuka
-
Patent number: 8598599Abstract: The present invention provides a Group III nitride semiconductor light-emitting device whose main surface is a plane which provides an internal electric field of zero, and which exhibits improved emission performance. The light-emitting device includes a sapphire substrate which has, in a surface thereof, a plurality of dents which are arranged in a stripe pattern as viewed from above; an n-contact layer formed on the dented surface of the sapphire substrate; a light-emitting layer formed on the n-contact layer; an electron blocking layer formed on the light-emitting layer; a p-contact layer formed on the electron blocking layer; a p-electrode; and an n-electrode. The electron blocking layer has a thickness of 2 to 8 nm and is formed of Mg-doped AlGaN having an Al compositional proportion of 20 to 30%.Type: GrantFiled: March 25, 2011Date of Patent: December 3, 2013Assignee: Toyoda Gosei Co., Ltd.Inventors: Yoshiki Saito, Koji Okuno, Yasuhisa Ushida
-
Patent number: 8592236Abstract: A method for manufacturing an optically pumped surface-emitting semiconductor laser device, wherein a surface-emitting semiconductor laser layer sequence having a quantum confinement structure is applied onto a common substrate. The surface-emitting semiconductor laser layer sequence outside an intended laser region is removed and a region is exposed. An edge-emitting semiconductor layer sequence is applied onto the exposed region over the common substrate, wherein the exposed region is exposed via the removing step, and the exposed region is suitable for transmitting pump radiation into the quantum confinement structure. A current injection path is then formed in the edge-emitting semiconductor layer sequence.Type: GrantFiled: November 27, 2007Date of Patent: November 26, 2013Assignee: OSRAM GmbHInventors: Tony Albrecht, Norbert Linder, Johann Luft
-
Patent number: 8587011Abstract: A light-emitting device which emits light omnidirectionally is provided. A light-emitting device according to the present invention includes: a package which is translucent; an LED provided in a recess in the package; and a sealing member for sealing the LED and packaging the recess; and the recess includes a bottom surface on which the LED is mounted and a side surface surrounding a bottom surface, and light emitted by the LED is transmitted inside the package through the bottom surface and the side surface of the recess and is emitted to outside of the package from the back surface and the side surface of the package.Type: GrantFiled: September 6, 2011Date of Patent: November 19, 2013Assignee: Panasonic CorporationInventors: Tsugihiro Matsuda, Nobuyoshi Takeuchi, Hideo Nagai, Takaari Uemoto, Masahiro Miki, Atsushi Motoya
-
Patent number: 8569085Abstract: A photoelectrochemical (PEC) etch is performed for chip shaping of a device comprised of a III-V semiconductor material, in order to extract light emitted into guided modes trapped in the III-V semiconductor material. The chip shaping involves varying an angle of incident light during the PEC etch to control an angle of the resulting sidewalls of the III-V semiconductor material. The sidewalls may be sloped as well as vertical, in order to scatter the guided modes out of the III-V semiconductor material rather than reflecting the guided modes back into the III-V semiconductor material. In addition to shaping the chip in order to extract light emitted into guided modes, the chip may be shaped to act as a lens, to focus its output light, or to direct its output light in a particular way.Type: GrantFiled: October 9, 2009Date of Patent: October 29, 2013Assignee: The Regents of the University of CaliforniaInventors: Adele Tamboli, Evelyn L. Hu, James S. Speck
-
Patent number: 8569083Abstract: This application discloses a light-emitting device with narrow dominant wavelength distribution and a method of making the same. The light-emitting device with narrow dominant wavelength distribution at least includes a substrate, a plurality of light-emitting stacked layers on the substrate, and a plurality of wavelength transforming layers on the light-emitting stacked layers, wherein the light-emitting stacked layer emits a first light with a first dominant wavelength variation; the wavelength transforming layer absorbs the first light and converts the first light into the second light with a second dominant wavelength variation; and the first dominant wavelength variation is larger than the second dominant wavelength variation.Type: GrantFiled: February 24, 2010Date of Patent: October 29, 2013Assignee: Epistar CorporationInventors: Chih-Chiang Lu, Shu-Ting Hsu, Yen-Wen Chen, Chien-Yuan Wang, Ru-Shi Liu, Min-Hsun Hsieh
-
Publication number: 20130279848Abstract: Described embodiments include optical connections for electronic-photonic devices, such as optical waveguides and photonic detectors for receiving optical waves from the optical waveguides and directing the optical waves to a common point. Methods of fabricating such connections are also described.Type: ApplicationFiled: April 20, 2012Publication date: October 24, 2013Inventor: Roy Meade
-
Publication number: 20130279845Abstract: PLC architectures and fabrication techniques for providing electrical and photonic integration of a photonic components with a semiconductor substrate. In the exemplary embodiment, the PLC is to accommodate optical input and/or output (I/O) as well as electrically couple to a microelectronic chip. One or more photonic chip or optical fiber terminal may be coupled to an optical I/O of the PLC. In embodiments the PLC includes a light modulator, photodetector and coupling regions supporting the optical I/O. Spin-on electro-optic polymer (EOP) may be utilized for the modulator while a photodefinable material is employed for a mode expander in the coupling region.Type: ApplicationFiled: December 21, 2011Publication date: October 24, 2013Inventors: Mauro J. Kobrinsky, Miriam R. Reshotko, Ibrahim Ban, Bruce A. Block, Peter L. Chang
-
Patent number: 8563342Abstract: A method of making a semiconductor optical integrated device includes the steps of forming, on a substrate, a plurality of semiconductor integrated devices including a first optical semiconductor element having a first bonding pad and a second optical semiconductor element; forming a plurality of bar-shaped semiconductor optical integrated device arrays by cutting the substrate, each of the semiconductor optical integrated device arrays including two or more semiconductor optical integrated devices; alternately arranging the plurality of semiconductor optical integrated device arrays and a plurality of spacers in a thickness direction of the substrate so as to be fixed in place; and forming a coating film on a facet of the semiconductor optical integrated device array. Furthermore, the spacer has a movable portion facing the first bonding pad, the movable portion protruding toward the first bonding pad and being displaceable in a protruding direction.Type: GrantFiled: May 24, 2012Date of Patent: October 22, 2013Assignee: Sumitomo Electric Industries Ltd.Inventors: Yoshihiro Yoneda, Hirohiko Kobayashi, Kenji Koyama, Masaki Yanagisawa, Kenji Hiratsuka
-
Publication number: 20130272334Abstract: A semiconductor laser module includes a laser diode array, an optical fiber array, a fiber array fitting for fixing the optical fiber array, a casing, and a support fitting for fixing the fiber array fitting and casing. The fiber array fitting and support fitting have a first contact section that is in line-contact or surface-contact with the plane section parallel with the light emission surface of the laser diode array, and are laser-welded and fixed to each other at the first contact section. The support fitting and casing have a second contact section that is in line-contact or surface-contact with the plane section vertical to the light emission surface of the laser diode array, and are laser-welded and fixed to each other at the second contact section.Type: ApplicationFiled: May 14, 2012Publication date: October 17, 2013Applicant: PANASONIC CORPORATIONInventors: Makoto Ryudo, Naoto Ueda
-
Patent number: 8546162Abstract: A method for forming a light guide layer with improved transmission reliability in a semiconductor substrate, the method including forming a trench in the semiconductor substrate, forming a cladding layer and a preliminary light guide layer in the trench such that only one of opposite side end portions of the preliminary light guide layer is in contact with an inner sidewall of the trench, and performing a thermal treatment on the substrate to change the preliminary light guide layer into the light guide layer.Type: GrantFiled: September 23, 2011Date of Patent: October 1, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Dae-Lok Bae, Byung-Lyul Park, Pil-Kyu Kang, Gil-Heyun Choi, Kwang-Jin Moon
-
Patent number: 8546163Abstract: Provided is a group-III nitride semiconductor laser device with a laser cavity allowing for a low threshold current, on a semipolar surface of a support base in which the c-axis of a hexagonal group-III nitride is tilted toward the m-axis. First and second fractured faces 27, 29 to form the laser cavity intersect with an m-n plane. The group-III nitride semiconductor laser device 11 has a laser waveguide extending in a direction of an intersecting line between the m-n plane and the semipolar surface 17a. In a laser structure 13, a first surface 13a is opposite to a second surface 13b. The first and second fractured faces 27, 29 extend from an edge 13c of the first surface to an edge 13d of the second surface 13b. The fractured faces are not formed by dry etching and are different from conventionally-employed cleaved facets such as c-planes, m-planes, or a-planes.Type: GrantFiled: September 22, 2011Date of Patent: October 1, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yusuke Yoshizumi, Yohei Enya, Takashi Kyono, Masahiro Adachi, Katsushi Akita, Masaki Ueno, Takamichi Sumitomo, Shinji Tokuyama, Koji Katayama, Takao Nakamura, Takatoshi Ikegami
-
Publication number: 20130252359Abstract: Some embodiments include communication methods, methods of forming an interconnect, signal interconnects, integrated circuit structures, circuits, and data apparatuses. In one embodiment, a communication method includes accessing an optical signal comprising photons to communicate information, accessing an electrical signal comprising electrical data carriers to communicate information, and using a single interconnect, communicating the optical and electrical signals between a first spatial location and a second spatial location spaced from the first spatial location.Type: ApplicationFiled: May 20, 2013Publication date: September 26, 2013Applicant: Micron Technology, Inc.Inventor: Chandra Mouli
-
Patent number: 8541735Abstract: An optical material is inlaid into a supporting substrate, with the top surface of the optical material flush with the top surface of the substrate, wherein the optical element is used to shape a beam of light travelling substantially parallel to the top surface of the substrate, but with the central axis of the beam below the top surface of the substrate. The optical elements serve to shape the beam of light for delivery to or from a microfabricated structure within the device.Type: GrantFiled: April 7, 2010Date of Patent: September 24, 2013Assignee: Innovative Micro TechnologyInventors: John S. Foster, John C. Harley, Ian R. Johnston, Jeffery F. Summers
-
Patent number: 8536603Abstract: An optoelectronic semiconductor chip having a semiconductor layer sequence with a plurality of layers arranged over one another includes an active layer with an active region which emits electromagnetic radiation in an emission direction when in operation, a first grating layer on the active layer which, in an emission direction, has a plurality of stripes in the form of grating lines extending perpendicularly to the emission direction with spaces arranged therebetween, and a second grating layer on the first grating layer which covers the stripes of the first grating layer and the spaces and which comprises a transparent material applied by non-epitaxial application.Type: GrantFiled: October 12, 2009Date of Patent: September 17, 2013Assignee: OSRAM Opto Semiconductors GmbHInventors: Stefan Illek, Uwe Strauss
-
Patent number: 8530255Abstract: A method of manufacturing a semiconductor laser having an end face window structure, by growing over a substrate a nitride type Group III-V compound semiconductor layer including an active layer including a nitride type Group III-V compound semiconductor containing at least In and Ga. The method includes the steps of forming a mask including an insulating film over the substrate, at least in the vicinity of the position of forming the end face window structure; and growing the nitride type Group III-V compound semiconductor layer including the active layer over a part, not covered with the mask, of the substrate.Type: GrantFiled: July 28, 2008Date of Patent: September 10, 2013Assignee: Sony CorporationInventors: Masaru Kuramoto, Eiji Nakayama, Yoshitsugu Ohizumi, Tsuyoshi Fujimoto
-
Publication number: 20130230936Abstract: A semiconductor light emitting device made of nitride III-V compound semiconductors including an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact.Type: ApplicationFiled: April 5, 2013Publication date: September 5, 2013Applicant: Sony CorporationInventors: OSAMU GOTO, TAKEHARU ASANO, YASUHIKO SUZUKI, MOTONOBU TAKETANI, KATSUYOSHI SHIBUYA, TAKASHI MIZUNO, TSUYOSHI TOJO, SHIRO UCHIDA, MASAO IKEDA
-
Publication number: 20130223793Abstract: The present invention relates to a total reflection type optical switch using polymer insertion type silica optical waveguides and a manufacturing method thereof. The total reflection type optical switch forms a trench in an intersecting point of the silica optical waveguides having two optic routes, and inserts a polymer into the trench. A total reflection type optical switch has a heater which heats the polymer. The polymer is made of thermo-optic material, and totally reflects an optical signal as a refraction index falls when heated by the heater. In addition, when not heated by the heater, the polymer transilluminates the optical signal. When the polymer is made of electric-optic material, the total reflection type optical switch may have upper and lower electrodes for applying an electric field in the polymer instead of the heater.Type: ApplicationFiled: October 25, 2011Publication date: August 29, 2013Applicant: PHOTONICS PLANAR INTEGRATION TECHNOLOGY INC.Inventors: Young Sic Kim, Jang-Uk Shin, Hyung-Myung Moon, Jin-Bong Kim
-
Patent number: 8520987Abstract: A method of fabricating an optical transformer is provided. A substrate is provided first, wherein the substrate includes a first region and a second region. Then a first material layer is formed on the substrate, and the portion of the first material layer other than in the first region is removed. Then a second material layer is formed on the substrate, and the portion of the second material layer in the first region and the second region is removed. Lastly, a first conductive layer is formed on the substrate and the portion of the first conductive layer other than in the second region is removed to make the first material layer, the second material layer and the first conductive layer have the same height such that the first material layer becomes a part of the optical transformer.Type: GrantFiled: February 22, 2010Date of Patent: August 27, 2013Assignee: United Microelectronics Corp.Inventors: Yi-Ching Wu, Shuenn-Jeng Chen
-
Patent number: 8518730Abstract: A sapphire wafer dividing method including a cut groove forming step of forming a plurality of cut grooves on the back side of a sapphire wafer along a plurality of crossing division lines formed on the front side where a light emitting layer is formed, a modified layer forming step of forming a plurality of modified layers inside the sapphire wafer along the division lines, and a dividing step of dividing the sapphire wafer into individual light emitting devices along the modified layers as a division start point, thereby chamfering the corners of the back side of each light emitting device owing to the formation of the cut grooves in the cut groove forming step.Type: GrantFiled: September 21, 2011Date of Patent: August 27, 2013Assignee: Disco CorporationInventors: Hitoshi Hoshino, Hiroumi Ueno, Yuji Nitta, Takashi Okamura
-
Publication number: 20130214301Abstract: A display device is provided including a plurality of light emitting devices formed on a substrate, a plurality of first members corresponding to the light emitting devices and formed directly on a portion of the respective light emitting device, and a plurality of second members formed in areas between adjacent first members. The first members and the second members are configured to reflect and guide at least a portion of light emitted from the light emitting sections through the first members.Type: ApplicationFiled: January 29, 2013Publication date: August 22, 2013Applicant: SONY CORPORATIONInventor: Sony Corporation
-
Publication number: 20130215921Abstract: A method of fabricating an (Al,Ga,In)N laser diode, comprising depositing one or more III-N layers upon a growth substrate at a first temperature, depositing an indium containing laser core at a second temperature upon layers deposited at a first temperature, and performing all subsequent fabrication steps under conditions that inhibit degradation of the laser core, wherein the conditions are a substantially lower temperature than the second temperature.Type: ApplicationFiled: August 23, 2012Publication date: August 22, 2013Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Daniel A. Cohen, Steven P. DenBaars, Shuji Nakamura
-
Publication number: 20130216178Abstract: A photonic component is provided including at least one linear optical waveguide, of which an active portion is surrounded over all or part of its periphery by a grouping of one or more essentially semiconducting nanotubes. These nanotubes interact with their exterior environment in an active zone extending on either side of the optical waveguide, to thus induce an optical coupling between an electrical or optical signal applied to the nanotubes and on the other hand an optical signal in the active portion of the waveguide. Such a component can carry out bipolar electro-optical functions as light source, or modulator or detector, inside the optical guide, for example with an electro-optical coupling between on the one hand an electrical signal applied between the electrodes, and on the other hand an optical signal emitted or modified in the active portion of the optical waveguide towards the remainder of the optical guide.Type: ApplicationFiled: June 15, 2011Publication date: August 22, 2013Applicants: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, UNIVERSITE PARIS SUD 11Inventors: Laurent Vivien, Etienne Gaufres, Nicolas Izard
-
Patent number: 8513037Abstract: A method for integrating a slotted waveguide into a CMOS process is disclosed. A slot can be patterned on a SOI wafer by etching a first pad hard mask deposited over the wafer. The slot is then filled with a nitride plug material by depositing a second pad hard mask over the first pad hard mask. A waveguide in association with one or more electronic and photonic devices can also be patterned on the SOI wafer. The trenches can be filled with an isolation material and then polished. Thereafter, the first and second pad hard masks can be stripped from the wafer. The slot can once again be filled with the nitride plug material and patterned. After forming one or more electronic and photonic devices on the wafer using a standard CMOS process, a via can be opened down to the nitride plug and the nitride plug can then be removed.Type: GrantFiled: December 2, 2011Date of Patent: August 20, 2013Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Andrew T S Pomerene, Craig M. Hill, Timothy J. Conway, Stewart L. Ocheltree
-
Publication number: 20130207140Abstract: A semiconductor optical element comprises a substrate, an active layer lying in one direction over the substrate from which light exits using a side in the shorter direction among the four sides as an outgoing end, a buried layer provided over the substrate and covering two sides in the longitudinal direction among the four sides, a clad layer provided over the active layer and over the substrate existing on the extension line of the outgoing end of the active layer, a mirror which reflects light from the active layer provided on the extension line of the active layer, wherein the mirror is formed in the clad layer.Type: ApplicationFiled: January 15, 2013Publication date: August 15, 2013Applicant: Hitachi, Ltd.Inventor: Hitachi, Ltd.
-
Patent number: 8508008Abstract: In a semiconductor device, optical signal transfer capabilities are implemented on the basis of silicon-based monolithic opto-electronic components in combination with an appropriate waveguide. Thus, in complex circuitries, such as microprocessors and the like, superior performance may be obtained in terms of signal propagation delay, while at the same time thermal requirements may be less critical.Type: GrantFiled: September 29, 2010Date of Patent: August 13, 2013Assignee: GLOBALFOUNDRIES Inc.Inventors: Uwe Griebenow, Sven Beyer, Thilo Sheiper, Jan Hoentschel
-
Patent number: 8509583Abstract: Described is an optical element for guiding electromagnetic radiation. The optical element includes a base body and at least one film, wherein the film is configured to adhere to the base body to form an intimate connection with the base body without using an adhesion promoting interlayer and is arranged such that the electromagnetic radiation passes through it.Type: GrantFiled: February 13, 2013Date of Patent: August 13, 2013Assignee: Osram Opto Semiconductors GmbHInventor: Mario Wanninger
-
Patent number: 8509277Abstract: A multiwavelength optical device includes a substrate; a first mirror section including a plurality of first mirror layers stacked on the substrate; an active layer stacked on the first mirror section, the active layer including a light emission portion; a second mirror section including a plurality of second mirror layers stacked on the active layer; a first electrode disposed between the active layer and the second mirror section; and a second electrode disposed between the first mirror section and the active layer.Type: GrantFiled: February 23, 2010Date of Patent: August 13, 2013Assignee: Fujitsu LimitedInventor: Yoshikazu Hattori
-
Publication number: 20130202005Abstract: The subject matter disclosed herein relates to formation of silicon germanium devices with tensile strain. Tensile strain applied to a silicon germanium device in fabrication may improve performance of a silicon germanium laser or light detector.Type: ApplicationFiled: February 7, 2012Publication date: August 8, 2013Applicant: APIC CorporationInventor: Birendra Dutt
-
Patent number: 8501511Abstract: Manufacturing a laser diode includes growing an active layer, a first InP layer, and a diffraction grating layer; forming an alignment mark having a recess by etching the diffraction grating layer and the first InP layer; forming a first etching mask; forming a diffraction grating in the diffraction grating layer using the first etching mask; forming a modified layer containing InAsP on a surface of the alignment mark recess by supplying a first source gas containing As and a second source gas containing P; growing a second InP layer on the diffraction grating layer and on the alignment mark; forming a second etching mask on the second InP layer; selectively etching the second InP layer embedded in the recess of the alignment mark through the second etching mask by using the modified layer serving as an etching stopper; and forming a waveguide structure using the alignment mark.Type: GrantFiled: September 2, 2011Date of Patent: August 6, 2013Assignee: Sumitomo Electric Industries Ltd.Inventor: Yukihiro Tsuji
-
Patent number: 8501508Abstract: Embodiments described include straining transistor quantum well (QW) channel regions with metal source/drains, and conformal regrowth source/drains to impart a uni-axial strain in a MOS channel region. Removed portions of a channel layer may be filled with a junction material having a lattice spacing different than that of the channel material to causes a uni-axial strain in the channel, in addition to a bi-axial strain caused in the channel layer by a top barrier layer and a bottom buffer layer of the quantum well.Type: GrantFiled: May 23, 2012Date of Patent: August 6, 2013Assignee: Intel CorporationInventors: Prashant Majhi, Mantu Hudait, Jack T. Kavalieros, Ravi Pillarisetty, Marko Radosavljevic, Gilbert Dewey, Titash Rakshit, Willman Tsai