Optical Waveguide Structure Patents (Class 438/31)
  • Publication number: 20140376857
    Abstract: A photonic integrated circuit may include a silicon layer including a waveguide and at least one other photonic component. The photonic integrated circuit may also include a first insulating region arranged above a first side of the silicon layer and encapsulating at least one metallization level, a second insulating region arranged above a second side of the silicon layer and encapsulating at least one gain medium of a laser source optically coupled to the waveguide.
    Type: Application
    Filed: June 23, 2014
    Publication date: December 25, 2014
    Inventors: Alain Chantre, Sébastien Cremer
  • Publication number: 20140369367
    Abstract: A semiconductor light emitting device includes a light guiding structure, a light emitting layer disposed within the light guiding structure, and a structure for discharging excess electric charge within the device. The device may be excited by an electron beam, as opposed to an optical beam, to create electron-hole pairs. The light emitting layer is configured for light generation without requiring a p-n junction, and is therefore not embedded within nor part of a p-n junction. Doping with p-type species is obviated, reducing device loss and permitting operation at a short wavelengths, such as below 300 nm. Various structures, such as a top-side cladding layer, are disclosed for discharging beam-induced charge. A single device may be operated with multiple electron beam pumps, either to enable a relatively thick active layer or to drive multiple separate active layers. Cooperatively curved end facets accommodate for possible off-axis resonance within the active region(s).
    Type: Application
    Filed: June 18, 2013
    Publication date: December 18, 2014
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Thomas Wunderer, John E. Northrup, Mark R. Teepe, Zhihong Yang, Christopher L. Chua, Noble M. Johnson
  • Publication number: 20140369700
    Abstract: A wavelength tunable laser emission device (1) comprises: a first waveguide (31) comprising an optical amplification means for producing a stimulated light emission, the first waveguide extending in a longitudinal direction of the emission device, a second waveguide (5) made of silicon on silicon dioxide and disposed parallel to the first waveguide spaced from the first waveguide in a vertical direction of the emission device so as to allow the existence of a hybrid optical mode coupled at one and the same time to the second waveguide and to the first waveguide, the second waveguide comprising a distributed reflector (9) along the second waveguide, the second waveguide comprising transverse zones (11, 12, 13, 14) doped differently so as to form a polar junction oriented in a transverse direction of the emission device. Electrodes (15, 16) coupled to the doped transverse zones modify an effective index seen by the hybrid optical mode.
    Type: Application
    Filed: June 4, 2014
    Publication date: December 18, 2014
    Inventors: Hélèn DEBREGEAS-SILLARD, Badhise Ben BAKIR, Guang-Hua DUAN, Nicolas CHIMOT
  • Patent number: 8907362
    Abstract: In accordance with certain embodiments, semiconductor dies are embedded within polymeric binder to form, e.g., freestanding white light-emitting dies and/or composite wafers containing multiple light-emitting dies embedded in a single volume of binder.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: December 9, 2014
    Assignee: Cooledge Lighting Inc.
    Inventor: Michael A. Tischler
  • Patent number: 8906720
    Abstract: A device having one or more optical elements and an ambient light sensor integrated on a single substrate (e.g., wafer) and a method (e.g., process) for making same is described herein. The process includes the step of forming the ambient light sensor on a first surface of the substrate. The process further includes the step of forming a plurality of recesses in a second surface of the substrate, the second surface being located opposite the first surface. The process further includes depositing silicon dioxide into the plurality of recesses. The process further includes etching a pattern into the silicon dioxide (e.g., glass) to form the optical elements.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: December 9, 2014
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Pirooz Parvarandeh, Christopher F. Edwards, Joy T. Jones
  • Patent number: 8906721
    Abstract: A method for manufacturing a semiconductor light emitting device includes forming a lower cladding layer over a GaAs substrate; forming a quantum dot active layer over the lower cladding layer; forming a first semiconductor layer over the quantum dot active layer; forming a diffraction grating by etching the first semiconductor layer; forming a second semiconductor layer burying the diffraction grating; and forming an upper cladding layer having a conductive type different from that of the lower cladding layer over the second semiconductor layer, wherein the processes after forming the quantum dot active layer are performed at a temperature not thermally deteriorating or degrading quantum dots included in the quantum dot active layer.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: December 9, 2014
    Assignees: Fujitsu Limited, The University of Tokyo
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Manabu Matsuda, Yasuhiko Arakawa
  • Publication number: 20140355929
    Abstract: Embodiments of forming a waveguide structure are provided. The waveguide structure includes a substrate, and the substrate has an interconnection region and a waveguide region. The waveguide structure also includes a trench formed in the substrate, and the trench has a sloping sidewall surface and a substantially flat bottom. The waveguide structure further includes a bottom cladding layer formed on the substrate, and the bottom cladding layer extends from the interconnection region to the waveguide region, and the bottom cladding layer acts as an insulating layer in the interconnection region. The waveguide structure further includes a metal layer formed on the bottom cladding layer on the sloping sidewall surface.
    Type: Application
    Filed: May 30, 2013
    Publication date: December 4, 2014
    Inventors: Chun-Hao TSENG, Ying-Hao KUO, Hai-Ching CHEN, Tien-I BAO
  • Publication number: 20140355925
    Abstract: A semiconductor electro-optical phase shifter may include an optical action zone configured to be inserted in an optical waveguide, and a bipolar transistor structure configured so that, in operation, collector current of the bipolar transistor structure crosses the optical action zone perpendicular to the axis of the optical waveguide.
    Type: Application
    Filed: May 21, 2014
    Publication date: December 4, 2014
    Applicant: STMICROELECTRONICS SA
    Inventor: Jean-Robert MANOUVRIER
  • Patent number: 8900899
    Abstract: Novel processing methods for production of high-refractive index contrast and low loss optical waveguides are disclosed. In one embodiment, a “channel” waveguide is produced by first depositing a lower cladding material layer with a low refractive index on a base substrate, a refractory metal layer, and a top diffusion barrier layer. Then, a trench is formed with an open surface to the refractory metal layer. The open surface is subsequently oxidized to form an oxidized refractory metal region, and the top diffusion barrier layer and the non-oxidized refractory metal region are removed. Then, a low-refractive-index top cladding layer is deposited on this waveguide structure to encapsulate the oxidized refractory metal region. In another embodiment, a “ridge” waveguide is produced by using similar process steps with an added step of depositing a high-refractive-index material layer and an optional optically-transparent layer.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: December 2, 2014
    Inventor: Payam Rabiei
  • Patent number: 8901586
    Abstract: Disclosed are a light emitting device and a method of manufacturing the same. The light emitting device includes a substrate; a light emitting structure disposed on the substrate and having a stack structure in which a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer are stacked; a lens disposed on the light emitting structure; and a first terminal portion and a second terminal portion electrically connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively. At least one of the first and second terminal portions extends from a top surface of the light emitting structure along respective side surfaces of the light emitting structure and the substrate.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hak Hwan Kim, Ho Sun Paek, Hyung Kun Kim, Sung Kyong Oh, Jong In Yang
  • Patent number: 8900896
    Abstract: Fabrication of a photonic integrated circuit (PIC) including active elements such as a semiconductor optical amplifier (SOA) and passive elements such as a floating rib waveguide. Selective area doping through ion implantation or thermal diffusion before semiconductor epitaxial growth is used in order to define the contact and lateral current transport layers for each active device, while leaving areas corresponding to the passive devices undoped. InP wafers are used as the substrate which may be selectively doped with silicon.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: December 2, 2014
    Assignee: HRL Laboratories, LLC
    Inventors: Yakov Royter, Rajesh D. Rajavel, Irina Ionova, Sophi Ionova
  • Publication number: 20140349427
    Abstract: Methods are described to utilize relatively low cost substrates and processing methods to achieve enhanced emissive imager pixel performance via selective epitaxial growth. An emissive imaging array is coupled with one or more patterned compound semiconductor light emitting structures grown on a second patterned and selectively grown compound semiconductor template article. The proper design and execution of the patterning and epitaxial growth steps, coupled with alignment of the epitaxial structures with the imaging array, results in enhanced performance of the emissive imager. The increased luminous flux achieved enables use of such images for high brightness display and illumination applications.
    Type: Application
    Filed: August 5, 2014
    Publication date: November 27, 2014
    Inventors: Hussein S. El-Ghoroury, Benjamin A. Haskell
  • Publication number: 20140341499
    Abstract: A semiconductor electro-optical phase shifter comprises a central zone (I1, I2) having a minimum doping level; first and second lateral zones (N+, P+) flanking the central zone along a first axis, respectively N and P-doped, so as to form a P-I-N junction between the first and second lateral zones. The central zone comprises first and second optical action zones (I1, I2) separated along the first axis. The second lateral zone is doped discontinuously along a second axis perpendicular to the first axis. Two electrical control terminals (A, C) are provided, one in contact with the first lateral zone, and the other in contact with doped portions of the second lateral zone.
    Type: Application
    Filed: May 7, 2014
    Publication date: November 20, 2014
    Applicant: STMICROELECTRONICS SA
    Inventor: Jean-Robert MANOUVRIER
  • Publication number: 20140341497
    Abstract: A novel phase shifter design for carrier depletion based silicon modulators, based on an experimentally validated model, is described. It is believed that the heretofore neglected effect of incomplete ionization will have a significant impact on ultra-responsive phase shifters. A low V?L product of 0.3 V·cm associated with a low propagation loss of 20 dB/cm is expected to be observed. The phase shifter is based on overlapping implantation steps, where the doses and energies are carefully chosen to utilize counter-doping to produce an S-shaped junction. This junction has a particularly attractive V?L figure of merit, while simultaneously achieving attractively low capacitance and optical loss. This improvement will enable significantly smaller Mach-Zehnder modulators to be constructed that nonetheless would have low drive voltages, with substantial decreases in insertion loss. The described fabrication process is of minimal complexity; in particular, no high-resolution lithographic step is required.
    Type: Application
    Filed: October 22, 2013
    Publication date: November 20, 2014
    Inventors: Yang Liu, Tom Baehr-Jones
  • Patent number: 8891578
    Abstract: An active layer (18) is formed over a semiconductor substrate having a pair of facets (15A, 15B) mutually facing opposite directions. An upper cladding layer (19) is formed on the active layer, having a refractive index lower than that of the active layer. A diffraction grating (25) is disposed in the upper cladding layer on both sides of a distributed feedback region in a waveguide region (22), the waveguide region extending from one facet to the other of the semiconductor substrate. End regions (22B) are defined at both ends of the waveguide region and the distributed feedback region (22A) is disposed between the end regions. Low refractive index regions (26) are disposed in the upper cladding layer on both sides of each of the end regions of the waveguide region, the low refractive index regions having a refractive index lower than that of the upper cladding layer.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: November 18, 2014
    Assignees: Fujitsu Limited, University of Tokyo
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Yasuhiko Arakawa
  • Patent number: 8889445
    Abstract: A method for manufacturing a semiconductor optical device includes the steps of growing a stacked semiconductor layer on a substrate having a cleavage direction in a first direction; forming a first mask having a plurality of openings arranged in the first direction; forming a mark array by etching the stacked semiconductor layer using the first mask; forming a second mask having first and second openings extending in a second direction intersecting the first direction; obtaining a substrate product by forming first and second grooves, and a waveguide mesa by etching the stacked semiconductor layer by using the second mask; and producing a laser diode bar by cleaving the substrate product including the waveguide mesa. First and second residual marks are formed on the upper surface of the waveguide mesa. First and second transfer marks are formed on the bottoms of the first and the second grooves, respectively.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: November 18, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Kenji Hiratsuka
  • Patent number: 8890185
    Abstract: A nitride-based semiconductor light-emitting element disclosed in the present application includes: an active layer having a growing plane which is an m-plane and which is made of a GaN-based semiconductor; and at least one radiation surface at which light from the active layer is to be radiated. The radiation surface has a plurality of protrusions on the m-plane. A base of each of the plurality of protrusions is a region inside a closed curve, and a shape of the base has a major axis and a minor axis. An angle between the major axis and an extending direction of an a-axis of a crystal is not more than 45°.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: November 18, 2014
    Assignee: Panasonic Corporation
    Inventors: Atsushi Yamada, Akira Inoue, Toshiya Yokogawa
  • Publication number: 20140334512
    Abstract: Provided is a distributed feedback-laser diode (DFB-LD) and manufacturing method thereof. The DFB-LD includes a substrate; a lower clad layer having a grating on the substrate; an active waveguide extended in a first direction on the lower clad layer; an upper clad layer on the active waveguide; a signal pad on the upper clad layer; and at least one ground pad spaced apart from the active waveguide, the upper clad layer, and the signal pad in a second direction crossing the first direction, the at least one ground pad being coupled to the lower clad layer.
    Type: Application
    Filed: March 5, 2014
    Publication date: November 13, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Oh Kee KWON, Young-Tak HAN, Chul-Wook LEE, Young Ahn LEEM
  • Patent number: 8884326
    Abstract: In accordance with certain embodiments, semiconductor dies are embedded within polymeric binder to form, e.g., light-emitting dies and/or composite wafers containing multiple light-emitting dies embedded in a single volume of binder.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: November 11, 2014
    Assignee: Cooledge Lighting Inc.
    Inventor: Michael A. Tischler
  • Patent number: 8884321
    Abstract: A light emitting device according to the embodiment includes a first conductive semiconductor layer; an active layer over the first conductive semiconductor layer; a second conductive semiconductor layer over the active layer; a bonding layer over the second conductive semiconductor layer; a schottky diode layer over the bonding layer; an insulating layer for partially exposing the bonding layer, the schottky diode layer, and the first conductive semiconductor layer; a first electrode layer electrically connected to both of the first conductive semiconductor layer and the schottky diode layer; and a second electrode layer electrically connected to the bonding layer.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: November 11, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: June O. Song
  • Patent number: 8884280
    Abstract: An organic light emitting diode display and a manufacturing method thereof, and more particularly, an organic light emitting diode display having improved light extraction efficiency by forming both a first electrode and a second electrode as reflective electrodes to guide generated light to the side of a pixel, and a manufacturing method thereof.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: November 11, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Gee-Bum Kim, Won-Sang Park, Min-Woo Kim
  • Patent number: 8884317
    Abstract: A semiconductor light-emitting device includes: a semiconductor chip having a nonpolar plane as a growth surface and configured to emit polarized light; and a reflector having a reflective surface. When a plane forming an angle of 45° relative to a direction of polarization of the polarized light is a plane L45, the reflective surface of the reflector reflects at least a part of light in the plane L45 in a normal line direction of the growth surface of the semiconductor light-emitting chip. The reflector includes a plurality of reflective surfaces, the plurality of reflective surfaces are arranged in a shape of a square in plan view, and when an angle between the direction of polarization of the polarized light and one side of the shape formed by the plurality of reflective surfaces is ?2, the angle ?2 is not less than 17° and not more than 73°.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: November 11, 2014
    Assignee: Panasonic Corporation
    Inventors: Akira Inoue, Toshiya Yokogawa
  • Patent number: 8883533
    Abstract: A method for manufacturing an LED package comprising steps of: providing a substrate and forming spaced electrode structures on the substrate; providing a mold on the top surface of the substrate wherein the mold defines spaced annular grooves which cooperate with the top surface of the substrate to define cavities; filling the cavities with metal material; removing the mold and hardening the metal material to form reflection cups wherein each reflection cup surrounds a corresponding electrode structure and defines a recess; polishing surfaces of the reflection cups and the electrode structures; arranging LED chips in the recesses with each LED chip electrically connected to the electrode structure; injecting an encapsulation layer in the recesses to seal the LED chips; and cutting the substrate to obtain individual LED packages.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: November 11, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Hsin-Chiang Lin, Pin-Chuan Chen, Lung-Hsin Chen
  • Publication number: 20140328363
    Abstract: Provided is a method of manufacturing a ridge waveguide type semiconductor laser diode, the method including sequentially forming, on a substrate, a lower clad layer, an active layer, a first upper clad layer, and a second upper clad layer; forming an insulating mask on the second upper clad layer; wet-etching the second upper clad layer by using the insulating mask to form channels passing through the second upper clad layer and a ridge between the channels; and performing dry-etching by using the insulating mask to form trenches that are extended from the channels and pass through the first upper clad layer.
    Type: Application
    Filed: January 6, 2014
    Publication date: November 6, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Oh Kee KWON, Chul-Wook LEE, Yongsoon BAEK
  • Patent number: 8859311
    Abstract: A flip-chip light-emitting diode structure comprises a carrier substrate, a light-emitting die structure, a reflective layer, an aperture, a dielectric layer, a first contact layer and a second contact layer. The light-emitting die structure, located on the carrier substrate, comprises a first type semiconductor layer, a second type semiconductor layer and a light emitting layer. The light emitting layer is formed between the first type and the second type semiconductor layer. The reflective layer is located on the first type semiconductor layer. The aperture penetrates the light-emitting die structure. The dielectric layer covers an inner sidewall of the aperture and extends to a portion of a surface of the reflective layer. The first contact layer is disposed on the part of the reflective layer not covered by the dielectric layer. The second contact layer fills up the aperture and is electrically connected to the second type semiconductor layer.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: October 14, 2014
    Assignee: Lextar Electronics Corporation
    Inventors: Chia-En Lee, Yan-Hao Chen
  • Patent number: 8859319
    Abstract: Methods of forming photo detectors are provided. The method includes providing a semiconductor layer on a substrate, forming a trench in the semiconductor layer, forming a first single crystalline layer and a second single crystalline layer using a selective single crystalline growth process in the trench, and patterning the first and second single crystalline layers and the semiconductor layer to form a first single crystalline pattern, a second single crystalline pattern and an optical waveguide.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: October 14, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sang Hoon Kim, Gyungock Kim, In Gyoo Kim, JiHo Joo, Ki Seok Jang
  • Publication number: 20140301419
    Abstract: A method of fabricating an (Al,Ga,In)N laser diode, comprising depositing one or more III-N layers upon a growth substrate at a first temperature, depositing an indium containing laser core at a second temperature upon layers deposited at a first temperature, and performing all subsequent fabrication steps under conditions that inhibit degradation of the laser core, wherein the conditions are a substantially lower temperature than the second temperature.
    Type: Application
    Filed: June 18, 2014
    Publication date: October 9, 2014
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Daniel A. Cohen, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20140291717
    Abstract: A method for manufacturing a Mach-Zehnder modulator includes the steps of forming a stacked semiconductor layer, the stacked semiconductor layer including a first conductivity type semiconductor layer, a core layer and a second conductivity type semiconductor layer, forming a waveguide mesa, the waveguide mesa having a first portion, a second portion and a third portion arranged between the first and second portions; forming a buried region on the waveguide mesa; forming an opening in the buried region on the third portion by etching the buried region using a mask; etching the second conductivity type semiconductor layer in the third portion through the buried region as a mask; and removing the buried region after etching the second conductivity type semiconductor layer. In the step of etching the second conductivity type semiconductor layer, the buried region covers a side surface of the third portion of the waveguide mesa.
    Type: Application
    Filed: April 1, 2014
    Publication date: October 2, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takamitsu KITAMURA, Hideki YAGI
  • Publication number: 20140293642
    Abstract: A method and apparatus is provided for an integrated light pipe. In one embodiment, the apparatus may include a light pipe with a cavity positioned at a first end of the light pipe. The apparatus may further include a light emitting diode (LED) coupled to the light pipe within the cavity. The apparatus may further include, the light emitted from the LED is directed through the light pipe. The apparatus may also include a first and second conductive mount coupled to the LED and extending out of the cavity.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 2, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: INTERNATIONAL BUSINESS MACHINES CORPORATION
  • Patent number: 8846425
    Abstract: A diode laser having aluminum-containing layers and a Bragg grating for stabilizing the emission wavelength achieves an improved output/efficiency. The growth process is divided into two steps for introducing the Bragg grating, wherein a continuous aluminum-free layer and an aluminum-free mask layer are continuously deposited after the first growth process such that the aluminum-containing layer is completely covered by the continuous aluminum-free layer. Structuring is performed outside the reactor without unwanted oxidation of the aluminum-containing semiconductor layer. Subsequently, the pre-structured semiconductor surface is further etched inside the reactor and the structuring is impressed into the aluminum-containing layer.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: September 30, 2014
    Assignee: Forschungsvebund Berlin E.V.
    Inventors: Olaf Brox, Frank Bugge, Paul Crump, Goetz Erbert, Andre Maassdorf, Christoph M. Schultz, Hans Wenzel, Markus Weyers
  • Publication number: 20140269803
    Abstract: A hybrid vertical cavity laser includes an optical circuit substrate including a grating having refractive index units having a lower refractive index and a higher refractive index with respect to each other that are alternately arranged in a first direction, and a waveguide guiding light in the first direction, a mesa structure on the optical circuit substrate, the mesa structure including a first-type semiconductor layer including an exposed portion, an active layer, a second-type semiconductor layer, and an upper reflective layer sequentially stacked in a second direction perpendicular to the first direction, a first electrode on the exposed portion, and a second electrode on the upper reflective layer. An overlapped length between the waveguide and a mesa aperture forming an opening through which light produced from the active layer enters the grating is D, a pitch of the grating is p, and 0<D<p.
    Type: Application
    Filed: August 26, 2013
    Publication date: September 18, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Duanhua KONG, Taek KIM
  • Publication number: 20140269805
    Abstract: An embodiment is a semiconductor device comprising an optical device over a first substrate, a vertical waveguide on a top surface of the optical device, the vertical waveguide having a first refractive index, and a capping layer over the vertical waveguide, the capping layer configured to be a lens for the vertical waveguide and the capping layer having a second refractive index.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Inventor: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
  • Patent number: 8837877
    Abstract: A patterned nonreciprocal optical resonator structure is provided that includes a resonator structure that receives an optical signal. A top cladding layer is deposited on a selective portion of the resonator structure. The top cladding layer is patterned so as to expose the core of the resonator structure defined by the selective portion. A magneto-optically active layer includes a magneto-optical medium being deposited on the exposed core of the resonator structure so as to generate optical non-reciprocity.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: September 16, 2014
    Assignee: Massachusetts Institute of Technology
    Inventors: Lionel C. Kimerling, Caroline A. Ross, Lei Bi, Peng Jiang, Juejun Hu, Dong Hun Kim, Gerald F. Dionne
  • Patent number: 8835204
    Abstract: A method for manufacturing a multi-dimensional target waveguide grating and volume grating with micro-structure quasi-phase-matching. An ordinary waveguide grating is used as a seed grating, and on this basis, a two-dimensional or three-dimensional sampling structure modulated with a refractive index, that is, a sampling grating, is formed. The sampling grating comprises multiple shadow gratings, and one of the shadow gratings is selected as a target equivalent grating. A sampled grating comprises Fourier components in many orders, that is, shadow gratings, a corresponding grating wave vector is [Formula 1], and the grating profile of all the shadow gratings changes with the sampling structure [Formula 2]. In a case where a seed grating wave vector [Formula 3] and a required two-dimensional or three-dimensional grating wave vector do not match, a certain Fourier periodic structure component of the Fourier components of the sampling structure is used to compensate for the wave vector mismatch.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: September 16, 2014
    Assignee: Nanjing University
    Inventors: Yuechun Shi, Xiangfei Chen
  • Patent number: 8829543
    Abstract: A semiconductor light emitting device including a first type doped semiconductor layer, a light emitting layer, a second type doped semiconductor layer, and a reflection layer is provided. The first type doped semiconductor layer has a mesa portion and a depression portion. The light emitting layer is disposed on the mesa portion and has a first surface, a second surface and a first side surface connecting the first surface with the second surface. The second type doped semiconductor layer is disposed on the light emitting layer and has a third surface, a fourth surface and a second side surface connecting the third surface with the fourth surface. Observing from a viewing direction parallel to the light emitting layer, the reflection layer covers at least part of the first side surface and at least part of the second side surface. A flip chip package device is also provided.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: September 9, 2014
    Assignee: Genesis Photonics Inc.
    Inventors: Yun-Li Li, Chih-Ling Wu, Yi-Ru Huang, Yu-Yun Lo
  • Patent number: 8829539
    Abstract: A luminous vehicle glazing, containing: a first sheet containing a mineral or an organic glass having a first main face, a second main face, and an injection edge; a peripheral light source with an emitting face, which faces the injection edge; a guided-light extracting element; a peripheral functional element, bonded to the first sheet, which is fluid-tight, including a cavity for placing the peripheral light source; a covering element, which covers the cavity and the peripheral light source, which is fluid-tight, and which is selected from i) a cap combined with an interfacial element, for interfacial fluid-tightness or ii) a fluid-tight sealing mastic covering the peripheral light source and sealing the peripheral functional element. In addition, a method of manufacturing the luminous vehicle glazing.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: September 9, 2014
    Assignee: Saint-Gobain Glass France
    Inventors: Christophe Kleo, Bastien Grandgirard, Alexandre Richard, Adele Verrat-Debailleul
  • Publication number: 20140239250
    Abstract: An edge-emitting etched-facet optical semiconductor structure has a substrate, an active multiple quantum well (MQW) region formed on the substrate, and a ridge waveguide formed over the MQW region extending in substantially a longitudinal direction between a waveguide first etched end facet and a waveguide second etched end facet. A mask layer used to form windows in which the etched end facets are disposed consists of a single dielectric material disposed directly on the ridge waveguide. An optical coating consisting of no more than one layer of the same dielectric material of which the second mask is made is disposed directly on the second mask and disposed directly on the windows to coat the etched end facets.
    Type: Application
    Filed: February 28, 2013
    Publication date: August 28, 2014
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventor: Avago Technologies General IP (Singapore) Pte. Ltd.
  • Publication number: 20140241734
    Abstract: The light emitting device includes an active layer formed on a semiconductor substrate for emitting light, a semiconductor layer of a first conductivity type electrically connected to one end of the active layer, a semiconductor layer of a second conductivity type electrically connected to the other end of the active layer, first and second electrodes, a feedback mechanism for laser oscillation, and a waveguide for guiding the light emitted from the active layer, in which the active layer is made of a semiconductor having an affinity with a silicon CMOS process, and the semiconductor layer of the first conductivity type and the semiconductor layer of the second conductivity type, and the waveguide are each made of silicon as a part of the semiconductor substrate.
    Type: Application
    Filed: November 24, 2013
    Publication date: August 28, 2014
    Applicant: Hitachi, Ltd.
    Inventors: Misuzu Sagawa, Katsuya Oda, Kazuki Tani
  • Publication number: 20140239330
    Abstract: An optical communication module includes an optical semiconductor element. The element includes an optical functional region having a light receiving function or a light emitting function, a first transmission layer transmissive to light emitted from the optical functional region or light received by the optical functional region, and a wiring layer stacked on the first transmission layer and constituting a conduction path to the optical functional region. The communication module also includes a second transmission layer transmissive to the light and disposed to cover the optical semiconductor element, and a first resin member stacked on the second transmission layer. The communication module is formed with a fixing hole for fixing an optical fiber. The fixing hole includes a bottom face provided by the second transmission layer, and an opening formed in an outer surface of the first resin member.
    Type: Application
    Filed: February 24, 2014
    Publication date: August 28, 2014
    Applicant: ROHM CO., LTD.
    Inventor: Akira OBIKA
  • Patent number: 8818144
    Abstract: A process for preparing a subassembly, the process comprising: (a) defining the location of one or more grooves for receiving optical conduits on the top planar surface of a wafer or panel, the grooves corresponding to multiple interposers on the wafer or panel; and (b) etching the grooves into the wafer or panel, each groove having sidewalls and first and second terminal ends and a first facet at each terminal end perpendicular to the side walls, each first facet having a first angle relative to the top planar surface, each groove being shared by a pair of transmitting and receiving interposers on the wafer or panel prior to being diced such that the first and second terminal ends of each groove correspond to transmitting and receiving interposers, respectively.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: August 26, 2014
    Assignees: Tyco Electronics Corporation, Tyco Electronics Nederland B.V.
    Inventors: Terry Patrick Bowen, Jan Willem Rietveld
  • Patent number: 8809090
    Abstract: Devices for generating a laser beam are disclosed. The devices include a silicon micro ring having at least one silicon optical waveguide disposed at a distance from the micro ring. The radius and the cross-sectional dimension of the micro ring, the cross-sectional dimension of the waveguide, and the distance between the micro ring and the waveguide are determined such that one or more pairs of whispering gallery mode resonant frequencies of the micro ring are separated by an optical phonon frequency of silicon. Methods of manufacturing a lasing device including a silicon micro ring coupled with a silicon waveguide are also disclosed.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: August 19, 2014
    Assignee: The Trustees of Columbia University in the City of New York
    Inventors: Xiaodong Yang, Chee Wei Wong
  • Patent number: 8802468
    Abstract: A semiconductor light emitting device includes a lower cladding layer, an active layer, and an AlGaAs upper cladding layer mounted on a GaAs substrate. The semiconductor light emitting device has a ridge structure including the AlGaAs upper cladding layer. The semiconductor light emitting device further includes an InGaAs etching stop layer provided in contact with the lower side of the AlGaAs upper cladding layer. The InGaAs etching stop layer has a band gap greater than that of the active layer.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: August 12, 2014
    Assignees: Fujitsu Limited, The University of Tokyo
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Hisao Sudo, Yasuhiko Arakawa
  • Publication number: 20140219604
    Abstract: Three-dimensional flexible photonic integrated circuits on silicon are fabricated in semiconductor wafer form and then transferred to Silicon-on-Polymer (SOP) substrates. SOP provides flexibility for conformal mounting with devices capable of maintaining performance when dynamically deformed to allow routing of light in x, y and z directions. Bonding a wafer or individual die of III-V semiconductor, such as Gallium Arsenide or similar photonic material, to the flexible silicon creates an active region for lasers, amplifiers, modulators, and other photonic devices using standard processing. Mounting additional photonic devices to the opposite side of a flexible photonic waveguide produces a stack for three-dimensional devices. Multiple flexible photonic waveguides may be stacked to increase functionality by transferring light between stacked waveguides.
    Type: Application
    Filed: February 4, 2014
    Publication date: August 7, 2014
    Inventors: Douglas R. Hackler, Sr., Dale G. Wilson
  • Publication number: 20140219305
    Abstract: An edge-emitting optical semiconductor structure has a substrate, an active multiple quantum well (MQW) region formed on the substrate, and a ridge waveguide extending between first and second etched end facets. The first etched end facet is disposed in a first window, while the second etched end facet is disposed in a second window. The first etched end facet extends between a pair of alcoves in the first window, and the second etched end facet extends between a pair of alcoves in the second window. An integrated device in which two such structures are provided has an H-shaped window where the two structures adjoin each other. The structure can be fabricated using a process that involves a first mask to form the ridge waveguide and then a second mask and an etching process to form the windows.
    Type: Application
    Filed: February 7, 2013
    Publication date: August 7, 2014
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd
    Inventor: Avago Technologies General IP (Singapore) Pte. Ltd.
  • Publication number: 20140212087
    Abstract: A method of manufacturing a semiconductor apparatus includes forming a gate structure and an etch stop layer structure on a substrate including first and second regions. The gate structure is formed in the first region, and the etch stop layer structure is formed in the second region. A first insulating interlayer is formed on the substrate to cover the gate structure and the etch stop layer structure. The first insulating interlayer is partially removed to expose the etch stop layer structure. The exposed etch stop layer is removed to expose the substrate. An optical device is formed on the exposed substrate.
    Type: Application
    Filed: January 24, 2014
    Publication date: July 31, 2014
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Kwan-Sik CHO, Jung-Hye KIM, Yong-Hwack SHIN
  • Patent number: 8790943
    Abstract: A method of fabricating an (Al,Ga,In)N laser diode, comprising depositing one or more III-N layers upon a growth substrate at a first temperature, depositing an indium containing laser core at a second temperature upon layers deposited at a first temperature, and performing all subsequent fabrication steps under conditions that inhibit degradation of the laser core, wherein the conditions are a substantially lower temperature than the second temperature.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: July 29, 2014
    Assignee: The Regents of the University of California
    Inventors: Daniel A. Cohen, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20140206118
    Abstract: Implementations and techniques for coupled asymmetric quantum confinement structures are generally disclosed.
    Type: Application
    Filed: March 25, 2014
    Publication date: July 24, 2014
    Applicant: University of Seoul Industry Cooperation Foundation
    Inventor: Doyeol Ahn
  • Patent number: 8785960
    Abstract: In accordance with certain embodiments, semiconductor dies are embedded within polymeric binder to form, e.g., light-emitting dies and/or composite wafers containing multiple light-emitting dies embedded in a single volume of binder.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: July 22, 2014
    Assignee: Cooledge Lighting Inc.
    Inventor: Michael A. Tischler
  • Publication number: 20140198816
    Abstract: A light-emitting device, multi-channel light-emitting device, and method(s) of making the same are disclosed. The light-emitting device can include a substrate; a lower contact layer on or over the substrate comprising a first lower contact in a first region and a plurality of second lower contacts in a second region; a plurality of light-emitting thin film devices on or over the first lower contact in the first region; a plurality of light-modulating thin film devices on or over the plurality of second lower contacts in the second region; a plurality of first upper contacts on or over the plurality of light-emitting thin film devices; a plurality of second upper contacts on or over the plurality of light-modulating thin film devices; and an isolation region between the first and second regions, electrically separating the plurality of first upper contacts and the plurality of second upper contacts.
    Type: Application
    Filed: January 11, 2013
    Publication date: July 17, 2014
    Inventors: Near MARGALIT, Mark HEIMBUCH, Xingang Zhang
  • Publication number: 20140199014
    Abstract: An electro-optic Mach-Zehnder modulator includes a first optical waveguide forming a first arm of the Mach-Zehnder modulator, and a second optical waveguide forming a second arm thereof. The first or second optical waveguide includes capacitive segments that are spaced apart from one another, each forming an electrical capacitor. A travelling wave electrode arrangement applies a voltage across the first or second optical waveguide. The travelling wave electrode arrangement includes waveguide electrodes arranged on the capacitive segments , an electrical line extending along a part of the first or second optical waveguide, the electrical line being arranged a distance from the waveguide electrodes, and connecting arrangements, each being assigned to one of the waveguide electrodes.
    Type: Application
    Filed: June 20, 2012
    Publication date: July 17, 2014
    Applicant: Fraunhofer Gesellschaft zur Foerderung angewandten Forschung e.V.
    Inventors: Karl-Otto Velthaus, Detlef Hoffmann, Marko Gruner