Optical Waveguide Structure Patents (Class 438/31)
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Publication number: 20150030047Abstract: III-V lasers integrated with silicon photonic circuits and methods for making the same include a three-layer semiconductor stack formed from III-V semiconductors on a substrate, where a middle layer has a lower bandgap than a top layer and a bottom layer; a mirror region monolithically formed at a first end of the stack, configured to reflect emitted light in the direction of the stack; and a waveguide region monolithically formed at a second end of the stack, configured to transmit emitted light.Type: ApplicationFiled: July 24, 2013Publication date: January 29, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Cheng-Wei Cheng, Frank R. Libsch, Tak H. Ning, Uzma Rana, Kuen-Ting Shiu
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Publication number: 20150030282Abstract: Provided is an optical device including a first optical waveguide on one side of a substrate; a laser separated from the first optical waveguide and disposed on the other side of the substrate; and a first coupled waveguide between the laser and the first optical waveguide. The laser may be monolithically integrated on the substrate.Type: ApplicationFiled: January 16, 2014Publication date: January 29, 2015Applicant: Electronics and Telecommunications Research InstituteInventors: Hyundai PARK, Jaegyu PARK, JiHo JOO, Gyungock KIM
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Publication number: 20150024527Abstract: A method for producing a spot-size convertor includes the steps of preparing a substrate; forming a stacked semiconductor layer including first and second core layers on the substrate; forming a mesa structure by etching the stacked semiconductor layer using a first mask, the mesa structure including a side surface and a bottom portion of the first core layer; forming a protective mask covering the side surface; etching the bottom portion using the protective mask to form a top mesa; and forming a bottom mesa by etching the second core layer using a second mask. The top mesa includes the first core layer and a portion having a mesa width gradually reduced in a first direction of a waveguide axis. The bottom mesa includes the second core layer and a portion having a mesa width gradually reduced in a second direction opposite to the first direction.Type: ApplicationFiled: July 15, 2014Publication date: January 22, 2015Inventors: Hideki YAGI, Naoko KONISHI, Takamitsu KITAMURA, Naoya KONO
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Publication number: 20150024526Abstract: Optical devices having a structured active region configured for selected wavelengths of light emissions are disclosed.Type: ApplicationFiled: March 28, 2014Publication date: January 22, 2015Applicant: Soraa Laser Diode, Inc.Inventor: James W. Raring
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Patent number: 8936951Abstract: Provided are a semiconductor laser and a method of manufacturing the same. The method includes: providing a substrate including a buried oxide layer; forming patterns, which includes an opening part to expose the substrate, by etching the buried oxide layer; forming a germanium single crystal layer in the opening part; and forming an optical coupler, which is adjacent to the germanium single crystal layer, on the substrate.Type: GrantFiled: February 25, 2013Date of Patent: January 20, 2015Assignee: Electronics and Telecommunications Research InstituteInventors: In Gyoo Kim, Gyungock Kim, Sang Hoon Kim, Ki Seok Jang, JiHo Joo
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Patent number: 8936957Abstract: The present disclosure discloses a method of manufacturing a light-emitting device comprising the steps of providing a light-emitting wafer having a semiconductor stacked structure and an alignment mark, sensing the alignment mark, and separating the light-emitting wafer into a plurality of light-emitting diodes and removing the alignment mark accordingly.Type: GrantFiled: December 24, 2013Date of Patent: January 20, 2015Assignee: Epistar CorporationInventor: Tsung-Hsien Yang
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Patent number: 8938134Abstract: An apparatus comprising an optical modulator, wherein the optical modulator comprises a planar substrate, a first III-V semiconductor layer on the substrate, and a silicon layer on the substrate. The optical modulator includes a planar semiconductor optical waveguide having a hybrid optical core, the hybrid optical core including vertically adjacent lateral portions of the first III-V semiconductor layer and the silicon layer.Type: GrantFiled: December 21, 2012Date of Patent: January 20, 2015Assignee: Alcatel LucentInventor: Long Chen
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Patent number: 8936950Abstract: To improve light emission efficiency and reliability. A transparent conductive film 10 is formed on an entire top surface of a second semiconductor layer 108, and a photo-resist is applied thereon. When removing the photo-resist on the upper surface corresponding to an electrode forming part 16 of a first semiconductor layer 104, the photo-resist is removed to be gradually thinned at a boundary of a portion to be removed. The transparent conductive film is wet etched using the remaining photo-resist as a mask to expose a part of the second semiconductor layer. Dry etching is performed using the remaining photo-resist and the transparent conductive film as a mask to expose the electrode forming part of the first semiconductor layer. A portion of the transparent conductive film exposed in the dry etching using the remaining photo-resist as a mask is wet etched. The remaining photo-resist is eliminated.Type: GrantFiled: March 14, 2011Date of Patent: January 20, 2015Assignee: Toyoda Gosei Co., Ltd.Inventors: Naoki Nakajo, Masao Kamiya, Akihiro Honma
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Patent number: 8932888Abstract: A method of applying a conversion means to an optoelectronic semiconductor chip includes preparing the optoelectronic semiconductor chip having a main radiation face, preparing the conversion means, the conversion means being applied to a main carrier face of a carrier, arranging the conversion means such that it faces the main radiation face and has a spacing relative to the main radiation face, and releasing the conversion means from the carrier and applying the conversion means to the main radiation face by irradiation and heating of an absorber constituent of the conversion means and/or of a release layer located between the conversion means and the carrier with a pulsed laser radiation which passes through the carrier.Type: GrantFiled: September 6, 2011Date of Patent: January 13, 2015Assignee: OSRAM Opto Semiconductors GmbHInventor: Ralph Wagner
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Publication number: 20150010266Abstract: A SOI device may include a waveguide adapter that couples light between an external light source—e.g., a fiber optic cable or laser—and a silicon waveguide on the silicon surface layer of the SOI device. In one embodiment, the waveguide adapter is embedded into the insulator layer. Doing so may enable the waveguide adapter to be formed before the surface layer components are added onto the SOI device. Accordingly, fabrication techniques that use high-temperatures may be used without harming other components in the SOI device—e.g., the waveguide adapter is formed before heat-sensitive components are added to the silicon surface layer.Type: ApplicationFiled: July 3, 2013Publication date: January 8, 2015Applicant: Cisco Technology, Inc.Inventors: Mark Webster, Ravi Sekhar Tummidi
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Publication number: 20150010268Abstract: An apparatus includes a Silicon Photonics (SiP) device and a ferrule. The SiP includes multiple optical waveguides. The ferrule includes multiple optical fibers for exchanging optical signals with the respective optical waveguides of the SiP device. In some embodiments, an array of micro-lenses is configured to couple the optical signals between the optical waveguides of the SiP device and the respective optical fibers of the ferrule. In some embodiments, a polymer layer is placed between the SiP device and the ferrule, and includes multiple polymer-based Spot-Size Converters (SSCs) that are configured to couple the optical signals between the optical waveguides of the SiP device and the respective optical fibers of the ferrule.Type: ApplicationFiled: July 4, 2013Publication date: January 8, 2015Inventors: Avner Badihi, Shmuel Levy, Sylvie Rockman, Elad Mentovich
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Publication number: 20150010267Abstract: An apparatus includes a Silicon Photonics (SiP) device and a ferrule. The SiP includes multiple optical waveguides. The ferrule includes multiple optical fibers for exchanging optical signals with the respective optical waveguides of the SiP device. In some embodiments, an array of micro-lenses is configured to couple the optical signals between the optical waveguides of the SiP device and the respective optical fibers of the ferrule. In some embodiments, a polymer layer is placed between the SiP device and the ferrule, and includes multiple polymer-based Spot-Size Converters (SSCs) that are configured to couple the optical signals between the optical waveguides of the SiP device and the respective optical fibers of the ferrule.Type: ApplicationFiled: July 4, 2013Publication date: January 8, 2015Inventors: Shmuel Levy, Avner Badihi, Sylvie Rockman, Elad Mentovich
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Patent number: 8921966Abstract: An image sensor includes: a photoelectric conversion pixel having a photoelectric conversion element that performs photoelectric conversion, and a light guide formed of a first material in an interlayer insulation film above the photoelectric conversion element; and a light-shielded pixel having a photoelectric conversion element that performs photoelectric conversion, a light guide formed of a second material that is different from the first material in an interlayer insulation film above the photoelectric conversion element, and a light-shielding layer formed above the light guide.Type: GrantFiled: March 10, 2010Date of Patent: December 30, 2014Assignee: Canon Kabushiki KaishaInventor: Takafumi Kishi
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Publication number: 20140376852Abstract: A semiconductor electro-optical phase shifter may include a central zone configured to be placed in an optical waveguide and doped at a first conductivity type, a first lateral zone adjacent a first face of the central region and doped at a second conductivity type, and a second lateral zone adjacent a second face of the central zone and doped at the second conductivity type.Type: ApplicationFiled: April 28, 2014Publication date: December 25, 2014Applicant: STMICROELECTRONICS SAInventor: Jean-Robert MANOUVRIER
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Publication number: 20140376857Abstract: A photonic integrated circuit may include a silicon layer including a waveguide and at least one other photonic component. The photonic integrated circuit may also include a first insulating region arranged above a first side of the silicon layer and encapsulating at least one metallization level, a second insulating region arranged above a second side of the silicon layer and encapsulating at least one gain medium of a laser source optically coupled to the waveguide.Type: ApplicationFiled: June 23, 2014Publication date: December 25, 2014Inventors: Alain Chantre, Sébastien Cremer
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Publication number: 20140369700Abstract: A wavelength tunable laser emission device (1) comprises: a first waveguide (31) comprising an optical amplification means for producing a stimulated light emission, the first waveguide extending in a longitudinal direction of the emission device, a second waveguide (5) made of silicon on silicon dioxide and disposed parallel to the first waveguide spaced from the first waveguide in a vertical direction of the emission device so as to allow the existence of a hybrid optical mode coupled at one and the same time to the second waveguide and to the first waveguide, the second waveguide comprising a distributed reflector (9) along the second waveguide, the second waveguide comprising transverse zones (11, 12, 13, 14) doped differently so as to form a polar junction oriented in a transverse direction of the emission device. Electrodes (15, 16) coupled to the doped transverse zones modify an effective index seen by the hybrid optical mode.Type: ApplicationFiled: June 4, 2014Publication date: December 18, 2014Inventors: Hélèn DEBREGEAS-SILLARD, Badhise Ben BAKIR, Guang-Hua DUAN, Nicolas CHIMOT
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Publication number: 20140369367Abstract: A semiconductor light emitting device includes a light guiding structure, a light emitting layer disposed within the light guiding structure, and a structure for discharging excess electric charge within the device. The device may be excited by an electron beam, as opposed to an optical beam, to create electron-hole pairs. The light emitting layer is configured for light generation without requiring a p-n junction, and is therefore not embedded within nor part of a p-n junction. Doping with p-type species is obviated, reducing device loss and permitting operation at a short wavelengths, such as below 300 nm. Various structures, such as a top-side cladding layer, are disclosed for discharging beam-induced charge. A single device may be operated with multiple electron beam pumps, either to enable a relatively thick active layer or to drive multiple separate active layers. Cooperatively curved end facets accommodate for possible off-axis resonance within the active region(s).Type: ApplicationFiled: June 18, 2013Publication date: December 18, 2014Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Thomas Wunderer, John E. Northrup, Mark R. Teepe, Zhihong Yang, Christopher L. Chua, Noble M. Johnson
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Patent number: 8907362Abstract: In accordance with certain embodiments, semiconductor dies are embedded within polymeric binder to form, e.g., freestanding white light-emitting dies and/or composite wafers containing multiple light-emitting dies embedded in a single volume of binder.Type: GrantFiled: July 24, 2013Date of Patent: December 9, 2014Assignee: Cooledge Lighting Inc.Inventor: Michael A. Tischler
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Patent number: 8906720Abstract: A device having one or more optical elements and an ambient light sensor integrated on a single substrate (e.g., wafer) and a method (e.g., process) for making same is described herein. The process includes the step of forming the ambient light sensor on a first surface of the substrate. The process further includes the step of forming a plurality of recesses in a second surface of the substrate, the second surface being located opposite the first surface. The process further includes depositing silicon dioxide into the plurality of recesses. The process further includes etching a pattern into the silicon dioxide (e.g., glass) to form the optical elements.Type: GrantFiled: February 25, 2013Date of Patent: December 9, 2014Assignee: Maxim Integrated Products, Inc.Inventors: Pirooz Parvarandeh, Christopher F. Edwards, Joy T. Jones
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Patent number: 8906721Abstract: A method for manufacturing a semiconductor light emitting device includes forming a lower cladding layer over a GaAs substrate; forming a quantum dot active layer over the lower cladding layer; forming a first semiconductor layer over the quantum dot active layer; forming a diffraction grating by etching the first semiconductor layer; forming a second semiconductor layer burying the diffraction grating; and forming an upper cladding layer having a conductive type different from that of the lower cladding layer over the second semiconductor layer, wherein the processes after forming the quantum dot active layer are performed at a temperature not thermally deteriorating or degrading quantum dots included in the quantum dot active layer.Type: GrantFiled: May 21, 2013Date of Patent: December 9, 2014Assignees: Fujitsu Limited, The University of TokyoInventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Manabu Matsuda, Yasuhiko Arakawa
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Publication number: 20140355925Abstract: A semiconductor electro-optical phase shifter may include an optical action zone configured to be inserted in an optical waveguide, and a bipolar transistor structure configured so that, in operation, collector current of the bipolar transistor structure crosses the optical action zone perpendicular to the axis of the optical waveguide.Type: ApplicationFiled: May 21, 2014Publication date: December 4, 2014Applicant: STMICROELECTRONICS SAInventor: Jean-Robert MANOUVRIER
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Publication number: 20140355929Abstract: Embodiments of forming a waveguide structure are provided. The waveguide structure includes a substrate, and the substrate has an interconnection region and a waveguide region. The waveguide structure also includes a trench formed in the substrate, and the trench has a sloping sidewall surface and a substantially flat bottom. The waveguide structure further includes a bottom cladding layer formed on the substrate, and the bottom cladding layer extends from the interconnection region to the waveguide region, and the bottom cladding layer acts as an insulating layer in the interconnection region. The waveguide structure further includes a metal layer formed on the bottom cladding layer on the sloping sidewall surface.Type: ApplicationFiled: May 30, 2013Publication date: December 4, 2014Inventors: Chun-Hao TSENG, Ying-Hao KUO, Hai-Ching CHEN, Tien-I BAO
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Patent number: 8901586Abstract: Disclosed are a light emitting device and a method of manufacturing the same. The light emitting device includes a substrate; a light emitting structure disposed on the substrate and having a stack structure in which a first conductivity type semiconductor layer, an active layer and a second conductivity type semiconductor layer are stacked; a lens disposed on the light emitting structure; and a first terminal portion and a second terminal portion electrically connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively. At least one of the first and second terminal portions extends from a top surface of the light emitting structure along respective side surfaces of the light emitting structure and the substrate.Type: GrantFiled: July 12, 2011Date of Patent: December 2, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Hak Hwan Kim, Ho Sun Paek, Hyung Kun Kim, Sung Kyong Oh, Jong In Yang
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Patent number: 8900896Abstract: Fabrication of a photonic integrated circuit (PIC) including active elements such as a semiconductor optical amplifier (SOA) and passive elements such as a floating rib waveguide. Selective area doping through ion implantation or thermal diffusion before semiconductor epitaxial growth is used in order to define the contact and lateral current transport layers for each active device, while leaving areas corresponding to the passive devices undoped. InP wafers are used as the substrate which may be selectively doped with silicon.Type: GrantFiled: February 17, 2011Date of Patent: December 2, 2014Assignee: HRL Laboratories, LLCInventors: Yakov Royter, Rajesh D. Rajavel, Irina Ionova, Sophi Ionova
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Patent number: 8900899Abstract: Novel processing methods for production of high-refractive index contrast and low loss optical waveguides are disclosed. In one embodiment, a “channel” waveguide is produced by first depositing a lower cladding material layer with a low refractive index on a base substrate, a refractory metal layer, and a top diffusion barrier layer. Then, a trench is formed with an open surface to the refractory metal layer. The open surface is subsequently oxidized to form an oxidized refractory metal region, and the top diffusion barrier layer and the non-oxidized refractory metal region are removed. Then, a low-refractive-index top cladding layer is deposited on this waveguide structure to encapsulate the oxidized refractory metal region. In another embodiment, a “ridge” waveguide is produced by using similar process steps with an added step of depositing a high-refractive-index material layer and an optional optically-transparent layer.Type: GrantFiled: June 28, 2013Date of Patent: December 2, 2014Inventor: Payam Rabiei
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Publication number: 20140349427Abstract: Methods are described to utilize relatively low cost substrates and processing methods to achieve enhanced emissive imager pixel performance via selective epitaxial growth. An emissive imaging array is coupled with one or more patterned compound semiconductor light emitting structures grown on a second patterned and selectively grown compound semiconductor template article. The proper design and execution of the patterning and epitaxial growth steps, coupled with alignment of the epitaxial structures with the imaging array, results in enhanced performance of the emissive imager. The increased luminous flux achieved enables use of such images for high brightness display and illumination applications.Type: ApplicationFiled: August 5, 2014Publication date: November 27, 2014Inventors: Hussein S. El-Ghoroury, Benjamin A. Haskell
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Publication number: 20140341499Abstract: A semiconductor electro-optical phase shifter comprises a central zone (I1, I2) having a minimum doping level; first and second lateral zones (N+, P+) flanking the central zone along a first axis, respectively N and P-doped, so as to form a P-I-N junction between the first and second lateral zones. The central zone comprises first and second optical action zones (I1, I2) separated along the first axis. The second lateral zone is doped discontinuously along a second axis perpendicular to the first axis. Two electrical control terminals (A, C) are provided, one in contact with the first lateral zone, and the other in contact with doped portions of the second lateral zone.Type: ApplicationFiled: May 7, 2014Publication date: November 20, 2014Applicant: STMICROELECTRONICS SAInventor: Jean-Robert MANOUVRIER
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Publication number: 20140341497Abstract: A novel phase shifter design for carrier depletion based silicon modulators, based on an experimentally validated model, is described. It is believed that the heretofore neglected effect of incomplete ionization will have a significant impact on ultra-responsive phase shifters. A low V?L product of 0.3 V·cm associated with a low propagation loss of 20 dB/cm is expected to be observed. The phase shifter is based on overlapping implantation steps, where the doses and energies are carefully chosen to utilize counter-doping to produce an S-shaped junction. This junction has a particularly attractive V?L figure of merit, while simultaneously achieving attractively low capacitance and optical loss. This improvement will enable significantly smaller Mach-Zehnder modulators to be constructed that nonetheless would have low drive voltages, with substantial decreases in insertion loss. The described fabrication process is of minimal complexity; in particular, no high-resolution lithographic step is required.Type: ApplicationFiled: October 22, 2013Publication date: November 20, 2014Inventors: Yang Liu, Tom Baehr-Jones
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Patent number: 8891578Abstract: An active layer (18) is formed over a semiconductor substrate having a pair of facets (15A, 15B) mutually facing opposite directions. An upper cladding layer (19) is formed on the active layer, having a refractive index lower than that of the active layer. A diffraction grating (25) is disposed in the upper cladding layer on both sides of a distributed feedback region in a waveguide region (22), the waveguide region extending from one facet to the other of the semiconductor substrate. End regions (22B) are defined at both ends of the waveguide region and the distributed feedback region (22A) is disposed between the end regions. Low refractive index regions (26) are disposed in the upper cladding layer on both sides of each of the end regions of the waveguide region, the low refractive index regions having a refractive index lower than that of the upper cladding layer.Type: GrantFiled: October 7, 2010Date of Patent: November 18, 2014Assignees: Fujitsu Limited, University of TokyoInventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Yasuhiko Arakawa
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Patent number: 8889445Abstract: A method for manufacturing a semiconductor optical device includes the steps of growing a stacked semiconductor layer on a substrate having a cleavage direction in a first direction; forming a first mask having a plurality of openings arranged in the first direction; forming a mark array by etching the stacked semiconductor layer using the first mask; forming a second mask having first and second openings extending in a second direction intersecting the first direction; obtaining a substrate product by forming first and second grooves, and a waveguide mesa by etching the stacked semiconductor layer by using the second mask; and producing a laser diode bar by cleaving the substrate product including the waveguide mesa. First and second residual marks are formed on the upper surface of the waveguide mesa. First and second transfer marks are formed on the bottoms of the first and the second grooves, respectively.Type: GrantFiled: July 16, 2012Date of Patent: November 18, 2014Assignee: Sumitomo Electric Industries, Ltd.Inventor: Kenji Hiratsuka
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Patent number: 8890185Abstract: A nitride-based semiconductor light-emitting element disclosed in the present application includes: an active layer having a growing plane which is an m-plane and which is made of a GaN-based semiconductor; and at least one radiation surface at which light from the active layer is to be radiated. The radiation surface has a plurality of protrusions on the m-plane. A base of each of the plurality of protrusions is a region inside a closed curve, and a shape of the base has a major axis and a minor axis. An angle between the major axis and an extending direction of an a-axis of a crystal is not more than 45°.Type: GrantFiled: April 23, 2013Date of Patent: November 18, 2014Assignee: Panasonic CorporationInventors: Atsushi Yamada, Akira Inoue, Toshiya Yokogawa
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Publication number: 20140334512Abstract: Provided is a distributed feedback-laser diode (DFB-LD) and manufacturing method thereof. The DFB-LD includes a substrate; a lower clad layer having a grating on the substrate; an active waveguide extended in a first direction on the lower clad layer; an upper clad layer on the active waveguide; a signal pad on the upper clad layer; and at least one ground pad spaced apart from the active waveguide, the upper clad layer, and the signal pad in a second direction crossing the first direction, the at least one ground pad being coupled to the lower clad layer.Type: ApplicationFiled: March 5, 2014Publication date: November 13, 2014Applicant: Electronics and Telecommunications Research InstituteInventors: Oh Kee KWON, Young-Tak HAN, Chul-Wook LEE, Young Ahn LEEM
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Patent number: 8884317Abstract: A semiconductor light-emitting device includes: a semiconductor chip having a nonpolar plane as a growth surface and configured to emit polarized light; and a reflector having a reflective surface. When a plane forming an angle of 45° relative to a direction of polarization of the polarized light is a plane L45, the reflective surface of the reflector reflects at least a part of light in the plane L45 in a normal line direction of the growth surface of the semiconductor light-emitting chip. The reflector includes a plurality of reflective surfaces, the plurality of reflective surfaces are arranged in a shape of a square in plan view, and when an angle between the direction of polarization of the polarized light and one side of the shape formed by the plurality of reflective surfaces is ?2, the angle ?2 is not less than 17° and not more than 73°.Type: GrantFiled: October 31, 2013Date of Patent: November 11, 2014Assignee: Panasonic CorporationInventors: Akira Inoue, Toshiya Yokogawa
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Patent number: 8884321Abstract: A light emitting device according to the embodiment includes a first conductive semiconductor layer; an active layer over the first conductive semiconductor layer; a second conductive semiconductor layer over the active layer; a bonding layer over the second conductive semiconductor layer; a schottky diode layer over the bonding layer; an insulating layer for partially exposing the bonding layer, the schottky diode layer, and the first conductive semiconductor layer; a first electrode layer electrically connected to both of the first conductive semiconductor layer and the schottky diode layer; and a second electrode layer electrically connected to the bonding layer.Type: GrantFiled: April 6, 2009Date of Patent: November 11, 2014Assignee: LG Innotek Co., Ltd.Inventor: June O. Song
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Patent number: 8884280Abstract: An organic light emitting diode display and a manufacturing method thereof, and more particularly, an organic light emitting diode display having improved light extraction efficiency by forming both a first electrode and a second electrode as reflective electrodes to guide generated light to the side of a pixel, and a manufacturing method thereof.Type: GrantFiled: March 12, 2013Date of Patent: November 11, 2014Assignee: Samsung Display Co., Ltd.Inventors: Gee-Bum Kim, Won-Sang Park, Min-Woo Kim
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Patent number: 8883533Abstract: A method for manufacturing an LED package comprising steps of: providing a substrate and forming spaced electrode structures on the substrate; providing a mold on the top surface of the substrate wherein the mold defines spaced annular grooves which cooperate with the top surface of the substrate to define cavities; filling the cavities with metal material; removing the mold and hardening the metal material to form reflection cups wherein each reflection cup surrounds a corresponding electrode structure and defines a recess; polishing surfaces of the reflection cups and the electrode structures; arranging LED chips in the recesses with each LED chip electrically connected to the electrode structure; injecting an encapsulation layer in the recesses to seal the LED chips; and cutting the substrate to obtain individual LED packages.Type: GrantFiled: August 10, 2012Date of Patent: November 11, 2014Assignee: Advanced Optoelectronic Technology, Inc.Inventors: Hsin-Chiang Lin, Pin-Chuan Chen, Lung-Hsin Chen
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Patent number: 8884326Abstract: In accordance with certain embodiments, semiconductor dies are embedded within polymeric binder to form, e.g., light-emitting dies and/or composite wafers containing multiple light-emitting dies embedded in a single volume of binder.Type: GrantFiled: March 25, 2014Date of Patent: November 11, 2014Assignee: Cooledge Lighting Inc.Inventor: Michael A. Tischler
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Publication number: 20140328363Abstract: Provided is a method of manufacturing a ridge waveguide type semiconductor laser diode, the method including sequentially forming, on a substrate, a lower clad layer, an active layer, a first upper clad layer, and a second upper clad layer; forming an insulating mask on the second upper clad layer; wet-etching the second upper clad layer by using the insulating mask to form channels passing through the second upper clad layer and a ridge between the channels; and performing dry-etching by using the insulating mask to form trenches that are extended from the channels and pass through the first upper clad layer.Type: ApplicationFiled: January 6, 2014Publication date: November 6, 2014Applicant: Electronics and Telecommunications Research InstituteInventors: Oh Kee KWON, Chul-Wook LEE, Yongsoon BAEK
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Patent number: 8859319Abstract: Methods of forming photo detectors are provided. The method includes providing a semiconductor layer on a substrate, forming a trench in the semiconductor layer, forming a first single crystalline layer and a second single crystalline layer using a selective single crystalline growth process in the trench, and patterning the first and second single crystalline layers and the semiconductor layer to form a first single crystalline pattern, a second single crystalline pattern and an optical waveguide.Type: GrantFiled: September 12, 2012Date of Patent: October 14, 2014Assignee: Electronics and Telecommunications Research InstituteInventors: Sang Hoon Kim, Gyungock Kim, In Gyoo Kim, JiHo Joo, Ki Seok Jang
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Patent number: 8859311Abstract: A flip-chip light-emitting diode structure comprises a carrier substrate, a light-emitting die structure, a reflective layer, an aperture, a dielectric layer, a first contact layer and a second contact layer. The light-emitting die structure, located on the carrier substrate, comprises a first type semiconductor layer, a second type semiconductor layer and a light emitting layer. The light emitting layer is formed between the first type and the second type semiconductor layer. The reflective layer is located on the first type semiconductor layer. The aperture penetrates the light-emitting die structure. The dielectric layer covers an inner sidewall of the aperture and extends to a portion of a surface of the reflective layer. The first contact layer is disposed on the part of the reflective layer not covered by the dielectric layer. The second contact layer fills up the aperture and is electrically connected to the second type semiconductor layer.Type: GrantFiled: August 13, 2013Date of Patent: October 14, 2014Assignee: Lextar Electronics CorporationInventors: Chia-En Lee, Yan-Hao Chen
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Publication number: 20140301419Abstract: A method of fabricating an (Al,Ga,In)N laser diode, comprising depositing one or more III-N layers upon a growth substrate at a first temperature, depositing an indium containing laser core at a second temperature upon layers deposited at a first temperature, and performing all subsequent fabrication steps under conditions that inhibit degradation of the laser core, wherein the conditions are a substantially lower temperature than the second temperature.Type: ApplicationFiled: June 18, 2014Publication date: October 9, 2014Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Daniel A. Cohen, Steven P. DenBaars, Shuji Nakamura
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Publication number: 20140293642Abstract: A method and apparatus is provided for an integrated light pipe. In one embodiment, the apparatus may include a light pipe with a cavity positioned at a first end of the light pipe. The apparatus may further include a light emitting diode (LED) coupled to the light pipe within the cavity. The apparatus may further include, the light emitted from the LED is directed through the light pipe. The apparatus may also include a first and second conductive mount coupled to the LED and extending out of the cavity.Type: ApplicationFiled: March 28, 2013Publication date: October 2, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: INTERNATIONAL BUSINESS MACHINES CORPORATION
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Publication number: 20140291717Abstract: A method for manufacturing a Mach-Zehnder modulator includes the steps of forming a stacked semiconductor layer, the stacked semiconductor layer including a first conductivity type semiconductor layer, a core layer and a second conductivity type semiconductor layer, forming a waveguide mesa, the waveguide mesa having a first portion, a second portion and a third portion arranged between the first and second portions; forming a buried region on the waveguide mesa; forming an opening in the buried region on the third portion by etching the buried region using a mask; etching the second conductivity type semiconductor layer in the third portion through the buried region as a mask; and removing the buried region after etching the second conductivity type semiconductor layer. In the step of etching the second conductivity type semiconductor layer, the buried region covers a side surface of the third portion of the waveguide mesa.Type: ApplicationFiled: April 1, 2014Publication date: October 2, 2014Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takamitsu KITAMURA, Hideki YAGI
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Patent number: 8846425Abstract: A diode laser having aluminum-containing layers and a Bragg grating for stabilizing the emission wavelength achieves an improved output/efficiency. The growth process is divided into two steps for introducing the Bragg grating, wherein a continuous aluminum-free layer and an aluminum-free mask layer are continuously deposited after the first growth process such that the aluminum-containing layer is completely covered by the continuous aluminum-free layer. Structuring is performed outside the reactor without unwanted oxidation of the aluminum-containing semiconductor layer. Subsequently, the pre-structured semiconductor surface is further etched inside the reactor and the structuring is impressed into the aluminum-containing layer.Type: GrantFiled: November 21, 2012Date of Patent: September 30, 2014Assignee: Forschungsvebund Berlin E.V.Inventors: Olaf Brox, Frank Bugge, Paul Crump, Goetz Erbert, Andre Maassdorf, Christoph M. Schultz, Hans Wenzel, Markus Weyers
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Publication number: 20140269803Abstract: A hybrid vertical cavity laser includes an optical circuit substrate including a grating having refractive index units having a lower refractive index and a higher refractive index with respect to each other that are alternately arranged in a first direction, and a waveguide guiding light in the first direction, a mesa structure on the optical circuit substrate, the mesa structure including a first-type semiconductor layer including an exposed portion, an active layer, a second-type semiconductor layer, and an upper reflective layer sequentially stacked in a second direction perpendicular to the first direction, a first electrode on the exposed portion, and a second electrode on the upper reflective layer. An overlapped length between the waveguide and a mesa aperture forming an opening through which light produced from the active layer enters the grating is D, a pitch of the grating is p, and 0<D<p.Type: ApplicationFiled: August 26, 2013Publication date: September 18, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Duanhua KONG, Taek KIM
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Publication number: 20140269805Abstract: An embodiment is a semiconductor device comprising an optical device over a first substrate, a vertical waveguide on a top surface of the optical device, the vertical waveguide having a first refractive index, and a capping layer over the vertical waveguide, the capping layer configured to be a lens for the vertical waveguide and the capping layer having a second refractive index.Type: ApplicationFiled: March 12, 2013Publication date: September 18, 2014Inventor: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
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Patent number: 8835204Abstract: A method for manufacturing a multi-dimensional target waveguide grating and volume grating with micro-structure quasi-phase-matching. An ordinary waveguide grating is used as a seed grating, and on this basis, a two-dimensional or three-dimensional sampling structure modulated with a refractive index, that is, a sampling grating, is formed. The sampling grating comprises multiple shadow gratings, and one of the shadow gratings is selected as a target equivalent grating. A sampled grating comprises Fourier components in many orders, that is, shadow gratings, a corresponding grating wave vector is [Formula 1], and the grating profile of all the shadow gratings changes with the sampling structure [Formula 2]. In a case where a seed grating wave vector [Formula 3] and a required two-dimensional or three-dimensional grating wave vector do not match, a certain Fourier periodic structure component of the Fourier components of the sampling structure is used to compensate for the wave vector mismatch.Type: GrantFiled: December 30, 2011Date of Patent: September 16, 2014Assignee: Nanjing UniversityInventors: Yuechun Shi, Xiangfei Chen
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Patent number: 8837877Abstract: A patterned nonreciprocal optical resonator structure is provided that includes a resonator structure that receives an optical signal. A top cladding layer is deposited on a selective portion of the resonator structure. The top cladding layer is patterned so as to expose the core of the resonator structure defined by the selective portion. A magneto-optically active layer includes a magneto-optical medium being deposited on the exposed core of the resonator structure so as to generate optical non-reciprocity.Type: GrantFiled: August 11, 2011Date of Patent: September 16, 2014Assignee: Massachusetts Institute of TechnologyInventors: Lionel C. Kimerling, Caroline A. Ross, Lei Bi, Peng Jiang, Juejun Hu, Dong Hun Kim, Gerald F. Dionne
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Patent number: 8829543Abstract: A semiconductor light emitting device including a first type doped semiconductor layer, a light emitting layer, a second type doped semiconductor layer, and a reflection layer is provided. The first type doped semiconductor layer has a mesa portion and a depression portion. The light emitting layer is disposed on the mesa portion and has a first surface, a second surface and a first side surface connecting the first surface with the second surface. The second type doped semiconductor layer is disposed on the light emitting layer and has a third surface, a fourth surface and a second side surface connecting the third surface with the fourth surface. Observing from a viewing direction parallel to the light emitting layer, the reflection layer covers at least part of the first side surface and at least part of the second side surface. A flip chip package device is also provided.Type: GrantFiled: March 6, 2013Date of Patent: September 9, 2014Assignee: Genesis Photonics Inc.Inventors: Yun-Li Li, Chih-Ling Wu, Yi-Ru Huang, Yu-Yun Lo
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Patent number: 8829539Abstract: A luminous vehicle glazing, containing: a first sheet containing a mineral or an organic glass having a first main face, a second main face, and an injection edge; a peripheral light source with an emitting face, which faces the injection edge; a guided-light extracting element; a peripheral functional element, bonded to the first sheet, which is fluid-tight, including a cavity for placing the peripheral light source; a covering element, which covers the cavity and the peripheral light source, which is fluid-tight, and which is selected from i) a cap combined with an interfacial element, for interfacial fluid-tightness or ii) a fluid-tight sealing mastic covering the peripheral light source and sealing the peripheral functional element. In addition, a method of manufacturing the luminous vehicle glazing.Type: GrantFiled: January 24, 2011Date of Patent: September 9, 2014Assignee: Saint-Gobain Glass FranceInventors: Christophe Kleo, Bastien Grandgirard, Alexandre Richard, Adele Verrat-Debailleul