Graded Composition Patents (Class 438/37)
  • Patent number: 8067687
    Abstract: A monolithic, multi-bandgap, tandem solar photovoltaic converter has at least one, and preferably at least two, subcells grown lattice-matched on a substrate with a bandgap in medium to high energy portions of the solar spectrum and at least one subcell grown lattice-mismatched to the substrate with a bandgap in the low energy portion of the solar spectrum, for example, about 1 eV.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: November 29, 2011
    Assignee: Alliance for Sustainable Energy, LLC
    Inventor: Mark W. Wanlass
  • Publication number: 20110281387
    Abstract: Method of manufacturing a laser medium with a material having a surface and a dopant in the material distributed whereby the material has a spatially variant optical flux density profile uses tailored non-uniform gain profiles within a Yb:YAG laser component (rod, slab, disc, etc.) achieved by a spatial material modification in the spatially masked pre-forms. High temperature-assisted reduction leads to the coordinate-dependent gain profiles, which are controlled by the topology of the deposited solid masks. The gain profiles are obtained by reducing the charge state of the laser-active trivalent Yb3+ ions into inactive divalent Yb2+ ions. This valence conversion process is driven by mass transport of ions and oxygen vacancies. These processes, in turn, affect the dopant distribution throughout the surface and bulk laser crystal. By reducing proportionally more Yb3+ ions at the unmasked areas of component, than in the masked areas, the coordinate-dependent or spatially-controlled gain profiles are achieved.
    Type: Application
    Filed: July 27, 2011
    Publication date: November 17, 2011
    Applicant: RAYTHEON COMPANY
    Inventors: David S. SUMIDA, Robert W. BYREN, Michael USHINSKY
  • Patent number: 8049242
    Abstract: An optoelectronic device such as a light-emitting diode chip is disclosed. It includes a substrate, a multi-layer epitaxial structure, a first metal electrode layer, a second metal electrode layer, a first bonding pad and a second bonding pad. The multi-layer epitaxial structure on the transparent substrate comprises a semiconductor layer of a first conductive type, an active layer, and a semiconductor layer of a second conductive type. The first bonding pad and the second bonding pad are on the same level. Furthermore, the first metal electrode layer can be patterned so the current is spread to the light-emitting diode chip uniformly.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: November 1, 2011
    Assignee: Epistar Corporation
    Inventors: Jin-Ywan Lin, Jen-Chau Wu, Chih-Chiang Lu, Wei-Chih Peng, Ching-Pu Tai, Shih-I Chen
  • Publication number: 20110253975
    Abstract: A solution for designing and/or fabricating a structure including a quantum well and an adjacent barrier is provided. A target band discontinuity between the quantum well and the adjacent barrier is selected to coincide with an activation energy of a dopant for the quantum well and/or barrier. For example, a target valence band discontinuity can be selected such that a dopant energy level of a dopant in the adjacent barrier coincides with a valence energy band edge for the quantum well and/or a ground state energy for free carriers in a valence energy band for the quantum well. Additionally, a target doping level for the quantum well and/or adjacent barrier can be selected to facilitate a real space transfer of holes across the barrier. The quantum well and the adjacent barrier can be formed such that the actual band discontinuity and/or actual doping level(s) correspond to the relevant target(s).
    Type: Application
    Filed: June 17, 2011
    Publication date: October 20, 2011
    Inventors: Maxim S. Shatalov, Remigijus Gaska, Jinwei Yang, Michael Shur
  • Patent number: 8030639
    Abstract: Provided is a nitride semiconductor light emitting device including: a first nitride semiconductor layer; an active layer formed above the first nitride semiconductor layer; and a delta doped second nitride semiconductor layer formed above the active layer. According to the present invention, the optical power of the nitride semiconductor light emitting device is enhanced, optical power down phenomenon is improved and reliability against ESD (electro static discharge) is enhanced.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: October 4, 2011
    Assignee: LG Innotek Co., Ltd.
    Inventor: Suk Hun Lee
  • Patent number: 8019186
    Abstract: The invention relates to a photonic crystal circuit comprising a guide produced in a photonic crystal membrane on the surface of a substrate and a mode adapter coupled to said guide, wherein the membrane includes a central point constituting the mode adapter having a section gradient as termination of said guide, said point being suspended so as to allow the propagation of modes in a symmetrical manner. It also relates to an optical system incorporating said circuit coupled to an optical fiber.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: September 13, 2011
    Assignee: Thales
    Inventors: Sylvain Combrie, Nguyen Vy Quynh Tran, Alfredo De Rossi
  • Publication number: 20110210353
    Abstract: Light emitting diodes (“LEDs”) with N-polarity and associated methods of manufacturing are disclosed herein. In one embodiment, a method for forming a light emitting diode on a substrate having a substrate material includes forming a nitrogen-rich environment at least proximate a surface of the substrate without forming a nitrodizing product of the substrate material on the surface of the substrate. The method also includes forming an LED structure with a nitrogen polarity on the surface of the substrate with a nitrogen-rich environment.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 1, 2011
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Zaiyuan Ren, Thomas Gehrke
  • Publication number: 20110147790
    Abstract: A light emitting diode and a fabricating method thereof are provided. The method including the steps of sequentially forming a first-type semiconductor layer, a light emitting layer and a second-type semiconductor layer with a first region and a second region on a substrate. Next, an ion implantation process is performed to make the resistance of the first region be larger than of the second region. Afterward, a first electrode is formed above the first region of the second-type semiconductor layer. Since the method uses the ion implantation process to make the inner resistance of the second-type semiconductor layer various, the light emitting intensity and efficiency may both be increased.
    Type: Application
    Filed: December 18, 2009
    Publication date: June 23, 2011
    Inventor: Yu-Hsien CHEN
  • Patent number: 7964419
    Abstract: A semiconductor light emitting device made of nitride III-V compound semiconductors is includes an active layer made of a first nitride III-V compound semiconductor containing In and Ga, such as InGaN; an intermediate layer made of a second nitride III-V compound semiconductor containing In and Ga and different from the first nitride III-V compound semiconductor, such as InGaN; and a cap layer made of a third nitride III-V compound semiconductor containing Al and Ga, such as p-type AlGaN, which are deposited in sequential contact.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: June 21, 2011
    Assignee: Sony Corporation
    Inventors: Osamu Goto, Takeharu Asano, Yasuhiko Suzuki, Motonobu Takeya, Katsuyoshi Shibuya, Takashi Mizuno, Tsuyoshi Tojo, Shiro Uchida, Masao Ikeda
  • Patent number: 7955875
    Abstract: Methods of forming a light emitting device include selectively forming a wavelength conversion structure on a light emitting element using stereolithography. Selectively forming the wavelength conversion structure may include covering the light emitting element with a photo-curable liquid polymer containing a luminescent material, and exposing the liquid polymer to light for a time sufficient to at least partially cure the liquid polymer. Multiple layers of polymer can be selectively built up to form a wavelength conversion structure having a custom shape on the light emitting element.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: June 7, 2011
    Assignee: Cree, Inc.
    Inventor: Craig Hardin
  • Patent number: 7956380
    Abstract: A semiconductor light-emitting device is provided. In an InGaN-based semiconductor light-emitting device including an Ag electrode, a semiconductor layer on the contact side of at least the Ag electrode is a dislocation semiconductor layer of which dislocation density is selected to be less than 1×107 (1/cm2) and thereby short-circuit caused by Ag migration generated along this dislocation can be avoided. Thus, this semiconductor light-emitting device is able to solve a problem of a shortened life and a problem with the fraction of defective devices encountered with the InGaN-based semiconductor light-emitting device.
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: June 7, 2011
    Assignee: Sony Corporation
    Inventors: Jun Suzuki, Masato Doi, Goshi Biwa, Hiroyuki Okuyama
  • Patent number: 7901960
    Abstract: A group III nitride substrate on which an epitaxially grown layer of good quality can be formed, and a method of manufacturing the same are obtained. A GaN substrate is one of the following: a group III nitride substrate, wherein the number of atoms of an acid material per square centimeter of a surface is not more than 2×1014, and the number of silicon atoms per square centimeter of the surface is not more than 3×1013; a group III nitride substrate, wherein the number of silicon atoms per square centimeter of a surface is not more than 3×1013, and a haze level of the surface is not more than 5 ppm; and a group III nitride substrate, wherein the number of atoms of an acid, material per square centimeter of a surface is not more than 2×1014, and a haze level of the surface is not more than 5 ppm.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: March 8, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Ishibashi, Akihiro Hachigo, Masato Irikura, Seiji Nakahata
  • Publication number: 20110049541
    Abstract: A semiconductor light emitting device, includes: a stacked structural unit including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting layer provided therebetween; and an electrode including a first and second metal layers, the first metal layer including silver or silver alloy and being provided on a side of the second semiconductor layer opposite to the light emitting layer, the second metal layer including at least one element selected from gold, platinum, palladium, rhodium, iridium, ruthenium, and osmium and being provided on a side of the first metal layer opposite to the second semiconductor layer. A concentration of the element in a region including an interface between the first and second semiconductor layers is higher than that of the element in a region of the first metal layer distal to the interface.
    Type: Application
    Filed: March 8, 2010
    Publication date: March 3, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
  • Publication number: 20110049542
    Abstract: The present invention makes available AlxGa(1-x)As (0?x?1) substrates, epitaxial wafers for infrared LEDs, infrared LEDs, methods of manufacturing AlxGa(1-x)As substrates, methods of manufacturing epitaxial wafers for infrared LEDs, and methods of manufacturing infrared LEDs, whereby a high level of transmissivity is maintained, and through which, in the fabrication of semiconductor devices, the devices prove to have superior characteristics. An AlxGa(1-x)As substrate (10a) of the present invention is an AlxGa(1-x)As substrate (10a) furnished with an AlxGa(1-x)As layer (11) having a major surface (11a) and, on the reverse side from the major surface (11a), a rear face (11b), and is characterized in that in the AlxGa(1-x)As layer (11), the amount fraction x of Al in the rear face (11b) is greater than the amount fraction x of Al in the major surface (11a).
    Type: Application
    Filed: May 27, 2009
    Publication date: March 3, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: So Tanaka, Kenichi Miyahara, Hiroyuki Kitabayashi, Koji Katayama, Tomonori Morishita, Tatsuya Moriwake
  • Patent number: 7884466
    Abstract: According to the present invention, a recess portion is formed in a package substrate which is formed of a multilayer organic substrate having a multilayer wiring, and an LSI chip is accommodated within the recess portion. Wiring traces are formed on the upper surface of a resin which seals the LSI chip connected to the multilayer wiring. The wiring traces are connected to terminal wiring traces connected to the multilayer wiring on the front face of the package substrate and to front-face bump electrodes for external connection on the upper surface of the resin. On the back face side of the package substrate, back-face bump electrodes for external connection are formed and connected to the multilayer wiring.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: February 8, 2011
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Masamichi Ishihara, Fumihiko Ooka, Yoshihiko Ino
  • Patent number: 7875470
    Abstract: A method of forming a buffer layer for a nitride compound semiconductor light emitting device includes placing a sapphire (Al2O3) substrate in a reaction chamber; introducing a nitrogen source gas into a reaction chamber; and annealing the substrate in a state where the nitrogen source gas is introduced into the reaction chamber, to form an AIN compound layer on the substrate. The AIN compound layer having intermediate properties between those of the substrate and a semiconductor layer is formed between the substrate and the semiconductor layer. Thus, an interface space between the AIN compound layer and the buffer layer or the semiconductor layer that is to be formed on the AIN compound layer becomes smaller and a crystal stress also becomes smaller, thereby reducing a crack that may be generated due to differences in lattice constant and thermal expansion coefficient between the substrate and the semiconductor layer.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: January 25, 2011
    Assignee: Seoul Opto Device Co., Ltd.
    Inventor: Hyun Kyu Park
  • Patent number: 7850501
    Abstract: Techniques are provided for manufacturing a light-emitting device having high internal quantum efficiency, consuming less power, having high luminance, and having high reliability. The techniques include forming a conductive light-transmitting oxide layer comprising a conductive light-transmitting oxide material and silicon oxide, forming a barrier layer in which density of the silicon oxide is higher than that in the conductive light-transmitting oxide layer over the conductive light-transmitting oxide layer, forming an anode having the conductive light-transmitting oxide layer and the barrier layer, heating the anode under a vacuum atmosphere, forming an electroluminescent layer over the heated anode, and forming a cathode over the electroluminescent layer. According to the techniques, the barrier layer is formed between the electroluminescent layer and the conductive light-transmitting oxide layer.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: December 14, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Junichiro Sakata, Yoshiharu Hirakata, Norihito Sone
  • Patent number: 7839075
    Abstract: An organic electroluminescent element containing an anode and a cathode having therebetween a light emitting layer containing a phosphorescent compound, and hole blocking layer 1 provided adjacent to the light emitting layer and between the light emitting layer and the cathode, wherein hole blocking layer 1 contains a phosphorescent compound; and a content of the phosphorescent compound contained in hole blocking layer 1 is in the range of 0.1 to 50% of a content of the phosphorescent compound contained in the light emitting layer.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: November 23, 2010
    Assignee: Konica Minolta Holdings, Inc.
    Inventors: Yoshiyuki Suzuri, Hiroshi Kita, Aki Nakata
  • Patent number: 7825417
    Abstract: A technique for suppressing the bowing of an epitaxial wafer is provided. The epitaxial wafer is prepared by successively epitaxially growing a target group III-nitride layer, an interlayer and another group III-nitride layer on a substrate with a buffer layer. The interlayer is mainly composed of a mixed crystal of GaN and InN expressed in a general formula (GaxIny)N (0?x?1, 0?y?1, x+y=1) (or a crystal of GaN), and does not contain Al. The interlayer is epitaxially formed at a lower growth temperature than those of the group III-nitride layers, more specifically at a temperature in a range of at least 350° C. to not more than 1000° C.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: November 2, 2010
    Assignee: NGK Insulators, Ltd.
    Inventors: Masahiro Sakai, Mitsuhiro Tanaka, Takashi Egawa
  • Patent number: 7816695
    Abstract: An embodiment of present invention discloses a light-emitting device comprising a first multi-layer structure comprising a first lower layer; a first upper layer; and a first active layer able to emit light under a bias voltage and positioned between the first lower layer and the first upper layer; a second thick layer neighboring the first multi-layer structure; a second connection layer associated with the second thick layer; a connective line electrically connected to the second connection layer and the first multi-layer structure; a substrate; and two or more ohmic contact electrodes between the first multi-layer structure and the substrate.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: October 19, 2010
    Assignee: Epistar Corporation
    Inventors: Jin-Ywan Lin, Chuan-Cheng Tu
  • Patent number: 7815813
    Abstract: An end point detection method in the case where a catalyst arranged in a treatment chamber of a gas phase reaction processing apparatus is heated at high temperature by supplying electric power thereto and the treatment is carried out by cracking a reaction gas by the catalyst heated at high temperature, comprises the steps of supplying the electric power to the catalyst from a constant current source, detecting electric potential difference between both ends of the catalyst, performing primary differentiation of the detected electric potential difference, and determining an end point of the treatment based on obtained primary differential value.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: October 19, 2010
    Assignees: Tokyo Ohka Kogyo Co., Ltd., Japan Advanced Institute of Science and Technology
    Inventors: Kazuhisa Takao, Hiroshi Ikeda, Hideki Matsumura, Atsushi Masuda, Hironobu Umemoto
  • Patent number: 7800117
    Abstract: A light emitting device includes an active layer structure, which has one or more active layers with luminescent centers, e.g. a wide bandgap material with semiconductor nano-particles, deposited on a substrate. For the practical extraction of light from the active layer structure, a transparent electrode is disposed over the active layer structure and a base electrode is placed under the substrate. Transition layers, having a higher conductivity than a top layer of the active layer structure, are formed at contact regions between the upper transparent electrode and the active layer structure, and between the active layer structure and the substrate. Accordingly the high field regions associated with the active layer structure are moved back and away from contact regions, thereby reducing the electric field necessary to generate a desired current to flow between the transparent electrode, the active layer structure and the substrate, and reducing associated deleterious effects of larger electric fields.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: September 21, 2010
    Assignee: Group IV Semiconductor, Inc.
    Inventors: George Chik, Thomas MacElwee, Iain Calder, E. Steven Hill
  • Publication number: 20100230665
    Abstract: It is presented an organic LED device 101 with, when in use, a predetermined pattern on its light emitting parts. The organic LED device 101 comprises an anode 105, a cathode 103, and an organic light emitting layer 107. The organic light emitting layer 107 is configured to emit light, wherein the organic light emitting layer 107 comprises portion with reduced light emitting properties, the portions of the organic light emitting layer 107 having been irradiated by light with a wavelength in the absorption band of the organic light emitting layer 107, the light intensity being below an ablation threshold of the cathode layer 103, the anode layer 105 and the organic light emitting layer 107 of the organic LED device 101, reducing the light emitting properties of the irradiated portions of the organic light emitting layer 107. It is also presented a method for reducing the light emitting properties of the organic LED device 101.
    Type: Application
    Filed: February 27, 2008
    Publication date: September 16, 2010
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Coen Adrianus Verschuren, Herbert Lifka, Margreet De Kok
  • Patent number: 7794798
    Abstract: A method for depositing material on a substrate is described. The method comprises maintaining a reduced-pressure environment around a substrate holder for holding a substrate having a surface, and holding the substrate securely within the reduced-pressure environment. Additionally, the method comprises providing to the reduced-pressure environment a gas cluster ion beam (GCIB) from a pressurized gas mixture, accelerating the GCIB, and irradiating the accelerated GCIB onto at least a portion of the surface of the substrate to form a thin film. In one embodiment, the pressurized gas mixture comprises a silicon-containing specie and at least one of a nitrogen-containing specie or a carbon-containing specie for forming a thin film containing silicon and at least one of nitrogen or carbon. In another embodiment, the gas mixture comprises a metal-containing specie for forming a thin metal-containing film.
    Type: Grant
    Filed: September 29, 2007
    Date of Patent: September 14, 2010
    Assignee: TEL Epion Inc.
    Inventor: John J. Hautala
  • Patent number: 7795050
    Abstract: A nitride-based light emitting device is manufactured by using a single-crystal nitride-based semiconductor substrate. A seed material layer is deposited on a first substrate where organic residues including a natural oxide layer are removed from an upper surface of the first substrate. A multifunctional substrate is grown from the seed material layer. The single-crystal nitride-based semiconductor layer including a nitride-based buffer layer is formed on the multifunctional substrate. The seed material layer primarily assists the growth of the multifunctional substrate, which is essentially required for the growth of the single-crystal nitride-based semiconductor substrate. The multifunctional substrate is prepared in the form of a single-crystal layer or a poly-crystal layer having a hexagonal crystalline structure.
    Type: Grant
    Filed: April 1, 2009
    Date of Patent: September 14, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: June O Song
  • Publication number: 20100219418
    Abstract: LED devices incorporating diamond materials and methods for making such devices are provided. One such method may include forming epitaxially a substantially single crystal SiC layer on a substantially single crystal Si wafer, forming epitaxially a substantially single crystal diamond layer on the SiC layer, doping the diamond layer to form a conductive diamond layer, removing the Si wafer to expose the SiC layer opposite to the conductive diamond layer, forming epitaxially a plurality of semiconductor layers on the SiC layer such that at least one of the semiconductive layers contacts the SiC layer, and coupling an n-type electrode to at least one of the semiconductor layers such that the plurality of semiconductor layers is functionally located between the conductive diamond layer and the n-type electrode.
    Type: Application
    Filed: April 6, 2010
    Publication date: September 2, 2010
    Inventor: Chien-Min Sung
  • Publication number: 20100219445
    Abstract: A buffer layer 12 composed of at least a Group III nitride compound is laminated on a substrate 11 composed of sapphire, and an n-type semiconductor layer 14, a light-emitting layer 15, and a p-type semiconductor layer 16 are laminated in a sequential manner on the buffer layer 12. The buffer layer 12 is formed by means of a reactive sputtering method, the buffer layer 12 contains oxygen, and the oxygen concentration in the buffer layer 12 is 1 atomic percent or lower. There are provided a Group III nitride compound semiconductor light-emitting device that comprises the buffer layer formed on the substrate by means of the reactive sputtering method, enables formation of a Group III nitride semiconductor having favorable crystallinity thereon, and has a superior light emission property, and a manufacturing method thereof, and a lamp.
    Type: Application
    Filed: September 9, 2008
    Publication date: September 2, 2010
    Inventors: Yasunori Yokoyama, Hisayuki Miki
  • Patent number: 7767479
    Abstract: Emissive quantum photonic imagers comprised of a spatial array of digitally addressable multicolor pixels. Each pixel is a vertical stack of multiple semiconductor laser diodes, each of which can generate laser light of a different color. Within each multicolor pixel, the light generated from the stack of diodes is emitted perpendicular to the plane of the imager device via a plurality of vertical waveguides that are coupled to the optical confinement regions of each of the multiple laser diodes comprising the imager device. Each of the laser diodes comprising a single pixel is individually addressable, enabling each pixel to simultaneously emit any combination of the colors associated with the laser diodes at any required on/off duty cycle for each color. Each individual multicolor pixel can simultaneously emit the required colors and brightness values by controlling the on/off duty cycles of their respective laser diodes.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: August 3, 2010
    Assignee: Ostendo Technologies, Inc.
    Inventors: Hussein S. El-Ghoroury, Robert G. W. Brown, Dale A. McNeill, Huibert DenBoer, Andrew J. Lanzone
  • Patent number: 7767480
    Abstract: A method of manufacturing a distributed Bragg reflector (DBR) in group III-V semiconductor compounds with improved optical and electrical characteristics is provided. A selected DBR structure is achieved by sequential exposure of a substrate to predetermined combinations of the elemental sources to produce a pair of DBR layers of compound alloys and a graded region including one or more discrete additional layers between the DBR layers of intermediate alloy composition. Exposure durations and combinations of the elemental sources in each exposure are predetermined by DBR design characteristics.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: August 3, 2010
    Assignee: Opticomp Corporation
    Inventors: Gregory Pickrell, Duane A. Louderback, Peter Guilfoyle
  • Patent number: 7759142
    Abstract: Embodiments described include straining transistor quantum well (QW) channel regions with metal source/drains, and conformal regrowth source/drains to impart a uni-axial strain in a MOS channel region. Removed portions of a channel layer may be filled with a junction material having a lattice spacing different than that of the channel material to causes a uni-axial strain in the channel, in addition to a bi-axial strain caused in the channel layer by a top barrier layer and a bottom buffer layer of the quantum well.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: July 20, 2010
    Assignee: Intel Corporation
    Inventors: Prashant Majhi, Mantu K. Hudait, Jack T. Kavalieros, Ravi Pillarisetty, Marko Radosavljevic, Gilbert Dewey, Titash Rakshit, Willman Tsai
  • Patent number: 7754504
    Abstract: A method for making a light-emitting diode, which including the steps of: providing a substrate having at least one recessed portion on one main surface and growing a first nitride-based III-V group compound semiconductor layer through a state of making a triangle in section having a bottom surface of the recessed portion as a base thereby burying the recessed portion; laterally growing a second nitride-based III-V group compound semiconductor layer from the first nitride-based III-V group compound semiconductor layer over the substrate; and successively growing a third nitride-based III-V group compound semiconductor layer of a first conduction type, an active layer and a fourth nitride-based III-V group compound semiconductor layer of a second conduction type on the second nitride-based III-V group compound semiconductor layer.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: July 13, 2010
    Assignee: Sony Corporation
    Inventors: Akira Ohmae, Shigetaka Tomiya, Yuki Maeda, Michinori Shiomi, Takaaki Ami, Takao Miyajima, Katsunori Yanashima, Takashi Tange, Atsushi Yasuda
  • Patent number: 7750338
    Abstract: A semiconductor includes a semiconductor substrate, a gate stack on the semiconductor substrate, and a stressor having at least a portion in the semiconductor substrate and adjacent to the gate stack. The stressor includes a first stressor region and a second stressor region on the first stressor region, wherein the second stressor region extends laterally closer to a channel region underlying the gate stack than the first stressor region.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: July 6, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Yin-Pin Wang
  • Publication number: 20100003777
    Abstract: Emissive quantum photonic imagers comprised of a spatial array of digitally addressable multicolor pixels. Each pixel is a vertical stack of multiple semiconductor laser diodes, each of which can generate laser light of a different color. Within each multicolor pixel, the light generated from the stack of diodes is emitted perpendicular to the plane of the imager device via a plurality of vertical waveguides that are coupled to the optical confinement regions of each of the multiple laser diodes comprising the imager device. Each of the laser diodes comprising a single pixel is individually addressable, enabling each pixel to simultaneously emit any combination of the colors associated with the laser diodes at any required on/off duty cycle for each color. Each individual multicolor pixel can simultaneously emit the required colors and brightness values by controlling the on/off duty cycles of their respective laser diodes.
    Type: Application
    Filed: September 16, 2009
    Publication date: January 7, 2010
    Applicant: OSTENDO TECHNOLOGIES, INC.
    Inventors: Hussein S. El-Ghoroury, Robert G.W. Brown, Dale A. McNeill, Huibert DenBoer, Andrew J. Lanzone
  • Publication number: 20100001313
    Abstract: A light emitting device and a method of manufacturing the same are provided. The light emitting device comprises a first conductive type lower semiconductor layer, a current diffusion layer, a first conductive type upper semiconductor layer, an active layer, and a second conductive type semiconductor layer. The current diffusion layer is formed on the first conductive type lower semiconductor layer. The first conductive type upper semiconductor layer is formed on the current diffusion layer. The active layer is formed on the first conductive type upper semiconductor layer. The second conductive type semiconductor layer is formed on the active layer.
    Type: Application
    Filed: September 22, 2009
    Publication date: January 7, 2010
    Inventor: HYO KUN SON
  • Publication number: 20090315067
    Abstract: A semiconductor device fabrication method is disclosed. A buffer layer is provided and a first semiconductor layer is formed on the buffer layer. Next, a first intermediate layer is formed on the first semiconductor layer by dopant with high concentration during an epitaxial process. A second semiconductor layer is overlaid on the first intermediate layer. A semiconductor light emitting device is grown on the second semiconductor layer. The formation of the intermediate layer and the second semiconductor layer is a set of steps.
    Type: Application
    Filed: June 22, 2009
    Publication date: December 24, 2009
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY INC.
    Inventors: SHIH CHENG HUANG, PO MIN TU, YING CHAO YEH, WEN YU LIN, PENG YI WU, SHIH HSIUNG CHAN
  • Patent number: 7623560
    Abstract: Emissive quantum photonic imagers comprised of a spatial array of digitally addressable multicolor pixels. Each pixel is a vertical stack of multiple semiconductor laser diodes, each of which can generate laser light of a different color. Within each multicolor pixel, the light generated from the stack of diodes is emitted perpendicular to the plane of the imager device via a plurality of vertical waveguides that are coupled to the optical confinement regions of each of the multiple laser diodes comprising the imager device. Each of the laser diodes comprising a single pixel is individually addressable, enabling each pixel to simultaneously emit any combination of the colors associated with the laser diodes at any required on/off duty cycle for each color. Each individual multicolor pixel can simultaneously emit the required colors and brightness values by controlling the on/off duty cycles of their respective laser diodes.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: November 24, 2009
    Assignee: Ostendo Technologies, Inc.
    Inventors: Hussein S. El-Ghoroury, Robert G. W. Brown, Dale A. McNeill, Huibert DenBoer, Andrew J. Lanzone
  • Patent number: 7615773
    Abstract: A semiconductor light-emitting device comprises a substrate; and an active layer formed over the substrate comprising a well layer having an unintentionally-doped impurities; a first barrier layer; and a second barrier layer, wherein the well layer is disposed between the first barrier layer and the second barrier layer, the first barrier layer comprises an n-type-impurities-intentionally-doped portion near to the well layer, and an n-type-impurities-unintentionally-doped portion distant from the well layer; the second barrier layer comprises an n-type-impurities-unintentionally-doped portion near to the well layer.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: November 10, 2009
    Assignee: Epistar Corporation
    Inventors: Shih-Nan Yen, Jung-Tu Chiu, Yu-Jiun Shen, Ching-Fu Tsai
  • Patent number: 7605011
    Abstract: A semiconductor device comprises an active region (4), a cladding layer (5,7), and a saturable absorbing layer (6) disposed within the cladding layer. The saturable absorbing layer comprises at least one portion (11a) that is absorbing for light emitted by the active region and comprises at least portion (11b) that is not absorbing for light emitted by the active region. The fabrication method of the invention enables the non-absorbing portion(s) (11b) of the saturable absorbing layer (6) to produced after the device structure has been fabricated. This allows the degree of overlap between the non-absorbing portion(s) (11b) of the saturable absorbing layer (6) and the optical mode of the laser to be altered after the device has been grown.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: October 20, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Rakesh Roshan, Brendan Poole, Stewart Edward Hooper, Jonathan Heffernan
  • Publication number: 20090250693
    Abstract: A thin film transistor (TFT), including a substrate, a gate electrode on the substrate, an oxide semiconductor layer including a channel region, a source region, and a drain region, a gate insulating layer between the gate electrode and the oxide semiconductor layer, and source and drain electrodes in contact with the source and drain regions of the oxide semiconductor layer, respectively, wherein the oxide semiconductor layer has a GaInZnO (GIZO) bilayer structure including a lower layer and an upper layer, and the upper layer has a different indium (In) concentration than the lower layer.
    Type: Application
    Filed: April 1, 2009
    Publication date: October 8, 2009
    Inventors: Hong-Han Jeong, Jae-Kyeong Jeong, Yeon-Gon Mo, Hui-Won Yang
  • Patent number: 7589347
    Abstract: A lateral junction semiconductor device and method for fabricating the same comprising the steps of taking a semiconductor structure having a stack formed by a plurality of layers of semiconductor material arranged in a series of substantially parallel planes, the semiconductor material within a first layer having an excess of charge carriers of a first polarity at a first concentration, and selectively removing semiconductor material from the first layer to a depth which varies along a first direction substantially parallel with the planes of the layers within the structure, so as to provide a gradation of the concentration of charge carriers of first polarity within an active layer along the first direction. A photon source comprising said lateral junction semiconductor device.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: September 15, 2009
    Assignee: Qinetiq Limited
    Inventors: Geoffrey Richard Nash, John Henry Jefferson, Keith James Nash
  • Patent number: 7575944
    Abstract: Provided is a method of manufacturing a nitride-based semiconductor LED including sequentially forming an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer on a substrate; forming a Pd/Zn alloy layer on the p-type nitride semiconductor layer; heat-treating the p-type nitride semiconductor layer on which the Pd/Zn alloy layer is formed; removing the Pd/Zn alloy layer formed on the p-type nitride semiconductor layer; mesa-etching portions of the p-type nitride semiconductor layer, the active layer, and the n-type nitride semiconductor layer such that a portion of the upper surface of the n-type nitride semiconductor layer is exposed; and forming an n-electrode and a p-electrode on the exposed n-type nitride semiconductor layer and the p-type nitride semiconductor layer, respectively.
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: August 18, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Sun Woon Kim, Seong Ju Park, Ja Yeon Kim, Min Ki Kwon, Dong Ju Lee, Jae Ho Han
  • Publication number: 20090166606
    Abstract: Provided is a nitride semiconductor light emitting device including: a first nitride semiconductor layer; an active layer formed above the first nitride semiconductor layer; and a delta doped second nitride semiconductor layer formed above the active layer. According to the present invention, the optical power of the nitride semiconductor light emitting device is enhanced, optical power down phenomenon is improved and reliability against ESD (electro static discharge) is enhanced.
    Type: Application
    Filed: December 5, 2005
    Publication date: July 2, 2009
    Inventor: Suk Hun Lee
  • Patent number: 7544525
    Abstract: To increase the lattice constant of AlInGaP LED layers to greater than the lattice constant of GaAs for reduced temperature sensitivity, an engineered growth layer is formed over a substrate, where the growth layer has a lattice constant equal to or approximately equal to that of the desired AlInGaP layers. In one embodiment, a graded InGaAs or InGaP layer is grown over a GaAs substrate. The amount of indium is increased during growth of the layer such that the final lattice constant is equal to that of the desired AlInGaP active layer. In another embodiment, a very thin InGaP, InGaAs, or AlInGaP layer is grown on a GaAs substrate, where the InGaP, InGaAs, or AlInGaP layer is strained (compressed). The InGaP, InGaAs, or AlInGaP thin layer is then delaminated from the GaAs and relaxed, causing the lattice constant of the thin layer to increase to the lattice constant of the desired overlying AlInGaP LED layers. The LED layers are then grown over the thin InGaP, InGaAs, or AlInGaP layer.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: June 9, 2009
    Assignee: Philips Lumileds Lighting Co., LLC
    Inventors: Michael R. Krames, Nathan F. Gardner, Frank M. Steranka
  • Patent number: 7537950
    Abstract: An improved nitride-based light emitting heterostructure is provided. The nitride-based light emitting heterostructure includes an electron supply layer and a hole supply layer with a light generating structure disposed there between. The light generating structure includes a set of barrier layers, each of which has a graded composition and a set of quantum wells, each of which adjoins at least one barrier layer. Additional features, such as a thickness of each quantum well, can be selected/incorporated into the heterostructure to improve one or more of its characteristics. Further, one or more additional layers that include a graded composition can be included in the heterostructure outside of the light generating structure. The graded composition layer(s) cause electrons to lose energy prior to entering a quantum well in the light generating structure, which enables the electrons to recombine with holes more efficiently in the quantum well.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: May 26, 2009
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Remigijus Gaska, Jianping Zhang, Michael Shur
  • Patent number: 7521269
    Abstract: A nitride-based light emitting device is manufactured by using a single-crystal nitride-based semiconductor substrate. A seed material layer is deposited on a first substrate where organic residues including a natural oxide layer are removed from an upper surface of the first substrate. A multifunctional substrate is grown from the seed material layer. The single-crystal nitride-based semiconductor layer including a nitride-based buffer layer is formed on the multifunctional substrate. The seed material layer primarily assists the growth of the multifunctional substrate, which is essentially required for the growth of the single-crystal nitride-based semiconductor substrate. The multifunctional substrate is prepared in the form of a single-crystal layer or a poly-crystal layer having a hexagonal crystalline structure.
    Type: Grant
    Filed: August 14, 2006
    Date of Patent: April 21, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: June-O Song
  • Publication number: 20090086784
    Abstract: Embodiments of a method of quantum well intermixing (QWI) comprise providing a wafer comprising upper and lower epitaxial layers, which each include barrier layers, and a quantum well layer disposed between the upper and lower epitaxial layers, applying at least one sacrificial layer over the upper epitaxial layer, and forming a QWI enhanced region and a QWI suppressed region by applying a QWI enhancing layer over a portion of the sacrificial layer, wherein the portion under the QWI enhancing layer is the QWI enhanced region, and the other portion is the QWI suppressed region. The method further comprises the steps of applying a QWI suppressing layer over the QWI enhanced region and the QWI suppressed region, and annealing at a temperature sufficient to cause interdiffusion of atoms between the quantum well layer and the barrier layers of the upper epitaxial layer and the lower epitaxial layer.
    Type: Application
    Filed: October 1, 2007
    Publication date: April 2, 2009
    Inventors: Yabo Li, Kechang Song, Chung-En Zah
  • Patent number: 7511314
    Abstract: Disclosed is a light-emitting device (100) has a light-emitting layer portion (24) which is composed of a group III-V compound semiconductor and a transparent thick-film semiconductor layer (90) with a thickness of not less than 40 ?m which is formed on at least one major surface side of the light-emitting layer portion (24) and composed of a group III-V compound semiconductor having a band gap energy larger than the photon energy equivalent of the peak wavelength of emission flux from the light-emitting layer portion (24). The transparent thick-film semiconductor layer (90) has a lateral surface portion (90S) which is a chemically etched surface. The dopant concentration of the transparent thick-film semiconductor layer (90) is not less than 5×1016/cm3 and not more than 2×1018/cm3. The light-emitting device can have a transparent thick-film semiconductor layer while being significantly improved in light taking-out efficiency from the lateral surface portion.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: March 31, 2009
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Masato Yamada, Masayuki Shinohara, Masanobu Takahashi, Keizou Adomi, Jun Ikeda
  • Patent number: 7508011
    Abstract: The semiconductor light generating device comprises a light generating region 3, a first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 and a second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7. In this semiconductor light generating device, the light generating region 3 is made of III-nitride semiconductor, and includes a InAlGAN semiconductor layer. The first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 is doped with a p-type dopant, such as magnesium, and is provided on the light generating region 3. The second AlX2Ga1-X2N semiconductor layer 7 has a p-type concentration smaller than the first AlX1Ga1-X1N semiconductor layer 5. The second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7 is provided between the light generating region 3 and the first AlX1Ga1-X1N semiconductor layer 5.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: March 24, 2009
    Assignees: Sumitomo Electric Industries, Ltd., Riken
    Inventors: Katsushi Akita, Takao Nakamura, Hideki Hirayama
  • Patent number: 7501666
    Abstract: A substrate 103 is set in a film-forming apparatus, such as a metal organic vapor phase epitaxy system 101, and a GaN buffer film 105, an undoped GaN film 107, and a GaN film 109 containing a p-type dopant are successively grown on the substrate 103 to form an epitaxial substrate E1. The semiconductor film 109 also contains hydrogen, which was included in a source gas, in addition to the p-type dopant. Then the epitaxial substrate E1 is placed in a short pulsed laser beam emitter 111. A laser beam LB1 is applied to a part or the whole of a surface of the epitaxial substrate E1 to activate the p-type dopant by making use of a multiphoton absorption process. When the substrate is irradiated with the pulsed laser beam LB1 which can induce multiphoton absorption, a p-type GaN film 109a is formed. There is thus provided a method of optically activating the p-type dopant in the semiconductor film to form the p-type semiconductor region, without use of thermal annealing.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: March 10, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiichiro Tanabe, Susumu Yoshimoto
  • Patent number: 7495264
    Abstract: A semiconductor device has a substrate and a dielectric film formed directly or indirectly on the substrate. The dielectric film contains a metal silicate film, and a silicon concentration in the metal silicate film is lower in a center portion in the film thickness direction than in an upper portion and in a lower portion.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: February 24, 2009
    Assignee: NEC Corporation
    Inventors: Heiji Watanabe, Haruhiko Ono, Nobuyuki Ikarashi