Abstract: A method is for formation of an electrically conducting through-via within a first semiconductor support having a front face and comprising a silicon substrate. The method may include forming of a first insulating layer on top of the front face of the first semiconductor support, fabricating a handle including, within an additional rigid semiconductor support having an intermediate semiconductor layer, and forming on either side of the intermediate semiconductor layer of a porous region and of an additional insulating layer. The method may also include direct bonding of the first insulating layer and of the additional insulating layer, and thinning of the silicon substrate of the first semiconductor support so as to form a back face opposite to the front face.

Abstract: InP epitaxial material is directly bonded onto a Silicon-On-Insulator (SOI) wafer having Vertical Outgassing Channels (VOCs) between the bonding surface and the insulator (buried oxide, or BOX) layer. H2O and other molecules near the bonding surface migrate to the closest VOC and are quenched in the buried oxide (BOX) layer quickly by combining with bridging oxygen ions and forming pairs of stable nonbridging hydroxyl groups (Si—OH). Various sizes and spacings of channels are envisioned for various devices.

Abstract: An object is to provide a semiconductor device in which, through a simpler process, junction capacitance and power consumption can be reduced more than a conventional semiconductor device, and a manufacturing method thereof. An insulating film including an opening is formed over a base substrate and a part of a bond substrate is transferred to the base substrate, with the insulating film interposed therebetween, whereby a semiconductor film including a cavity between the semiconductor film and the base substrate is formed over the base substrate. Then, a semiconductor device including a semiconductor element such as a transistor is manufactured using the semiconductor film. The transistor includes a cavity between the base substrate and the semiconductor film used as an active layer. One cavity may be provided or a plurality of cavities may be provided.

Abstract: The present disclosure provides a method of bonding a plurality of substrates. In an embodiment, a first substrate includes a first bonding layer. The second substrate includes a second bonding layer. The first bonding layer includes silicon; the second bonding layer includes aluminum. The first substrate and the second substrate are bonded forming a bond region having an interface between the first bonding layer and the second bonding layer. A device having a bonding region between substrates is also provided. The bonding region includes an interface between a layer including silicon and a layer including aluminum.

Abstract: A method for producing a structure having an ultra thin buried oxide (UTBOX) layer by assembling a donor substrate with a receiver substrate wherein at least one of the substrates includes an insulating layer having a thickness of less than 50 nm that faces the other substrate, conducting a first heat treatment for reinforcing the assembly between the two substrates at temperature below 400° C., and conducting a second heat treatment at temperature above 900° C., wherein the exposure time between 400° C. and 900° C. between the heat treatments is less than 1 minute and advantageously less than 30 seconds.

Abstract: A mock bump system includes providing a flip chip integrated circuit having an edge and forming a mock bump near the edge.

Abstract: According to an embodiment, a semiconductor structure includes a first monocrystalline semiconductor portion having a first lattice constant in a reference direction; a second monocrystalline semiconductor portion having a second lattice constant in the reference direction, which is different to the first lattice constant, on the first monocrystalline semiconductor portion; and a metal layer formed on and in contact with the second monocrystalline semiconductor portion.

Abstract: According to one embodiment, an insulation film is formed over the surface, backside, and sides of a first substrate. Next, the insulation film formed over the surface of the first substrate is removed. Then, a joining layer is formed over the surface of the first substrate, from which the insulation film has been removed. Subsequently, the first substrate is bonded to a second substrate via a joining layer.

Abstract: To provide a method for manufacturing an SOI substrate provided with a semiconductor layer which can be used practically even when a substrate having a low heat-resistant temperature, such as a glass substrate or the like is used. The semiconductor layer is transferred to a supporting substrate by the steps of irradiating a semiconductor wafer with ions from one surface to form a damaged layer; forming an insulating layer over one surface of the semiconductor wafer; attaching one surface of the supporting substrate to the insulating layer formed over the semiconductor wafer and performing heat treatment to bond the supporting substrate to the semiconductor wafer; and performing separation at the damaged layer into the semiconductor wafer and the supporting substrate. The damaged layer remaining partially over the semiconductor layer is removed by wet etching and a surface of the semiconductor layer is irradiated with a laser beam.

Abstract: There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the single crystal silicon thin film is patterned to form an island-like silicon layer, and then, a thermal oxidation treatment is carried out in an oxidizing atmosphere containing a halogen element, so that an island-like silicon layer in which the trap levels and the defects are removed is obtained.

Abstract: Provided is a method of fabricating an image sensor device. The method includes providing a first substrate having a radiation-sensing region disposed therein. The method includes providing a second substrate having a hydrogen implant layer, the hydrogen implant layer dividing the second substrate into a first portion and a second portion. The method includes bonding the first portion of the second substrate to the first substrate. The method includes after the bonding, removing the second portion of the second substrate. The method includes after the removing, forming one or more microelectronic devices in the first portion of the second substrate. The method includes forming an interconnect structure over the first portion of the second substrate, the interconnect structure containing interconnect features that are electrically coupled to the microelectronic devices.

Abstract: A first substrate of single-crystal silicon within which is formed an embrittled layer and over a surface of which is formed a first insulating film is provided; a second insulating film is formed over a surface of a second substrate; at least one surface of either the first insulating film or the second insulating film is exposed to a plasma atmosphere or an ion atmosphere, and that surface of the first insulating film or the second insulating film is activated; the first substrate and the second substrate are bonded together with the first insulating film and the second insulating film interposed therebetween; a single-crystal silicon film is separated from the first substrate at an interface of the embrittled layer of the first substrate, and a thin film single-crystal silicon film is formed over the second substrate with the first insulating film and the second insulating film interposed therebetween.

Abstract: Provided are semiconductor devices having through electrodes and methods of fabricating the same. The method includes providing a substrate including top and bottom surfaces facing each other, forming a hole and a gap extending from the top surface of the substrate toward the bottom surface of the substrate, the gap surrounding the hole and being shallower than the hole, filling the hole with an insulating material, forming a metal interconnection line on the top surface of the substrate on the insulating material, recessing the bottom surface of the substrate to expose the insulating material, removing the insulating material to expose the metal interconnection line via the hole, filling the hole with a conductive material to form a through electrode connected to the metal interconnection line, recessing the bottom surface of the substrate again to expose the gap, and forming a lower insulating layer on the bottom surface of the substrate.

Abstract: A method of transferring an epitaxial film from an original substrate to a destination substrate comprises: growing an epitaxial film grown with a sacrificial layer on the original substrate; patterning the epitaxial film into a plurality of sections; attaching the plurality of sections to a stretchable film; removing the plurality of sections attached to the stretchable film from the original substrate; stretching the sections apart as needed; and attaching a permanent substrate to the plurality of sections; and trimming the sizes of the sections as needed for precise positioning prior to integrated circuit device fabrication.

Abstract: A method of fabricating a micro-electrical-mechanical system (MEMS) transducer comprises the steps of forming a membrane (5) on a substrate (3), and forming a back-volume in the substrate. The step of forming a back-volume in the substrate comprises the steps of forming a first back-volume portion (7a) and a second back-volume portion (7b), the first back-volume portion (7a) being separated from the second back-volume portion (7b) by a step in a sidewall of the back-volume. The cross-sectional area of the second back-volume portion (7b) can be made greater than the cross-sectional area of the membrane (5), thereby enabling the back-volume to be increased without being constrained by the cross-sectional area of the membrane (5). The back-volume may comprise a third back-volume portion. The third back-volume portion enables the effective diameter of the membrane to be formed more accurately.

Abstract: A method for opening a bond pad on a semiconductor device is provided. The method comprises removing a first layer to expose a first portion of the bond pad and forming a protective layer over the exposed first portion of the bond pad. The method further comprises performing subsequent processing of the semiconductor device and removing the protective layer to expose a second portion of the bond pad.

Abstract: Defects in a semiconductor substrate are reduced. A semiconductor substrate with fewer defects is manufactured with high yield. Further, a semiconductor device is manufactured with high yield. A semiconductor layer is formed over a supporting substrate with an oxide insulating layer interposed therebetween, adhesiveness between the supporting substrate and the oxide insulating layer in an edge portion of the semiconductor layer is increased, an insulating layer over a surface of the semiconductor layer is removed, and the semiconductor layer is irradiated with laser light, so that a planarized semiconductor layer is obtained. For increasing the adhesiveness between the supporting substrate and the oxide insulating layer in the edge portion of the semiconductor layer, laser light irradiation is performed from the surface of the semiconductor layer.

Abstract: A method of bonding wafers with an aluminum-germanium bond includes forming an aluminum layer on a first wafer, and a germanium layer on a second wafer, and implanting the germanium layer with non-germanium atoms prior to forming a eutectic bond at the aluminum-germanium interface. The wafers are aligned to a desired orientation and the two layers are held in contact with one another. The aluminum-germanium interface is heated to a temperature that allows the interface of the layers to melt, thus forming a bond. A portions of the germanium layer may be removed from the second wafer to allow infrared radiation to pass through the second wafer to facilitate wafer alignment.

Abstract: A method for making a semiconducting structure, including: a) forming, on a surface of a final semiconductor substrate, a semiconducting layer, doped with elements from columns III and V of the Periodic Table so as to form a ground plane, b) forming a dielectric layer, c) then assembling, by direct adhesion of the source substrate, on the final substrate, the layer forming the ground plane between the final substrate and the source substrate, the dielectric layer being between the source substrate and the ground plane, d) then thinning the source substrate, leaving, on the surface of the semiconductor structure, a film made from a semiconducting material.

Abstract: Methods of forming electro-micromechanical resonators provide passive temperature compensation of semiconductor device layers used therein. A first substrate is provided that includes a first electrically insulating temperature compensation layer on a first semiconductor device layer. A step is performed to bond the first electrically insulating temperature compensation layer to a second substrate containing the second electrically insulating temperature compensation layer therein, to thereby form a relatively thick temperature compensation layer. A piezoelectric layer is formed on the first electrically insulating temperature compensation layer and at least a first electrode is formed on the piezoelectric layer.

Abstract: According to the present invention, there is provided a method for manufacturing an SOI wafer, the method configured to grow an epitaxial layer on an SOI layer of the SOI wafer having the SOI layer on a BOX layer to increase a thickness of the SOI layer, wherein epitaxial growth is carried out by using an SOI wafer whose infrared reflectance in an infrared wavelength range of 800 to 1300 nm falls within the range of 20% to 40% as the SOI wafer on which the epitaxial layer is grown. As a result, a high-quality SOI wafer with less slip dislocation and others can be provided with excellent productivity at a low cost as the SOI wafer including the SOI layer having a thickness increased by growing the epitaxial layer, and a manufacturing method thereof can be also provide.

Abstract: A method for forming a level of a tridimensional structure on a first support in which components are formed, including the steps of forming, on a second semiconductor support, a single-crystal semiconductor substrate with an interposed thermal oxide layer; placing the free surface of the single-crystal semiconductor substrate on the upper surface of the first support; eliminating the second semiconductor support; and thinning down the thermal oxide layer down to a thickness capable of forming a gate insulator.

Abstract: Methods of fabricating relaxed layers of semiconductor materials include forming structures of a semiconductor material overlying a layer of a compliant material, and subsequently altering a viscosity of the compliant material to reduce strain within the semiconductor material. The compliant material may be reflowed during deposition of a second layer of semiconductor material. The compliant material may be selected so that, as the second layer of semiconductor material is deposited, a viscosity of the compliant material is altered imparting relaxation of the structures. In some embodiments, the layer of semiconductor material may comprise a III-V type semiconductor material, such as, for example, indium gallium nitride. Methods of fabricating semiconductor structures and devices are also disclosed. Novel intermediate structures are formed during such methods.

Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming a first layer on a first side of a first silicon wafer. The first silicon wafer has a second side opposite the first side. The first layer has a coefficient-of-thermal-expansion (CTE) that is lower than that of silicon. The method includes bonding the first wafer to a second silicon wafer in a manner so that the first layer is disposed in between the first and second silicon wafers. The method includes removing a portion of the first silicon wafer from the second side. The method includes forming a second layer over the second side of the first silicon wafer. The second layer has a CTE higher than that of silicon.

Abstract: Methods of fabricating semiconductor structures and devices include bonding a seed structure to a substrate using a glass. The seed structure may comprise a crystal of semiconductor material. Thermal treatment of the seed structure bonded to the substrate using the glass may be utilized to control a strain state within the seed structure. The seed structure may be placed in a state of compressive strain at room temperature. The seed structure bonded to the substrate using the glass may be used for growth of semiconductor material, or, in additional methods, a seed structure may be bonded to a first substrate using a glass, thermally treated to control a strain state within the seed structure and a second substrate may be bonded to an opposite side of the seed structure using a non-glassy material.

Abstract: An IC card is more expensive than a magnetic card, and an electronic tag is also more expensive as a substitute for bar codes. Therefore, the present invention provides an extremely thin integrated circuit that can be mass-produced at low cost unlike a chip of a conventional silicon wafer, and a manufacturing method thereof. One feature of the present invention is that a thin integrated circuit is formed by a formation method that can form a pattern selectively, on a glass substrate, a quartz substrate, a stainless substrate, a substrate made of synthetic resin having flexibility, such as acryl, or the like except for a bulk substrate. Further, another feature of the present invention is that an ID chip in which a thin film integrated circuit and an antenna according to the present invention are mounted is formed.

Abstract: An industrial-scale high throughput wafer bonding apparatus includes a wafer bonder chamber extending along a main axis and comprising a plurality of chamber zones, a plurality of heater/isolator plates, a guide rod system extending along the main axis, a pair of parallel track rods extending along the main axis, and first pressure means. The chamber zones are separated from each other and thermally isolated from each other by the heater/isolator plates. The heater/isolator plates are oriented perpendicular to the main axis, are movably supported and guided by the guide rod system and are configured to move along the direction of the main axis. Each of the chamber zones is dimensioned to accommodate an aligned wafer pair and the wafer pairs are configured to be supported by the parallel track rods. The first pressure means is configured to apply a first force perpendicular to a first end heater/isolator plate.

Abstract: The present invention provides a peeling off method without giving damage to the peeled off layer, and aims at being capable of peeling off not only a peeled off layer having a small area but also a peeled off layer having a large area over the entire surface at excellent yield ratio. The metal layer or nitride layer 11 is provided on the substrate, and further, the oxide layer 12 being contact with the foregoing metal layer or nitride layer 11 is provided, and furthermore, if the lamination film formation or the heat processing of 500° C. or more in temperature is carried out, it can be easily and clearly separated in the layer or on the interface with the oxide layer 12 by the physical means.

Abstract: A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate having a main horizontal surface, an opposite surface and a completely embedded dielectric region. A deep vertical trench is etched from the main horizontal surface into the semiconductor substrate using the dielectric region as an etch stop. A vertical transistor structure is formed in the semiconductor substrate. A first metallization in ohmic contact with the transistor structure is formed on the main horizontal surface. The semiconductor substrate is thinned at the opposite surface at least close to the dielectric region. Further, a semiconductor device is provided.

Abstract: When the single crystal semiconductor layer is melted, the outward diffusion of oxygen is promoted. Specifically, an SOI substrate is formed in such a manner that an SOI structure having a bonding layer including oxygen provided over a base substrate and a single crystal semiconductor layer provided over the bonding layer including oxygen is formed, and part of the single crystal semiconductor layer is melted by irradiation with a laser beam in a state that the base substrate is heated at a temperature of higher than or equal to 500° C. and lower than a melting point of the base substrate.

Abstract: Forming an insulating film on a surface of the single crystal semiconductor substrate, forming a fragile region in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an ion beam through the insulating film, forming a bonding layer over the insulating film, bonding a supporting substrate to the single crystal semiconductor substrate by interposing the bonding layer between the supporting substrate and the single crystal semiconductor substrate, dividing the single crystal semiconductor substrate at the fragile region to separate the single crystal semiconductor substrate into a single crystal semiconductor layer attached to the supporting substrate, performing first dry etching treatment on a part of the fragile region remaining on the single crystal semiconductor layer, performing second dry etching treatment on a surface of the single crystal semiconductor layer subjected to the first etching treatment, and irradiating the single crystal semiconductor la

Abstract: A method and device for alternatively contacting two wafer-like component composite arrangements, in which two component composite arrangements, provided with contact metallizations on their opposing contact surfaces, are brought into a coverage position with their contact metallizations to form contact pairs, in which position the contact metallizations to be joined together are pressed against one another, the contact metallizations being contacted by exposing the rear of one of the component composite arrangements to laser radiation, the wavelength of the laser radiation being selected as a function of the degree of absorption of the component composite arrangement, so that a transmission of the laser radiation through the component composite arrangement exposed to the laser radiation at the rear is essentially suppressed or an absorption of the laser radiation takes place essentially in the contact metallizations of one or both component composite arrangements.

Abstract: A set of planar, two-dimensional optical devices is able to be created in a sub-micron surface layer of an SOI structure, or within a sub-micron thick combination of an SOI surface layer and an overlying polysilicon layer. Conventional masking/etching techniques may be used to form a variety of passive and optical devices in this SOI platform. Various regions of the devices may be doped to form the active device structures. Additionally, the polysilicon layer may be separately patterned to provide a region of effective mode index change for a propagating optical signal.

Abstract: The present invention relates to a method of fabricating an SOI SJ LDMOS structure that can completely eliminate the substrate-assisted depletion effects, comprising the following steps: step one: a conducting layer is prepared below the SOI BOX layer using the bonding technique; the conducting layer is prepared in the following way: depositing a barrier layer on a first bulk silicon wafer, and then depositing a charge conducting layer, thereby obtaining a first intermediate structure; forming a silicon dioxide layer on a second bulk silicon wafer via thermal oxidation, then depositing a barrier layer, and finally depositing a charge conducting layer, thereby obtaining a second intermediate structure; bonding the first intermediate structure and the second intermediate structure using the metal bonding technology to arrange the conducting layer below the SOI BOX layer; step two: a SJ LDMOS structure is fabricated on the SOI substrate having a conducting layer.

Abstract: To prevent, in the case of irradiating a single crystal semiconductor layer with a laser beam, an impurity element from being taken into the single crystal semiconductor layer at the time of laser irradiation.

Abstract: The invention relates to a method for recycling a substrate with a step-like residue in a first region of its surface, in particular along the edge of the substrate, which protrudes with respect to the surface of a remaining second region of the substrate, and wherein the first region comprises a modified zone, in particular an ion implanted zone, essentially in a plane corresponding to the plane of the surface of the remaining second region of the substrate and/or chamfered towards the edge of the substrate. To prevent the negative impact of contaminants in subsequent laminated wafer fabricating processes, the recycling method comprises a material removal step which is carried out such that the surface of the substrate in the first region is lying lower than the level of the modified zone before the material removal.

Abstract: To provide an SOI substrate having a high mechanical strength, and a method for manufacturing the SOI substrate, a single crystal semiconductor substrate is irradiated with accelerated ions so that an embrittled region is formed in a region at a predetermined depth from a surface of the single crystal semiconductor substrate; the single crystal semiconductor substrate is bonded to a base substrate with an insulating layer interposed therebetween; the single crystal semiconductor substrate is heated to be separated along the embrittled region, so that a semiconductor layer is provided over the base substrate with the insulating layer interposed therebetween; and a surface of the semiconductor layer is irradiated with a laser beam so that at least a superficial part of the semiconductor layer is melted, whereby at least one of nitrogen, oxygen, and carbon is solid-dissolved in the semiconductor layer.

Abstract: There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the single crystal silicon thin film is patterned to form an island-like silicon layer, and then, a thermal oxidation treatment is carried out in an oxidizing atmosphere containing a halogen element, so that an island-like silicon layer in which the trap levels and the defects are removed is obtained.

Abstract: The first integrated circuit/transducer device 36 of the handheld probe includes CMOS circuits 110 and cMUT elements 112. The cMUT elements 112 function to generate an ultrasonic beam, detect an ultrasonic echo, and output electrical signals, while the CMOS circuits 110 function to perform analog or digital operations on the electrical signals generated through operation of the cMUT elements 112. The manufacturing method for the first integrated circuit/transducer device 36 of the preferred embodiment includes the steps of depositing the lower electrode S102; depositing a sacrificial layer S104; depositing a dielectric layer S106; depositing the upper electrode S108; depositing a protective layer on the upper electrode S110; and removing the sacrificial layer S112. In the preferred embodiment, the manufacturing method also includes the step of depositing a sealant layer to seal a cavity between the lower electrode and the upper electrode S114.

Abstract: A plurality of single crystal semiconductor substrates are arranged and then the plurality of single crystal semiconductor substrates which have been arranged are overlapped with a base substrate, so that the base substrate and the plurality of single crystal semiconductor substrates are bonded to each other. Then, each of the plurality of single crystal semiconductor substrates is separated to form a plurality of single crystal semiconductor layers over the base substrate. Next, in order to reduce crystal defects in the plurality of single crystal semiconductor layers, the plurality of single crystal semiconductor layers are irradiated with a laser beam. The plurality of single crystal semiconductor layers are thinned by being etched before or after irradiation with a laser beam.

Abstract: A method of wafer or substrate bonding a substrate made of a semiconductor material with a substrate made from a metallic material is disclosed. The method allows the bonding of the two substrates together without the use of any intermediate joining gluing, or solder layer(s) between the two substrates. The method allows the moderate or low temperature bonding of the metal and semiconductor substrates, combined with methods to modify the materials so as to enable low electrical resistance interfaces to be realized between the bonded substrates, and also combined with methods to obtain a low thermal resistance interface between the bonded substrates, thereby enabling various useful improvements for fabrication, packaging and manufacturing of semiconductor devices and systems.

Abstract: There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the single crystal silicon thin film is patterned to form an island-like silicon layer, and then, a thermal oxidation treatment is carried out in an oxidizing atmosphere containing a halogen element, so that an island-like silicon layer in which the trap levels and the defects are removed is obtained.

Abstract: Disclosed is a method for reprocessing a semiconductor substrate which is by-produced in manufacturing a silicon-on-insulator substrate. The method includes: forming an embrittlement layer in a single crystal semiconductor substrate; bonding the single crystal semiconductor substrate with a base substrate having an insulating surface; and separating the single crystal semiconductor substrate along the embrittlement layer to give a silicon-on-insulator substrate and a semiconductor substrate to be reprocessed. The above steps provide, in the peripheral portion on the semiconductor substrate, a projection comprising the embrittlement layer and a single crystal semiconductor layer over the embrittlement layer. The method is characterized by an etching step to selectively remove the projection without etching a portion where the projection is absent, which allows the semiconductor substrate to be reused for the production of another silicon-on-insulator substrate.

Abstract: A method is provided for fabricating a thin-film semiconductor substrate by forming a porous semiconductor layer conformally on a reusable semiconductor template and then forming a thin-film semiconductor substrate conformally on the porous semiconductor layer. An inner trench having a depth less than the thickness of the thin-film semiconductor substrate is formed on the thin-film semiconductor substrate. An outer trench providing access to the porous semiconductor layer is formed on the thin-film semiconductor substrate and is positioned between the inner trench and the edge of the thin-film semiconductor substrate. The thin-film semiconductor substrate is then released from the reusable semiconductor template.

Abstract: A method for producing an encapsulation module and/or for encapsulating a micromechanical arrangement, wherein electronic connection provisions are formed from a blank of electrically conductive semiconductor material, by one or more structuring processes and/or etching processes, wherein, in the course of forming the electronic connection provisions, a pedestal of the semiconductor material arises, on which the electronic connection provisions are arranged, wherein the latter are subsequently embedded with an embedding material and the embedding material and/or the semiconductor pedestal are removed after the embedding to an extent such that a defined number of the electronic connection provisions have electrical contacts on at least one of the outer surfaces of the encapsulation module thus produced, wherein upon forming the electronic connection provisions, on the pedestal of the semiconductor material, an insular material hump is formed, on which a plated-through hole is arranged in each case, and which e

Abstract: A plurality of rectangular single crystal semiconductor substrates are prepared. Each of the single crystal semiconductor substrates is doped with hydrogen ions and a damaged region is formed at a desired depth, and a bonding layer is formed on a surface thereof. The plurality of single crystal substrates with the damaged regions formed therein and the bonding layers formed thereover are arranged on a tray. Depression portions for holding the single crystal semiconductor substrates are formed in the tray. With the single crystal semiconductor substrates arranged on the tray, the plurality of single crystal semiconductor substrates with the damaged regions formed therein and the bonding layers formed thereover are bonded to a base substrate. By performing heat treatment and dividing the single crystal semiconductor substrates along the damaged regions, the plurality of single crystal semiconductor layers that are sliced are formed over the base substrate.

Abstract: An object is to provide a method for manufacturing an SOI substrate including a semiconductor film with high planarity and high crystallinity. After a single crystal semiconductor film is formed over an insulating film by a separation step, a natural oxide film existing on a surface of the semiconductor film is removed and the semiconductor film is irradiated with first laser light and second laser light under an inert gas atmosphere or a reduced-pressure atmosphere. The number of shots of the first laser light that is emitted to an arbitrary point in the semiconductor film is greater than or equal to 7, preferably greater than or equal to 10 and less than or equal to 100. The number of shots of the second laser light that is emitted to an arbitrary point in the semiconductor film is greater than 0 and less than or equal to 2.

Abstract: An object is to reduce occurrence of defective bonding between a base substrate and a semiconductor substrate even when a silicon nitride film or the like is used as a bonding layer. Another object is to provide a method for manufacturing an SOI substrate by which an increase in the number of steps can be suppressed.

Abstract: To provide an SOI substrate with an SOI layer that can be put into practical use, even when a substrate with a low allowable temperature limit such as a glass substrate is used, and to provide a semiconductor substrate formed using such an SOI substrate. In order to bond a single-crystalline semiconductor substrate to a base substrate such as a glass substrate, a silicon oxide film formed by CVD with organic silane as a source material is used as a bonding layer, for example. Accordingly, an SOL substrate with a strong bond portion can be formed even when a substrate with an allowable temperature limit of less than or equal to 700° C. such as a glass substrate is used. A semiconductor layer separated from the single-crystalline semiconductor substrate is irradiated with a laser beam so that the surface of the semiconductor layer is planarized and the crystallinity thereof is recovered.

Abstract: The invention relates to a method of producing a stacked structure. The inventive method comprises the following steps consisting in: a) using a first plate (1) which is, for example, made from silicon, and a second plate (5) which is also, for example, made from silicon, such that at least one of said first (1) and second (5) plates has, at least in part, a surface (2; 7) that cannot bond to the other plate; b) providing a surface layer (3; 8), which is, for example, made from silicon oxide, on at least one part of the surface (2) of the first plate and/or the surface (7) of the second plate (5); and c) bonding the two plates (1; 5) to one another. The aforementioned bonding incompatibility can, for example, result from the physicochemical nature of the surface or of a coating applied thereto, or from a roughness value (r?2, r?7) which is greater than a predetermined threshold. The invention also relates to a stacked structure produced using the inventive method.