Abstract: A method is provided for bonding a semiconductor chip to a packaging substrate while minimizing the variation in the solder ball heights and controlling the stress in the solder balls and the stress in the packaging substrate. During the solder reflow, the warp of the packaging substrate, including the absolute warp, thermal warp, and substrate to substrate variations of the warp, is constrained at a minimal level by providing a clamping constraint to the packaging substrate. During cool down of the solder balls, the stresses and strains of the solder joints are maintained at levels that do not cause tear of the solder joints or breakage of the packaging substrate by removing the clamping constraint. Thus, the bonding process provides both uniform solder height with minimized solder non-wets and stress minimization of the solder balls and the packaging substrate.

Abstract: There is provided a solid-state imaging device including a sensor substrate having a sensor-side semiconductor layer including a pixel region in which a photoelectric conversion section is provided and a sensor-side wiring layer provided on an opposite surface side from a light receiving surface of the sensor-side semiconductor layer, a circuit substrate having a circuit-side semiconductor layer and a circuit-side wiring layer and provided on a side of the sensor-side wiring layer of the sensor substrate, a connection unit region in which a connection section is provided, the connection section having a first through electrode, a second through electrode, and a connection electrode connecting the first through electrode and the second through electrode, and an insulating layer having a step portion which has the connection electrode embedded therein and has a film thickness that gradually decreases from the connection unit region to the pixel region.

Abstract: A method for transferring a micro-technological layer includes preparing a substrate having a porous layer buried beneath a useful surface, forming an embrittled zone between it and the surface, bonding the substrate to a supporting substrate, causing detachment at the porous layer by mechanical stress to obtain a first substrate remnant, and a bare surfaced detached layer joined to the supporting substrate, performing technological steps on the bared surface of the detached layer, bonding the detached layer, by the surface to which the technological steps had been applied, to a second supporting substrate, causing detachment, at the embrittled zone, by heat treatment to obtain a detached layer remnant joined to the second supporting substrate, and the detached layer remnant joined to the first supporting substrate.

Abstract: A trap rich layer for an integrated circuit chip is formed by chemical etching and/or laser texturing of a surface of a semiconductor layer. In some embodiments, a trap rich layer is formed by a technique selected from the group of techniques consisting of laser texturing, chemical etch, irradiation, nanocavity formation, porous Si-etch, semi-insulating polysilicon, thermal stress relief and mechanical texturing. Additionally, combinations of two or more of these techniques may be used to form a trap rich layer.

Abstract: A method according to embodiments of the invention includes providing an epitaxial structure comprising a donor layer and a strained layer. The epitaxial structure is treated to cause the strained layer to relax. Relaxation of the strained layer causes an in-plane lattice constant of the donor layer to change.

Abstract: A method of fabricating a flexible display device includes: forming a plastic substrate on a carrier substrate, the plastic substrate including an active area and a non-active area surrounding the active area; forming an array element on the carrier substrate, the array element including a plurality of layers and having an average adhesion force among the plurality of layers; forming a first film on the array element, the first film having a first adhesion force; attaching a flexible printed circuit board to the plastic substrate; forming a second film on the first film, the second film having a second adhesion force greater than the first adhesion force; and detaching the plastic substrate from the carrier substrate.

Abstract: Some embodiments include methods of processing a unit containing crystalline material. A damage region may be formed within the crystalline material, and a portion of the unit may be above the damage region. A chuck may be used to bend the unit and thereby induce cleavage along the damage region to form a structure from the portion of the unit above the damage region. Some embodiments include methods of forming semiconductor-on-insulator constructions. A unit may be formed to have dielectric material over monocrystalline semiconductor material. A damage region may be formed within the monocrystalline semiconductor material, and a portion of the monocrystalline semiconductor material may be between the damage region and the dielectric material. The unit may be incorporated into an assembly with a handle component, and a chuck may be used to contort the assembly and thereby induce cleavage along the damage region.

Abstract: A semiconductor device manufacturing method and manufacturing apparatus with which it is possible, when a wafer has a warp, to effectively peel off an ultraviolet peelable tape with ultraviolet irradiation of a short duration. Even when a wafer has a warp, by correcting the warp of the wafer with an ultraviolet transmitting plate, and uniformly irradiating an ultraviolet peelable tape attached to the wafer with ultraviolet light, it is possible to reduce a distance between an ultraviolet light source and the ultraviolet peelable tape. Also, by blocking heat from the ultraviolet light source with the ultraviolet transmitting plate, it is possible to suppress a rise in temperature of the wafer. As a result of this, it is possible to effectively peel the ultraviolet peelable tape from the wafer with ultraviolet irradiation of a short duration without any adhesive residue remaining.

Abstract: According to one embodiment, a system for manufacturing a semiconductor device includes a spontaneous joining unit and a deformative joining unit. The spontaneous joining unit overlaps a first substrate and a second substrate and spontaneously joins mutual center portions of respective joint faces of the first substrate and the second substrate. The deformative joining unit deforms at least one peripheral portion of the respective joint faces of the first substrate and second substrate joined by the spontaneous joining unit toward the other peripheral portion and joins the mutual peripheral portions of the respective joint faces.

Abstract: A showerhead electrode for a plasma processing apparatus includes an interface gel between facing surfaces of an electrode plate and a backing plate. The interface gel maintains thermal conductivity during lateral displacements generated during temperature cycling due to mismatch in coefficients of thermal expansion. The interface gel comprises, for example, a silicone based composite filled with aluminum oxide microspheres. The interface gel can conform to irregularly shaped features and maximize surface contact area between mating surfaces. The interface gel can be pre-applied to a consumable upper electrode.

Abstract: A method for relaxing a layer of a strained material. The method includes depositing a first low-viscosity layer on a first face of a strained material layer; bonding a first substrate to the first low-viscosity layer to form a first composite structure; subjecting the composite structure to heat treatment sufficient to cause reflow of the first low-viscosity layer so as to at least partly relax the strained material layer; and applying a mechanical pressure to a second face of the strained material layer wherein the second face is opposite to the first face and with the mechanical pressure applied perpendicularly to the strained material layer during at least part of the heat treatment to relax the strained material.

Abstract: An integrated circuit chip is formed with a circuit layer, a trap rich layer and through-semiconductor-vias. The trap rich layer is formed above the circuit layer. The through-semiconductor-vias are also formed above the circuit layer. In some embodiments, the circuit layer is included in a wafer, and the trap rich layer and through-semiconductor-vias are included in another wafer. The two wafers are bonded together after formation of the trap rich layer and through-semiconductor-vias. Additionally, in some embodiments, yet another wafer may also be bonded to the wafer that includes the trap rich layer and through-semiconductor-vias. Furthermore, in some embodiments, another circuit layer may be formed in the wafer that includes the trap rich layer and through-semiconductor-vias.

Abstract: A method for bonding a first wafer on a second wafer by molecular adhesion, where the wafers have an initial radial misalignment between them. The method includes bringing the two wafers into contact so as to initiate the propagation of a bonding wave between the two wafers while a predefined bonding curvature is imposed on at least one of the two wafers during the contacting step as a function of the initial radial misalignment.

Abstract: A packaging substrate device includes: a first laminate including a first ceramic substrate and a first copper pattern disposed on an upper surface of the first ceramic substrate; and a second laminate disposed over the first copper pattern and including a second ceramic substrate, a second copper pattern that is disposed on an upper surface of the second ceramic substrate, and a through hole extending through the second ceramic substrate and the second copper pattern to expose a copper portion of the first copper pattern. A light emitting semiconductor die can be mounted on the copper portion within the through hole. Efficient heat dissipation can be achieved through the first laminate.

Abstract: An object to be processed is restrained from warping at the time of laser processing. A modified region M2 is formed within a wafer 11, and fractures a2, b2 extending in directions parallel to the thickness direction of the wafer 11 and tilted with respect to a plane including lines 5 are generated from the modified region M2. A modified region M3 is formed within the wafer 11, and a fracture a3 extending in a direction parallel to the thickness direction of the wafer 11 and tilted with respect to the plane including the lines 5 is generated from the modified region M3 so as to connect with the fracture b2. That is, the fractures a2, a3, b2 are generated so as to be connected together.

Abstract: Aspects of the invention are directed to laser patterning apparatus capable of performing laser patterning on a thin film formed on a flexible substrate with a good yield and a laser patterning method thereof. The thin film formed on the flexible substrate can be patterned by laser using a laser patterning apparatus that can include a processing stage that has a reference processing surface on which the flexible substrate having the thin film formed thereon is disposed, a wrinkle removing device that is configured as a mechanism for stretching an outer periphery of a processing region of the flexible substrate so that tension is applied outward in the width direction and forward and backward in the transporting direction, and a laser scanner that scans a predetermined line of the thin film formed on the flexible substrate while emitting a laser beam thereto.

Abstract: Some embodiments include methods of processing a unit containing crystalline material. A damage region may be formed within the crystalline material, and a portion of the unit may be above the damage region. A chuck may be used to bend the unit and thereby induce cleavage along the damage region to form a structure from the portion of the unit above the damage region. Some embodiments include methods of forming semiconductor-on-insulator constructions. A unit may be formed to have dielectric material over monocrystalline semiconductor material. A damage region may be formed within the monocrystalline semiconductor material, and a portion of the monocrystalline semiconductor material may be between the damage region and the dielectric material. The unit may be incorporated into an assembly with a handle component, and a chuck may be used to contort the assembly and thereby induce cleavage along the damage region.

Abstract: The present disclosure provides one embodiment of a method for fabricating light-emitting diode (LED) devices. The method includes forming a nano-mask layer on a first substrate, wherein the nano-mask layer has a randomly arranged grain pattern; growing a first epitaxy semiconductor layer in the first substrate, forming a nano-composite layer; growing a number of epitaxy semiconductor layers over the nano-composite layer; bonding a second substrate to the epitaxy semiconductor layers from a first side of the epitaxy semiconductor layers; applying a radiation energy to the nano-composite layer; and separating the first substrate from the epitaxy semiconductor layers from a second side of the epitaxy semiconductor layers.

Abstract: A method of making a complex microelectronic structure by assembling two substrates through two respective linking surfaces, the structure being designed to be dissociated at a separation zone. Prior to assembly, in producing a state difference in the tangential stresses between the two surfaces to be assembled, the state difference is selected so as to produce in the assembled structure a predetermined stress state at the time of dissociation.

Abstract: A method for making a semiconductor on insulator (SeOI) type substrate that includes an integrated ground plane under the insulating layer wherein the substrate is intended to be used in making electronic components. This method includes implanting atoms or ions of a metal in at least one portion of a semiconducting receiver substrate, carrying out a heat treatment of the receiver substrate in order to obtain an integrated ground plane on or in at least one portion of that receiver substrate, transferring an active layer stemming from a semiconducting donor substrate onto the receiver substrate, with an insulating layer being inserted in between the donor and receiver substrates to obtain the substrate with an integrated ground plane.

Abstract: A method is provided for producing a thin substrate with a thickness below 750 microns, comprising providing a mother substrate, the mother substrate having a first main surface and a toughness; inducing a stress with predetermined stress profile in at least a portion of the mother substrate, said portion comprising the thin substrate, the induced stress being locally larger than the toughness of the mother substrate at a first depth under the main surface; such that the thin substrate is released from the mother substrate, wherein the toughness of the mother substrate at the first depth is not lowered prior to inducing the stress. The method can be used in the production of, for example, solar cells.

Abstract: System, devices and methods are presented that provide an imaging array fabrication process method, comprising fabricating an array of semiconductor imaging elements, interconnecting the elements with stretchable interconnections, and transfer printing the array with a pre-strained elastomeric stamp to a secondary non-planar surface.

Abstract: Embodiments of the invention generally relate to epitaxial lift off (ELO) thin films and devices and methods for forming such films and devices. In one embodiment, a method for forming an ELO thin film includes depositing an epitaxial material over a sacrificial layer on a substrate, adhering a multi-layered support handle onto the epitaxial material, and removing the sacrificial layer during an etching process. The etching process further includes peeling the epitaxial material from the substrate and forming an etch crevice therebetween while maintaining compression in the epitaxial material. The method further provides that the multi-layered support handle contains a stiff support layer adhered to the epitaxial material, a soft support layer adhered to the stiff support layer, and a handle plate adhered to the soft support layer. In one example, the stiff support layer may contain multiple inorganic layers, such as metal layers, dielectric layers, or combinations thereof.

Abstract: A semiconductor device includes a vertical type semiconductor element formed by using a silicon substrate, a P type impurity diffusion layer being formed at a back surface of the silicon substrate. The surface of the P type impurity diffusion layer is wet etched to expose a single silicon crystal surface of the P type impurity diffusion layer, and a metal layer having a work function of 4.5 eV or more is disposed to the single silicon crystal surface so that an ohmic contact is made between the single silicon crystal surface of the P type impurity diffusion layer and the metal layer without making a silicon-metal alloy layer between the P type impurity diffusion layer and the metal layer.

Abstract: A semiconductor substrate is provided by a method suitable for mass production. Further, a semiconductor substrate having an excellent characteristic with effective use of resources is provided.

Abstract: In a method of manufacturing a semiconductor thin film piece device, a plurality of semiconductor thin film pieces (14) are selected from among the semiconductor thin film pieces (14) formed on a first substrate (35), and bonded to a first set of predetermined area on a second substrate (12). Subsequently, a plurality of semiconductor thin film pieces are selected from the remaining semiconductor thin film pieces (14), and bonded to a second set of predetermined area.

Abstract: A stretchable electronic circuit that includes a stretchable base substrate having a plurality of stretchable conductors formed onto a surface thereof, with both the stretchable base substrate and conductors being bendable together about two orthogonal axes. The stretchable circuit also includes a stretchable sensor layer attached to the base substrate with a cavity formed therein which has a contact point exposing one of the plurality of stretchable conductors. The stretchable electronic circuit further includes a surface mount device (SMD) package with a conductor contact protrusion installed into the cavity, and wherein a substantially constant electrical connection is established between the conductor contact protrusion and the stretchable conductor at the contact point by tensile forces interacting between the stretchable base substrate and the stretchable sensor layer.

Abstract: Embodiments of the invention generally relate to epitaxial lift off (ELO) thin films and devices and methods used to form such films and devices. In one embodiment, a method for forming a thin film material during an epitaxial lift off process is provided which includes forming an epitaxial material over a sacrificial layer on a substrate, adhering a non-uniform support handle onto the epitaxial material, and removing the sacrificial layer during an etching process. The etching process further includes peeling the epitaxial material from the substrate while forming an etch crevice therebetween and bending the support handle to form compression in the epitaxial material during the etching process. In one example, the non-uniform support handle contains a wax film having a varying thickness.

Abstract: A method of manufacturing an optical sensor includes the steps of providing a semiconductor wafer having a plurality of pixel areas; forming a grid-like rib enclosing each pixel area on the semiconductor wafer, the grid-like rib having a predetermined width and being formed from a fixing member; providing a light-transmissive substrate having a gap portion on a main surface thereof, the gap portion having at least one of a groove having a width smaller than the grid-like rib and a plurality of through-holes; fixing the semiconductor wafer and the light-transmissive substrate such that the grid-like rib and the gap portion face each other; and cutting the fixed semiconductor wafer and light-transmissive substrate into pieces such that each piece includes one pixel area.

Abstract: The invention relates to a process for fabricating a multilayer structure comprising: bonding a first wafer onto a second wafer, at least the first wafer having a chamfered edge; and thinning the first wafer so as to form in a transferred layer, the thinning comprising a grinding step and a chemical etching step. After the grinding step and before the chemical etching step, a trimming step of the edge of the first wafer is carried out using a grinding wheel, the working surface of which comprises grit particles having an average size of less than or equal to 800-mesh or greater than or equal to 18 microns, the trimming step being carried out to a defined depth in the first wafer so as to leave a thickness of the first wafer of less than or equal to 35 ?m in the trimmed region.

Abstract: A single crystal semiconductor substrate including an embrittlement layer is attached to a base substrate with an insulating layer interposed therebetween, and the single crystal semiconductor layer is separated at the embrittlement layer by heat treatment; accordingly, a single crystal semiconductor layer is fixed over the base substrate. The single crystal semiconductor layer is irradiated with a laser beam so that the single crystal semiconductor layer is partially melted and then is re-single crystallized, whereby crystal defects are removed. In addition, an island-shaped single crystal semiconductor layer for forming an n-channel transistor is channel-doped using a photomask and then is etched back using the photomask so that the island-shaped single crystal semiconductor layer for forming an n-channel transistor is thinner than the island-shaped single crystal semiconductor layer for forming a p-channel transistor.

Abstract: The present invention relates to a wafer cleaning and a wafer bonding method using the same that can improve a yield of cleaning process and bonding property in bonding the cleaned wafer by cleaning the wafer using atmospheric pressure plasma and cleaning solution. The wafer cleaning method includes the steps of providing a process chamber with a wafer whose bonding surface faces upward, cleaning and surface-treating the bonding surface of the wafer by supplying atmospheric pressure plasma and a cleaning solution to the bonding surface of the wafer, and withdrawing out the wafer from the process chamber.

Abstract: A method and structures for manufacturing multi-layered substrates. The method includes providing a donor substrate, which has a first deflection characteristic. The donor substrate has a backside, a face, a cleave region, and a thickness of material defined between the cleave region and the face. The method includes bonding the face of the donor substrate to a face of the handle substrate. The method includes coupling a backing substrate to the backside of the donor substrate to form a multilayered structure. The backing substrate is adequate to cause the first deflection characteristic of the donor substrate to be reduced to a predetermined level. The predetermined level is a suitable deflection characteristic for the thickness of material to be transferred onto the face of a handle substrate.

Abstract: A method of fabricating a memory cell comprises forming a plurality of doped semiconductor layers on a carrier substrate. The method further comprises forming a plurality of digit lines separated by an insulating material. The digit lines are arrayed over the doped semiconductor layers. The method further comprises etching a plurality of trenches into the doped semiconductor layers. The method further comprises depositing an insulating material into the plurality of trenches to form a plurality of electrically isolated transistor pillars. The method further comprises bonding at least a portion of the structure formed on the carrier substrate to a host substrate. The method further comprises separating the carrier substrate from the host substrate.

Abstract: The present invention is a method for manufacturing a bonded wafer by an ion implantation delamination method including at least the steps of, bonding a bond wafer having a micro bubble layer formed by gas ion implantation with a base wafer to be a supporting substrate, delaminating the bond wafer along the micro bubble layer as a boundary to form a thin film on the base wafer, the method comprising, cleaning the bonded wafer after delaminating the bond wafer using ozone water; performing rapid thermal anneal process under a hydrogen containing atmosphere; forming a thermal oxide film on a surface layer of the bonded wafer by subjecting to heat treatment under an oxidizing gas atmosphere and removing the thermal oxide film; subjecting to heat treatment under a non-oxidizing gas atmosphere.

Abstract: A method of initiating molecular bonding, comprising bringing one face of a first wafer to face one face of a second wafer and initiating a point of contact between the two facing faces. The point of contact is initiated by application to one of the two wafers, for example, using a bearing element of a tool, of a mechanical pressure in the range from 0.1 MPa to 33.3 MPa.

Abstract: A method for forming an electronic circuit on a strained semiconductor substrate, including the steps of: forming, on a first surface of a semiconductor substrate, electronic components defining electronic chips to be sawn; and forming at least portions of a layer of a porous semiconductor material on the side of a second surface of the semiconductor substrate, opposite to the first surface, to bend the semiconductor substrate.

Abstract: Methods of processing partially manufactured semiconductor substrates with one or more through silicon vias to partially remove a tungsten layer formed on the field region during filling the through silicon vias are provided. In certain embodiments, the methods produce substrates with reduced bowing than the bowing present after through silicon vias filling. Substrates with reduced bowing are easier to handle and may expedite subsequent processes.

Abstract: Techniques for integrated circuit device fabrication are provided. In one aspect, an integrated circuit device comprises a base, at least one die attached to the base, and a counterbalancing layer on at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die. In another aspect, warping of an integrated circuit device comprising at least one die attached to a base is controlled by applying a counterbalancing layer to at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die.

Abstract: A flexible electronic circuit member formed of a plurality of dielectric layers includes a plurality of thinned semiconductor chips embedded within the circuit member for increased levels of integration and component density. The thinned semiconductor chips may include various integrated circuits thereon. They may be formed on various substrates and using various technologies and the embedded, thinned semiconductor chips are interconnected by a patterned interconnect that extends between and through the respective dielectric layers. A method for forming the flexible circuit member includes joining semiconductor chips to a mounting apparatus using a releasable bonding layer then forming thinned semiconductor chips that are joined to respective dielectric layers that combine to form the flexible electronic circuit member. The releasable bonding layer is removed after the thinned semiconductor chips are joined to the respective dielectric layers used in combination to form the electronic circuit member.

Abstract: Provided is a method for manufacturing a semiconductor device which includes: forming a removal layer over a base (support base); forming an interconnect layer over the removal layer; mounting semiconductor chip(s) over the interconnect layer; and separating the base from the interconnect layer while inducing the separation so as to originate from the removal layer, by irradiating a laser having a wavelength transparent with respect to the support base from the back side thereof, selectively to an unmounted region having no semiconductor chip(s) mounted thereon.

Abstract: One aspect of this disclosure relates to a method for forming a wafer with a strained semiconductor. In various embodiments of the method, a predetermined contour is formed in one of a semiconductor membrane and a substrate wafer. The semiconductor membrane is bonded to the substrate wafer and the predetermined contour is straightened to induce a predetermined strain in the semiconductor membrane. In various embodiments, a substrate wafer is flexed into a flexed position, a portion of the substrate wafer is bonded to a semiconductor layer when the substrate wafer is in the flexed position, and the substrate wafer is relaxed to induce a predetermined strain in the semiconductor layer. Other aspects and embodiments are provided herein.

Abstract: The present invention provides a method for manufacturing massively and efficiently a minute device which can receive or send data in contact, preferably, out of contact by forming an integrated circuit which is formed by a thin film over a large glass substrate and by peeling the integrated circuit from the substrate. Especially, an integrated circuit which is formed by a thin film is extremely thin, and so there is a threat that the integrated circuit is flied when transporting, and so handling thereof is difficult. In accordance with the present invention, a separating layer (also referred to as a peeling layer) is damaged at a plurality of times by at least two different kinds of methods (a damage due to laser light irradiation, a damage due to etching, or a damage due to a physical means), subsequently, the layer to be peeled can be efficiently peeled from a substrate. Further, handling of individual devices becomes easy by arching the peeled device.

Abstract: The invention is a method for forming a silicon oxide film of an SOI wafer, the method by which at least thermal oxidation treatment is performed (a process (A)) on an SOI wafer having an oxide film on the back surface and, after the thermal oxidation treatment, heat treatment is additionally performed (a process (B)) in a non-oxidizing atmosphere at a temperature higher than the temperature at which the thermal oxidation treatment was performed, whereby a silicon oxide film is formed on the front surface of an SOI layer. This provides a method for forming a silicon oxide film of an SOI wafer, the method that can prevent an SOI wafer from being warped after thermal oxidation treatment even when an SOI wafer having a thick oxide film on the back surface is used and a silicon oxide film for forming a device is formed by thermal oxidation on the front surface on the SOI layer side, and can reduce exposure failure and adsorption failure caused by warpage of the SOI wafer and enhance yields of device fabrication.

Abstract: The semiconductor device si formed by forming a first metal film over a first main surface of a semiconductor wafer having a first thinkness, performing back grinding to a second main surface of the semiconductor wafer thereby making a second thickness thinner than the first thickness and forming an insulation film pattern having a first insulation film and containing an annular insulation film pattern along the periphery of a second main surface of the semiconductor wafer over the second main surface along the periphery thereof. The second main surface of the semiconductor wafer is bonded to a pressure sensitive adhesive sheet thereby holding the device semiconductor wafer by way of the pressure sensitive adhesive sheet to a dicing frame in a state where the insulation film pattern is present.

Abstract: A method for transferring a layer onto a support includes transferring the layer, assembled on an initial substrate, onto a liquid layer that has been previously deposited on the support. The layer is subsequently released from the initial substrate by chemical etching, and the liquid layer is evacuated to allow molecular adhesion of the layer to the support.

Abstract: An object to be processed is restrained from warping at the time of laser processing. A modified region M2 is formed within a wafer 11, and fractures a2, b2 extending in directions parallel to the thickness direction of the wafer 11 and tilted with respect to a plane including lines 5 are generated from the modified region M2. A modified region M3 is formed within the wafer 11, and a fracture a3 extending in a direction parallel to the thickness direction of the wafer 11 and tilted with respect to the plane including the lines 5 is generated from the modified region M3 so as to connect with the fracture b2. That is, the fractures a2, a3, b2 are generated so as to be connected together.

Abstract: A multiple die structure includes a first die (110), a second die (120), a carbon nanotube (130) having a first end (131) in physical contact with the first die and having a second end (132) in physical contact with the second die, and an electrically conductive material (240) in physical contact with the first end of the carbon nanotube and in physical contact with the first die. Forming a connection between the first die and the second die can include providing a connection structure (400, 500, 600, 900) in which the electrically conductive material is adjacent to the carbon nanotube, placing the connection structure adjacent to the first die and to the second die, and bonding the first die and the second die to the connection structure.

Abstract: Nitride semiconductor wafers which are produced by epitaxially grown nitride films on a foreign undersubstrate in vapor phase have strong inner stress due to misfit between the nitride and the undersubstrate material. A GaN wafer which has made by piling GaN films upon a GaAs undersubstrate in vapor phase and eliminating the GaAs undersubstrate bends upward due to the inner stress owing to the misfit of lattice constants between GaN and GaAs.

Abstract: Embodiments of the invention generally relate to epitaxial lift off (ELO) thin films and devices and methods used to form such films and devices. In one embodiment, a method for forming an ELO thin film is provided which includes depositing an epitaxial material over a sacrificial layer on a substrate, adhering a unidirectionally induced-shrinkage support handle onto the epitaxial material, and shrinking the support handle tangential to reinforcement fibers therein to form tension in the support handle and compression in the epitaxial material during the shrinking process. The unidirectionally induced-shrinkage support handle contains a shrinkable material and reinforcement fibers extending unidirectional throughout the shrinkable material. The method further includes removing the sacrificial layer during an etching process, peeling the epitaxial material from the substrate while forming an etch crevice therebetween, and bending the support handle to have substantial curvature.