Abstract: An epitaxial wafer comprises a silicon substrate, a gettering epitaxial film formed thereon and containing silicon and carbon, and a main silicon epitaxial film formed on the gettering epitaxial film, in which the gettering epitaxial film has a given carbon atom concentration and carbon atoms are existent between its silicon lattices.

Abstract: A method for producing a substrate with buried layers of getter material, including: making a first stack including one layer of a first getter material, arranged on a first support; making a second stack including one layer of a second getter material, arranged on a second support; and bringing the first stack into contact with the second stack and performing thermocompression, the layers of the first and of the second getter material being arranged between the first and the second support, at a temperature greater than or equal to a lowest temperature among thermal activation temperatures of the first and of the second getter material, to bond the layers of the first and second getter materials together.

Abstract: A thin film transistor includes a substrate, a semiconductor layer provided on the substrate and crystallized by using a metal catalyst, a gate electrode insulated from and disposed on the semiconductor layer, and a getter layer disposed between the semiconductor layer and the gate electrode and formed with a metal oxide having a diffusion coefficient that is less than that of the metal catalyst in the semiconductor layer.

Abstract: Methods of forming electro-micromechanical resonators provide passive temperature compensation of semiconductor device layers used therein. A first substrate is provided that includes a first electrically insulating temperature compensation layer on a first semiconductor device layer. A step is performed to bond the first electrically insulating temperature compensation layer to a second substrate containing the second electrically insulating temperature compensation layer therein, to thereby form a relatively thick temperature compensation layer. A piezoelectric layer is formed on the first electrically insulating temperature compensation layer and at least a first electrode is formed on the piezoelectric layer.

Abstract: There is provided a semiconductor substrate for solid-state image sensing device in which the production cost is lower than that of a gettering method through a carbon ion implantation and problems such as occurrence of particles at a device production step and the like are solved. Silicon substrate contains solid-soluted carbon having a concentration of 1×1016-1×1017 atoms/cm3 and solid-soluted oxygen having a concentration of 1.4×1018-1.6×1018 atoms/cm3.

Abstract: Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can be produced with narrower base and collector space-charge regions than can be achieved with conventional technology.

Abstract: A semiconductor device includes a trench MOS barrier Schottky diode having an integrated PN diode and a method is for manufacturing same.

Abstract: An integrated circuit (IC) includes a substrate having a topside semiconductor surface including active circuitry configured to provide functionality and a bottomside surface. A plurality of through substrate vias (TSVs) extend from the topside semiconductor surface to beyond the bottomside surface to provide protruding TSV tips. The TSVs include an outer dielectric liner, a metal comprising diffusion barrier layer on the dielectric liner, and a metal filler on the metal comprising barrier layer. A dielectric metal gettering layer (MGL) is on the bottomside surface lateral to and on sidewalls of the protruding TSV tips. The MGL includes at least one metal gettering agent selected from a halogen or a Group 15 element in an average concentration from 0.1 to 10 atomic %.

Abstract: A second epitaxial layer is grown epitaxially over a first epitaxial layer. The first epitaxial layer includes an epitaxially grown layer and a defect layer. The defect layer is disposed over the epitaxially grown layer and serves as a surface layer of the first epitaxial layer. The defect density of the defect layer is 5×1017 cm?2 or more. Defects penetrating through the defect layer form loops in the second epitaxial layer.

Abstract: Methods for protecting circuit device materials, optoelectronic devices, and caps using a reflowable getter are described. The methods, devices and caps provide advantages because they enable modification of the shape and activity of the getter after sealing of the device. Some embodiments of the invention provide a solid composition comprising a reactive material and a phase changing material. The combination of the reactive material and phase changing material is placed in the cavity of an electronic device. After sealing the device by conventional means (epoxy seal for example), the device is subjected to thermal or electromagnetic energy so that the phase changing material becomes liquid, and consequently: exposes the reactive material to the atmosphere of the cavity, distributes the getter more equally within the cavity, and provides enhanced protection of sensitive parts of the device by flowing onto and covering these parts, with a thin layer of material.

Abstract: A method for making a structure including at least the steps of: making at least one first portion of at least one getter material against a first substrate or a second substrate, making at least one second portion of at least one getter material against the second substrate when the first portion of getter material is placed against the first substrate, or against the first substrate when the first portion of getter material is placed against the second substrate, and attaching the second substrate to the first substrate by thermocompression of a first part of the first portion of getter material against at least one part of the second portion of getter material, forming at least one cavity delimited by the first substrate and the second substrate, a second part of the first portion of getter material being placed in the cavity.

Abstract: Provided are methods of removing water adsorbed or bonded to a surface of a semiconductor substrate, and methods of depositing an atomic layer using the method of removing water described herein. The method of removing water includes applying a chemical solvent to the surface of a semiconductor substrate, and removing the chemical solvent from the surface of the semiconductor substrate.

Abstract: An antifuse is disclosed which has an electrically-insulating region sandwiched between two electrodes. The electrically-insulating region has a single layer of a non-hydrogenated silicon-rich (i.e. non-stoichiometric) silicon nitride SiNX with a nitrogen content X which is generally in the range of 0<X?1.2, and preferably 0.5?X?1.2. The breakdown voltage VBD for the antifuse can be defined to be as small as a few volts for CMOS applications by controlling the composition and thickness of the SiNX layer. The SiNX layer thickness can also be made sufficiently large so that Poole-Frenkel emission will be the primary electrical conduction mechanism in the antifuse. Different types of electrodes are disclosed including electrodes formed of titanium silicide, aluminum and silicon. Arrays of antifuses can also be formed.

Abstract: Getter structure comprising at least one getter portion arranged on a support and including at least two adjacent getter material parts arranged on the support one beside the other, with different thicknesses and of which the surface grain densities are different from one another.

Abstract: A reduction in contaminating impurities in a TFT, and a TFT which is reliable, is obtained in a semiconductor device which uses the TFT. By removing contaminating impurities residing in a film interface of the TFT using a solution containing fluorine, a reliable TFT can be obtained.

Abstract: A device and a device manufacturing process. First, a gettering layer is formed on the bottom surface of a silicon substrate. Gates having a MOS structure are then formed on the principal surface of the silicon substrate, and the gettering layer is removed. According to this manufacturing method, the formation of the gates having a MOS structure is performed such that the gettering layer getters dissolved oxygen present in the silicon substrate. This reduces the concentration of dissolved oxygen in the silicon substrate, resulting in improved device characteristics.

Abstract: An object of the present invention is to provide an adhesive composition that can form an adhesive sheet for producing a semiconductor device capable of suppressing deterioration in ion scavengeability after the adhesive sheet goes through thermal history. It is an adhesive composition for producing a semiconductor device containing at least an organic complex-forming compound that forms a complex with cations, and the 5% weight loss temperature of the organic complex-forming compound measured by thermogravimetry is 180° C. or more.

Abstract: The present invention relates to a novel process for decarburizing a silicon melt, and to the use thereof for production of silicon, preferably solar silicon or semiconductor silicon.

Abstract: An object of the present invention is to provide an adhesive sheet that can capture cations mixed in from outside during various processes of manufacturing a semiconductor device to prevent deterioration in electrical characteristics of a semiconductor device to be manufactured and to improve product reliability. It is an adhesive sheet for producing a semiconductor device, in which when 2.5 g of the adhesive sheet is soaked in 50 ml of an aqueous solution containing 10 ppm of copper ions, and the solution is left at 120° C. for 20 hours, the concentration of copper ions in the aqueous solution is 0 to 9.9 ppm.

Abstract: An embodiment of a semiconductor device includes a semiconductor substrate, a first insulating layer formed over the semiconductor substrate, and a first semiconductor layer formed over the first insulation layer. At least one gettering region is formed in at least one of the first insulating layer and the first semiconductor layer. The gettering region includes a plurality of gettering sites, and at least one gettering site includes one of a precipitate, a dispersoid, an interface with the dispersoid, a stacking fault and a dislocation.

Abstract: Provided is a thin film transistor that may be manufactured using Metal Induced Crystallization (MIC) and method for fabricating the same. Also provided is an active matrix flat panel display using the thin film transistor, which may be created by forming a crystallization inducing metal layer below a buffer layer and diffusing the crystallization inducing metal layer. The thin film transistor may include a crystallization inducing metal layer formed on an insulating substrate, a buffer layer formed on the crystallization inducing metal layer, and an active layer formed on the buffer layer and including source/drain regions, and including polycrystalline silicon crystallized by the MIC process.

Abstract: Disclosed embodiments include external gettering provided by electronic packaging. An external gettering element for a semiconductor substrate, which may be incorporated as part of an electronic packaging for the structure, is disclosed. Semiconductor structures and stacked semiconductor structures including an external gettering element are also disclosed. An encapsulation mold compound providing external gettering is also disclosed. Methods of fabricating such devices are also disclosed.

Abstract: A method for removing impurities from at least one semiconductor device layer during manufacturing of a semiconductor device is disclosed. The semiconductor device layer has a compound semiconductor material and/or germanium. Each heating process performed during the manufacturing of the semiconductor device after provision of the semiconductor device layer has a low thermal budget determined by temperatures equal to or lower than about 900° C. and time periods equal to or lower than about 5 minutes. In one aspect, the method includes providing a germanium gettering layer with a higher solubility for the impurities than the semiconductor device layer. The germanium gettering layer is provided at least partly in direct or indirect contact with the at least one semiconductor device layer, such that impurities can diffuse from the at least one semiconductor device layer to the germanium gettering layer.

Abstract: Disclosed is a process for cleaning a wafer having an uneven pattern at its surface. The process includes at least: a step of cleaning the wafer; a step of substituting a cleaning liquid retained in recessed portions of the wafer with a water-repellent liquid chemical after cleaning; and a step of drying the wafer. The process is characterized in that the cleaning liquid has a boiling point of 55 to 200° C., and characterized in that the water-repellent liquid chemical used for the substitution has a temperature of not lower than 40° C. and lower than a boiling point of the water-repellent liquid chemical thereby imparting water repellency at least to surfaces of the recessed portions. With this process, it is possible to provide a cleaning process for improving the cleaning step that tends to induce a pattern collapse.

Abstract: Method for producing nanostructures comprising: a step of providing a substrate (100) having a buried barrier layer (2) and above said barrier layer (2) a crystalline film (5) provided with a network of crystalline defects and/or stress fields (12) in a crystalline zone (13), one or several steps of attacking the substrate (100), of which a preferential attack either of the crystalline defects and/or the stress fields, or the crystalline zone (13) between the crystalline defects and/or the stress fields, said attack steps enabling the barrier layer (2) to be laid bared locally and protrusions (7) to be formed on a nanometric scale, separated from each other by hollows (7.1) having a base located in the barrier layer, the protrusions leading to nanostructures (7, 8).

Abstract: A method of cleaning a SiC semiconductor includes the steps of forming an oxide film at the surface of a SiC semiconductor, and removing the oxide film. At the step of forming an oxide film, an oxide film is formed using ozone water having a concentration greater than or equal to 30 ppm. The forming step preferably includes the step of heating at least one of the surface of the SiC semiconductor and the ozone water. Thus, there can be obtained a method of cleaning a SiC semiconductor that can exhibit cleaning effect on the SiC semiconductor.

Abstract: At least one exemplary embodiment is directed to a method of forming a multilayered Bettering structure that can be used to control wafer warpage.

Abstract: The present invention provides a method for manufacturing a silicon single crystal wafer, in which a silicon single crystal wafer that is fabricated based on a Czochralski method and has an entire plane in a radial direction formed of an N region is subjected to a rapid thermal annealing in an oxidizing atmosphere, an oxide film formed in the rapid thermal annealing in the oxidizing atmosphere is removed, and then a rapid thermal annealing is carried out in a nitriding atmosphere, an Ar atmosphere, or a mixed atmosphere of these atmospheres. As a result, there can be provided the manufacturing method that can inexpensively manufacture a silicon single crystal wafer both in which a DZ layer is formed in a wafer surface layer to provide excellent device characteristics and in which an oxide precipitate functioning as a gettering site can be sufficiently formed in a bulk region.

Abstract: To provide a method of removing a heavy metal contained in a thinned semiconductor substrate. A method of removing a heavy metal in a semiconductor substrate of the present invention comprises: attaching, to a rear surface of the semiconductor substrate, a material that lowers a potential barrier of the rear surface of the semiconductor substrate, on a front surface of which a circuit is to be formed or is formed; applying a thermal treatment to the semiconductor substrate under a condition based on a thickness and a resistivity of the semiconductor substrate; and, depositing the heavy metal in the semiconductor substrate on the rear surface.

Abstract: The present invention provides improved solar cells. This patent teaches a particularly efficient method of device manufacture based on incorporating the solar cell fabrication into the widely used, high temperature, Float Glass manufacture process.

Abstract: The present invention provides improved devices such as transparent solar cells. This patent teaches a particularly efficient method of device manufacture based on incorporating the solar cell fabrication into the widely used, high temperature, Float Glass manufacture process.

Abstract: A method of fabricating an epi-wafer includes providing a wafer including boron by cutting a single crystal silicon ingot, growing an insulating layer on one surface of the wafer, performing thermal treatment of the wafer, removing the insulating layer formed on one surface of the wafer, mirror-surface-grinding one surface of the wafer, and growing an epitaxial layer on one surface of the wafer and forming a high-density boron layer within the wafer that corresponds to the interface between the wafer and the epitaxial layer.

Abstract: A semiconductor device manufacturing method is provided, including: providing a semiconductor substrate, forming on the semiconductor substrate a layer including a semiconductor compound and a dope additive, and thereafter forming an emitter region and gettering impurities by annealing the semiconductor substrate including the layer.

Abstract: A MEMS device is packaged in a process which hydrogen (H) deuterium (D) for reduced stiction. H is exchanged with D by exposing the MEMS device with a deuterium source, such as deuterium gas or heavy water vapor, optionally with the assistance of a direct or downstream plasma.

Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include exposing a substrate having an oxide layer thereon to an oxidizing source. The oxidizing source oxidizes an upper portion of the substrate beneath the oxide layer to form an oxide layer having an increased thickness. The oxide layer with the increased thickness is then removed to expose a clean surface of the substrate. The removal of the oxide layer generally includes removal of contaminants present in and on the oxide layer, especially those contaminants present at the interface of the oxide layer and the substrate. An epitaxial layer may then be formed on the clean surface of the substrate.

Abstract: When manufacturing a bonded substrate using an insulator substrate as a handle wafer, there is provided a method for manufacturing a bonded substrate which can be readily removed after carried and after mounted by roughening a back surface of the bonded substrate (corresponding to a back surface of the insulator substrate) and additionally whose front surface can be easily identified like a process of a silicon semiconductor wafer in case of the bonded substrate using a transparent insulator substrate as a handle wafer. There is provided a method for manufacturing a bonded substrate in which an insulator substrate is used as a handle wafer and a donor wafer is bonded to a front surface of the insulator substrate, the method comprises at least that a sandblast treatment is performed with respect to a back surface of the insulator substrate.

Abstract: Methods for protecting circuit device materials, optoelectronic devices, and caps using a reflowable getter are described. The methods, devices and caps provide advantages because they enable modification of the shape and activity of the getter after sealing of the device. Some embodiments of the invention provide a solid composition comprising a reactive material and a phase changing material. The combination of the reactive material and phase changing material is placed in the cavity of an electronic device. After sealing the device by conventional means (epoxy seal for example), the device is subjected to thermal or electromagnetic energy so that the phase changing material becomes liquid, and consequently: exposes the reactive material to the atmosphere of the cavity, distributes the getter more equally within the cavity, and provides enhanced protection of sensitive parts of the device by flowing onto and covering these parts, with a thin layer of material.

Abstract: A semiconductor processing component has an outer surface portion comprised of silicon carbide, the outer surface portion having a skin impurity level and a bulk impurity level. The skin impurity level is average impurity level from 0 nm to 100 nm of depth into the outer surface portion, the bulk impurity level is measured at a depth of at least 3 microns into the outer surface portion, and the skin impurity level is not greater than 80% of the bulk impurity level.

Abstract: An epitaxial wafer comprises a silicon substrate, a gettering epitaxial film formed thereon and containing silicon and carbon, and a main silicon epitaxial film formed on the gettering epitaxial film, in which the gettering epitaxial film has a given carbon atom concentration and carbon atoms are existent between its silicon lattices.

Abstract: Systems and methods for forming a time-averaged line image having a relatively high amount of intensity uniformity along its length is disclosed. The method includes forming at an image plane a line image having a first amount of intensity non-uniformity in a long-axis direction and forming a secondary image that at least partially overlaps the primary image. The method also includes scanning the secondary image over at least a portion of the primary image and in the long-axis direction according to a scan profile to form a time-average modified line image having a second amount of intensity non-uniformity in the long-axis direction that is less than the first amount. For laser annealing a semiconductor wafer, the amount of line-image overlap for adjacent scans of a wafer scan path is substantially reduced, thereby increasing wafer throughput.

Abstract: Provided herein are gettering members that include a monitor substrate and a conditioning layer thereon. Also provided herein are methods of forming gettering layers and methods of performing immersion lithography processes using the same.

Abstract: The invention relates to a method of fabricating a release substrate produced from semiconductor materials, the method comprising creating a reversible connection between two substrate release layers characterized in that the reversible connection is formed by a connecting layer produced using a first material as the basis, the connecting layer further comprising a nanoparticle concentrating zone of a second material disposed to facilitate release of the substrate, the first and second materials being selected to maintain the bonding energy of the reversible connection substantially constant even when the substrate is exposed to heat treatment.

Abstract: The present invention generally provides apparatus and method for forming a clean and damage free surface on a semiconductor substrate. One embodiment of the present invention provides a system that contains a cleaning chamber that is adapted to expose a surface of substrate to a plasma cleaning process prior to forming an epitaxial layer thereon. In one embodiment, a method is employed to reduce the contamination of a substrate processed in the cleaning chamber by depositing a gettering material on the inner surfaces of the cleaning chamber prior to performing a cleaning process on a substrate. In one embodiment, oxidation and etching steps are repeatedly performed on a substrate in the cleaning chamber to expose or create a clean surface on a substrate that can then have an epitaxial placed thereon. In one embodiment, a low energy plasma is used during the cleaning step.

Abstract: A method includes providing a substrate including a non-insulative, silicon-including region for silicidation, the substrate including one or more contaminants at a top surface thereof. A getter layer is deposited over the non-insulative, silicon-including region, the getter layer reacting with at least one of the one or more contaminants in the non-insulative, silicon-including region at approximately room temperature. The getter layer is removed, and siliciding of the non-insulative, silicon-including region is performed.

Abstract: A semiconductor device and a method of fabricating a semiconductor device are disclosed. Embodiments of the invention use a photosensitive self-assembled monolayer to pattern the surface of a substrate into hydrophilic and hydrophobic regions, and an aqueous (or alcohol) solution of a dopant compound is deposited on the substrate surface. The dopant compound only adheres on the hydrophilic regions. After deposition, the substrate is coated with a very thin layer of oxide to cap the compounds, and the substrate is annealed at high temperatures to diffuse the dopant atoms into the silicon and to activate the dopant. In one embodiment, the method comprises providing a semiconductor substrate including an oxide surface, patterning said surface into hydrophobic and hydrophilic regions, depositing a compound including a dopant on the substrate, wherein the dopant adheres to the hydrophilic region, and diffusing the dopant into the oxide surface of the substrate.

Abstract: Semiconductor structures and methods of forming semiconductor structures, and more particularly to structures and methods of forming SiGe and/or SiGeC buried layers for SOI/SiGe devices. An integrated structure includes discontinuous, buried layers having alternating Si and SiGe or SiGeC regions. The structure further includes isolation structures at an interface between the Si and SiGe or SiGeC regions to reduce defects between the alternating regions. Devices are associated with the Si and SiGe or SiGeC regions.

Abstract: A method is provided that allows for maintaining a desired equivalent oxide thickness (EOT) by reducing the thickness of an interfacial layer in a gate structure. An interfacial layer is formed on a substrate, a gate dielectric layer such as, a high-k gate dielectric, is formed on the interfacial layer. A gettering layer is formed on the substrate overlying the interfacial layer. The gettering layer may function to getter oxygen from the interfacial layer such that the interfacial layer thickness is decreased and/or restricted from growth.

Abstract: A method for preparing a silicon epitaxial wafer that includes a silicon single crystal wafer sliced from a CZ silicon ingot doped with carbon in a concentration range of not less than 5×1015 atoms/cm3 and not more than 5×1017 atoms/cm3 and an epitaxial layer consisting of a silicon single crystal epitaxially grown on a front surface of the silicon single crystal wafer. A polycrystalline silicon layer having a thickness of not less than 0.5 ?m and not more than 1.5 ?m is formed on a back surface of the silicon single crystal wafer.

Abstract: Metal impurities of an upgraded metallurgical grade (UMG) silicon (Si) wafer are reduced. The UMG Si wafer having a 5N (99.999%) purity is chosen to grow a high-quality epitaxial Si thin film through atmospheric pressure chemical vapor deposition (APCVD). Through heat treating diffusion, the epitaxial Si film is used to form sink positions for the metal impurities in the UMG Si wafer. By using concentration gradient, temperature gradient and interface defect, individual and comprehensive effects are built for enhancing purity of the UMG Si wafer from 5N to 6N. Thus, a low-cost Si wafer can be fabricated for Si-based solar cell through a simple, fast and effective method.

Abstract: An object of the present invention is to provide a technology of reducing a nickel element in the silicon film which is crystallized by using nickel. An extremely small amount of nickel is introduced into an amorphous silicon film which is formed on the glass substrate. Then this amorphous silicon film is crystallized by heating. At this time, the nickel element remains in the crystallized silicon film. Then an amorphous silicon film is formed on the surface of the silicon film crystallized with the action of nickel. Then the amorphous silicon film is further heat treated. By carrying out this heat treatment, the nickel element is dispersed from the crystallized silicon film into the amorphous silicon film with the result that the nickel density in the crystallized silicon film is lowered.