Abstract: The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (11) and a semi-conductor body (12) which is provided with at least one semiconductor element (E) and comprising a monocrystalline silicon (1) region on top of which an epitaxial silicon region (2) is formed by providing a metal silicide region (3) on the monocrystalline silicon region (1) and a low-crystallinity silicon region (4) on top of the metal silicide region (3), after which the low-crystallinity silicon region (4) is transformed by heating into the epitaxial silicon region (2) having a high-crystallinity, during which process the metal silicide region (3) is moved from the bottom of the low-crystallinity silicon region (4) to the top of the epitaxial silicon region (2).

Abstract: An integrated circuit (IC) includes a strained-silicon layer formed by deposition of amorphous silicon onto either a region of a semiconductor layer that has been implanted with ions to create a larger spacing between atoms in a crystalline lattice of the semiconductor layer or a silicon-ion layer that has been epitaxially grown on the semiconductor layer to have an increased spacing between atoms in the silicon-ion layer. Alternatively, the IC includes a strained-silicon layer formed by silicon epitaxial growth onto the region of the semiconductor layer that has been implanted with ions. The IC also preferably includes a CMOS device that preferably, but not necessarily, incorporates sub-0.1 micron technology. The implanted ions may preferably be heavy ions, such as germanium ions, antimony ions or others. Ion implantation may be done with a single implantation process, as well as with multiple implantation processes.

Abstract: A method of fabricating a semiconductor device includes providing a substrate, forming an amorphous silicon layer over the substrate, forming a patterned heat retaining layer over the amorphous silicon layer, doping the amorphous silicon layer to form a pair of doped regions in the amorphous silicon layer by using the patterned heat retaining layer as a mask, and irradiating the amorphous silicon layer to activate the pair of doped regions, forming a pair of activated regions, and form a crystallized region between the pair of activated regions.

Abstract: A method of manufacturing a low temperature polysilicon film is provided. A first metal layer is formed on a substrate; and openings have been formed in the first metal layer. A second metal layer is formed on the first metal layer: and a hole corresponding to each of the openings is formed in the second metal layer. A silicon layer is formed on the second metal layer; a silicon seed is formed on the substrate inside each of the holes. After removing the first and the second metal layers, an amorphous silicon layer is formed on the substrate by using the silicon seed. Then a laser crystallization step is performed to form a polysilicon layer from the amorphous layer. Since the position of the silicon seed can be controlled, the size and distribution of the silicon grain and the number of the silicon crystal interface can also be controlled.

Abstract: A method of fabricating a transistor device includes forming a non-crystalline germanium layer on a seed layer. The non-crystalline germanium layer is selectively locally heated to about a melting point thereof to form a single-crystalline germanium layer on the seed layer. The non-crystalline germanium layer may be selectively locally heated, for example, by applying a laser to a portion of the non-crystalline germanium layer. Related devices are also discussed.

Abstract: A semiconductor device includes a silicon crystal layer on an insulating layer, the silicon crystal layer containing a crystal lattice mismatch plane, a memory cell array portion on the silicon crystal layer, the memory cell array portion including memory strings, each of the memory strings including nonvolatile memory cell transistors connected in series in a first direction, the memory strings being arranged in a second direction orthogonal to the first direction, the crystal lattice mismatch plane crossing the silicon crystal along the second direction without passing under gates of the nonvolatile memory cell transistors as viewed from a top of the silicon crystal layer, or crossing the silicon crystal along the first direction with passing under gates of the nonvolatile memory cell transistors as viewed from the top of the silicon crystal layer.

Abstract: Method for manufacturing a semiconductor device including a transistor having a grooved gate structure and a transistor having a planar gate structure on the same substrate, in which, even when the semiconductor device is configured as a dual gate structure in which a gate electrode structure is a poly-metal gate structure, and a grooved gate and a planar gate are made in different conductivity types, then sufficient dopant is injected into polysilicon in the grooved gate to prevent depletion, and impurity ions do not pass through a gate insulating film even when the planar gate is formed also polysilicon having the same film thickness. The method includes: injecting ions into an amorphous silicon layer for the grooved gate; subsequently, turning it into polysilicon once; injecting ions once again to amorphousize a surface layer of the polysilicon layer and injecting ions of a different conductivity type for the planar gate.

Abstract: A thin semiconductor film is crystallized in a high yield by being irradiated with laser light. An insulating film, a semiconductor film, an insulating film, and a semiconductor film are stacked in this order over a substrate. Laser light irradiation is performed from above the substrate to melt the semiconductor films of a lower layer and an upper layer, whereby the semiconductor film of the lower layer is crystallized. With the laser light irradiation, the semiconductor film of the upper layer changes to a liquid state, thereby reflecting the laser light and preventing the semiconductor film of the lower layer from being overheated with the laser light. Further, by melting the semiconductor film of the upper layer as well, time for melting the semiconductor film of the lower layer can be extended.

Abstract: To create a laminated film of a silicon oxide film and a silicon nitride film, with large current driving force and large dielectric constant. A manufacturing method of a semiconductor device includes: forming an amorphous silicon film on the silicon oxide film; and forming a single crystal silicon film by annealing the amorphous silicon film.

Abstract: Method for forming a strained Si layer on a substrate (1), including formation of: an epitaxial SiGe layer (4) on a Si surface, and of: the strained Si layer by epitaxial growth of the Si layer on top of the epitaxial SiGe layer (4), the Si layer being strained due to the epitaxial growth, wherein the substrate (1) is a Silicon-On-Insulator substrate with a support layer (1), a buried silicon dioxide layer (BOX) and a monocrystalline Si surface layer (3), the method further including: ion implantation of the Si surface layer (3) and the epitaxial SiGe layer (4) to transform the Si surface layer (3) into an amorphous Si layer (3B) and a portion of the epitaxial SiGe layer (4) into an amorphous SiGe layer (5), a further portion of the epitaxial SiGe layer (4) being a remaining monocrystalline SiGe layer (6), the amorphous Si layer (3B), the amorphous SiGe layer and the remaining monocrystalline SiGe layer (6) forming a layer stack (3B, 5, 6) on the buried silicon dioxide layer (BOX), with the amorphous Si layer

Abstract: A method of forming a vertical diode and a method of manufacturing a semiconductor device (e.g., a semiconductor memory device such as a phase-change memory device) includes forming an insulating structure having an opening on a substrate and filling the opening with an amorphous silicon layer. A metal silicide layer is formed to contact at least a portion of the amorphous silicon layer and a polysilicon layer is then formed in the opening by crystallizing the amorphous silicon layer using the metal silicide layer. A doped polysilicon layer is formed by implanting impurities into the polysilicon layer. Thus, the polysilicon layer is formed in the opening without performing a selective epitaxial growth (SEG) process, so that electrical characteristics of the diode may be improved.

Abstract: A method of forming a polycrystalline silicon active layer for use in a thin film transistor is provided. The method includes forming a buffer layer over a substrate, forming an amorphous silicon layer over the buffer layer, applying a catalytic metal to a surface of the amorphous silicon layer, crystallizing the amorphous silicon layer having the catalytic metal thereon into a polycrystalline silicon layer, annealing the polycrystalline silicon layer in an N2 gas atmosphere to stabilize the polycrystalline silicon layer, etching a surface of the polycrystalline silicon layer using an etchant, and patterning the polycrystalline silicon layer to form an island-shaped active layer.

Abstract: In a method of manufacturing a semiconductor device, a string structure including a selection transistor and a memory cell on a substrate. An insulation layer pattern is formed on the substrate to cover the string structure. The insulation layer pattern includes at least one opening exposing a portion of the substrate adjacent to the selection transistor. A seed layer including a single-crystalline material is formed in the opening. An amorphous thin film including an amorphous material is formed on the insulation layer pattern and the seed layer. The amorphous thin film is transformed into a single-crystalline thin film, using the single-crystalline material in the seed layer as a seed during a phase transition of the amorphous thin film, to form a channel layer on the insulation layer pattern and the seed layer. Therefore, the semiconductor device including the channel layer having the single-crystalline thin film may be manufactured.

Abstract: A method of fabricating an array substrate structure for a liquid crystal display device includes defining a display area and a non-display area on a substrate, the display area having a pixel TFT portion and a pixel electrode area, and the non-display area having an n-type driving TFT portion and a p-type driving TFT portion; forming a first gate electrode in the display area, a second and a third gate electrodes and a first capacitor electrode in the non-display area; an amorphous silicon layer on the substrate; crystallizing the amorphous silicon layer to a polycrystalline silicon layer and doping specific portions of the polycrystalline silicon layer with plurality of impurity concentrations; and forming a first semiconductor layer in the display area, a second and a third semiconductor layers and a second capacitor electrode in the non-display area.

Abstract: A silicon layer and a heat-retaining layer are formed on a substrate in turn, and a laser beam with a sharp energy density gradient is next utilized to perform a laser heating process for inducing super lateral growth crystallization occurred in part of the Si layer. The heat-retaining layer provides additional heating-enhancement function for the Si layer in crystallization so as to increase the super lateral growth length. Then, the laser beam is repeatedly moved to irradiate the substrate to finish the crystallization process for the full substrate.

Abstract: A silicon film is crystallized in a predetermined direction by selectively adding a metal element having a catalytic action for crystallizing an amorphous silicon and annealing. In manufacturing TFT using the crystallized silicon film, TFT provided such that the crystallization direction is roughly parallel to a current-flow between a source and a drain, and TFT provided such that the crystallization direction is roughly vertical to a current-flow between a source and a drain are manufactured. Therefore, TFT capable of conducting a high speed operation and TFT having a low leak current are formed on the same substrate.

Abstract: An exemplary method for fabricating a polysilicon layer (208) includes the following steps. A substrate (200) is provided, and a first amorphous silicon layer (203) is formed over the substrate. Portions of the first amorphous silicon layer are removed through a photolithograph process to form a plurality of crystallization seeds (205). A second amorphous silicon layer (206) is formed over the substrate and the crystallization seeds. A laser annealing process is conducted to crystallize the amorphous silicon layer into a polysilicon layer.

Abstract: A semiconductor device with a superlattice and method of making same includes forming a layer of amorphous silicon over a substrate, and forming a layer of nanocrystals by laser thermal annealing the layer of amorphous silicon. A gate dielectric is formed between the layer of amorphous silicon and the substrate. A dielectric layer is formed on the layer of amorphous silicon. The steps of forming the layer of amorphous silicon and forming the dielectric layer can be repeated. The thickness of the dielectric layer is between about 25 to 40 angstroms, and the thickness of the amorphous silicon layer is between about 30 to 50 angstroms. The average diameter of the nanocrystals is less than 40 angstroms.

Abstract: A cost-effective and simple method of fabricating strained semiconductor-on-insulator (SSOI) structures which avoids epitaxial growth and subsequent wafer bonding processing steps is provided. In accordance with the present invention, a strain-memorization technique is used to create strained semiconductor regions on a SOI substrate. The transistors formed on the strained semiconductor regions have higher carrier mobility because the Si regions have been strained. The inventive method includes (i) ion implantation to create a thin amorphization layer, (ii) deposition of a high stress film on the amorphization layer, (iii) a thermal anneal to recrystallize the amorphization layer, and (iv) removal of the stress film. Because the SOI substrate was under stress during the recrystallization process, the final semiconductor layer will be under stress as well. The amount of stress and the polaity (tensile or compressive) of the stress can be controlled by the type and thickness of the stress films.

Abstract: A laser beam pattern mask includes an opaque substrate and a plurality of transmission portions formed in the substrate to transmit light, wherein each of the transmission portions extend in a first direction while being uniformly spaced apart from one another by a predetermined distance in a second direction perpendicular to the first direction, each of the transmission portions including hexagonal cells arranged in the first direction and in contact with one another.

Abstract: A method of forming polysilicon, a thin film transistor (TFT) using the polysilicon, and a method of fabricating the TFT are disclosed. The method of forming the polysilicon comprises: forming an insulating layer on a substrate; forming a first electrode and a second electrode on the insulating layer; forming at least one heater layer on the insulating layer so as to connect the first electrode and the second electrode; forming an amorphous material layer containing silicon on the heater layer(s); forming a through-hole under the heater layer(s) by etching the insulating layer; and crystallizing the amorphous material layer into a polysilicon layer by applying a voltage between the first electrode and the second electrode so as to heat the heater layer(s).

Abstract: The present invention discloses the use of edge-angle-optimized solid phase epitaxy for forming hybrid orientation substrates comprising changed-orientation Si device regions free of the trench-edge defects typically seen when trench-isolated regions of Si are recrystallized to the orientation of an underlying single-crystal Si template after an amorphization step. For the case of amorphized Si regions recrystallizing to (100) surface orientation, the trench-edge-defect-free recrystallization of edge-angle-optimized solid phase epitaxy may be achieved in rectilinear Si device regions whose edges align with the (100) crystal's in-plane <100> directions.

Abstract: The invention relates to a laser treatment apparatus including a laser oscillator, an interlock provided in the laser oscillator, a movable table which moves with a certain movement period, a timer, an interlock provided in the timer, a sensor which can detect movement of the movable table, and a computer, in which the timer starts measuring time when the sensor senses passage of the movable table, and when the movable table does not pass the sensor even after the movement period, conduction between contacts of the interlock provided in the timer is blocked to operate the interlock in the laser oscillator, thereby stopping laser output. The invention also relates to a laser treatment method using the laser treatment apparatus.

Abstract: A method for crystallizing an amorphous semiconductor thin film using a non-metal seed epitaxial growth (NSEG) is provided. The method includes the steps of: forming a pair of non-metal seeds for inducing a crystallization of an amorphous semiconductor thin film at a predetermined distance on a transparent insulation substrate; depositing the amorphous semiconductor thin film on the insulation substrate; and heat-treating the insulation substrate to thereby epitaxially grow a poly-crystalline semiconductor thin film from the non-metal seeds, and to thus crystallize the amorphous semiconductor thin film. In the crystallization method, non-metal seeds are used instead of using crystallization induced metal to thereby epitaxially grow the poly-crystalline semiconductor thin film and to thus realize the amorphous semiconductor thin film without having metal pollution.

Abstract: The present invention is related to a polycrystalline silicon film containing Ni which is formed by crystallizing an amorphous silicon layer containing nickel. The present invention includes a polycrystalline silicon film wherein the polycrystalline film contains Ni atoms of which density ranges from 2×1017 to 5×1019 atoms/cm3 in average and comprises a plurality of needle-shaped silicon crystallites. In another aspect, the present invention includes a polycrystalline silicon film wherein the polycrystalline film contains Ni atoms of which density ranges from 2×1017 to 5×1019 atoms/cm3, comprises a plurality of needle-shaped silicon crystallites and is formed on an insulating substrate. Such a polysilicon film according to the present invention avoids metal contamination usually generated in a conventional method of metal induced crystallization.

Abstract: A process for manufacturing a semiconductor device, provides that a silicide layer is formed, an amorphous semiconductor layer is applied both to the silicide layer and to an open monocrystalline semiconductor region, adjacent to the silicide layer, and during a subsequent temperature treatment, the amorphous semiconductor layer is crystallized proceeding from the open, monocrystalline semiconductor region, acting as a crystallization nucleus, so that the silicide layer is covered at least partially by a crystallized, monocrystalline semiconductor layer.

Abstract: A semiconductor film having a crystalline structure is formed by using a metal element that assists the crystallization of the semiconductor film, and the metal element remaining in the film is effectively removed to decrease the dispersion among the elements. The semiconductor film or, typically, an amorphous silicon film having an amorphous structure is obtained based on the plasma CVD method as a step of forming a gettering site, by using a monosilane, a rare gas element and hydrogen as starting gases, the film containing the rare gas element at a high concentration or, concretely, at a concentration of 1×1020/cm3 to 1×1021/cm3 and containing fluorine at a concentration of 1×1015/cm3 to 1×1017/cm3.

Abstract: A method for crystallizing silicon is provided. The method includes: forming an amorphous silicon layer on a substrate; aligning a mask above the substrate, the mask being divided into a plurality of blocks, each block having at least two transmission patterns, the transmission patterns of one block and the transmission patterns of another adjacent block being complimentary with each other and the mask including at least two diffraction patterns disposed between the transmission patterns; forming a first crystallization region on the amorphous silicon layer by irradiating a laser beam through the transmission patterns of the mask; and displacing the substrate or the mask by a predetermined distance and irradiating a laser beam onto the substrate to recrystallize the crystallization region using the laser beam that passes through the diffraction patterns, and forming a second crystallization region using the laser beam that passes through the transmission patterns.

Abstract: The present invention relates to a method of manufacturing a semiconductor device having an excellent gettering effect. In this method, when phosphorus is added to a poly-Si film, which has been crystallized by the addition of a metal, to subject the resultant poly-Si film to the heat treatment to carry out gettering therefor, the device is performed for the shape of the island-like insulating film on the poly-Si film which is employed when implanting phosphorus. Thereby, the area of the boundary surface between the region to which phosphorus has been added and the region to which no phosphorus has been added is increased to enhance gettering efficiency.

Abstract: Provided are methods of forming nano crystals and method of manufacturing a memory device suing the same. In an example embodiment, a method of forming nano crystals may include forming an amorphous film on a substrate and converting the amorphous film into an oxide film having the nano crystals by annealing the amorphous film under oxidizing conditions under which part of the crystallized film is oxidized.

Abstract: A first laser beam is emitted from a first laser oscillator in a pulsed manner at a high repetition frequency, and converged onto a substrate by a first intermediate optical system 2 so as to form a slit-like first beam spot. A second laser beam is emitted from a second laser beam oscillator in a pulsed manner to rise precedent to and fall subsequent to the first laser beam, and converged onto the substrate by a second intermediate optical system so as to form a second beam spot similar in configuration to the first beam spot and to contain the first beam spot. Crystallization of a semiconductor thin film on the substrate is carried out while the substrate or the first, second beam spots are moved. Thereby, the whole semiconductor thin film is formed into a crystal surface that has grown in one direction and free from ridges. Thus, the semiconductor thin film has an extremely flat surface, extremely few defects, large crystal grains and high throughput.

Abstract: Methods are disclosed for fabricating a compound nitride semiconductor structure. An amorphous buffer layer that includes nitrogen and a group-III element is formed over a substrate disposed within a substrate processing chamber at a first temperature. The temperature within the chamber is increased to a second temperature at which the amorphous buffer layer coalesces into crystallites over the substrate. The substrate is exposed to a corrosive agent to destroy at least some of the crystallites. A crystalline nitride layer is formed over the substrate at a third temperature using the crystallites remaining after exposure to the corrosive agent as seed crystals. The third temperature is greater than the first temperature. The crystalline nitride layer also includes nitrogen and a group-III element.

Abstract: A method for forming a semiconductor structure including providing a semiconductor substrate, forming a metallic buffer layer over the semiconductor substrate, forming an amorphous semiconductor layer over the metallic buffer layer, and recrystallizing the amorphous semiconductor layer to form a crystalline semiconductor layer. A semiconductor structure includes a semiconductor substrate, a buffer layer comprising at least one of silicide and germanide formed over the semiconductor substrate, and a crystalline semiconductor layer formed over the metallic buffer layer.

Abstract: In a step of doping a silicon-based semiconductor film as a TFT active layer such as channel doping or the like, a protective film is formed by a CVD method as a pretreatment so as to prevent the silicon-based semiconductor film from being contaminated and etched. However, in the case of using the protective film formed by the CVD method, the problems in terms of throughput and production cost (an expensive apparatus is required) have been pointed out. The present invention is intended to solve the above-mentioned problems. Instead of the CVD method, a step of forming a chemical oxide film on a silicon-based semiconductor film is introduced as the pretreatment in the step of doping the silicon-based semiconductor film. Alternatively, a step is introduced in which unsaturated bonds present at the surface of the silicon-based semiconductor film are made to terminate with an element (for instance, oxygen) to be bonded with bonding energy higher than that of Si—H bonds.

Abstract: A method to enhance grain size in polysilicon films while avoiding formation of hemispherical grains (HSG) is disclosed. The method begins by depositing a first amorphous silicon film, then depositing silicon nuclei, which will act as nucleation sites, on the amorphous film. After deposition of silicon nuclei, crystallization, and specifically HSG, is prevented by lowering temperature and/or raising pressure. Next a second amorphous silicon layer is deposited over the first layer and the nuclei. Finally an anneal is performed to induce crystallization from the embedded nuclei. Thus grains are formed from the silicon bulk, rather than from the surface, HSG is avoided, and a smooth polysilicon film with enhanced grain size is produced.

Abstract: The present invention provides a semiconductor device, a method of manufacture therefor and an integrated circuit including the same. The semiconductor device 100, among other things, may include a substrate 110 having a lattice structure and having an implanted precipitate region 120 located within the lattice structure. Additionally, the semiconductor device 100 may include a dynamic defect 125 located within the lattice structure and proximate the implanted precipitate region 120, such that the implanted precipitate region 120 affects a position of the dynamic defect 125 within the lattice structure. Located over the substrate 110 in the aforementioned semiconductor device 100 is a gate structure 160.

Abstract: Methods of forming semiconductor structures characterized by a thin active silicon layer on an insulating substrate by a crystal imprinting or damascene approach. The methods include patterning an insulating layer to define a plurality of apertures, filling the apertures in the patterned insulating layer with amorphous silicon to define a plurality of amorphous silicon features, and re-growing the amorphous silicon features to define a thin active silicon layer consisting of regrown silicon features. The amorphous silicon features may be regrown such that a number have a first crystal orientation and another number have a different second crystal orientation.

Abstract: The present invention is to provide a thin film semiconductor device including a semiconductor thin film and an interlayer insulating film configured to cover the semiconductor thin film. In the interlayer insulating film, a hydrogen supply part and a blocking part against contamination are deposited in that order from a semiconductor thin film side.

Abstract: A method of manufacturing a thin-film semiconductor device substrate includes a step of forming a non-single crystalline semiconductor thin film on a base layer, and an annealing step of irradiating the non-single crystalline semiconductor thin film with an energy beam to enhance crystallinity of a non-single crystalline semiconductor constituting the non-single crystalline semiconductor thin film. The annealing step includes simultaneously irradiating the non-single crystalline semiconductor thin film with a plurality of energy beams to form a plurality of unit regions each including at least one irradiated region irradiated with the energy beam and at least one non-irradiated region that is not irradiated with the energy beam.

Abstract: It is an object of the present invention to provide a method for removing the metal element from the semiconductor film which is different from the conventional gettering step for removing the metal element from the semiconductor film. In the present invention, when Ni element (Ni) is used as the metal element and a silicon-based film (referred to as a silicon film) is used as the semiconductor film, nickel silicide segregates in the ridge formed in the silicon film by irradiating the pulsed laser light. Next, etching solution of hydrofluoric acid based etchant is used to remove the nickel silicide segregated in the ridge. When the surface of the semiconductor film is rough after removing the metal element by means of etching, the laser light may be irradiated to the semiconductor film under the insert atmosphere to flatten the surface thereof.

Abstract: A method for making condenser microphones includes: forming a fixed electrode layer structure of a plurality of fixed electrode units; forming a sacrificial layer of a plurality of sacrificial units on one side of the fixed electrode layer structure; forming a diaphragm layer structure of a plurality of diaphragm units on the sacrificial layer; forming a patterned mask layer on an opposite side of the fixed electrode layer structure opposite to the sacrificial layer; forming a plurality of etching channels, each of which extends through the patterned mask layer and the fixed electrode layer structure; removing a portion of the sacrificial layer of each of the sacrificial units so as to form a spacer between a respective one of the fixed electrode units and a respective one of the diaphragm units; and removing the patterned mask layer.

Abstract: After a bottom electrode film is formed, a ferroelectric film is formed on the bottom electrode film. Then, a heat treatment is performed for the ferroelectric film in an oxidizing atmosphere so as to crystallize the ferroelectric film. Then, a top electrode film is formed on the ferroelectric film. In the heat treatment (i.e., annealing for crystallization), a flow rate of oxidizing gas is set to be in a range of from 10 sccm to 100 sccm.

Abstract: A semiconductor device manufacturing method, includes a step of forming refractory metal silicide layers 13a to 13c in a partial area of a semiconductor substrate 10, a step of forming an interlayer insulating film 21 on the refractory metal silicide layers 13a to 13c, a step of forming a first conductive film 31, a ferroelectric film 32, and a second conductive film 33 in sequence on the interlayer insulating film 21, a step of forming a capacitor Q consisting of a lower electrode 31a, a capacitor dielectric film 32a, and an upper electrode 33a by patterning the first conductive film 33, the ferroelectric film 32, and the second conductive film 31, and a step of performing an annealing for an annealing time to suppress a agglomeration area of the refractory metal silicide layers 13a to 13c within an upper limit area.

Abstract: Provided are a method of manufacturing a thin film structure, a method of manufacturing a storage node having the same, a method of manufacturing a phase-change random access memory device having the same and a thin film structure, storage node and phase-change random access memory device formed using the same. The method of manufacturing the thin film structure may include the operations of obtaining a seed layer formed of a chalcogenide alloy, by supplying one or two selected from the group consisting of a Group IV-precursor, a Group V-precursor, and a Group VI-precursor to an upper surface of an amorphous material layer, and forming the thin film by supplying a Group IV-precursor, a Group V-precursor, and a Group VI-precursor to an upper surface of the seed layer.

Abstract: A mask for crystallization of amorphous silicon to polysilicon is provided. The mask includes a plurality of slit patterns for defining regions to be illuminated. The plurality of slit patterns are formed along a longitudinal first direction and the mask moves along a longitudinal second direction. The first longitudinal direction is substantially perpendicular to the second longitudinal direction. Each of the split patterns is deviated apart by substantially a same distance from another. Thus, the polysilicon using the mask are grown to be isotropic with respect to the horizontal and vertical directions.

Abstract: Provided are a fin structure and a method of manufacturing a fin transistor adopting the fin structure. A plurality of mesa structures including sidewalls are formed on the substrate. A semiconductor layer is formed on the mesa structures. A capping layer is formed on the semiconductor layer. Thus, the semiconductor layer is protected by the capping layer and includes a portion which is to be formed as a fin structure. A portion of an upper portion of the capping layer is removed by planarizing, and thus a portion of the semiconductor layer on upper surfaces of the mesa structures is removed. As a result, fin structures are formed on sides of the mesa structures to be isolated from one another. Therefore, a fin structure having a very narrow width can be formed, and a thickness and a location of the fin structure can be easily controlled.

Abstract: A method of forming a poly-silicon pattern may include forming an amorphous silicon pattern on a lower layer; forming a capping layer on the substrate covering the amorphous silicon pattern; poly-crystallizing the amorphous silicon pattern using an excimer laser annealing process; and removing the capping layer.

Abstract: An insulating film 103 for making an under insulating layer 104 is formed on a quartz or semiconductor substrate 100. Recesses 105a to 105d corresponding to recesses 101a to 101d of the substrate 100 are formed on the surface of the insulating film 103. The surface of this insulating film 103 is flattened to form the under insulating layer 104. By this flattening process, the distance L1, L2, . . . , Ln between the recesses 106a, 106b, 106d of the under insulating layer 104 is made 0.3 ?m or more, and the depth of the respective recesses is made 10 nm or less. The root-mean-square surface roughness of the surface of the under insulating film 104 is made 0.3 nm or less. By this, in the recesses 106a, 106b, 106d, it can be avoided to block crystal growth of the semiconductor thin film, and crystal grain boundaries can be substantially disappeared.

Abstract: A silicon nanowire substrate having a structure in which a silicon nanowire film having a fine line-width is formed on a substrate, a method of manufacturing the same, and a method of manufacturing a thin film transistor using the same. The method of manufacturing the silicon nanowire substrate includes preparing a substrate, forming an insulating film on the substrate, forming a silicon film on the insulating film, patterning the insulating film and the silicon film into a strip shape, reducing the line-width of the insulating film by undercut etching at least one lateral side of the insulating film, and forming a self-aligned silicon nanowire film on an upper surface of the insulating film by melting and crystallizing the silicon film.

Abstract: Integrated circuit device comprising a conductive layer and a poly-crystalline silicon layer, wherein the integrated circuit device further comprises an intermediate counter-stress layer. This intermediate counter-stress layer is arranged between the poly-crystalline silicon layer and the conductive layer, and enables stress-reduced crystallization of the poly-crystalline silicon layer. Further, the intermediate counter-stress layer is amorphous at and below a poly-silicon crystallization temperature.