Abstract: A method for forming a polycrystalline film, a polycrystalline film formed by the method and a thin film transistor fabricated from the polycrystalline film are provided. The method comprises the steps of: providing a substrate; forming a thermal conductor layer on the substrate; etching the thermal conductor layer until the substrate is exposed to form a thermal conductor pattern; forming a seed layer on the thermal conductor layer and the substrate; etching the seed layer to form seed crystals on both sidewalls of the thermal conductor; forming an amorphous layer on the substrate, the thermal conductor layer and the seed crystals; etching the amorphous layer; and recrystallizing the amorphous layer to form a polycrystalline layer.

Abstract: Provided is a method of crystallizing an amorphous silicon thin film transistor and a method of fabricating a polycrystalline thin film transistor using the same, in which the polycrystalline thin film transistor indicating leakage current characteristics of a level that is applicable for active matrix organic light emitting diode displays (AMOLEDs) can be manufactured by using a silicide seed induced lateral crystallization (SILC) method.

Abstract: A semiconductor device includes a semiconductor substrate formed with an active element, an oxidation resistant film formed over the semiconductor substrate so as to cover the active element, a ferroelectric capacitor formed over the oxidation resistance film, the ferroelectric capacitor having a construction of consecutively stacking a lower electrode, a ferroelectric film and an upper electrode, and an interlayer insulation film formed over the oxidation resistance film so as to cover the ferroelectric capacitor, wherein there are formed, in the interlayer insulation film, a first via-plug in a first contact hole exposing the first electrode and a second via-plug in a second contact hole exposing the lower electrode, and wherein there is formed another conductive plug in the interlayer insulation film in an opening exposing the oxidation resistant film.

Abstract: The methods and apparatus disclosed herein concern a process that may be referred to as a “soft anneal.” A soft anneal provides various benefits. Fundamentally, it reduces the internal stress in one or more silicon layers of a work piece. Typically, though not necessarily, the internal stress is a compressive stress. A particularly beneficial application of a soft anneal is in reduction of internal stress in a stack containing two or more layers of silicon. Often, the internal stress of a layer or group of layers in a stack is manifest as wafer bow. The soft anneal process can be used to reduce compressive bow in stacks containing silicon. The soft anneal process may be performed without causing the silicon in the stack to become activated.

Abstract: A method of forming a polycrystalline silicon layer and an atomic layer deposition apparatus used for the same. The method includes forming an amorphous silicon layer on a substrate, exposing the substrate having the amorphous silicon layer to a hydrophilic or hydrophobic gas atmosphere, placing a mask having at least one open and at least one closed portion over the amorphous silicon layer, irradiating UV light toward the amorphous silicon layer and the mask using a UV lamp, depositing a crystallization-inducing metal on the amorphous silicon layer, and annealing the substrate to crystallize the amorphous silicon layer into a polycrystalline silicon layer. This method and apparatus provide for controlling the seed position and grain size in the formation of a polycrystalline silicon layer.

Abstract: A method of manufacturing a semiconductor device, in which an amorphous silicon layer is formed into a shape of a gate electrode of a MOS transistor, and then impurity is implanted to a surface of a silicon substrate from a diagonal direction using the amorphous silicon layer as a mask.

Abstract: Embodiments of the invention include a method of producing a low contaminant, stoichiometrically controlled semiconductor material, the method comprising providing a colloidal suspension of a plurality of colloidally grown semiconductor nanocrystals, providing an inorganic ligand structure around a surface of the semiconductor nanocrystals of the plurality of semiconductor nanocrystals, drying the colloidal suspension into a powder, and pre-annealing the powder into a semiconductor material.

Abstract: A method of manufacturing an organic light emitting diode display, the method including forming an amorphous silicon layer on a buffer layer disposed on substrate, heat-treating the amorphous silicon film to form a microcrystalline silicon film; and scanning and irradiating a linear laser beam twice or more onto the microcrystalline silicon film to form a polysilicon film, wherein a subsequent scanning of the linear laser beam partially overlaps previous scanning of the linear laser beam in a width direction.

Abstract: Nanopatterned surfaces are prepared by a method that includes forming a block copolymer film on a substrate, annealing and surface reconstructing the block copolymer film to create an array of cylindrical voids, depositing a metal on the surface-reconstructed block copolymer film, and heating the metal-coated block copolymer film to redistribute at least some of the metal into the cylindrical voids. When very thin metal layers and low heating temperatures are used, metal nanodots can be formed. When thicker metal layers and higher heating temperatures are used, the resulting metal structure includes nanoring-shaped voids. The nanopatterned surfaces can be transferred to the underlying substrates via etching, or used to prepare nanodot- or nanoring-decorated substrate surfaces.

Abstract: According to one embodiment, a method is disclosed for manufacturing a display device. A film material layer is formed on a support substrate. A first heating process for the film material layer at a first temperature to form a film layer and a second heating process for a second region surrounding a first region at a second temperature higher than the first temperature are performed. The first region is provided in a central part of the film layer. A display layer is formed in the first region and a peripheral circuit section is formed at least in a part of the second region. A third heating process is performed for at least a part of the film layer at a third temperature higher than the second temperature. In addition, the film layer is peeled off from the support substrate.

Abstract: A method for forming a polysilicon layer includes forming an amorphous silicon layer over a substrate, performing a first thermal treatment of the amorphous silicon layer by performing an implantation with a gas that includes silicon (Si), and performing a second thermal treatment on the thermally treated layer at a temperature higher than a temperature of the first thermal treatment.

Abstract: A method can include depositing a thin metal film on a substrate of a sample, establishing a metal island on the substrate by patterning the thin metal film, and annealing the sample to de-wet the metal island and form a metal droplet from the metal island. The method can also include growing a nanowire on the substrate using the metal droplet as a catalyst, depositing a thin film of a semiconductor material on the sample, annealing the sample to allow for lateral crystallization to form a crystal grain, and patterning the crystal grain to establish a crystal island. An electronic device can be fabricated using the crystal island.

Abstract: In one aspect, a method of forming a polysilicon (poly-Si) layer and a method of manufacturing a thin film transistor (TFT) using the poly-Si layer is provided. In one aspect, the method of forming a polysilicon (poly-Si) layer includes forming an amorphous silicon (a-Si) layer on a substrate in a chamber; cleaning the chamber; removing fluorine (F) generated while cleaning the chamber; forming a metal catalyst layer for crystallization, on the a-Si layer; and crystallizing the a-Si layer into a poly-Si layer by performing a thermal processing operation.

Abstract: An object is to form a crystalline semiconductor film including a plurality of semiconductor regions with different average grain sizes by a simple manufacturing process. The surface of a crystalline silicon film 30b is irradiated with a laser beam 5, to crystallize the crystalline silicon film 30b. At this time, in the crystalline silicon film 30b below which a gate electrode 21 and a radiation portion 22 having a large area are provided, part of generated heat energy escapes to the radiation portion 22, and hence the crystalline silicon film 30b is insufficiently melted. For this reason, a formed first silicon region 30c1 has a large average grain size. On the other hand, in the crystalline silicon film 30b below which agate electrode 71 having a small area is provided, generated heat is resistant to escaping, and hence the crystalline silicon film 30b is completely melted. Thereby, the second silicon region 30c2 has a small average grain size.

Abstract: Provided are a crystallization apparatus and method, which prevent cracks from being generated, a method of manufacturing a thin film transistor (TFT), and a method of manufacturing an organic light emitting display apparatus. The crystallization apparatus includes a chamber for receiving a substrate, a first flash lamp and a second flash lamp, which are disposed facing each other within the chamber, wherein amorphous silicon layers are disposed on a first surface of the substrate facing the first flash lamp and a second surface of the substrate facing the second flash lamp, respectively.

Abstract: High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

Abstract: A method for treating semiconducting materials includes providing a semiconducting material having a crystalline structure, pre-heating a portion of the semiconducting material to a temperature less than the melting temperature of the semiconducting material, and then cooling the semiconducting material prior to exposing at least the portion of the semiconducting material to a heat source to create a melt pool, and cooling the semiconducting material.

Abstract: A method of processing a polycrystalline film on a substrate includes generating laser pulses, directing the laser pulses through a mask to generate patterned laser beams, each having a length l?, a width w?, and a spacing between adjacent beams d?; irradiating a region of the film with the patterned beams, said beams having an intensity sufficient to melt and to induce crystallization of the irradiated portion of the film, wherein the film region is irradiated n times; and after irradiation of each film portion, translating the film and/or the mask, in the x- and y-directions. The distance of translation in the y-direction is about l?/n??, where ? is a value selected to overlap the beamlets from one irradiation step to the next. The distance of translation in the x-direction is selected such that the film is moved a distance of about ?? after n irradiations, where ??=w?+d?.

Abstract: An indirect bandgap thin film semiconductor circuit can be combined with a compound semiconductor LED such as to provide an active matrix LED array that can have high luminous capabilities such as for a light projector application. In another example, a highly efficient optical detector is achievable through the combination of indirect and direct bandgap semiconductors. Applications can include display technologies, light detection, MEMS, chemical sensors, or piezoelectric systems. An LED array can provide structured illumination, such as for a light and pattern source for projection displays, such as without requiring spatial light modulation (SLM). An example can combine light from separate monolithic light projector chips, such as providing different component colors. An example can provide full color from a single monolithic light projector chip, such as including selectively deposited phosphors, such as to contribute individual component colors to an overall color of a pixel.

Abstract: One aspect of the present subject matter relates to a method for forming strained semiconductor film. According to an embodiment of the method, a crystalline semiconductor bridge is formed over a substrate. The bridge has a first portion bonded to the substrate, a second portion bonded to the substrate, and a middle portion between the first and second portions separated from the substrate. The middle portion of the bridge is bonded to the substrate to provide a compressed crystalline semiconductor layer on the substrate. Other aspects are provided herein.

Abstract: The disclosed subject matter relates to systems and methods for preparing epitaxially textured polycrystalline films. In one or more embodiments, the method for making a textured thin film includes providing a precursor film on a substrate, the film includes crystal grains having a surface texture and a non-uniform degree of texture throughout the thickness of the film, wherein at least a portion of the this substrate is transparent to laser irradiation; and irradiating the textured precursor film through the substrate using a pulsed laser crystallization technique at least partially melt the film wherein the irradiated film crystallizes upon cooling to form crystal grains having a uniform degree of texture.

Abstract: A thin film transistor (TFT), including a crystalline semiconductor pattern on a substrate, a gate insulating layer on the crystalline semiconductor pattern, the gate insulating layer having two first source/drain contact holes and a semiconductor pattern access hole therein, a gate electrode on the gate insulating layer, the gate electrode being between the two first source/drain contact holes, an interlayer insulating layer covering the gate electrode, the interlayer insulating layer having two second source/drain contact holes therein, and source and drain electrodes on the interlayer insulating layer, each of the source and drain electrodes being insulated from the gate electrode, and having a portion connected to the crystalline semiconductor pattern through the first and second source/drain contact holes.

Abstract: Methods for forming semiconductor devices include providing a crystalline template having an initial grain size, annealing the crystalline template, the annealed template having a final grain size larger than the initial grain size, forming a buffer layer over the annealed template, and forming a semiconductor layer over the buffer layer.

Abstract: A process and system for processing a thin film sample are provided. In particular, a beam generator can be controlled to emit at least one beam pulse. The beam pulse is then masked to produce at least one masked beam pulse, which is used to irradiate at least one portion of the thin film sample. With the at least one masked beam pulse, the portion of the film sample is irradiated with sufficient intensity for such portion to later crystallize. This portion of the film sample is allowed to crystallize so as to be composed of a first area and a second area. Upon the crystallization thereof, the first area includes a first set of grains, and the second area includes a second set of grains whose at least one characteristic is different from at least one characteristic of the second set of grains. The first area surrounds the second area, and is configured to allow an active region of a thin-film transistor (“TFT”) to be provided at a distance therefrom.

Abstract: A thin-film semiconductor device includes: a first gate line; a metal line; a first gate electrode extending from the first gate line; a second gate electrode on the first gate electrode; an insulating layer provided in a crossing area where the first gate line and the metal line cross; and a second gate line formed in the same layer as the second gate electrode, and on the first gate line in other than the crossing area, wherein the metal line is on the insulating layer, the second gate line and the second gate electrode are thicker than the first gate line and the first gate electrode, and an interface between the metal line and the insulating layer is positioned above a top surface of the second gate electrode, in a cross section in a direction in which the first and second gate lines extend.

Abstract: A semiconductor crystal substrate includes a substrate; and a protection layer formed by applying nitride on a surface of the substrate. The protection layer is in an amorphous state in a peripheral area at an outer peripheral part of the substrate, and the protection layer is crystallized in an internal area of the protection layer that is inside the peripheral area of the protection layer.

Abstract: A method of forming a memory device includes providing a substrate having a surface region, defining a cell region and first and second peripheral regions, sequentially forming a first dielectric material, a first wiring structure for a first array of devices, and a second dielectric material over the surface region, forming an opening region in the first peripheral region, the opening region extending in a portion of at least the first and second dielectric materials to expose portions of the first wiring structure and the substrate, forming a second wiring material that is overlying the second dielectric material and fills the opening region to form a vertical interconnect structure in the first peripheral region, and forming a second wiring structure from the second wiring material for a second array of devices, the first and second wiring structures being separated from each other and electrically connected by the vertical interconnect structure.

Abstract: A method of forming a layer of amorphous silicon oxide positioned between a layer of rare earth oxide and a silicon substrate. The method includes providing a crystalline silicon substrate and depositing a layer of rare earth metal on the silicon substrate in an oxygen deficient ambient at a temperature above approximately 500° C. The rare earth metal forms a layer of rare earth silicide on the substrate. A first layer of rare earth oxide is deposited on the layer of rare earth silicide with a structure and lattice constant substantially similar to the substrate. The structure is annealed in an oxygen ambience to transform the layer of rare earth silicide to a layer of amorphous silicon and an intermediate layer of rare earth oxide between the substrate and the first layer of rare earth oxide.

Abstract: A purpose of the invention is to provide a method for leveling a semiconductor layer without increasing the number and the complication of manufacturing processes as well as without deteriorating a crystal characteristic, and a method for leveling a surface of a semiconductor layer to stabilize an interface between the surface of the semiconductor layer and a gate insulating film, in order to achieve a TFT having a good characteristic. In an atmosphere of one kind or a plural kinds of gas selected from hydrogen or inert gas (nitrogen, argon, helium, neon, krypton and xenon), radiation with a laser beam in the first, second and third conditions is carried out in order, wherein the first condition laser beam is radiated for crystallizing a semiconductor film or improving a crystal characteristic; the second condition laser beam is radiated for eliminating an oxide film; and the third condition laser beam is radiated for leveling a surface of the crystallized semiconductor film.

Abstract: A method for forming a SnO-containing semiconductor film includes a first step of forming a SnO-containing film; a second step of forming an insulator film composed of an oxide or a nitride on the SnO-containing film to provide a laminated film including the SnO-containing film and the insulator film; and a third step of subjecting the laminated film to a heat treatment.

Abstract: A device and a method of forming a continuous polycrystalline Ge film having crystalline Ge islands is provided that includes depositing an amorphous Ge (a-Ge) layer on a substrate, oxidizing the top surface of the a-Ge layer to form a GeOx layer, depositing a seed layer of Al on the GeOx layer and catalyzing the Al seed layer, where Ge mass transport is generated from the underlying a-Ge layer to the Al seed layer through the GeOx layer by thermal annealing, where a continuous polycrystalline Ge film having crystalline Ge islands is formed on the Al seed layer.

Abstract: In one embodiment, a method for manufacturing a semiconductor device is disclosed. The method can include depositing a first amorphous film having a first impurity, depositing a third amorphous lower-layer film on the first amorphous film, forming microcrystals on the third amorphous lower-layer film, depositing a third amorphous upper-layer film on the third amorphous lower-layer film to cover the microcrystals, depositing a second amorphous film having a second impurity on the third amorphous upper-layer film, and radiating microwaves to crystallize the third amorphous lower-layer film and the third amorphous upper-layer film to form a third crystal layer, and crystallize the first amorphous film and the second amorphous film to form a first crystal layer and a second crystal layer.

Abstract: In one embodiment a method of forming a compressive polycrystalline semiconductive material layer is disclosed. The method comprises forming a polycrystalline semiconductive seed layer over a substrate and forming a silicon layer by depositing silicon directly on the polycrystalline silicon seed layer under amorphous process conditions at a temperature below 600 C.

Abstract: A method of fabricating a polycrystalline silicon thin that includes a metal layer forming operation of forming a metal layer on an insulating substrate, a first silicon layer forming operation of stacking a silicon layer on the metal layer formed in the metal layer forming operation, a first annealing operation of forming a silicide layer using by moving catalyst metal atoms from the metal layer to the silicon layer using an annealing process, a second silicon layer forming operation of stacking an amorphous silicon layer on the silicide layer, and a crystallization operation of crystallizing the amorphous silicon layer into crystalline silicon through the medium of particles of the silicide layer.

Abstract: It is an object to reduce characteristic variation among transistors and reduce contact resistance between an oxide semiconductor layer and a source electrode layer and a drain electrode layer, in a transistor where the oxide semiconductor layer is used as a channel layer. In a transistor where an oxide semiconductor is used as a channel layer, at least an amorphous structure is included in a region of an oxide semiconductor layer between a source electrode layer and a drain electrode layer, where a channel is to be formed, and a crystal structure is included in a region of the oxide semiconductor layer which is electrically connected to an external portion such as the source electrode layer and the drain electrode layer.

Abstract: A semiconductor thin-film manufacturing method includes: forming, above a substrate, an amorphous silicon film (precursor film) having a photoluminescence (PL) intensity greater than or equal to 0.65 when photon energy is 1.1 eV in a PL spectrum normalized to have a maximum PL intensity of 1; and annealing the amorphous silicon film to form a crystalline silicon film.

Abstract: Semiconductor devices and methods for making such devices are described. The semiconductor devices contain an epitaxial layer made by providing a semiconductor substrate containing an upper surface with a single-crystal structure; forming a layer on the upper surface of the substrate, wherein the layer comprises substantially the same material as the semiconductor substrate and comprises an amorphous or polycrystalline structure; and heating the layer using low temperature microwaves to change the amorphous structure to a single-crystal structure. The epitaxial layer can also be made by providing the semiconductor substrate with an upper surface of a single-crystal material and then forming an epitaxial layer on the substrate upper surface using microwaves at a wafer temperature less than about 550° C. In-situ or implanted dopants in the epitaxial layer can be activated using the same, or separate, low temperature microwave processing. Other embodiments are described.

Abstract: Si(1-v-w-x)CwAlxNv crystals in a mixed crystal state are formed. A method for manufacturing an easily processable Si(1-v-w-x)CwAlxNv substrate, a method for manufacturing an epitaxial wafer, a Si(1-v-w-x)CwAlxNv substrate, and an epitaxial wafer are provided. A method for manufacturing a Si(1-v-w-x)CwAlxNv substrate 10a includes the following steps. First, a Si substrate 11 is prepared. A Si(1-v-w-x)CwAlxNv layer 12 (0<v<1, 0<w<1, 0<x<1, and 0<v+w+x<1) is then grown on the Si substrate 11 by a pulsed laser deposition method.

Abstract: A method of crystallizing a silicon layer and a method of manufacturing a TFT, the method of crystallizing a silicon layer including forming a catalyst metal layer on a substrate; forming a catalyst metal capping pattern on the catalyst metal layer; forming a second amorphous silicon layer on the catalyst metal capping pattern; and heat-treating the second amorphous silicon layer to form a polycrystalline silicon layer.

Abstract: Method of producing a semiconductor device, comprising: a) providing a semiconductor substrate, b) providing an insulating layer on a top surface of the semiconductor substrate, c) making an amorphous layer in a top layer of said semiconductor substrate by a suitable implant, d) implanting a dopant into said semiconductor substrate through said insulating layer to provide said amorphous layer with a predetermined doping profile, said implant being performed such that said doping profile has a peak value located within said insulating layer, e) applying a solid phase epitaxial regrowth action to regrow said amorphous layer and activate said dopant.

Abstract: A system and method for enhancing the conversion efficiency of thin film photovoltaics. The thin film structure includes a photovoltaic absorbent layer covered by a confinement layer. A laser beam passes through the confinement layer and hits the photovoltaic absorbent layer. The laser can be pulsed to create localized rapid heating and cooling of the photovoltaic absorbent layer. The confinement layer confines the laser induced plasma plume creating a localized high-pressure condition for the photovoltaic absorbent layer. The laser beam can be scanned across specific regions of the thin film structure. The laser beam can be pulsed as a series of short pulses. The photovoltaic absorbent layer can be made of various materials including copper indium diselenide, gallium arsenide, and cadmium telluride. The photovoltaic absorbent layer can be sandwiched between a substrate and the confinement layer, and a molybdenum layer can be between the substrate and the photovoltaic absorbent layer.

Abstract: It is an object of the present invention to align the plane orientations of crystal grains of a semiconductor film crystallized by irradiation with a linear laser beam with a width of less than or equal to 5 ?m. By performing irradiation with the linear laser beam condensed by an aspheric cylindrical lens or a gradient index lens to completely melt the semiconductor film and scanning the linear laser beam, the completely melted semiconductor film is made to grow laterally. Because the linear beam is very narrow, the width of the semiconductor which is in a liquid state is also narrow, so the occurrence of turbulent flow in the liquid semiconductor is suppressed. Therefore, growth directions of adjacent crystal grains do not become disordered due to turbulent flow and are unformalized, and thus the plane orientations of the laterally grown crystal grains can be aligned.

Abstract: A method of forming a microelectromechanical systems (MEMS) device includes forming an electrode on a substrate. The method includes forming a structural layer on the substrate. The structural layer is disposed about a perimeter of the electrode and has a residual film stress gradient. The method includes releasing the structural layer to form a resonator coupled to the substrate. The residual film stress gradient deflects a first portion of the resonator out of a plane defined by a surface of the electrode.

Abstract: To form a semiconductor film with a thickness of 50 nm or less, which includes a large grain crystal by totally melting the semiconductor film with a laser beam. A projection having a triangular cross section is formed on the surface of a semiconductor film. The shape of the projection is a conical shape or a triangular prismatic shape. A laser beam which has entered a projection of the semiconductor film travels toward a substrate while being greatly refracted and totally reflected at the interface between the projection and the air. Further, since the laser beam enters the semiconductor film from a projection, the laser beam which is incident on the interface between an insulating film and a semiconductor is very likely totally reflected. Thus, when a laser beam enters a semiconductor film from a projection, the time during which the laser beam propagates through the semiconductor film is longer, which can increase the absorptance of the semiconductor film.

Abstract: Methods and apparatus for fabricating a semiconductor sheet are provided. In one aspect, a method for fabricating a semiconductor wafer includes applying a layer of semiconductor material across a portion of a setter material, introducing the setter material and the semiconductor material to a predetermined thermal gradient to form a melt, wherein the thermal gradient includes a predetermined nucleation and growth region, and forming at least one local cold spot in the nucleation and growth region to facilitate inducing crystal nucleation at the at least one desired location.

Abstract: An island-shaped single crystal semiconductor layer whose top surface has a plane within ±10° from a {211} plane is formed on an insulating surface; a non-single-crystal semiconductor layer is formed in contact with the top surface and a side surface of the single crystal semiconductor layer and on the insulating surface; the non-single-crystal semiconductor layer is irradiated with laser light to melt the non-single-crystal semiconductor layer, and to crystallize the non-single-crystal semiconductor layer formed on the insulating surface with use of the single crystal semiconductor layer as a seed crystal, so that a crystalline semiconductor layer is formed. A semiconductor device having an n-channel transistor and a p-channel transistor formed with use of the crystalline semiconductor layer is provided.

Abstract: An SOI substrate having a single crystal semiconductor layer the surface of which has high planarity is manufactured. A semiconductor substrate is doped with hydrogen to form a damaged region containing a large amount of hydrogen. After a single crystal semiconductor substrate and a supporting substrate are bonded to each other, the semiconductor substrate is heated to separate the single crystal semiconductor substrate in the damaged region. While a heated high-purity nitrogen gas is sprayed on a separation surface of a single crystal semiconductor layer which is separated from the single crystal semiconductor substrate and irradiation with a microwave is performed from the back side of the supporting substrate, the separation surface is irradiated with a laser beam. The single crystal semiconductor layer is melted by irradiation with the laser beam, so that the surface of the single crystal semiconductor layer is planarized and re-single-crystallization thereof is performed.

Abstract: An integrated circuit fabrication apparatus is configured to fabricate an integrated circuit with at least one p-FinFET device and at least one n-FinFET device. A bonding control processor is configured to bond a first silicon layer having a first crystalline orientation to a second silicon layer having a second crystalline orientation that is different from the first crystalline orientation. A material growth processor is configured to form a volume of material extending through the first silicon layer from the second layer up to the surface of first layer. The material has a crystalline orientation that substantially matches the crystalline orientation of second layer. An etching processor is configured to selectively etch areas of the surface of the first layer that are outside of the region to create a first plurality of fins and areas inside the region to create a second plurality of fins.

Abstract: In one embodiment a method of forming a compressive polycrystalline semiconductive material layer is disclosed. The method comprises forming a polycrystalline semiconductive seed layer over a substrate and forming a silicon layer by depositing silicon directly on the polycrystalline silicon seed layer under amorphous process conditions at a temperature below 600 C.

Abstract: One aspect of the present subject matter relates to a method for forming strained semiconductor film. According to an embodiment of the method, a crystalline semiconductor bridge is formed over a substrate. The bridge has a first portion bonded to the substrate, a second portion bonded to the substrate, and a middle portion between the first and second portions separated from the substrate. The middle portion of the bridge is bonded to the substrate to provide a compressed crystalline semiconductor layer on the substrate. Other aspects are provided herein.