Utilizing Wave Energy (e.g., Laser, Electron Beam, Etc.) Patents (Class 438/487)
  • Publication number: 20140357065
    Abstract: The embodiments described herein generally relate to methods for forming an amorphous silicon structure that may be used in thin film transistor devices. In embodiments disclosed herein, the amorphous silicon layer is deposited using a silicon-based gas with an activation gas comprising a high concentration of inert gas and a low concentration of hydrogen-based gas. The activation gas combination allows for a good deposition profile of the amorphous silicon layer from the edge of the shadow frame which is translated to the polycrystalline silicon layer post-annealing.
    Type: Application
    Filed: May 19, 2014
    Publication date: December 4, 2014
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Qunhua WANG, Lai ZHAO, Soo Young CHOI
  • Publication number: 20140357066
    Abstract: A method of crystallising a thin film (220) including the steps of: depositing a thin film (220) on a substrate (210; and exposing the thin film (220) as deposited on the substrate (210) and the substrate (210) to a plasma for a time period of greater than 5 minutes, wherein: the thin film (220) is one of an amorphous magneto optic material, an amorphous electro optic material or a nitride material; a gas (130) is excited with a radio frequency (RF) field to form the plasma; the thin film (220) and the substrate (210) are, in the course of being exposed to the plasma, heated to temperatures of between 400° C. and 550° C. by the plasma; and the thin film (220) is at least partially crystallised by the plasma.
    Type: Application
    Filed: September 6, 2012
    Publication date: December 4, 2014
    Applicant: Panorama Synergy, Ltd.
    Inventor: Roger Dunstan Jeffery
  • Patent number: 8895416
    Abstract: Systems and methods for semiconductor device PN junction fabrication are provided. In one embodiment, a method for fabricating an electrical device having a P-N junction comprises: depositing a layer of amorphous semiconductor material onto a crystalline semiconductor base, wherein the crystalline semiconductor base comprises a crystalline phase of a same semiconductor as the amorphous layer; and growing the layer of amorphous semiconductor material into a layer of crystalline semiconductor material that is epitaxially matched to the lattice structure of the crystalline semiconductor base by applying an optical energy that penetrates at least the amorphous semiconductor material.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: November 25, 2014
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Bhushan Sopori, Anikara Rangappan
  • Patent number: 8896034
    Abstract: Radio frequency and microwave devices and methods of use are provided herein. According to some embodiments, the present technology may comprise an ohmic layer for use in a field effect transistor that includes a plurality of strips disposed on a substrate, the plurality of strips comprising alternating source strips and drain strips, with adjacent strips being spaced apart from one another to form a series of channels, a gate finger segment disposed in each of the series of channels, and a plurality of gate finger pads disposed in an alternating pattern around a periphery of the plurality of strips such that each gate finger segment is associated with two gate finger pads.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: November 25, 2014
    Assignee: Sarda Technologies, Inc.
    Inventor: James L. Vorhaus
  • Patent number: 8890170
    Abstract: There is provided a silicon carbide substrate composed of silicon carbide, including encapsulated regions inside, which form incoherent boundaries between the silicon carbide and the encapsulated regions, wherein propagation of stacking faults in the silicon carbide is blocked.
    Type: Grant
    Filed: November 15, 2011
    Date of Patent: November 18, 2014
    Assignee: Hoya Corporation
    Inventors: Hiroyuki Nagasawa, Takamitsu Kawahara, Kuniaki Yagi, Naoki Hatta
  • Patent number: 8889519
    Abstract: The present invention discloses a semiconductor device, comprising: a substrate, a gate stack structure on the substrate, source and drain regions in the substrate on both sides of the gate stack structure, and a channel region between the source and drain regions in the substrate, characterized in that at least one of the source and drain regions comprises a GeSn alloy. In accordance with the semiconductor device and method for manufacturing the same of the present invention, GeSn stressed source and drain regions with high concentration of Sn is formed by implanting precursors and performing a laser rapid annealing, thus the device carrier mobility of the channel region is effectively enhanced and the device drive capability is further improved.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: November 18, 2014
    Assignee: The institute of Microelectronics Chinese Academy of Science
    Inventors: Xiaolong Ma, Huaxiang Yin, Zuozhen Fu
  • Patent number: 8883656
    Abstract: High throughput systems and processes for recrystallizing thin film semiconductors that have been deposited at low temperatures on a substrate are provided. A thin film semiconductor workpiece is irradiated with a laser beam to melt and recrystallize target areas of the surface exposed to the laser beam. The laser beam is shaped into one or more beamlets using patterning masks. The mask patterns have suitable dimensions and orientations to pattern the laser beam radiation so that the areas targeted by the beamlets have dimensions and orientations that are conducive to semiconductor recrystallization. The workpiece is mechanically translated along linear paths relative to the laser beam to process the entire surface of the work piece at high speeds. Position sensitive triggering of a laser can be used to generate laser beam pulses to melt and recrystallize semiconductor material at precise locations on the surface of the workpiece while it is translated on a motorized stage.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: November 11, 2014
    Assignee: The Trustees of Columbia University in the City of New York
    Inventor: James S. Im
  • Patent number: 8883266
    Abstract: A method of fabricating quantum confinements is provided. The method includes depositing, using a deposition apparatus, a material layer on a substrate, where the depositing includes irradiating the layer, before a cycle, during a cycle, and/or after a cycle of the deposition to alter nucleation of quantum confinements in the material layer to control a size and/or a shape of the quantum confinements. The quantum confinements can include quantum wells, nanowires, or quantum dots. The irradiation can be in-situ or ex-situ with respect to the deposition apparatus. The irradiation can include irradiation by photons, electrons, or ions. The deposition is can include atomic layer deposition, chemical vapor deposition, MOCVD, molecular beam epitaxy, evaporation, sputtering, or pulsed-laser deposition.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: November 11, 2014
    Assignees: The Board of Trustees of the Leland Stanford Junior University, Honda Patents & Technologies North America, LLC
    Inventors: Timothy P. Holme, Andrei Iancu, Hee Joon Jung, Michael C Langston, Munekazu Motoyama, Friedrich B. Prinz, Takane Usui, Hitoshi Iwadate, Neil Dasgupta, Cheng-Chieh Chao
  • Publication number: 20140319468
    Abstract: Systems including and methods for forming a backplane for an electronic display are presented. The backplane includes interlaced crystallized regions, and the interlaced crystallized regions include at least a left column of crystallized regions and a right column of crystallized regions. The left and right columns include rows of crystallized regions with gaps disposed between each of the rows. Furthermore, each crystallized region in the left column extends into a corresponding gap in the right column, and each crystallized region in the right column extends into a corresponding gap in the left column.
    Type: Application
    Filed: April 25, 2013
    Publication date: October 30, 2014
    Applicant: APPLE INC.
    Inventors: Yu Cheng Chen, Hiroshi Osawa, Shih Chang Chang
  • Patent number: 8865482
    Abstract: A method of detecting the circular uniformity of semiconductor circular contact holes. Several detection circuit structures are disposed on the semiconductor wafer: N-type active regions and P-type active regions; silicon dioxide layers separate the N-type active regions from the P-type active regions; the N-type active regions are formed in the P well and the P-type active regions are formed in the N well; polysilicon gates bridge the N-type active regions and the P-type active regions; gate oxide layers insulate the P-type regions and the N-type regions from the polysilicon gates, so that the P-type regions and the N-type regions are independent; the N-type active regions connect with circular contact holes while the P-type active regions and the polysilicon gates connect with oval contact holes; a electron beam scanner detects the circular uniformity of the contact holes. This invention advantageously reflects effectively and comprehensively the circular uniformity of the contact holes.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: October 21, 2014
    Assignee: Shanghai Huali Microelectronics Corporation
    Inventors: Kai Wang, HungLin Chen, Yin Long, Qiliang Ni, MingShen Kuo
  • Patent number: 8865603
    Abstract: Laser annealing systems and methods for annealing a semiconductor wafer with ultra-short dwell times are disclosed. The laser annealing systems can include one or two laser beams that at least partially overlap. One of the laser beams is a pre-heat laser beam and the other laser beam is the annealing laser beam. The annealing laser beam scans sufficiently fast so that the dwell time is in the range from about 1 ?s to about 100 ?s. These ultra-short dwell times are useful for annealing product wafers formed from thin device wafers because they prevent the device side of the device wafer from being damaged by heating during the annealing process. Embodiments of single-laser-beam annealing systems and methods are also disclosed.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: October 21, 2014
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Serguei Anikitchev
  • Patent number: 8865578
    Abstract: An embodiment is directed to a method of manufacturing a polycrystalline silicon layer, the method including providing a crystallization substrate, the crystallization substrate having an amorphous silicon layer on a first substrate, providing a reflection substrate, the reflection substrate having a first region with a reflection panel therein and a second region without the reflection panel, disposing the crystallization substrate and the reflection substrate on one another, and selectively crystallizing the amorphous silicon layer by directing a laser beam onto the crystallization substrate and the reflection substrate, and reflecting the laser beam from the reflection panel.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: October 21, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Jin Chang, Jae-Hwan Oh, Won-Kyu Lee, Seong-Hyun Jin, Jae-Beom Choi
  • Patent number: 8865529
    Abstract: A thin-film transistor device manufacturing method and others according to the present disclosure includes: forming a plurality of gate electrodes above a substrate; forming a gate insulating layer on the plurality of gate electrodes; forming an amorphous silicon layer on the gate insulating layer; forming a buffer layer and a light absorbing layer above the amorphous silicon layer; forming a crystalline silicon layer by crystallizing the amorphous silicon layer with heat generated by heating the light absorbing layer using a red or near infrared laser beam; and forming a source electrode and a drain electrode on the crystalline silicon layer in a region that corresponds to each of the plurality of gate electrodes, and film thicknesses of the gate insulating layer, the amorphous silicon layer, the buffer layer, and the light absorbing layer satisfy predetermined expressions.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: October 21, 2014
    Assignee: Panasonic Corporation
    Inventor: Yuta Sugawara
  • Publication number: 20140308804
    Abstract: A method for forming the crystalline thin film according to an implementation of the present invention includes: preparing a substrate; forming a non-crystalline thin film above the substrate; and crystallizing at least a predetermined region in the non-crystalline thin film, by irradiating the non-crystalline thin film with a laser beam having a predetermined wavelength and scanned relative to the substrate. In the preparing, a direction of a largest residual stress on the substrate is identified. In the crystallizing, the laser beam is scanned in the identified direction of the largest residual stress.
    Type: Application
    Filed: November 29, 2011
    Publication date: October 16, 2014
    Applicant: PANASONIC CORPORATION
    Inventor: Kenichirou Nishida
  • Publication number: 20140306194
    Abstract: A flexible substrate, a method of manufacturing the same, and an organic light emitting diode display, the flexible substrate including a first flexible layer; a polysilicon layer on the first flexible layer, the polysilicon layer having a plurality of protrusions on a surface thereof; and a second flexible layer on the polysilicon layer.
    Type: Application
    Filed: September 13, 2013
    Publication date: October 16, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yong-Jin KIM, Sang-Hyun JUN
  • Publication number: 20140308803
    Abstract: The invention discloses a method and a device of improving crystallization ratio of polysilicon, which is applied to the process that the amorphous silicon layer converts into the polysilicon layer. More specifically, superposing at least two pulse laser beams into a superposed pulse laser beam. The pulse width of the superposed pulse laser beam is larger than each pulse laser beam. Next, utilizing the superposed pulse laser beam to irradiate onto the amorphous silicon layer for transforming the amorphous silicon layer into polysilicon layer. The superposed pulse laser beam irradiates onto the surface of the amorphous silicon layer. The amorphous silicon layer is transformed into the polysilicon layer. Consequently, the crystallization ratio of polysilicon is improved.
    Type: Application
    Filed: December 2, 2013
    Publication date: October 16, 2014
    Applicant: EverDisplay Optronics (Shanghai) Limited
    Inventors: ShangHua Chung, YuChun Yeh
  • Patent number: 8859403
    Abstract: Systems, methods, and products of processes consistent with the innovations herein relate to aspects involving crystallization of layers on substrates. In one exemplary implementation, there is provided a method of fabricating a device. Moreover, such method may include placing an amorphous/poly material on a substrate and heating the material via a sub-melt laser anneal process to transform the material into crystalline form.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: October 14, 2014
    Assignee: GigaSi Solar, Inc.
    Inventor: Venkatraman Prabhakar
  • Patent number: 8853062
    Abstract: A laser crystallization device includes a first light source providing a first light and a second light source providing a second light. The device further includes a first lens set receiving the first light to generate a first transmitted light, the first transmitted light having a first profile, the first profile having a first profile error portion and a first non-error portion. The device further includes a second lens set receiving the second light to generate a second transmitted light, the second transmitted light having a second profile, the second profile having a second profile error portion and a second non-error portion, the second profile error portion corresponding to the first non-error portion, the second non-error portion corresponding to the first profile error portion. The device further includes an optical system combining the first transmitted light with the second transmitted light.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: October 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Hiroshi Okumura
  • Patent number: 8853590
    Abstract: A device for irradiating a laser beam onto an amorphous silicon thin film formed on a substrate. The device includes: a stage mounting the substrate; a laser oscillator for generating a laser beam; a projection lens for focusing and guiding the laser beam onto the thin film; a reflector for reflecting the laser beam guided onto the thin film; a controller for controlling a position of the reflector; and an absorber for absorbing the laser beam reflected by the reflector.
    Type: Grant
    Filed: November 6, 2007
    Date of Patent: October 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun-Jae Kim, Myung-Koo Kang
  • Patent number: 8846551
    Abstract: The surface of a material is textured and by exposing the surface to pulses from an ultrafast laser. The laser treatment causes pillars to form on the treated surface. These pillars provide for greater light absorption. Texturing and crystallization can be carried out as a single step process. The crystallization of the material provides for higher electric conductivity and changes in optical and electronic properties of the material. The method may be performed in vacuum or a gaseous environment. The gaseous environment may aid in texturing and/or modifying physical and chemical properties of the surfaces. This method may be used on various material surfaces, such as semiconductors, metals and their alloys, ceramics, polymers, glasses, composites, as well as crystalline, nanocrystalline, polycrystalline, microcrystalline, and amorphous phases.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: September 30, 2014
    Assignee: University of Virginia Patent Foundation
    Inventors: Mool C. Gupta, Barada K. Nayak
  • Patent number: 8846505
    Abstract: A method for growing islands of semiconductor monocrystals from a solution on an amorphous substrate includes the procedures of depositing a semiconductor-metal mixture layer, applying lithography and etching for forming at least one platform, heating the at least one platform, and saturating the semiconductor-metal solution until a monocrystal of the semiconductor component is formed. The procedure of depositing a semiconductor-metal mixture layer, includes a semiconductor component and at least one other metal component, is performed on top of the amorphous substrate. The procedure of applying lithography and etching to the semiconductor-metal mixture layer and a portion of the amorphous substrate is performed for forming at least one platform, the at least one platform having a top view shape corresponding to crystal growth direction and habit respective of the semiconductor component.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: September 30, 2014
    Assignee: SKOKIE Swift Corporation
    Inventor: Moshe Einav
  • Publication number: 20140287571
    Abstract: A first amorphous silicon layer is formed over a substrate and a second amorphous silicon layer is formed over the first amorphous silicon layer. When a laser annealing process is performed, the second amorphous silicon layer absorbs more laser light than the first amorphous silicon layer does. The first amorphous silicon layer crystallizes into a microcrystalline silicon layer and the second amorphous silicon layer crystallizes into a polysilicon layer. During the laser annealing process, light interference between the first amorphous silicon layer and an underlying buffer layer is eliminated owing to that the second amorphous silicon layer absorbs more laser light. The laser fringe is eliminated. The microcrystalline silicon layer with better crystalline uniformity can serve as an active layer for TFTs in the display area of an OLED display to improve its illumination uniformity.
    Type: Application
    Filed: June 5, 2014
    Publication date: September 25, 2014
    Inventors: Hanson Liu, Ryan Lee
  • Publication number: 20140256118
    Abstract: A method for forming polysilicon using high energy sources of radiation includes the steps of providing a laser system which has at least two laser sources with different wavelengths, a dichroic mirror, a reflecting mirror and a substrate; generating a laser beam by the laser sources to irradiate towards the substrate perpendicularly by the dichroic mirror and the reflecting mirror which are faced to the laser source and meet the laser sources at a certain angle; placing the reflecting mirror above the dichroic mirror; placing the a semiconductor thin-film material on the substrate. The advantages of the above technical solution are that as follows: the crystallization rate of poly-silicon is effectively increased; the usage frequency of the excimer laser is reduced; the cost thereof is reduced; the throughput of annealing is affectively improved.
    Type: Application
    Filed: January 8, 2014
    Publication date: September 11, 2014
    Applicant: EverDisplay Optronics (Shanghai) Limited
    Inventor: YuChun Yeh
  • Patent number: 8828836
    Abstract: A method for fabricating a dynamic random access memory (DRAM) capacitor stack is disclosed wherein the stack includes a first electrode, a dielectric layer, and a second electrode. The first electrode is formed from a conductive binary metal. A dielectric layer is formed over the first electrode. The dielectric layer is subjected to a milliseconds anneal process that serves to crystallize the dielectric material and decrease the concentration of oxygen vacancies.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: September 9, 2014
    Assignees: Intermolecular, Inc., Elpida Memory, Inc.
    Inventors: Karthik Ramani, Hiroyuki Ode, Sandra Malhotra
  • Patent number: 8828853
    Abstract: In one embodiment, a method of manufacturing a semiconductor device includes forming an amorphous semiconductor film on a substrate. The method further includes annealing the amorphous semiconductor film by irradiating the substrate with a microwave to form a polycrystalline semiconductor film from the amorphous semiconductor film. The method further includes forming a transistor whose channel is the polycrystalline semiconductor film.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: September 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonori Aoyama, Kiyotaka Miyano
  • Publication number: 20140231812
    Abstract: A method of thin film formation includes: preparing a substrate; forming a thin film above the substrate; and crystallizing the thin film by irradiating the thin film with a light beam, in which the crystallizing includes steps of: crystallizing the thin film in a first region into a first crystalline thin film by irradiating the first region while scanning a first light beam relative to the substrate, the first region including at least one of: edge portions of the substrate; and a region through which a cutting line passes when the substrate is cut; and subsequently crystallizing the thin film in a second region into a second crystalline thin film by irradiating at least the second region while scanning a second light beam relative to the substrate, and the thin film has a higher absorption ratio of the second light beam than that of the first crystalline thin film.
    Type: Application
    Filed: May 1, 2014
    Publication date: August 21, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Kenichirou NISHIDA, Tomohiko ODA, Yui SAITOU
  • Publication number: 20140231813
    Abstract: A thin-film device includes: a first device unit having a first gate electrode and a first crystalline silicon thin film located opposite to the first gate electrode; and a second device unit having a second gate electrode and a second crystalline silicon thin film located opposite to the second gate electrode. The first crystalline silicon thin film includes a strip-shaped first area and a second area smaller than the strip-shaped first area in average grain size. The first device unit has, as a channel, at least a part of the strip-shaped first area. The second silicon thin film includes a second crystalline area smaller than the strip-shaped first area in average grain size. The second device unit has the second crystalline area as a channel. The strip-shaped first area includes crystal grains in contact with the second area on each side of the strip-shaped first area.
    Type: Application
    Filed: September 26, 2012
    Publication date: August 21, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Tomohiko Oda, Takahiro Kawashima
  • Patent number: 8803155
    Abstract: According to an aspect of the present invention, there is provided a thin-film transistor (TFT) sensor, including a bottom gate electrode on a substrate, an insulation layer on the bottom gate electrode, an active layer in a donut shape on the insulation layer, the active layer including a channel through which a current generated by a charged body flows, an etch stop layer on the active layer, the etch stop layer including a first contact hole and a second contact hole, and a source electrode and a drain electrode burying the first and second contact holes, the source and drain electrodes being disposed on the etch stop layer so as to face each other.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: August 12, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Mu-Gyeom Kim, Chang-Mo Park
  • Patent number: 8796111
    Abstract: According to one embodiment, stacked layers of a nitride semiconductor include a substrate, a single crystal layer and a nitride semiconductor layer. The substrate does not include a nitride semiconductor and has a protrusion on a major surface. The single crystal layer is provided directly on the major surface of the substrate to cover the protrusion, and includes a crack therein. The nitride semiconductor layer is provided on the single crystal layer.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: August 5, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideto Sugawara, Masaaki Onomura
  • Patent number: 8778719
    Abstract: The linear semiconductor substrate 1 or 2 of the present invention comprises at least one desired thin film 4 formed on a linear substrate 3 having a length ten or more times greater than a width, thickness, or diameter of the linear substrate itself. Adopting semiconductor as the thin film 4 forms a linear semiconductor thin film. The linear semiconductor substrate 1 or 2 of the present invention is produced by utilizing a fiber-drawing technique which is a fabricating technique of optical fibers.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: July 15, 2014
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Toshihiro Nakamura, Nobuaki Orita, Hisashi Koaizawa, Kenkichi Suzuki, Hiroshi Kuraseko, Michio Kondo
  • Patent number: 8778746
    Abstract: A thin-film transistor device manufacturing method forms a plurality of gate electrodes above a substrate. A silicon nitride layer is formed on the plurality of gate electrodes. A silicon oxide layer is formed on the silicon nitride layer. An amorphous silicon layer is formed on the silicon oxide layer. The amorphous silicon layer is crystallized using predetermined laser light to produce a crystalline silicon layer. A source electrode and a drain electrode are formed on the crystalline silicon layer in a region that corresponds to each of the plurality of gate electrodes. A film thickness of the silicon oxide layer, a film thickness of the silicon nitride layer, and a film thickness of the amorphous silicon layer satisfy predetermined conditional expressions.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: July 15, 2014
    Assignee: Panasonic Corporation
    Inventor: Yuta Sugawara
  • Patent number: 8765618
    Abstract: A thermal processing apparatus and method in which a first laser source, for example, a CO2 emitting at 10.6 ?m is focused onto a silicon wafer as a line beam and a second laser source, for example, a GaAs laser bar emitting at 808 nm is focused onto the wafer as a larger beam surrounding the line beam. The two beams are scanned in synchronism in the direction of the narrow dimension of the line beam to create a narrow heating pulse from the line beam when activated by the larger beam. The energy of GaAs radiation is greater than the silicon bandgap energy and creates free carriers. The energy of the CO2 radiation is less than the silicon bandgap energy so silicon is otherwise transparent to it, but the long wavelength radiation is absorbed by the free carriers.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: July 1, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Dean Jennings, Haifan Liang, Mark Yam, Vijay Parihar, Abhilash J. Mayur, Aaron Muir Hunter, Bruce E. Adams, Joseph M. Ranish
  • Patent number: 8759205
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device, wherein an amorphous semiconductor film comprising a microcrystal is annealed using a microwave, to crystallize the amorphous semiconductor film comprising the microcrystal using the microcrystal as a nucleus.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: June 24, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonori Aoyama, Yusuke Oshiki, Kiyotaka Miyano
  • Patent number: 8759199
    Abstract: A method of selectively growing a plurality of semiconductor carbon nanotubes using light irradiation. The method includes disposing a plurality of nanodots, which include a catalyst material, on a substrate; growing a plurality of carbon nanotubes from the plurality of nanodots, and irradiating light onto the nanodot to selectively grow the plurality of semiconductor carbon nanotubes.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: June 24, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-mook Choi, Jae-young Choi, Jin Zhang, Guo Hong
  • Publication number: 20140167049
    Abstract: A method of manufacturing a substrate having a thin film thereabove includes: forming a thin film above the substrate; and crystallizing at least a predetermined area of the silicon thin film into a crystallized area through relative scan of the silicon thin film which is performed while the thin film is being irradiated with a continuous wave light beam, wherein in the crystallizing, a projection of the light beam on the thin film has a major axis in a direction crossing a direction of the relative scan, and the formed crystallized area includes a strip-shaped first area extending in the direction crossing the direction of the relative scan and a second area adjacent to the strip-shaped first area, the strip-shaped first area including crystal grains having an average grain size larger than that of crystal grains in the second area.
    Type: Application
    Filed: February 24, 2014
    Publication date: June 19, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Tomohiko ODA, Takahiro KAWASHIMA
  • Patent number: 8753990
    Abstract: The surface of a material is textured and crystallized in a single step by exposing the surface to pulses from an ultrafast laser. The laser treatment causes pillars to form on the treated surface. These pillars provide for greater light absorption. The crystallization of the material provides for higher electric conductivity and changes in optical properties of the material. The method may be performed in a gaseous environment, so that laser assisted chemical etching will aid in the texturing of the surface. This method may be used on various material surfaces, such as semiconductors, metals, ceramics, polymers, and glasses.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: June 17, 2014
    Assignee: University of Virginia Patent Foundation
    Inventors: Mool C. Gupta, Barada K. Nayak
  • Publication number: 20140162440
    Abstract: Methods of forming semiconductor devices may be provided. A method of forming a semiconductor device may include patterning first and second material layers to form a first through region exposing a substrate. The method may include forming a first semiconductor layer in the first through region on the substrate and on sidewalls of the first and second material layers. In some embodiments, the method may include forming a buried layer filling the first through region on the first semiconductor layer. In some embodiments, the method may include removing a portion of the buried layer to form a second through region between the sidewalls of the first and second material layers. Moreover, the method may include forming a second semiconductor layer in the second through region.
    Type: Application
    Filed: November 18, 2013
    Publication date: June 12, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jung Ho Kim, Daehyun JANG, Myoungbum LEE, Kihyun HWANG, Sangryol YANG, Yong-Hoon SON, Ju-Eun KIM, Sunghae LEE, Dongwoo KIM, JinGyun KIM
  • Publication number: 20140158996
    Abstract: A method of manufacturing a polysilicon (poly-Si) layer, a method of manufacturing an organic light-emitting display apparatus using the method, and an organic light-emitting display apparatus manufactured by using the method. The method includes forming an amorphous silicon (a-Si) layer on a substrate having first and second areas, thermally treating the a-Si layer to partially crystallize the a-Si layer into a partially crystallized Si layer, removing a thermal oxide layer through a thermal treatment, selectively irradiating the first areas with laser beams to crystallize the partially crystallized Si layer.
    Type: Application
    Filed: April 24, 2013
    Publication date: June 12, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: Sang-Ho Moon, Jong-Moo Huh, Sung-Ho Kim
  • Publication number: 20140159047
    Abstract: The present invention provides a manufacturing process of oxide insulating layer and flexible structure of LTPS-TFT display. The manufacturing process firstly provides a substrate, which is a soft material sheet; and then an a-Si layer is formed on the substrate, and oxygen ion implantation process of a certain depth is conducted onto the a-Si layer; finally, ELA process is conducted to transform a-Si layer into a Poly-Si layer and an oxide insulating layer; of which the oxide insulating layer is a silica insulating layer and located within the Poly-Si layer for subsequently producing LTPS-TFT; the structure comprises of a substrate, Poly-Si layer and oxide insulating layer within the Poly-Si layer.
    Type: Application
    Filed: December 7, 2012
    Publication date: June 12, 2014
    Inventors: Hao WANG, Wen-Shiang Liao, Yue-Gie Liaw
  • Patent number: 8749980
    Abstract: A mobile terminal is provided. The mobile terminal comprises at least one element, a connector selectively connected to another device to provide a data exchange path between the at least one element and the other device, and a thermal conduction frame having one side coming into contact with the at least one element and the other side coming into contact with the connector to transfer heat generated from the at least one element to the connector. The connector is connected to the element included in the mobile terminal and the other device through the thermal conduction frame to effectively transfer heat generated from the element to the other device through the connector.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: June 10, 2014
    Assignee: LG Electronics Inc.
    Inventors: Dongsu Won, Seunghwan Jang, Yongsang Cho
  • Patent number: 8748814
    Abstract: This invention provides a test structure for inspecting word line array fabricated by SADP process, wherein the test structure comprises a contour circuit to cover one end of the WL array, and is alternatively float and ground to the word line array. The word line array then can be inspected by using E-beam inspection tool to identify open and short defects.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: June 10, 2014
    Assignee: Hermes Microvision Inc.
    Inventors: Hong Xiao, Jack Jau
  • Patent number: 8741749
    Abstract: The present invention relates generally to semiconductors, material layers within semiconductors, a production method of semiconductors, and a manufacturing arrangement for producing semiconductors. A semiconductor according to the invention includes at least one layer with a surface, produced by laser ablation, wherein the uniform surface area to be produced includes at least an area 0.2 dm2 and the layer has been produced by employing ultra short pulsed laser deposition wherein pulsed laser beam is scanned with a rotating optical scanner including at least one mirror for reflecting the laser beam.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: June 3, 2014
    Assignee: Picodeon Ltd Oy
    Inventors: Reijo Lappalainen, Vesa Myllymäki, Lasse Pulli, Jari Ruuttu, Juha Mäkitalo
  • Patent number: 8735233
    Abstract: A crystalline silicon thin film is formed by irradiating a silicon thin film with a laser beam. The laser beam is a continuous wave laser beam. An intensity distribution of the laser beam in a first region about a center of the intensity distribution is symmetric on an anterior side and a posterior side of the center. The intensity distribution in a second region about the center is asymmetric on the anterior side and the posterior side. The first region is from the maximum intensity of the laser beam at the center to an intensity half of the maximum intensity. The second region is at most equal to the half of the maximum intensity of the laser beam. In the second region, an integral intensity value on the posterior side is larger than on the anterior side.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: May 27, 2014
    Assignee: Panasonic Corporation
    Inventors: Tomohiko Oda, Takahiro Kawashima
  • Publication number: 20140141579
    Abstract: A method of manufacturing a low temperature polysilicon film comprises: providing a substrate on a platform; forming a buffer layer on said substrate; forming an amorphous silicon layer on said buffer layer; and heating and annealing said amorphous silicon layer to allow said amorphous silicon layer to form a polycrystalline silicon layer; wherein a thermal insulating layer is formed on a bottom surface of said substrate or a top surface of the platform, before said buffer layer is formed on said substrate.
    Type: Application
    Filed: November 21, 2013
    Publication date: May 22, 2014
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xueyan TIAN, Chunping LONG
  • Patent number: 8728914
    Abstract: Fractures (17a, 17b) are generated from modified regions (7a, 7b) to front and rear faces (12a, 12b) of a object to be processed (1), respectively, while an unmodified region (2) is interposed between the modified regions (7a, 7b). This can prevent fractures from continuously advancing in the thickness direction of a silicon substrate (12) when forming a plurality of rows of modified regions (7). By generating a stress in the object (1), the fractures (17a, 17b) are connected to each other in the unmodified region (2), so as to cut the object (1). This can prevent fractures from meandering in the rear face (12b) of the object (1) and so forth, whereby the object (1) can be cut accurately along a line to cut the object (5).
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: May 20, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Takeshi Sakamoto, Aiko Nakagawa
  • Patent number: 8722521
    Abstract: If an optical path length of an optical system is reduced and a length of a laser light on an irradiation surface is increased, there occurs curvature of field which is a phenomenon that a convergent position deviates depending on an incident angle or incident position of a laser light with respect to a lens. To avoid this phenomenon, an optical element having a negative power such as a concave lens or a concave cylindrical lens is inserted to regulate the optical path length of the laser light and a convergent position is made coincident with a irradiation surface to form an image on the irradiation surface.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: May 13, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koichiro Tanaka, Tomoaki Moriwaka
  • Patent number: 8716113
    Abstract: A semiconductor film manufacturing method includes: forming a metal layer above the substrate; forming a gate electrode in each of pixels by patterning a metal layer; forming a gate insulating firm on the gate electrode; forming an amorphous semiconductor film on the gate insulating film; and crystallizing the amorphous semiconductor film by irradiating the amorphous semiconductor film with a laser beam, and a laser irradiation width of the laser beam corresponds to n times a width of each pixel (n is an integer of 2 or above), a laser energy intensity is higher in one end portion of the laser irradiation width than in the other end portion, and in the crystallizing, the laser energy intensity of the laser beam is inverted in increments of n pixels, alternately between one of the end portions of the laser irradiation width of the laser beam and the other end portion.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: May 6, 2014
    Assignees: Panasonic Corporation, Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Toru Saito, Hiroshi Yoshioka, Sadayoshi Hotta
  • Patent number: 8715412
    Abstract: Systems for processing thin films having variable thickness are provided. A crystalline film includes a first crystalline region having a first film thickness and a first crystalline grain structure; and a second crystalline region having a second film thickness and a second crystalline grain structure. The first film thickness is greater than the second film thickness and the first and second film thicknesses are selected to provide a crystalline region having the degree and orientation of crystallization that is desired for a device component.
    Type: Grant
    Filed: January 14, 2013
    Date of Patent: May 6, 2014
    Assignee: The Trustees of Columbia University in the City of New York
    Inventor: James S. Im
  • Publication number: 20140120704
    Abstract: A method for crystallizing a silicon substrate includes manufacturing a crystallized silicon test substrate that is crystallized by scanning excimer laser annealing beams with different energy densities on respective areas of an amorphous silicon test substrate, irradiating a surface of the crystallized silicon test substrate using a light source, and measuring reflectivity corresponding to the respective areas of the crystallized silicon test substrate in a visible light wavelength range, extracting average reflectivities of the respective areas of the crystallized silicon test substrate in wavelength ranges corresponding to respective colors, calculating an optimum energy density (OPED) index per energy density by using a value acquired by subtracting average reflectivity of red-based colors from average reflectivity of blue-based colors, selecting an optimal energy density, and crystallizing an amorphous silicon substrate using the optimal energy density.
    Type: Application
    Filed: May 9, 2013
    Publication date: May 1, 2014
    Inventors: Sung-Ho KIM, Min-Hwan CHOI, Min-Ji BAEK, Sang-Kyung LEE, Sang-Ho JEON, Jong-Moo HUH
  • Publication number: 20140113440
    Abstract: The present invention is characterized in that by laser beam being slantly incident to the convex lens, an aberration such as astigmatism or the like is occurred, and the shape of the laser beam is made linear on the irradiation surface or in its neighborhood. Since the present invention has a very simple configuration, the optical adjustment is easier, and the device becomes compact in size. Furthermore, since the beam is slantly incident with respect to the irradiated body, the return beam can be prevented.
    Type: Application
    Filed: December 31, 2013
    Publication date: April 24, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koichiro TANAKA, Hidekazu MIYAIRI, Aiko SHIGA, Akihisa SHIMOMURA, Atsuo ISOBE