Abstract: Disclosed are a multi-layer substrate and a manufacture method thereof. The multi-layer substrate of the present invention comprises a surface dielectric layer and at least one bond pad layer. The surface dielectric layer is located at a surface of the multi-layer substrate. The bond pad layer is embedded in the surface dielectric layer to construct the multi-layer substrate with the surface dielectric layer of the present invention. The manufacture method of the present invention forms at least one bond pad layer on a flat surface of a carrier and then forms the surface dielectric layer to cover the bond pad layer where the bond pad layer is embedded therein. After the multi-layer substrate is separated from the carrier, the bond pad layer and the surface dielectric layer construct a flat surface of the multi-layer substrate.

Abstract: To increase productivity of organic thin-film transistors, in an organic thin-film transistor manufacturing equipment, a liquid containing at least either one of a wiring material and a semiconductor material is coated on a substrate to form a number of organic thin-film transistors. Substrate carrying means carry the substrate. The substrate is heated by a first heating means, and the temperature of the substrate is controlled by a controller. The liquid containing at least either one of the wiring material and the semiconductor material is heated by a second heating means, and the temperature of this liquid is controlled also by the controller.

Abstract: A method of forming an epitaxially grown layer, preferably by providing a region of weakness in a support substrate and transferring a nucleation portion to the support substrate by bonding. A remainder portion of the support substrate is detached at the region of weakness and an epitaxial layer is grown on the nucleation portion. The remainder portion is separated or otherwise removed from the support portion.

Abstract: A manufacturing method of a semiconductor element provided with a semiconductor layer containing a crystal of an organic semiconductor material of the invention includes the steps of (i) forming a frame (12) on a substrate (base) (11), and (ii) forming the semiconductor layer (crystal (13)) inside the frame (12). The step (ii) includes a crystal forming step in which a solution (21) containing the organic semiconductor material and a liquid medium is placed inside the frame (12) and then the crystal (13) is formed from the solution (21).

Abstract: Electrodeposition is used to deposit nanowires in a controlled fashion with accurate placement and orientation. A substrate is provided with a mesa having electrically conductive sidewalls. The substrate is immersed in an electroplating solution having a dispersion of nanowires, and metal is electroplated onto the sidewalls of the mesa. During electrodeposition, nanowires are incorporated and partially embedded in the deposited metal film. The nanowires will tend to be parallel with the substrate. Additionally electrodes can be deposited to provide electrical contact with the free ends of the nanowires. In this way, electrical connections can be provided to nanowires in a controlled, reproducible manner. The deposited nanowires can be used in a multitude of devices.

Abstract: A deposition method which deposits a CdS buffer layer on a surface of a solar cell from a process solution including all chemical components of the CdS buffer layer material. CdS is deposited in a deposition chamber by heating the surface of the solar cell absorber to cause the transfer of heat from the solar cell absorber layer to at least a portion of the process solution that is in contact with the surface. Used solution is cooled, and replenished in a solution container and redirected into the deposition chamber.

Abstract: A method of forming an epitaxially grown layer by providing a support substrate that includes a region of weakness therein to define a support portion and a remainder portion on opposite sides of the region of weakness. The region of weakness comprises atomic species implanted in the support substrate to facilitate detachment of the support portion from the remainder portion. The method also includes epitaxially growing an epitaxially grown layer in association with the support portion.

Abstract: Disclosed herein are a method of producing microstructure and a method of producing mold, the methods permitting production of much smaller pores than before in an atmosphere where impurities are negligible and also permitting production of microstructures having a smaller size and a higher crystallinity than before with the help of the pores. The method of producing microstructure comprises a step of making pores (4) in a substrate (1) to become a mold (5) by irradiation with a focused energy beam (3) and a step of growing a microstructure (8) in the thus made pores (4). The method of producing a mold includes a step of making pores (4) by irradiating a substrate (1) to become a mold (5) with a focused energy beam (3).

Abstract: A programmable resistance, chalcogenide, switching or phase-change material device includes a substrate with a plurality of stacked layers including a conducting bottom composite electrode layer, an insulative layer having an opening formed therein, an active material layer deposited over both the insulative layer and the bottom composite electrode, and a top electrode layer deposited over the active material layer. The device uses a chemical or electrochemical liquid phase deposition process to selectively and conformally fill the insulative layer opening with the conductive bottom composite electrode layer. Conformally filling the conductive material within the opening reduces structural irregularities within the opening thereby increasing material density and resistivity within the device and thereby improving device performance and reducing programming current.

Abstract: Disclosed herein are a nanocrystal, a method for preparing the nanocrystal, and an electronic device comprising the nanocrystal. The nanocrystal comprises a semiconductor nanocrystal core, a non-semiconductor buffer layer surrounding the semiconductor nanocrystal core, and a shell surrounding the buffer layer.

Abstract: A semiconductor nanocrystal composite comprising a semiconductor nanocrystal composition dispersed in an inorganic matrix material and a method of making same are provided. The method includes providing a semiconductor nanocrystal composition having a semiconductor nanocrystal core, providing a surfactant formed on the outer surface of the composition, and replacing the surfactant with an inorganic matrix material. The semiconductor nanocrystal composite emits light having wavelengths between about 1 and about 10 microns.

Abstract: The present invention provides novel nanostructure composed of at least one elongated structure element, an elongated structure element of said nanostructure bearing a different zone made of metal, metal alloy, conductive polymer or semiconductor and selectively grown onto at least one of the end portions of the elongated structure element. The present invention further provides a selective method for forming in a liquid medium, such nanostructures.

Abstract: A method for manufacturing TFTs is provided. It can be applied to both inverted staggered and co-planar TFT structures. The manufacturing method for the staggered TFT includes the formation of a gate electrode, a gate insulator, an active channel layer, a drain electrode, and a source electrode on a substrate. It emphasizes the use of metal oxides or II-VI compound semiconductors and low-temperature CBD process to form the active channel layer. In a CBD process, the active channel layers are selectively deposited on the substrates immersed in the solution through controlling solution temperature and PH value. The invention offers the advantages of low deposition temperature, selective deposition, no practical limit of panel size, and low fabrication cost. Its low deposition temperature allows the use of flexible substrates, such as plastic substrates.

Abstract: A method for producing crystals and for screening crystallization conditions of chemical materials on distinct metallic islands with specific functional groups by using multi-functional substrates comprising a plurality of self-assembled monolayers having at least two different functionalities, for preparing and screening conditions necessary to promote specific polymorphs of a crystal, and a means for testing and screening the more precise conditions suitable for achieving desired sizes or forms of a crystal.

Abstract: In a method of manufacturing a semiconductor device, a preliminary active pattern including gate layers and channel layers is formed on a substrate. The gate layers and the channel layers are alternatively stacked. A hard mask is formed on the preliminary active pattern. The preliminary active pattern is partially etched using the hard mask as an etching mask to expose a surface of the substrate. The etched preliminary active pattern is trimmed to form an active channel pattern having a width less than a lower width of the hard mask. Source/drain layers are formed on exposed side faces of the active channel pattern and the surface. The gate layers are selectively etched to form tunnels. A gate encloses the active channel pattern and filling the tunnels. Related intermediate structures are also disclosed.

Abstract: Homogeneous and dense arrays of nanowires are described. The nanowires can be formed in solution and can have average diameters of 40-300 nm and lengths of 1-3 ?m. They can be formed on any suitable substrate. Photovoltaic devices are also described.

Abstract: A semiconductor structure including a semiconductor substrate, at least one first crystalline epitaxial layer on the substrate, the first layer having a surface which is planarized, and at least one second crystalline epitaxial layer on the at least one first layer. In another embodiment of the invention there is provided a semiconductor structure including a silicon substrate, and a GeSi graded region grown on the silicon substrate, compressive strain being incorporated in the graded region to offset the tensile strain that is incorporated during thermal processing. In yet another embodiment of the invention there is provided a semiconductor structure including a semiconductor substrate, a first layer having a graded region grown on the substrate, compressive strain being incorporated in the graded region to offset the tensile strain that is incorporated during thermal processing, the first layer having a surface which is planarized, and a second layer provided on the first layer.

Abstract: A nanoscale junction array includes an elongated nanowire and a plurality of elongated nanobelts. Each nanobelt has a proximal end and an opposite distal end. The proximal end of each nanobelt is attached to a different location on the nanowire. Each nanobelt extends radially away from the nanowire. A type of nanoscale junction array, a nanopropeller, includes an elongated nanowire and a plurality of elongated nanoblades. The nanoscale junction array is formed from Zinc Oxide using a metal vaporization process.

Abstract: To provide a method for manufacturing a wiring, a conductive layer, a display device, and a semiconductor device, each of which can meet a large sized substrate and which is manufactured with a higher throughput by using a material efficiently, the conductive layer is formed over the substrate having an insulating surface by discharging the conductive material, and heat treatment is performed by a lamp or a laser beam over the conductive layer. Furthermore, the conductive film is formed under reduced pressure according to the present invention.

Abstract: A method for manufacturing powdered quantum dots comprising the steps of: a) reacting quantum dots comprising a core, a cap and a first ligand associated with the outer surfaces thereof with a second ligand, the second ligand displacing the first ligand and attaching to the outer surfaces of the quantum dots, b) isolating the quantum dots having the attached second ligand from the reaction mixture, c) reacting the isolated quantum dots having the attached second ligand with a small organic molecule whereby the small organic molecule attaches to the second ligand, d) reacting the quantum dots having the attached small organic molecule with a cross-linking agent to cross-link the small organic molecule attached to the second ligand with an adjacent second ligand attached to the surfaces of the quantum dots, e) isolating the quantum dots formed in step (d); and f) drying the isolated quantum dots to form powdered quantum dots. The invention includes the quantum dots.

Abstract: The invention provides a method of forming a high-performance thin-film at low cost using a liquid material in safety, an apparatus to form a thin-film, a method of manufacturing a semiconductor device, an electro-optical unit, and an electronic apparatus. An apparatus to form a thin-film includes a coating unit to apply a liquid material containing a thin-film component onto a substrate and also includes heat-treating units to heat the substrate applied with the liquid material. The coating unit and the heat-treating units each include a control device to control the atmosphere in a treating chamber to treat the substrate.

Abstract: This invention comprises methods of forming patterned photoresist layers over semiconductor substrates. In one implementation, a semiconductor substrate is provided. An antireflective coating is formed over the semiconductor substrate. The antireflective coating has an outer surface. The outer surface is treated with a basic fluid. A positive photoresist is applied onto the outer surface which has been treated with the basic treating fluid. The positive photoresist is patterned and developed effective to form a patterned photoresist layer having increased footing at a base region of said layer than would otherwise occur in the absence of said treating the outer surface. Other aspects and implementations are contemplated.

Abstract: In a semiconductor device fabrication method using a fluidic self-assembly technique in which in a liquid, a plurality of semiconductor elements are mounted in a self-aligned manner on a substrate with a plurality of recessed portions formed therein, protruding potions that are inserted in the respective recessed portions of the substrate are formed in the lower portions of the respective semiconductor elements, the liquid in which the semiconductor elements have been spread is poured over the substrate intermittently, and the substrate is rotated in a period of time in which the liquid is not poured.

Abstract: Nanostructures and methods of fabricating nanostructures are disclosed. A representative nanostructure includes a substrate having at least one semiconductor oxide. In addition, the nanostructure has a substantially rectangular cross-section. A method of preparing a plurality of semiconductor oxide nanostructures that have a substantially rectangular cross-section from an oxide powder is disclosed. A representative method includes: heating the oxide powder to an evaporation temperature of the oxide powder for about 1 hour to about 3 hours at about 200 torr to about 400 torr in an atmosphere comprising argon; evaporating the oxide powder; and forming the plurality of semiconductor oxide nanostructures.

Abstract: CMOS integrated circuit devices include an electrically insulating layer and an unstrained silicon active layer on the electrically insulating layer. An insulated gate electrode is also provided on a surface of the unstrained silicon active layer. A Si1-xGex layer is also disposed between the electrically insulating layer and the unstrained silicon active layer. The Si1-xGex layer forms a first junction with the unstrained silicon active layer and has a graded concentration of Ge therein that decreases monotonically in a first direction extending from a peak level towards the surface of the unstrained silicon active layer. The peak Ge concentration level is greater than x=0.15 and the concentration of Ge in the Si1-xGex layer varies from the peak level to a level less than about x=0.1 at the first junction. The concentration of Ge at the first junction may be abrupt. More preferably, the concentration of Ge in the Si1-xGex layer varies from the peak level where 0.2<x<0.

Abstract: A transparent layer of a LED device and the method for growing the same are disclosed in this present invention. This present invention provides an improved liquid phase epitaxy (LPE) process for growing a transparent layer of a LED device. In the above-mentioned LPE process, an improved supersaturated solution is utilized to overcome the shortcomings in the prior art, wherein the supersaturated solution comprises antimony and/or indium as a solvent. Furthermore, a metallic zinc and/or magnesium dopant is added into the supersaturated solution to optimize the characters of the transparent layer. Therefore, this invention can provide a more efficient method for growing a transparent layer of a LED device, and the quality of the above-mentioned transparent layer can thereby be improved.

Abstract: A solder bump structure and laser repair process for memory device include forming a first dielectric layer on a bump pad of a semiconductor wafer. After that, the first dielectric layer is etched to form a contact hole and to expose portions of the bump pad. A second dielectric layer is then formed on a surface of the semiconductor wafer outside of the contact hole. An under bump metallurgy (UBM) process is performed to form a metal layer on a surface of the contact hole, and a solder bump is formed on the metal layer. Finally, the laser repair process for memory device is completed.

Abstract: A method for producing a quantum dot silicate thin film for light emitting devices. The quantum dot silicate thin film is produced by introducing a silane compound having a functional group capable of interacting with a quantum dot and at least one reactive group for a sol-gel process into the surface of the quantum dot or a matrix material for dispersing the quantum dot, thereby exhibiting excellent mechanical and thermal stability.

Abstract: Metal-grade silicon is melted and solidified in a mold to form a plate-shaped silicon layer and a crystalline silicon layer is made thereon, thereby providing a cheap solar cell without a need for a slicing step.

Abstract: A method for producing a laminate having resin layers and thin metal layers by repeating a process unit comprising a step of laminating a resin layer by applying a resin material, a step of depositing a patterning material on the resin layer and a step of laminating a thin metal layer, predetermined times on a turning support (511), wherein the patterning material is stuck on the surface of the resin layer in a noncontact way. A laminate comprising a large number of laminate units each comprising a resin layer and a thin metal layer divided at an electric insulation stripe part can be produced stably. The laminate is applicable to production of a high performance small capacitor at low cost.

Abstract: A method for producing a quantum dot silicate thin film for light emitting devices. The quantum dot silicate thin film is produced by introducing a silane compound having a functional group capable of interacting with a quantum dot and at least one reactive group for a sol-gel process into the surface of the quantum dot or a matrix material for dispersing the quantum dot, thereby exhibiting excellent mechanical and thermal stability.

Abstract: Metal-grade silicon is melted and solidified in a mold to form a plate-shaped silicon layer and a crystalline silicon layer is made thereon, thereby providing a cheap solar cell without a need for a slicing step.

Abstract: A method of forming a single crystal semiconductor film on a non-crystalline surface is described. In accordance with this method, a template layer incorporating an ordered array of nucleation sites is deposited on the non-crystalline surface, and the single crystal semiconductor film is formed on the non-crystalline surface from the ordered array of nucleation sites. An integrated circuit incorporating one or more single crystal semiconductor layers formed by this method also is described.

Abstract: A solution containing a cyclic silane compound, which does not contain carbon, and/or a silane compound modified by boron or phosphorus is applied onto a substrate and a silicon precursor film is formed, and the film is then transformed into semiconductor silicon by heat and/or light treatment. Thereby, it is possible to easily produce a silicon film having satisfactory characteristics as an electronic material at low costs, differing from the vacuum process, such as by CVD methods.

Abstract: A plurality of semiconductor nanoparticles having an elementally passivated surface are provided. These nanoparticles are capable of being suspended in water without substantial agglomeration and substantial precipitation on container surfaces for at least 30 days. The method of making the semiconductor nanoparticles includes reacting at least a first reactant and a second reactant in a solution to form the semiconductor nanoparticles in the solution. A first reactant provides a passivating element which binds to dangling bonds on a surface of the nanoparticles to passivate the surface of the nanoparticles. The nanoparticle size can be tuned by etching the nanoparticles located in the solution to a desired size.

Abstract: There is disclosed a method of producing a diamond film formed on a substrate, wherein at least after a film (dopant layer) containing doping elements is formed on a surface of the substrate, a vapor phase synthetic diamond film is formed on the dopant layer, and the dopant layer contains diamond particles, which become sources of diamond nuclei, in addition to doping elements, and also disclosed a diamond film produced by the method. There can be provided a method of producing a diamond film that a diamond film having lowered electric resistance can be produced, and also provided a diamond film produced by the method.

Abstract: A silicon wafer for epitaxial growth consisting of a highly boron-doped silicon single crystal wafer, an antimony-doped silicon single crystal wafer or a phosphorus-doped silicon single crystal wafer, which allows easy oxygen precipitation and exhibits high gettering ability in spite of its suppressed oxygen concentration, and an epitaxial silicon wafer in which an epitaxial layer grown by using the aforementioned wafer as a substrate wafer has an extremely low heavy metal impurity concentration are produced with high productivity and supplied. The present invention relates to a boron-doped silicon single crystal wafer having a resistivity of from 10 m&OHgr;·cm to 100 m&OHgr;·cm, an antimony-doped silicon single crystal wafer, or a phosphorus-doped silicon single crystal wafer, which are produced by slicing a silicon single crystal ingot grown by the Czochralski method with nitrogen doping.

Abstract: A method of fabricating a semiconductor structure including the steps of providing a silicon substrate (10) having a surface (12), forming on the surface (12) of the silicon substrate (10), by atomic layer deposition (ALD), a seed layer (20;21′) comprising a silicate material and forming, by atomic layer deposition (ALD) one or more layers of a high dielectric constant oxide (42) on the seed layer (20;21′).

Abstract: The peeling of a thin-film single-crystal from a substrate is carried out so that the directions of straight lines on the single-crystal surface made by planes on which the single-crystal is apt to cleave are different from the front line direction of the peeled single-crystal. This single-crystal is used in a solar cell and a drive circuit member of an image display element. A method is provided which prevents a decrease in quality and yield of a single crystal layer when it is peeled from a substrate. A flexible solar cell module having a thin film single-crystal layer is made so that its flexing direction is different from the single-crystal's cleaving direction. Thus, a thin-film single-crystal solar cell module having excellent durability and reliability due to a lack of defect or cracking during production and use, and a method for producing the same, is provided.

Abstract: A method for fabricating an infrared-emitting light-emitting diode in which a layer sequence is applied onto a semiconductor substrate, preferably composed of GaAs. The layer sequence has, proceeding from the semiconductor substrate, a first AlGaAs cover layer, a GaAs and/or AlGaAs containing active layer and a second AlGaAs cover layer. In which case, the first AlGaAs cover layer and the active layer are fabricated by a metal organic vapor phase epitaxy (MOVPE) method and the second AlGaAs cover layer is fabricated by a liquid phase epitaxy (LPE) method. Furthermore, an electrically conductive coupling-out layer having a thickness of at least about 10 &mgr;m is deposited on the second AlGaAs cover layer by the LPE method. The coupling-out layer is optically transparent in the infrared spectral region.

Abstract: A method of forming a shallow trench isolation (STI) structure. A pad oxide layer and a cap layer are sequentially formed over a substrate. The pad oxide layer, the cap layer and the substrate are patterned to form a trench. Oxide material is deposited into the trench to form a first oxide layer. The cap layer is removed to expose a portion of the first oxide layer. The pad oxide layer is removed. A selective liquid phase deposition is conducted to form a second oxide layer around the exposed first oxide layer.

Abstract: A trench is formed in a semiconductor substrate through a mask composed of a silicon oxide film formed on the semiconductor substrate. Then, an edge portion at an opening portion of the mask is etched so that an opening width thereof is wider than that of the trench. After that, an inner surface of the trench is smoothed by thermal treatment around at 1000° C. in non-oxidizing or non-nitriding atmosphere under low pressure. Then, the trench is filled with an epitaxial film. After that, the epitaxial film is polished, whereby a semiconductor substrate for forming a semiconductor device is obtained.

Abstract: A manufacturing process of semiconductor devices comprises providing at least a wafer, bumping the wafer, testing the wafer, laser repairing, and dicing.

Abstract: Metal-grade silicon is melted and solidified in a mold to form a plate-shaped silicon layer and a crystalline silicon layer is made thereon, thereby providing a cheap solar cell without a need for a slicing step.

Abstract: A process for the formation of shaped Group III-V semiconductor nanocrystals comprises contacting the semiconductor nanocrystal precursors with a liquid media comprising a binary mixture of phosphorus-containing organic surfactants capable of promoting the growth of either spherical semiconductor nanocrystals or rod-like semiconductor nanocrystals, whereby the shape of the semiconductor nanocrystals formed in said binary mixture of surfactants is controlled by adjusting the ratio of the surfactants in the binary mixture.

Abstract: In this invention, one or more metal-containing sources and one or more ammonium halides are heated such that they evaporate into a vacuum environment (except that, in MOMBE, a beam of the organometallic source compound may be created by other means) and made to impinge on a substrate. The materials interact on the substrate to form a film of the desired nitride compound or alloy; the substrate usually will be heated to promote chemical reaction and good film properties such as high crystallinity. Other sources—to provide dopant impurities like silicon or magnesium, for example—would be part of a deposition system envisioned in this invention. Multiple film layers, including quantum wells and superlattices, may be formed using this method, in addition to a single film.

Abstract: A method for growing of oriented whisker arrays on a single-crystalline substrate consists in vapor-phase transport of the material to be crystallized form a solid-state source body of the same composition as the whiskers to the substrate coated with liquid-phase particles that serve as nucleation/catalyzing centers for the whisker growth. The source body has a plane surface that is faced to the substrate and parallel to it so that a vectorly-uniform temperature field, whose gradient is perpendicular to both the substrate and the source, is created. The vectorly-uniform temperature field is realized by an apparatus with high-frequency heating of specially designed bodies that are arranged in a special position in respect to the high-frequency inductor. Laser and/or lamp heat sources can be also used either separately or in combinations with the high-frequency heater. In the apparatus, the material source is heated, while the substrate takes heat from the material source.

Abstract: An epitaxial semiconductor wafer characterized by making the P-N junction face which having either flat or uneven face in a manner of uniformed thickness from the top surface, due to making a P or N type first layer by the Chemical Vapor Deposition on the basic plate and also to making a N or P type secondary layer on said first layer, while both of the layers being highly and pure controlled silicon, and the light reflectors being located at the out side of said each P or N type layer for concentrating the incoming light to the P-N junction portion.

Abstract: A process for the formation of shaped Group II-VI semiconductor nanocrystals comprises contacting the semiconductor nanocrystal precursors with a liquid media comprising a binary mixture of phosphorus-containing organic surfactants capable of promoting the growth of either spherical semiconductor nanocrystals or rod-like semiconductor nanocrystals, whereby the shape of the semiconductor nanocrystals formed in said binary mixture of surfactants is controlled by adjusting the ratio of the surfactants in the binary mixture.

Abstract: A method for fabricating a thin film field effect transistor is described in this invention. The active layer of the thin film transistor (TFT) is formed by a low cost chemical bath deposition method. The fabrication procedure includes deposition of a metal layer on an insulating substrate, patterning of the metal layer to form a metal gate, formation of the di-electric layer, deposition of the active layer and formation of source and drain contacts.