Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor Patents (Class 438/51)
  • Patent number: 11548781
    Abstract: A die attachment to a support is disclosed. In an embodiment, a semiconductor package includes a support and a die attached to the support by an adhesive on a backside of the die, wherein the die includes a capacitive pressure sensor integrated on a CMOS read-out circuit, and wherein the adhesive covers only a part of the backside of the die.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: January 10, 2023
    Assignee: SCIOSENSE B.V.
    Inventors: Casper Van Der Avoort, Willem Frederik Adrianus Besling, Remco Henricus Wilhelmus Pijnenburg, Olaf Wunnicke, Coen Tak
  • Patent number: 11535513
    Abstract: A method of manufacturing a physical quantity detection sensor includes forming a stacked structure having a plurality of sensor devices by bonding together a sensor substrate and a different type substrate of a different material from a material of the sensor substrate, the sensor substrate having a plurality of sensor movable portions therein, and dicing the stacked structure using a dicing blade, wherein a groove is provided in one of the sensor substrate and the different type substrate to penetrate the one of the sensor substrate and the different type substrate, the groove having a width larger than a width of the dicing blade, and in at least part of the dicing, the dicing blade is accommodated in the groove and advances without contacting surfaces on left and right sides of the groove.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: December 27, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Yasuo Yamaguchi
  • Patent number: 11493530
    Abstract: The accelerometers disclosed herein provide excellent sensitivity, long-term stability, and low SWaP-C through a combination of photonic integrated circuit technology with standard micro-electromechanical systems (MEMS) technology. Examples of these accelerometers use optical transduction to improve the scale factor of traditional MEMS resonant accelerometers by accurately measuring the resonant frequencies of very small (e.g., about 1 ?m) tethers attached to a large (e.g., about 1 mm) proof mass. Some examples use ring resonators to measure the tether frequencies and some other examples use linear resonators to measure the tether frequencies. Potential commercial applications span a wide range from seismic measurement systems to automotive stability controls to inertial guidance to any other application where chip-scale accelerometers are currently deployed.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: November 8, 2022
    Assignee: Massachusetts Institute of Technology
    Inventors: Suraj Deepak Bramhavar, Paul William Juodawlkis
  • Patent number: 11496822
    Abstract: The present invention provides a microphone mounting structure for a headset, the microphone mounting structure comprising: a housing surrounding the headset and forming an audio output channel along a vertical direction inside; a microphone mounted along the vertical direction inside a space formed by the audio output channel, and a substrate connected to a main board and including a supporting part mounted in a rear side of the microphone, wherein the microphone includes a circuit substrate formed in a rear side of the microphone, and the circuit substrate includes a hole, wherein the supporting part includes a substrate hole communicating the hole.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: November 8, 2022
    Assignee: BUJEON CO., LTD.
    Inventors: Donghyun Seo, Ki-Bum Bang, Sunwoo Park
  • Patent number: 11484911
    Abstract: A ultrasonic transducer device includes a transducer bottom electrode layer disposed over a substrate, and a plurality of vias that electrically connect the bottom electrode layer with the substrate, wherein substantially an entirety of the plurality of vias are disposed directly below a footprint of a transducer cavity. Alternatively, the transducer bottom electrode layer includes a first metal layer in contact with the plurality of vias and a second metal layer formed on the first metal layer, the first metal layer including a same material as the plurality of vias.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: November 1, 2022
    Assignee: BFLY Operations, Inc.
    Inventors: Lingyun Miao, Jianwei Liu
  • Patent number: 11467027
    Abstract: A vibration sensor is designed to have a pressure-enhancing member, a pressure sensing device and first, second, third chambers. A first through hole is designed to enable the first chamber to be vented to the third chamber such that the first chamber is combined with the third chamber to obtain a communicable air volume. When the pressure-enhancing member is moved to squeeze the air in the second chamber, a sensitivity of the pressure sensing device will be greatly improved.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: October 11, 2022
    Assignee: MERRY ELECTRONICS CO., LTD.
    Inventors: Jen-Yi Chen, Chao-Sen Chang, Yueh-Kang Lee
  • Patent number: 11444032
    Abstract: A semiconductor package device and a method of manufacturing a semiconductor package device are provided. The semiconductor package device includes a substrate, a first electronic component, a first dielectric layer, and a first hole. The substrate has a first surface and a second surface opposite to the first surface. The first electronic component is disposed on the first surface. The first dielectric layer is disposed on the second surface and has a third surface away from the substrate. The first hole extends from the first dielectric layer and the substrate. The first hole is substantially aligned with the first electronic component.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: September 13, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yencheng Kuo, Shao-Lun Yang
  • Patent number: 11445304
    Abstract: An ultrasonic sensor includes: an element storage case including a case-side diaphragm having a thickness direction along a directional axis; and an ultrasonic element accommodated in the element storage case and spaced apart from the case-side diaphragm. The ultrasonic element includes an element-side diaphragm having the thickness direction along the directional axis and provided by a thin part of a semiconductor substrate. The semiconductor substrate is arranged to provide a closed space between the case-side diaphragm and the element-side diaphragm. The semiconductor substrate is fixed and supported by the element-storage case.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: September 13, 2022
    Assignee: DENSO CORPORATION
    Inventors: Tatsuya Kamiya, Itaru Ishii, Tomoki Tanemura, Takashi Aoki, Tetsuya Katoh
  • Patent number: 11361928
    Abstract: A vacuum transistor includes a substrate and a first terminal formed on the substrate. A piezoelectric element has a second terminal formed on the piezoelectric element, wherein the piezoelectric element is provided over the first terminal to provide a gap between the first terminal and the second terminal. The gap is adjusted in accordance with an electrical field on the piezoelectric element.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: June 14, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Qing Cao, Kangguo Cheng, Zhengwen Li, Fei Liu
  • Patent number: 11348990
    Abstract: A stretchable display device comprises a lower substrate; a plurality of island substrates spaced apart from each other and disposed on the lower substrate; a plurality of pixels defined on the plurality of island substrates; a plurality of base polymers disposed between adjacent island substrates of the plurality of island substrates; and a plurality of conductive particles distributed in the base polymer and electrically connecting a plurality of pads disposed on the adjacent island substrates.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: May 31, 2022
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Kihan Kim, Hyokang Lee
  • Patent number: 11308257
    Abstract: A structure including a plurality of dielectric regions is described. The structure can include a rivet cell. The rivet cell can include a set of stacked vias. The rivet cell can extend through a stress hotspot of the structure. A length of the rivet cell can thread through at least one dielectric region among the plurality of dielectric regions. The rivet cell can be among a number of rivet cells inserted in the stress hotspot. The stress hotspot can be among a plurality of stress hotspots across the structure. A length of the rivet cell can be based on a model of a relationship between the length of the rivet cell and an energy release rate of the structure. The rivet cell can thread through an interface between a first dielectric region and a second dielectric region having different dielectric constants.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: April 19, 2022
    Assignee: International Business Machines Corporation
    Inventors: Dureseti Chidambarrao, David Wolpert, Atsushi Ogino, Matthew T. Guzowski, Steven Paul Ostrander, Tuhin Sinha, Michael Stewart Gray
  • Patent number: 11296016
    Abstract: Semiconductor devices and methods and apparatus to produce such semiconductor devices are disclosed. An integrated circuit package includes a lead frame including a die attach pad and a plurality of leads; a die including a MEMs region defined by a plurality of trenches, the die electrically connected to the plurality of leads; and a mold compound covering portions of the die, the mold compound defining a cavity between a surface of the die and a surface of the mold compound, wherein the mold compound defines a vent.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: April 5, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Robert Allan Neidorff, Benjamin Cook, Steven Alfred Kummerl, Barry Jon Male, Peter Smeys
  • Patent number: 11279615
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: March 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Patent number: 11271132
    Abstract: Structures and techniques introduced here enable the design and fabrication of photodetectors (PDs) and/or other electronic circuits using typical semiconductor device manufacturing technologies meanwhile reducing the adverse impacts on PDs' performance. Examples of the various structures and techniques introduced here include, but not limited to, a pre-PD homogeneous wafer bonding technique, a pre-PD heterogeneous wafer bonding technique, a post-PD wafer bonding technique, their combinations, and a number of mirror equipped PD structures. With the introduced structures and techniques, it is possible to implement PDs using typical direct growth material epitaxy technology while reducing the adverse impact of the defect layer at the material interface caused by lattice mismatch.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: March 8, 2022
    Assignee: Artilux, Inc.
    Inventors: Chien-Yu Chen, Szu-Lin Cheng, Chieh-Ting Lin, Yu-Hsuan Liu, Ming-Jay Yang, Shu-Lu Chen, Tsung-Ting Wu, Chia-Peng Lin, Yun-Chung Na, Hui-Wen Chen, Han-Din Liu
  • Patent number: 11187605
    Abstract: A pressure sensor assembly, which includes a pressure sensing element having a diaphragm, a plurality of piezoresistors connected to the diaphragm, and at least one layer of sealing glass connected to the diaphragm. The pressure sensor assembly also includes a base, a layer of sealing glass is connected to the base, and is configured to maximize the sensitivity of the plurality of piezoresistors via tailoring the side surfaces of the glass surface to control the deformable diaphragm. The layer of sealing glass includes a first recess portion, and a second recess portion formed as part of the layer of sealing glass on the opposite side of the layer of sealing glass as the first recess portion. One of the plurality of piezoresistors is partially surrounded by the first recess portion, and another of the plurality of piezoresistors is partially surrounded by the second recess portion.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: November 30, 2021
    Assignee: Vitesco Technologies USA, LLC
    Inventors: Zhijun Guo, Jeffrey Frye, Paul Haack, Richard Cronin
  • Patent number: 11152226
    Abstract: A structure with controlled capillary coverage is provided and includes a substrate including one or more first contacts, a component and adhesive. The component includes one or more second contacts and a rib disposed at a distance from each of the one or more second contacts. The component is disposed such that the one or more second contacts are communicative with the one or more first contacts and corresponding surfaces of the substrate and the rib face each other at a controlled gap height to define a fill-space. The adhesive is dispensed at a discrete point whereby the adhesive is drawn to fill the fill-space by capillary action.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: October 19, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin Drummond, Thomas Lombardi, Steve Ostrander, Stephanie Allard, Catherine Dufort
  • Patent number: 11101417
    Abstract: A printed structure includes a destination substrate comprising two or more contact pads disposed on or in a surface of the destination substrate, a component disposed on the surface, and two or more electrically conductive connection posts. Each of the connection posts extends from a common side of the component. Each of the connection posts is in electrical and physical contact with one of the contact pads. The component is tilted with respect to the surface of the destination substrate. Each of the connection posts has a flat distal surface.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: August 24, 2021
    Assignee: X Display Company Technology Limited
    Inventors: Christopher Andrew Bower, Matthew Alexander Meitl, Ronald S. Cok, Salvatore Bonafede, Brook Raymond, Andrew Tyler Pearson
  • Patent number: 11085837
    Abstract: A force sensor may comprise a sense die comprising a top part and a bottom part. Generally, the top part may comprise a first surface and a second surface, and the bottom part may comprise a first surface for direct contact with a substrate. Typically, the bottom part may be formed by removing a portion of the material of the sense die around the edges of a first face of the sense die. Typically, adhesive may replace the portion of the sense die material removed from the edges of the first face of the sense die. Thus, the adhesive may secure the first surface of the bottom part of the sense die directly to the substrate without serving as an interface between the bottom part of the sense die and the substrate.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: August 10, 2021
    Assignee: HONEYWELL INTERNATIONAL INC.
    Inventors: Jason Dennis Patch, Todd Eckhardt, Jim Machir, Richard Wade, Jim Cook
  • Patent number: 11069611
    Abstract: A liner-free or partial liner-free contact/via structure that is embedded within a dielectric capping layer and positioned between an electrically conductive structure and an overlying contact structure is provided.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: July 20, 2021
    Assignee: International Business Machines Corporation
    Inventor: Chih-Chao Yang
  • Patent number: 11027968
    Abstract: In a semiconductor device, a first substrate and a second substrate are bonded to each other through an insulating film. A hermetically sealed chamber is provided between the first substrate and the second substrate, and a sensing part is enclosed in the hermetically sealed chamber. The second substrate has a through hole penetrating in a stacking direction of the first substrate and the second substrate and exposing the first surface of the first substrate. A penetrating electrode is disposed on a wall surface of the through hole of the second substrate, and is electrically connected to the sensing part. A discharge path is provided, at a position located between the hermetically sealed chamber and the through hole for releasing outgas generated during bonding from the hermetically sealed chamber to the through hole.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: June 8, 2021
    Assignee: DENSO CORPORATION
    Inventors: Megumi Suzuki, Teruhisa Akashi
  • Patent number: 10886310
    Abstract: The application discloses a photoelectric sensor, a fabricating method thereof, and a display device. The method for fabricating the photoelectric sensor, includes: fabricating a thin film transistor (TFT) array and a photodiode array on a silicon substrate; transferring the TFT array onto a base substrate by a micro transfer process; and placing the photodiode array on the base substrate formed with the TFT array, in a manner that an orthographic projection of the photodiode array on the base substrate overlaps with an orthographic projection of the TFT array on the base substrate.
    Type: Grant
    Filed: May 17, 2018
    Date of Patent: January 5, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yuzhen Guo, Xue Dong, Haisheng Wang, Chunwei Wu, Yingming Liu, Rui Xu
  • Patent number: 10811581
    Abstract: A method of manufacturing a semiconductor device includes: a solder ball forming step comprising forming a plurality of solder balls at intervals on (i) a surface of a package surrounding a recess, or (ii) a surface of the light-transmissive member facing the surface of the package surrounding the recess (i) the surface of a light-transmissive member, or (ii) the surface of the package, into contact with an upper surface of the solder balls, which are softened, such that an air passage communicating with the recess is formed between the solder balls; and a bonding step comprising reducing a pressure in the recess via the air passage, and thereafter, in a state in which a gas for sealing is injected, heating and pressing the light-transmissive member and the package, to melt the solder balls and bond the light-transmissive member and the package.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: October 20, 2020
    Assignee: NICHIA CORPORATION
    Inventors: Kazuma Kozuru, Ryota Okuno
  • Patent number: 10715098
    Abstract: An acoustic resonator package includes: a substrate; an acoustic resonator disposed on the substrate; a cap disposed on the substrate and the acoustic resonator; and a bonding portion bonding the substrate and the cap to each other, wherein the cap includes a trench formed around the bonding portion and a protective layer covering a surface of the trench in the cap, and wherein a portion of the bonding portion fills at least a portion of the trench.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: July 14, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Kyung Lee, Kwang Su Kim, Jin Suk Son, Yeong Gyu Lee, Sung Sun Kim, Sang Jin Kim
  • Patent number: 10654716
    Abstract: At least one semiconductor component is packaged by covering at least one partial surface of the at least one semiconductor component with at least one chemically or physically dissoluble sacrificial material; surrounding the at least one semiconductor component at least partially with a photoablatable packaging material; exposing the sacrificial material on the at least one partial surface of the at least one semiconductor component at least partially by forming at least one trench through at least the packaging material using a light beam; and exposing the at least one partial surface of the at least one semiconductor component at least partially by at least partially removing the previously exposed sacrificial material using a chemical or physical removal method to which the packaging material has a higher resistance than the sacrificial material.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: May 19, 2020
    Assignee: Robert Bosch GmbH
    Inventors: Andreas Krauss, Nicola Mingirulli, Robert Bonasewicz
  • Patent number: 10644046
    Abstract: There are provided a fan-out sensor package and an optical fingerprint sensor module including the same. The fan-out sensor package includes: a connection member having a through-hole; an image sensor disposed in the through-hole of the connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the connection member, the image sensor, and an optical lens; and a redistribution layer disposed on the connection member, the image sensor, and the optical lens. The connection member includes a wiring layer, and the redistribution layer electrically connects the wiring layer and the connection pads to each other.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: May 5, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong Ho Baek, Jung Hyun Cho, Min Keun Kim, Young Sik Hur, Tae Hee Han
  • Patent number: 10644187
    Abstract: Structures and techniques introduced here enable the design and fabrication of photodetectors (PDs) and/or other electronic circuits using typical semiconductor device manufacturing technologies meanwhile reducing the adverse impacts on PDs' performance. Examples of the various structures and techniques introduced here include, but not limited to, a pre-PD homogeneous wafer bonding technique, a pre-PD heterogeneous wafer bonding technique, a post-PD wafer bonding technique, their combinations, and a number of mirror equipped PD structures. With the introduced structures and techniques, it is possible to implement PDs using typical direct growth material epitaxy technology while reducing the adverse impact of the defect layer at the material interface caused by lattice mismatch.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: May 5, 2020
    Assignee: Artilux, Inc.
    Inventors: Chien-Yu Chen, Szu-Lin Cheng, Chieh-Ting Lin, Yu-Hsuan Liu, Ming-Jay Yang, Shu-Lu Chen, Tsung-Ting Wu, Chia-Peng Lin
  • Patent number: 10629670
    Abstract: Provided is a display apparatus capable of reducing generation of defects during manufacturing of the display apparatus or while in use after being manufactured. The display apparatus includes a substrate including a bending area between a first area and a second area, the substrate being bent in the bending area about a bending axis; an inorganic insulating layer over the substrate and including a first feature that is either a first opening or a first groove, the first feature positioned to correspond to the bending area; and an organic material layer at least partially filling the first feature, and including a second feature that is a second opening or a second groove, the second feature extending along an edge of the substrate.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: April 21, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yoonsun Choi, Hyunchul Kim
  • Patent number: 10538428
    Abstract: A method for manufacturing a MEMS device includes disposing at least one bonding portion having a smaller bonding area in a region where an airtight chamber will be formed, and disposing a metal getter on a bonding surface of the bonding portion. According to this structure, when substrates are bonded to define the airtight chamber, the metal getter is squeezed out of the bonding position due to the larger bonding pressure of the bonding portion with a smaller bonding area. Then, the metal getter is activated to absorb the moisture in the airtight chamber. According to the above process, no additional procedure is needed to remove the moisture in the airtight chamber. A MEMS device manufactured by the above manufacturing method is also disclosed.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: January 21, 2020
    Assignee: MIRAMEMS SENSING TECHNOLOGY CO., LTD
    Inventors: Yu-Hao Chien, Li-Tien Tseng, Chih-Liang Kuo
  • Patent number: 10483111
    Abstract: A method for assembling a first substrate and a second substrate by metal-metal direct bonding, includes providing a first layer of a metal at the surface of the first substrate and a second layer of the metal at the surface of the second substrate, the first and second metal layers having a tensile stress (?i) between 30% and 100% of the tensile yield strength (?e) of the metal; assembling the first and second substrates at a bonding interface by directly contacting the first and second tensile stressed metal layers; and subjecting the assembly of the first and second substrates to a stabilization annealing at a temperature lower than or equal to a temperature threshold beyond which the first and second tensile stressed metal layers are plastically compressively deformed.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: November 19, 2019
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Paul Gondcharton, Bruno Imbert, Hubert Moriceau
  • Patent number: 10413275
    Abstract: Disclosed herein is an ultrasound probe including a transducer array configured to generate ultrasonic waves, an integrated circuit disposed on a back surface of the transducer array by using an adhesive member, a printed circuit board connected to the integrated circuit and configured to output a signal to the integrated circuit, and a pad bridge disposed on front surfaces of the printed circuit board and the integrated circuit by using the adhesive member and configured to electrically connect the printed circuit board with the integrated circuit. An area of a region of the ultrasound probe contacting the human body may be reduced without reducing the size of the transducer array, and the integrated circuit and the printed circuit board may be integrally connected by using the adhesive member.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: September 17, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eunsung Lee, Youngil Kim, Jong Keun Song, Minseog Choi
  • Patent number: 10351419
    Abstract: Integrated microelectromechanical systems (MEMS) acoustic sensor devices are disclosed. Integrated MEMS acoustic sensor devices can comprise a MEMS acoustic sensor element and a pressure sensor within the back cavity associated with the MEMS acoustic sensor element. Integrated MEMS acoustic sensor devices can comprise a port adapted to receive acoustic waves or pressure. Methods of fabrication are also disclosed.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: July 16, 2019
    Assignee: INVENSENSE, INC.
    Inventors: Jia Gao, Brian Kim, Peter George Hartwell, Mozafar Maghsoudnia
  • Patent number: 10322929
    Abstract: This disclosure describes a monolithic integrated device that comprises a substrate layer being the base of the device, an inter-layer dielectric disposed on top of the substrate layer and below a passivation layer, an electronic circuitry formed within the inter-layer dielectric and supported by the substrate layer, the electronic circuitry comprises a plurality of metal layers formed by one or more spaced apart metals; and at least one micromachined ultrasonic transducer. Each micromachined ultrasonic transducer comprises a bottom electrode disposed on top of the passivation layer and connected to the electronic circuitry, a piezoelectric disposed on top of the bottom electrode, a top electrode disposed on top of the piezoelectric, and an elastic layer positioned on top of the top electrode. There is a cavity formed below the bottom electrode that extends from the passivation layer to a portion of the inter-layer dielectric.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: June 18, 2019
    Assignee: Silterra Malaysia Sdn. Bhd.
    Inventors: Mohanraj Soundara Pandian, Arjun Kumar Kantimahanti
  • Patent number: 10298203
    Abstract: A chip stack having a protection structure for semiconductor device package comprises a first chip and a second chip stacked with each other. A first surface of the first chip and a second surface of the second chip are facing to each other. At least one metal pillar is formed on at least one of the first surface and the second surface and connected with the other. At least one protection ring is formed on at least one of the first surface and the second surface and having a first gap with the other. At least one electrical device is formed on at least one of the first surface and the second surface and is located inside at least one of the at least one protection ring, wherein the at least one electrical device includes a temperature sensor.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: May 21, 2019
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Pei-Chun Liao, Po-Wei Ting, Chih-Feng Chiang, Yu-Kai Wu, Yu-Fan Chang, Re-Ching Lin, Shu-Hsiao Tsai, Cheng-Kuo Lin
  • Patent number: 10294098
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: May 21, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Patent number: 10274519
    Abstract: A wafer test machine is disclosed. The wafer test machine comprises a main body having a chamber defined therein, wherein a probe card is disposed at an upper portion of the chamber; a chuck for fixing a wafer in the chamber; a moving unit for moving the chuck in the chamber, thus making a contact between the probe card and the wafer; and a laser cleaning apparatus for cleaning the probe card in the chamber using a laser beam, when the probe card does not contact the wafer.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: April 30, 2019
    Inventors: Jong Myoung Lee, Kyu Pil Lee, Seong Ho Jo
  • Patent number: 10269747
    Abstract: Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a plurality of contact pads over a substrate, and forming an insulating material over the plurality of contact pads and the substrate. The insulating material is patterned to form an opening over each of the plurality of contact pads, and the plurality of contact pads is cleaned. The method includes forming an under-ball metallization (UBM) structure over the plurality of contact pads and portions of the insulating material. Cleaning the plurality of contact pads recesses a top surface of each of the plurality of contact pads.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yi-Yang Lei, Szu-Yu Yeh, Yu-Ren Chen, Hung-Jui Kuo, Chung-Shi Liu
  • Patent number: 10163966
    Abstract: Some embodiments of the present disclosure provide a method of manufacturing a back side illuminated (BSI) image sensor. The method includes receiving a semiconductive substrate; forming a photosensitive element at a front side of the semiconductive substrate; forming a transistor coupled to the photosensitive element; forming a recess at a back side of the semiconductive substrate; forming a first dielectric layer lining to a side portion of the recess and over the back side of the semiconductor substrate; covering a conductive material over the first dielectric layer and filling in the recess; forming a conductive column on top of the recess by patterning the conductive material; and forming a second dielectric layer covering the conductive column and the first dielectric layer.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: December 25, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yun-Wei Cheng, Tsung-Han Tsai, Chun-Hao Chou, Kuo-Cheng Lee, Volume Chien, Yung-Lung Hsu
  • Patent number: 10046965
    Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: August 14, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Patent number: 10029911
    Abstract: A method for manufacturing a micromechanical component is provided including a substrate and including a cap, which is connected to the substrate and, together with the substrate, encloses a first cavity, a first pressure prevailing and a first gas mixture having a first chemical composition being enclosed in the first cavity, the cap together with the substrate enclosing a second cavity, a second pressure prevailing and a second gas mixture having a second chemical composition being enclosed in the second cavity. A recess situated essentially between the first cavity and the second cavity is formed for diverting at least one first particle type of the first gas mixture and/or at least one second particle type of the second gas mixture.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: July 24, 2018
    Assignee: ROBERT BOSCH GMBH
    Inventors: Achim Breitling, Frank Reichenbach, Jochen Reinmuth, Julia Amthor
  • Patent number: 9981842
    Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: May 29, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy, Anthony K. Stamper, Eric J. White
  • Patent number: 9958349
    Abstract: A pressure sensor comprises a deformable membrane deflecting in response to pressure applied, a first stationary electrode, and a second electrode coupled to the deformable membrane, for determining a change in a capacitance between the first and the second electrode in response to the pressure applied. At least one of the first and the second electrode comprises a getter material for collecting gas molecules.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: May 1, 2018
    Assignee: INVENSENSE, INC.
    Inventors: Johannes Schumm, Andreas Reinhard, Thomas Kraehenbuehl, Stefan Thiele, Rene Hummel, Chung-Hsien Lin, Wang Shen Su, Tsung Lin Tang, Chia Min Lin
  • Patent number: 9938137
    Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: April 10, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy, Anthony K. Stamper, Eric J. White
  • Patent number: 9932222
    Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: April 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy, Anthony K. Stamper, Eric J. White
  • Patent number: 9919920
    Abstract: Systems and methods are provided for fabricating a microelectromechanical system (MEMS) sensor system. A first conductive layer is provided over a pad. A second conductive layer is provided over the pad, over an outgassing layer, and over a conductive bump stop structure. A first etch is performed to remove a portion of the second conductive layer over the pad. A second etch is performed, using a single mask, to remove a portion of the first conductive layer over the pad and to remove the second conductive layer over the outgassing layer.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: March 20, 2018
    Assignee: INVENSENSE, INC.
    Inventor: Daesung Lee
  • Patent number: 9884758
    Abstract: The present disclosure relates to a MEMS package having an outgassing element configured to adjust a pressure within a hermetically sealed cavity by inducing outgassing of into the cavity, and an associated method. In some embodiments, the method is performed by forming an outgassing element within a passivation layer over a CMOS substrate and forming an outgassing resistive layer to cover the outgassing element. The outgassing resistive layer is removed from over the outgassing element, and the MEMS substrate is bonded to a front side of the CMOS substrate to enclose a first MEMS device within a first cavity and a second MEMS device within a second cavity. After removing the outgassing resistive layer, the outgassing element releases a gas into the second cavity to increase a second pressure of the second cavity to be greater than a first pressure of the first cavity.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: February 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shyh-Wei Cheng, Hsi-Cheng Hsu, Hsin-Yu Chen, Ji-Hong Chiang, Jui-Chun Weng, Wei-Ding Wu, Yu-Jui Wu, Ching-Hsiang Hu, Ming-Tsung Chen
  • Patent number: 9731963
    Abstract: Semiconductor manufacturing processes include providing a first substrate having a first passivation layer disposed above a patterned top-level metal layer, and further having a second passivation layer disposed over the first passivation layer; the second passivation layer has a top surface. The processes further include forming an opening in a first portion of the second passivation layer, and the opening exposes a portion of a surface of the first passivation layer. The processes further include patterning the second and first passivation layers to expose portions of the patterned top-level metal layer and bonding a second substrate and the first substrate to each other. The bonding occurs within a temperature range in which at least the exposed portion of the first passivation layer undergoes outgassing.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: August 15, 2017
    Assignee: Invensense, Inc.
    Inventors: Cerina Zhang, Martin Lim, Jongwoo Shin, Joseph Seeger
  • Patent number: 9708179
    Abstract: In some embodiments, the present disclosure relates to a MEMs (microelectromechanical system) package device having a getter layer. The MEMs package includes a first substrate having a cavity located within an upper surface of the first substrate. The cavity has roughened interior surfaces. A getter layer is arranged onto the roughened interior surfaces of the cavity. A bonding layer is arranged on the upper surface of the first substrate on opposing sides of the cavity, and a second substrate bonded to the first substrate by the bonding layer. The second substrate is arranged over the cavity. The roughened interior surfaces of the cavity enables more effective absorption of residual gases, thereby increasing the efficiency of a gettering process.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: July 18, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yuan-Chih Hsieh, Li-Cheng Chu, Hung-Hua Lin, Chih-Jen Chan, Lan-Lin Chao
  • Patent number: 9638597
    Abstract: A differential pressure sensor assembly includes a transducer having a first sensing surface and a second sensing surface. The second sensing surface is contained in a cavity. An Integrated Circuit (IC) is hermetically coupled to the transducer. The IC has a first aperture aligned to the cavity. A lead frame is coupled to the IC. The lead frame has a second aperture aligned to the first aperture of the IC. A package encapsulates the transducer, the IC and the lead frame. The package has a third aperture exposed to the first sensing surface. The package includes a molding compound providing a hermetic seal between the third aperture of the package and the first aperture of the IC. The molding compound is separated from the transducer by an encroachment distance.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: May 2, 2017
    Assignee: NXP USA, Inc.
    Inventors: Stephen R. Hooper, Darrel R. Frear, Thomas C. Speight
  • Patent number: 9625336
    Abstract: A pressure sensor (1) is specified, comprising a housing (2), a membrane (3), which forms with the housing (2) a chamber (4) closed off toward the outside, and a filling opening (6) for filling the chamber (4) with a fluid medium (5). The filling opening (6) is closed by means of a soldering or welding closure (7, 8). Furthermore, a method for producing a pressure sensor (1) is specified, wherein a housing (2), which together with a membrane (3) forms a chamber (4), is provided, the chamber (4) is filled with a fluid medium (5) through a filling opening (6), and the filling opening (6) is subsequently closed by means of soldering or welding.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: April 18, 2017
    Assignee: EPCOS AG
    Inventors: Peter Thiele, Christian Wohlgemuth
  • Patent number: 9620547
    Abstract: A high sensitivity image sensor comprises an epitaxial layer of silicon that is intrinsic or lightly p doped (such as a doping level less than about 1013 cm?3). CMOS or CCD circuits are fabricated on the front-side of the epitaxial layer. Epitaxial p and n type layers are grown on the backside of the epitaxial layer. A pure boron layer is deposited on the n-type epitaxial layer. Some boron is driven a few nm into the n-type epitaxial layer from the backside during the boron deposition process. An anti-reflection coating may be applied to the pure boron layer. During operation of the sensor a negative bias voltage of several tens to a few hundred volts is applied to the boron layer to accelerate photo-electrons away from the backside surface and create additional electrons by an avalanche effect. Grounded p-wells protect active circuits as needed from the reversed biased epitaxial layer.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: April 11, 2017
    Assignee: KLA-Tencor Corporation
    Inventors: Yung-Ho Alex Chuang, Jingjing Zhang, John Fielden