Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor Patents (Class 438/51)
  • Patent number: 10413275
    Abstract: Disclosed herein is an ultrasound probe including a transducer array configured to generate ultrasonic waves, an integrated circuit disposed on a back surface of the transducer array by using an adhesive member, a printed circuit board connected to the integrated circuit and configured to output a signal to the integrated circuit, and a pad bridge disposed on front surfaces of the printed circuit board and the integrated circuit by using the adhesive member and configured to electrically connect the printed circuit board with the integrated circuit. An area of a region of the ultrasound probe contacting the human body may be reduced without reducing the size of the transducer array, and the integrated circuit and the printed circuit board may be integrally connected by using the adhesive member.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: September 17, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eunsung Lee, Youngil Kim, Jong Keun Song, Minseog Choi
  • Patent number: 10351419
    Abstract: Integrated microelectromechanical systems (MEMS) acoustic sensor devices are disclosed. Integrated MEMS acoustic sensor devices can comprise a MEMS acoustic sensor element and a pressure sensor within the back cavity associated with the MEMS acoustic sensor element. Integrated MEMS acoustic sensor devices can comprise a port adapted to receive acoustic waves or pressure. Methods of fabrication are also disclosed.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: July 16, 2019
    Assignee: INVENSENSE, INC.
    Inventors: Jia Gao, Brian Kim, Peter George Hartwell, Mozafar Maghsoudnia
  • Patent number: 10322929
    Abstract: This disclosure describes a monolithic integrated device that comprises a substrate layer being the base of the device, an inter-layer dielectric disposed on top of the substrate layer and below a passivation layer, an electronic circuitry formed within the inter-layer dielectric and supported by the substrate layer, the electronic circuitry comprises a plurality of metal layers formed by one or more spaced apart metals; and at least one micromachined ultrasonic transducer. Each micromachined ultrasonic transducer comprises a bottom electrode disposed on top of the passivation layer and connected to the electronic circuitry, a piezoelectric disposed on top of the bottom electrode, a top electrode disposed on top of the piezoelectric, and an elastic layer positioned on top of the top electrode. There is a cavity formed below the bottom electrode that extends from the passivation layer to a portion of the inter-layer dielectric.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: June 18, 2019
    Assignee: Silterra Malaysia Sdn. Bhd.
    Inventors: Mohanraj Soundara Pandian, Arjun Kumar Kantimahanti
  • Patent number: 10298203
    Abstract: A chip stack having a protection structure for semiconductor device package comprises a first chip and a second chip stacked with each other. A first surface of the first chip and a second surface of the second chip are facing to each other. At least one metal pillar is formed on at least one of the first surface and the second surface and connected with the other. At least one protection ring is formed on at least one of the first surface and the second surface and having a first gap with the other. At least one electrical device is formed on at least one of the first surface and the second surface and is located inside at least one of the at least one protection ring, wherein the at least one electrical device includes a temperature sensor.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: May 21, 2019
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Pei-Chun Liao, Po-Wei Ting, Chih-Feng Chiang, Yu-Kai Wu, Yu-Fan Chang, Re-Ching Lin, Shu-Hsiao Tsai, Cheng-Kuo Lin
  • Patent number: 10294098
    Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: May 21, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Hua Lin, Chang-Ming Wu, Chung-Yi Yu, Ping-Yin Liu, Jung-Huei Peng
  • Patent number: 10274519
    Abstract: A wafer test machine is disclosed. The wafer test machine comprises a main body having a chamber defined therein, wherein a probe card is disposed at an upper portion of the chamber; a chuck for fixing a wafer in the chamber; a moving unit for moving the chuck in the chamber, thus making a contact between the probe card and the wafer; and a laser cleaning apparatus for cleaning the probe card in the chamber using a laser beam, when the probe card does not contact the wafer.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: April 30, 2019
    Inventors: Jong Myoung Lee, Kyu Pil Lee, Seong Ho Jo
  • Patent number: 10269747
    Abstract: Semiconductor devices, methods of manufacture thereof, and packaged semiconductor devices are disclosed. In one embodiment, a method of manufacturing a semiconductor device includes forming a plurality of contact pads over a substrate, and forming an insulating material over the plurality of contact pads and the substrate. The insulating material is patterned to form an opening over each of the plurality of contact pads, and the plurality of contact pads is cleaned. The method includes forming an under-ball metallization (UBM) structure over the plurality of contact pads and portions of the insulating material. Cleaning the plurality of contact pads recesses a top surface of each of the plurality of contact pads.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yi-Yang Lei, Szu-Yu Yeh, Yu-Ren Chen, Hung-Jui Kuo, Chung-Shi Liu
  • Patent number: 10163966
    Abstract: Some embodiments of the present disclosure provide a method of manufacturing a back side illuminated (BSI) image sensor. The method includes receiving a semiconductive substrate; forming a photosensitive element at a front side of the semiconductive substrate; forming a transistor coupled to the photosensitive element; forming a recess at a back side of the semiconductive substrate; forming a first dielectric layer lining to a side portion of the recess and over the back side of the semiconductor substrate; covering a conductive material over the first dielectric layer and filling in the recess; forming a conductive column on top of the recess by patterning the conductive material; and forming a second dielectric layer covering the conductive column and the first dielectric layer.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: December 25, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yun-Wei Cheng, Tsung-Han Tsai, Chun-Hao Chou, Kuo-Cheng Lee, Volume Chien, Yung-Lung Hsu
  • Patent number: 10046965
    Abstract: The present disclosure provides a CMOS structure, including a substrate, a metallization layer over the substrate, a sensing structure over the metallization layer, and a signal transmitting structure adjacent to the sensing structure. The sensing structure includes an outgassing layer over the metallization layer, a patterned outgassing barrier over the outgassing layer; and an electrode over the patterned outgassing barrier. The signal transmitting structure electrically couples the electrode and the metallization layer.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: August 14, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jung-Huei Peng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Patent number: 10029911
    Abstract: A method for manufacturing a micromechanical component is provided including a substrate and including a cap, which is connected to the substrate and, together with the substrate, encloses a first cavity, a first pressure prevailing and a first gas mixture having a first chemical composition being enclosed in the first cavity, the cap together with the substrate enclosing a second cavity, a second pressure prevailing and a second gas mixture having a second chemical composition being enclosed in the second cavity. A recess situated essentially between the first cavity and the second cavity is formed for diverting at least one first particle type of the first gas mixture and/or at least one second particle type of the second gas mixture.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: July 24, 2018
    Assignee: ROBERT BOSCH GMBH
    Inventors: Achim Breitling, Frank Reichenbach, Jochen Reinmuth, Julia Amthor
  • Patent number: 9981842
    Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: May 29, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy, Anthony K. Stamper, Eric J. White
  • Patent number: 9958349
    Abstract: A pressure sensor comprises a deformable membrane deflecting in response to pressure applied, a first stationary electrode, and a second electrode coupled to the deformable membrane, for determining a change in a capacitance between the first and the second electrode in response to the pressure applied. At least one of the first and the second electrode comprises a getter material for collecting gas molecules.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: May 1, 2018
    Assignee: INVENSENSE, INC.
    Inventors: Johannes Schumm, Andreas Reinhard, Thomas Kraehenbuehl, Stefan Thiele, Rene Hummel, Chung-Hsien Lin, Wang Shen Su, Tsung Lin Tang, Chia Min Lin
  • Patent number: 9938137
    Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: April 10, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy, Anthony K. Stamper, Eric J. White
  • Patent number: 9932222
    Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes forming a Micro-Electro-Mechanical System (MEMS) beam structure by venting both tungsten material and silicon material above and below the MEMS beam to form an upper cavity above the MEMS beam and a lower cavity structure below the MEMS beam.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: April 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Brigham, Christopher V. Jahnes, Cameron E. Luce, Jeffrey C. Maling, William J. Murphy, Anthony K. Stamper, Eric J. White
  • Patent number: 9919920
    Abstract: Systems and methods are provided for fabricating a microelectromechanical system (MEMS) sensor system. A first conductive layer is provided over a pad. A second conductive layer is provided over the pad, over an outgassing layer, and over a conductive bump stop structure. A first etch is performed to remove a portion of the second conductive layer over the pad. A second etch is performed, using a single mask, to remove a portion of the first conductive layer over the pad and to remove the second conductive layer over the outgassing layer.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: March 20, 2018
    Assignee: INVENSENSE, INC.
    Inventor: Daesung Lee
  • Patent number: 9884758
    Abstract: The present disclosure relates to a MEMS package having an outgassing element configured to adjust a pressure within a hermetically sealed cavity by inducing outgassing of into the cavity, and an associated method. In some embodiments, the method is performed by forming an outgassing element within a passivation layer over a CMOS substrate and forming an outgassing resistive layer to cover the outgassing element. The outgassing resistive layer is removed from over the outgassing element, and the MEMS substrate is bonded to a front side of the CMOS substrate to enclose a first MEMS device within a first cavity and a second MEMS device within a second cavity. After removing the outgassing resistive layer, the outgassing element releases a gas into the second cavity to increase a second pressure of the second cavity to be greater than a first pressure of the first cavity.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: February 6, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shyh-Wei Cheng, Hsi-Cheng Hsu, Hsin-Yu Chen, Ji-Hong Chiang, Jui-Chun Weng, Wei-Ding Wu, Yu-Jui Wu, Ching-Hsiang Hu, Ming-Tsung Chen
  • Patent number: 9731963
    Abstract: Semiconductor manufacturing processes include providing a first substrate having a first passivation layer disposed above a patterned top-level metal layer, and further having a second passivation layer disposed over the first passivation layer; the second passivation layer has a top surface. The processes further include forming an opening in a first portion of the second passivation layer, and the opening exposes a portion of a surface of the first passivation layer. The processes further include patterning the second and first passivation layers to expose portions of the patterned top-level metal layer and bonding a second substrate and the first substrate to each other. The bonding occurs within a temperature range in which at least the exposed portion of the first passivation layer undergoes outgassing.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: August 15, 2017
    Assignee: Invensense, Inc.
    Inventors: Cerina Zhang, Martin Lim, Jongwoo Shin, Joseph Seeger
  • Patent number: 9708179
    Abstract: In some embodiments, the present disclosure relates to a MEMs (microelectromechanical system) package device having a getter layer. The MEMs package includes a first substrate having a cavity located within an upper surface of the first substrate. The cavity has roughened interior surfaces. A getter layer is arranged onto the roughened interior surfaces of the cavity. A bonding layer is arranged on the upper surface of the first substrate on opposing sides of the cavity, and a second substrate bonded to the first substrate by the bonding layer. The second substrate is arranged over the cavity. The roughened interior surfaces of the cavity enables more effective absorption of residual gases, thereby increasing the efficiency of a gettering process.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: July 18, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yuan-Chih Hsieh, Li-Cheng Chu, Hung-Hua Lin, Chih-Jen Chan, Lan-Lin Chao
  • Patent number: 9638597
    Abstract: A differential pressure sensor assembly includes a transducer having a first sensing surface and a second sensing surface. The second sensing surface is contained in a cavity. An Integrated Circuit (IC) is hermetically coupled to the transducer. The IC has a first aperture aligned to the cavity. A lead frame is coupled to the IC. The lead frame has a second aperture aligned to the first aperture of the IC. A package encapsulates the transducer, the IC and the lead frame. The package has a third aperture exposed to the first sensing surface. The package includes a molding compound providing a hermetic seal between the third aperture of the package and the first aperture of the IC. The molding compound is separated from the transducer by an encroachment distance.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: May 2, 2017
    Assignee: NXP USA, Inc.
    Inventors: Stephen R. Hooper, Darrel R. Frear, Thomas C. Speight
  • Patent number: 9625336
    Abstract: A pressure sensor (1) is specified, comprising a housing (2), a membrane (3), which forms with the housing (2) a chamber (4) closed off toward the outside, and a filling opening (6) for filling the chamber (4) with a fluid medium (5). The filling opening (6) is closed by means of a soldering or welding closure (7, 8). Furthermore, a method for producing a pressure sensor (1) is specified, wherein a housing (2), which together with a membrane (3) forms a chamber (4), is provided, the chamber (4) is filled with a fluid medium (5) through a filling opening (6), and the filling opening (6) is subsequently closed by means of soldering or welding.
    Type: Grant
    Filed: May 10, 2012
    Date of Patent: April 18, 2017
    Assignee: EPCOS AG
    Inventors: Peter Thiele, Christian Wohlgemuth
  • Patent number: 9620547
    Abstract: A high sensitivity image sensor comprises an epitaxial layer of silicon that is intrinsic or lightly p doped (such as a doping level less than about 1013 cm?3). CMOS or CCD circuits are fabricated on the front-side of the epitaxial layer. Epitaxial p and n type layers are grown on the backside of the epitaxial layer. A pure boron layer is deposited on the n-type epitaxial layer. Some boron is driven a few nm into the n-type epitaxial layer from the backside during the boron deposition process. An anti-reflection coating may be applied to the pure boron layer. During operation of the sensor a negative bias voltage of several tens to a few hundred volts is applied to the boron layer to accelerate photo-electrons away from the backside surface and create additional electrons by an avalanche effect. Grounded p-wells protect active circuits as needed from the reversed biased epitaxial layer.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: April 11, 2017
    Assignee: KLA-Tencor Corporation
    Inventors: Yung-Ho Alex Chuang, Jingjing Zhang, John Fielden
  • Patent number: 9615448
    Abstract: Fabrication of thin sheets of glass or other substrate material for use in devices such as touch sensor panels is disclosed. A pair of thick glass sheets, typically with thicknesses of 0.5 mm or greater each, may each be patterned with thin film on a surface, sealed together to form a sandwich with the patterned surfaces facing each other and spaced apart by removable spacers, either or both thinned on their outside surfaces to thicknesses of less than 0.5 mm each, and separated into two thin glass sheets. A single thick glass sheet, typically with a thickness of 0.5 mm or greater, may be patterned, covered with a protective layer over the pattern, thinned on its outside surface to a thickness of less than 0.5 mm, and the protective layer removed. This thinness of less than 0.5 mm may be accomplished using standard LCD equipment, despite the equipment having a sheet minimum thickness requirement of 0.5 mm.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: April 4, 2017
    Assignee: APPLE INC.
    Inventors: Casey J. Feinstein, John Z. Zhong, Steve Porter Hotelling, Shih Chang Chang
  • Patent number: 9607918
    Abstract: Fan-Out Wafer Level Packages (FO-WLPs) and methods for fabricating FO-WLPs containing Embedded Ground Planes (EGPs) and backside EGP interconnect structures are provided. In one embodiment, the method includes electrically coupling an EGP to a backside terminal of a first microelectronic device through a backside EGP interconnect structure. A molded package body is formed around the first microelectronic device, the EGP, and the EGP interconnect structure. The molded package body has a frontside at which the EGP is exposed. One or more Redistribution Layers are formed over the frontside of the molded packaged body and contain at least one interconnect line electrically coupled to the backside contact through the EGP and the backside EGP interconnect structure.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: March 28, 2017
    Assignee: NXP USA, INC.
    Inventors: Zhiwei Gong, Weng F. Yap
  • Patent number: 9586811
    Abstract: The present disclosure provides an embodiment of a micro-electro-mechanical system (MEMS) structure, the MEMS structure comprising a MEMS substrate; a first and second conductive plugs of a semiconductor material disposed on the MEMS substrate, wherein the first conductive plug is configured for electrical interconnection and the second conductive plug is configured as an anti-stiction bump; a MEMS device configured on the MEMS substrate and electrically coupled with the first conductive plug; and a cap substrate bonded to the MEMS substrate such that the MEMS device is enclosed therebetween.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: March 7, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Hua Chu, Kuei-Sung Chang, Chung-Hsien Lin
  • Patent number: 9491558
    Abstract: A system and a method are provided for testing a MEMS microphone during manufacture by using a film to obstruct the acoustic ports of the microphone. The microphone testing is performed while the microphones are still in an array and mounted on a film frame. By performing the testing while the acoustic ports of the microphone are covered with film, unwanted, external noise is attenuated.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: November 8, 2016
    Assignee: Robert Bosch GmbH
    Inventors: Andrew J. Doller, David Pravlik
  • Patent number: 9469522
    Abstract: In one embodiment, a method of forming an out-of-plane electrode includes forming an oxide layer above an upper surface of a device layer, etching an etch stop perimeter defining trench extending through the oxide layer, forming a first cap layer portion on an upper surface of the oxide layer and within the etch stop perimeter defining trench, etching a first electrode perimeter defining trench extending through the first cap layer portion and stopping at the oxide layer, depositing a first material portion within the first electrode perimeter defining trench, depositing a second cap layer portion above the deposited first material portion, and vapor releasing a portion of the oxide layer with the etch stop portion providing a lateral etch stop.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: October 18, 2016
    Assignee: Robert Bosch GmbH
    Inventors: Andrew Graham, Gary Yama, Gary O'Brien
  • Patent number: 9452925
    Abstract: Semiconductor manufacturing processes include providing a first substrate having a first passivation layer disposed above a patterned top-level metal layer, and further having a second passivation layer disposed over the first passivation layer; the second passivation layer has a top surface. The processes further include forming an opening in a first portion of the second passivation layer, and the opening exposes a portion of a surface of the first passivation layer. The processes further include patterning the second and first passivation layers to expose portions of the patterned top-level metal layer and bonding a second substrate and the first substrate to each other. The bonding occurs within a temperature range in which at least the exposed portion of the first passivation layer undergoes outgassing.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: September 27, 2016
    Assignee: InvenSense, Inc.
    Inventors: Cerina Zhang, Martin Lim, Jongwoo Shin, Joseph Seeger
  • Patent number: 9391101
    Abstract: Embodiments of the present disclosure include an image sensor device and methods of forming the same. An embodiment is an image sensor device including a first plurality of pickup regions in a photosensor array area of a substrate, each of first plurality of pickup regions having a first width and a first length, a second plurality of pickup regions in a periphery area of the substrate, the periphery area along at least one side of the photosensor array area, each of second plurality of pickup regions having a second width and a second length.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: July 12, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dun-Nian Yaung, Ching-Chun Wang, Feng-Chi Hung, Jeng-Shyan Lin, Yan-Chih Lu
  • Patent number: 9309106
    Abstract: A MEMS device is provided. The device includes a MEMS wafer, a top cap wafer and a bottom cap wafer. The top and bottom cap wafers are respectively bonded to first and second sides of the MEMS wafer, the MEMS and cap wafers being electrically conductive. The outer side of the top cap wafer is provided with electrical contacts. The MEMS wafer, the top cap wafer and the bottom cap wafer define a cavity for housing a MEMS structure. The device includes insulated conducting pathways extending from within the bottom cap wafer, through the MEMS wafer and through the top cap wafer. The pathways are connected to the respective electrical contacts on the top cap wafer, for routing electrical signals from the bottom cap wafer to the electrical contacts on the top cap wafer. A method of manufacturing the MEMS device is also provided.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: April 12, 2016
    Assignee: Motion Engine Inc.
    Inventors: Robert Mark Boysel, Louis Ross
  • Patent number: 9287237
    Abstract: Hermetically sealed semiconductor wafer packages that include a first bond ring on a first wafer facing a complementary surface of a second bond ring on a second wafer. The package includes first and second standoffs of a first material, having a first thickness, formed on a surface of the first bond ring. The package also includes a eutectic alloy (does not have to be eutectic, typically it will be an alloy not specific to the eutectic ratio of the elements) formed from a second material and the first material to create a hermetic seal between the first and second wafer, the eutectic alloy formed by heating the first and second wafers to a temperature above a reflow temperature of the second material and below a reflow temperature of the first material, wherein the eutectic alloy fills a volume between the first and second standoffs and the first and second bond rings, and wherein the standoffs maintain a prespecified distance between the first bond ring and the second bond ring.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: March 15, 2016
    Assignee: RAYTHEON COMPANY
    Inventor: Cody B. Moody
  • Patent number: 9257393
    Abstract: Fan-Out Wafer Level Packages (FO-WLPs) and methods for fabricating FO-WLPs containing Embedded Ground Planes (EGPs) and backside EGP interconnect structures are provided. In one embodiment, the method includes electrically coupling an EGP to a backside terminal of a first microelectronic device through a backside EGP interconnect structure. A molded package body is formed around the first microelectronic device, the EGP, and the EGP interconnect structure. The molded package body has a frontside at which the EGP is exposed. One or more Redistribution Layers are formed over the frontside of the molded packaged body and contain at least one interconnect line electrically coupled to the backside contact through the EGP and the backside EGP interconnect structure.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: February 9, 2016
    Assignee: FREESCALE SEMICONDUCTOR INC.
    Inventors: Zhiwei Gong, Weng F. Yap
  • Patent number: 9246467
    Abstract: An integrated resonator apparatus includes a piezoelectric resonator and an acoustic Bragg reflector formed adjacent the piezoelectric resonator. The integrated resonator apparatus also includes a mass bias formed over the Bragg reflector on a side of the piezoelectric resonator opposite the piezoelectric resonator.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: January 26, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Byron Neville Burgess, William Robert Krenik, Stuart M. Jacobsen
  • Patent number: 9212052
    Abstract: A packaged microphone has a base and a lid that at least in part form a package having a plurality of exterior sides and an interior chamber. The packaged microphone also has a flexible substrate having a first portion within the interior chamber, and a second portion, extending from the interior chamber, having at least two sets of pads. A MEMS microphone die is mounted to the first portion of the flexible substrate, and each set of pads is in electrical communication with the microphone die. One set of pads is on a first exterior side of the package, and a second set of pads is on a second exterior side of the package.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: December 15, 2015
    Assignee: INVENSENSE, INC.
    Inventor: David Bolognia
  • Patent number: 9214402
    Abstract: A pressure sensor device includes a gel retainer that is mounted or formed on a substrate. The gel retainer has a cavity and a pressure sensing die is mounted inside the cavity. The die is electrically connected to one or more other package elements. A pressure-sensitive gel material is dispensed into the cavity to cover an active region of the pressure sensing die. A mold compound is applied on an upper surface of the substrate outside of the gel retainer.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: December 15, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kee Cheong Fam, Mohd Rusli Ibrahim, Lan Chu Tan
  • Patent number: 9179214
    Abstract: A mobile phone (100) detects at least a direction of an utterance position of a user from the voice input to a plurality of microphones (121,122) and controls an output direction of a voice out of a speaker unit (110) to match the detected utterance position. Accordingly, it is possible to provide sound with sufficient volume only for a specific user without causing noise in the neighborhood. The microphones may form a matrix together with piezoelectric vibrators that form a speaker unit, or may be formed separately from the speaker unit.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: November 3, 2015
    Assignee: NEC CORPORATION
    Inventors: Yuichiro Kishinami, Yasuharu Onishi, Motoyoshi Komoda, Yukio Murata, Jun Kuroda, Shigeo Satou
  • Patent number: 9166559
    Abstract: A SAW filter includes a piezoelectric substrate, a longitudinal coupling portion disposed on a main surface of the piezoelectric substrate, a support layer and cover layers covering the main surface of the piezoelectric substrate with an air gap on the longitudinal coupling portion, and bumps that are disposed on one of the cover layers and are electrically connected to the longitudinal coupling portion. A mount board is mounted on a motherboard. The SAW filter is mounted on the mount board via the bumps.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: October 20, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Syuji Yamato
  • Patent number: 9139424
    Abstract: A method of encapsulating at least one microelectronic device is provided, including encapsulating the device in a cavity hermetically sealed against air, a cap of the cavity including at least one wall permeable to at least one noble gas; injecting the noble gas into the cavity through the wall permeable to the noble gas; hermetically sealing the cavity against air and the injected noble gas; forming the device on at least one first substrate; bonding at least one second substrate to the first substrate, thereby forming the cavity hermetically sealed against air, the wall permeable to the noble gas being formed by part of the second substrate; and forming, between the encapsulating and the injecting, at least one portion of material impermeable to the noble gas such that said portion partially covers the part of the second substrate that forms the wall permeable to the noble gas.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: September 22, 2015
    Assignee: Commissariat à l'énergie atomique et aux énergies alternatives
    Inventors: Stephane Nicolas, Xavier Baillin
  • Patent number: 9139767
    Abstract: The present invention provides methods for hermetically sealing luminescent nanocrystals, as well as compositions and containers comprising hermetically sealed luminescent nanocrystals. By hermetically sealing the luminescent nanocrystals, enhanced lifetime and luminescence can be achieved.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: September 22, 2015
    Assignee: Nanosys, Inc.
    Inventor: Robert S. Dubrow
  • Patent number: 9131325
    Abstract: An assembly (220) includes a MEMS die (222) and an integrated circuit (IC) die (224) attached to a substrate (226). The MEMS die (222) includes a MEMS device (237) formed on a substrate (242). A packaging process (264) entails forming the MEMS device (237) on the substrate (242) and removing a material portion of the substrate (237) surrounding the device (237) to form a cantilevered substrate platform (246) suspended above the substrate (226) at which the MEMS device (237) resides. The MEMS die (222) is electrically interconnected with the IC die (224). A plug element (314) can be positioned overlying the platform (246). Molding compound (32) is applied to encapsulate the die (222), the IC die (224), and substrate (226). Following encapsulation, the plug element (314) can be removed, and a cap (236) can be coupled to the substrate (242) overlying an active region (244) of the MEMS device (237).
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: September 8, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Mark E. Schlarmann, Andrew C. McNeil, Hemant D. Desai
  • Patent number: 9061890
    Abstract: Methods of forming integrated MEMS structures are described. Those methods and structures may include forming at least one MEMS structure on a first substrate, forming a first bonding layer on a top surface of the first substrate, and then coupling the first bonding layer disposed on the first substrate to a second substrate, wherein the second substrate comprises a device layer. The bonding may comprise a layer transfer process, wherein an integrated MEMS device is formed.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: June 23, 2015
    Assignee: Intel Corporation
    Inventor: Rajashree Baskaran
  • Patent number: 9046426
    Abstract: A modular apparatus for attaching sensors and electronics is disclosed. The modular apparatus includes a square recess including a plurality of cavities and a reference cavity such that a pressure sensor can be connected to the modular apparatus. The modular apparatus also includes at least one voltage input hole and at least one voltage output hole operably connected to each of the plurality of cavities such that voltage can be applied to the pressure sensor and received from the pressure sensor.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: June 2, 2015
    Assignee: The United States of America as Represented by the Administrator of National Aeronautics and Space Administration
    Inventor: Robert S Okojie
  • Publication number: 20150143926
    Abstract: Circuits, methods, and apparatus that provide pressure sensing devices having a pressure sensor including a diaphragm supported by a frame. The pressure sensor may be mounted on an application-specific integrated circuit. A passage may extend through the application-specific integrated circuit from its underside to its topside where it may terminate in a cavity formed under the diaphragm. Circuit components may be formed in the second wafer portion and located in areas that are not under the first wafer portion. Circuit components may be formed in the second wafer in areas under the first wafer portion, such as under the frame or under the diaphragm. Circuit components may be formed in the second wafer such that they are partially under the first wafer portion, or partially under the frame or partially under the diaphragm.
    Type: Application
    Filed: November 23, 2013
    Publication date: May 28, 2015
    Applicant: Silicon Microstructures, Inc.
    Inventor: Holger Doering
  • Publication number: 20150145077
    Abstract: A method of stacking a plurality of first dies to a respective plurality of second dies, each one of the first dies having a surface including a surface coupling region which is substantially flat, each one of the second dies having a respective surface including a respective surface coupling region which is substantially flat, the method comprising the steps of: forming, by means of a screen printing technique, an adhesive layer on the first dies at the respective surface coupling regions; and arranging the surface coupling region of each second die in direct physical contact with a respective adhesive layer of a respective first die among said plurality of first dies.
    Type: Application
    Filed: November 26, 2014
    Publication date: May 28, 2015
    Inventors: Conrad Cachia, Kenneth Fonk
  • Publication number: 20150145078
    Abstract: A semiconductor package includes a semiconductor die having a first main side and a second main side opposite the first main side, the first main side having an inner region surrounded by a periphery region. The semiconductor package further includes a film covering the semiconductor die and adhered to the periphery region of the first main side of the semiconductor die. The film has a curved surface so that the inner region of the first main side of the semiconductor die is spaced apart from the film by an air gap. Electrical conductors are attached at a first end to pads at the periphery region of the first main side of the semiconductor die. A corresponding method of manufacture is also provided.
    Type: Application
    Filed: November 26, 2013
    Publication date: May 28, 2015
    Inventor: Chee Yang Ng
  • Publication number: 20150146894
    Abstract: A semiconductor device includes a microphone module implemented on a first semiconductor die and a signal processing module implemented on a second semiconductor die. The microphone module includes a movable microphone element arranged at a main side of the first semiconductor die and the second semiconductor die is mounted to the main side of the first semiconductor die.
    Type: Application
    Filed: November 25, 2013
    Publication date: May 28, 2015
    Applicant: Infineon Technologies AG
    Inventor: Chee Yang Ng
  • Publication number: 20150145076
    Abstract: There is provided a semiconductor package including: an application specific integrated circuit (ASIC) chip including a first bump ball and a second bump ball formed inwardly of the first bump ball; a micro electro mechanical system (MEMS) sensor electrically connected to the second bump ball; a lead frame electrically connected to the first bump ball and including a through hole formed therein; and a molded part covering the ASIC chip, the MEMS sensor, and the lead frame, wherein the ASIC chip is disposed above the lead frame.
    Type: Application
    Filed: February 3, 2014
    Publication date: May 28, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Tae Hyun KIM, Heung Woo PARK, Sun Ho KIM
  • Patent number: 9040334
    Abstract: A method embodiment includes providing a micro-electromechanical (MEMS) wafer including a polysilicon layer having a first and a second portion. A carrier wafer is bonded to a first surface of the MEMS wafer. Bonding the carrier wafer creates a first cavity. A first surface of the first portion of the polysilicon layer is exposed to a pressure level of the first cavity. A cap wafer is bonded to a second surface of the MEMS wafer opposite the first surface of the MEMS wafer. The bonding the cap wafer creates a second cavity comprising the second portion of the polysilicon layer and a third cavity. A second surface of the first portion of the polysilicon layer is exposed to a pressure level of the third cavity. The first cavity or the third cavity is exposed to an ambient environment.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: May 26, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 9040337
    Abstract: Provided are a stretchable electronic device and a method of manufacturing the same. The manufacturing method includes forming coil interconnection on a first substrate, forming a first stretchable insulating layer that covers the coil interconnection, forming a second substrate on the first stretchable insulating layer, separating the first substrate from the coiling interconnection and the first stretchable insulating layer, and forming a transistor on the coil interconnection.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 26, 2015
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chan Woo Park, Jae Bon Koo, Sang Chul Lim, Ji-Young Oh, Soon-Won Jung
  • Publication number: 20150137276
    Abstract: Embodiments of mechanisms for forming a micro-electro mechanical system (MEMS) device are provided. The MEMS device includes a CMOS substrate, a cap substrate, and a MEMS substrate bonded between the CMOS substrate and the cap substrate. The MEMS substrate includes a first movable element and a second movable element. The MEMS device also includes a first closed chamber and a second closed chamber, which are between the MEMS substrate and the cap substrate. The first movable element is in the first closed chamber, and the second movable element is in the second closed chamber. A first pressure of the first closed chamber is higher than a second pressure of the second closed chamber.
    Type: Application
    Filed: November 19, 2013
    Publication date: May 21, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Wen CHENG, Chia-Hua CHU
  • Publication number: 20150137280
    Abstract: A structure and a formation method of a micro-electro mechanical system (MEMS) device are provided. The MEMS device includes a cap substrate and a MEMS substrate bonded with the cap substrate. The MEMS substrate includes a first movable element and a second movable element. The MEMS device also includes a first enclosed space surrounded by the MEMS substrate and the cap substrate, and the first movable element is in the first enclosed space. The MEMS device further includes a second enclosed space surrounded by the MEMS substrate and the cap substrate, and the second movable element is in the second enclosed space. In addition, the MEMS device includes a pressure-changing layer in the first enclosed space.
    Type: Application
    Filed: October 28, 2014
    Publication date: May 21, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Hua CHU, Chun-Wen CHENG, Shang-Ying TSAI, Chin-Wei LIANG