Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor Patents (Class 438/51)
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Publication number: 20140084397Abstract: A wafer-level package for a MEMS integrated device, envisages: a first body integrating a micromechanical structure; a second body having an active region integrating an electronic circuit, coupled to the micromechanical structure; and a third body defining a covering structure for the first body. The second body defines a base portion of the package and has an inner surface coupled to which is the first body, and an outer surface provided on which are electrical contacts towards the electronic circuit; a routing layer has an inner surface set in contact with the outer surface of the second body and an outer surface that carries electrical contact elements towards the external environment. The third body defines a covering portion for covering the package and is directly coupled to the second body for closing a housing space for the first body.Type: ApplicationFiled: September 18, 2013Publication date: March 27, 2014Applicant: STMicroelectronics S.r.I.Inventor: Federico Giovanni Ziglioli
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Patent number: 8680665Abstract: A method and encapsulation of a sensitive mechanical component structure in one embodiment includes a semiconductor substrate, and a film covering a component structure on the substrate, said film including at least one polymer layer, and at least one cavity formed between the component structure and the film, wherein at least one through contact penetrates through the film.Type: GrantFiled: July 15, 2009Date of Patent: March 25, 2014Assignee: Robert Bosch GmbHInventor: Peter Rothacher
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Publication number: 20140080242Abstract: A package structure includes a micro-electromechanical element having a plurality of electrical contacts; a package layer enclosing the micro-electromechanical element and the electrical contacts, with a bottom surface of the micro-electromechanical element exposed from a lower surface of the package layer; a plurality of bonding wires embedded in the package layer, each of the bonding wires having one end connected to one of the electrical contacts, and the other end exposed from the lower surface of the package layer; and a build-up layer structure provided on the lower surface of the package layer, the build-up layer including at least one dielectric layer and a plurality of conductive blind vias formed in the dielectric layer and electrically connected to one ends of the bonding wires. The package structure is easier to accurately control the location of an external electrical contact, and the compatibility of the manufacturing procedures is high.Type: ApplicationFiled: November 13, 2013Publication date: March 20, 2014Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Chun-An Huang, Hsin-Yi Liao, Shih-Kuang Chiu
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Publication number: 20140077316Abstract: Techniques for bonding wafers together are described. The wafers may be bonded via a eutectic bond. In some instances, one wafer has an integrated circuit and a second wafer has a microelectromechanical systems (MEMS) feature. The wafer with an integrated circuit may have a metal formed thereon for bonding purposes and the wafer with the MEMS feature may have a semiconductor formed thereon for bonding purposes.Type: ApplicationFiled: April 9, 2013Publication date: March 20, 2014Applicant: Sand 9, Inc.Inventors: Andrew Sparks, Jan H. Kuypers
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Patent number: 8674496Abstract: A fine pitch package-on-package (PoP), and a method of forming, are provided. The PoP may be formed by placing connections, e.g., solder balls, on a first substrate having a semiconductor die attached thereto. A first reflow process is performed to elongate the solder balls. Thereafter, a second substrate having another semiconductor die attached thereto is connected to the solder balls. A second reflow process is performed to form an hourglass connection.Type: GrantFiled: February 17, 2012Date of Patent: March 18, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Chung Lin, Hsiu-Jen Lin, Cheng-Ting Chen, Chun-Cheng Lin, Ming-Da Cheng, Chung-Shi Liu
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Patent number: 8673670Abstract: Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are disclosed. The method includes layering metal and insulator materials on a sacrificial material formed on a substrate. The method further includes masking the layered metal and insulator materials. The method further includes forming an opening in the masking which overlaps with the sacrificial material. The method further includes etching the layered metal and insulator materials in a single etching process to form the beam structure, such that edges of the layered metal and insulator material are aligned. The method further includes forming a cavity about the beam structure through a venting.Type: GrantFiled: December 15, 2011Date of Patent: March 18, 2014Assignee: International Business Machines CorporationInventors: Brian M. Czabaj, David A. DeMuynck, Anthony K. Stamper
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Patent number: 8674359Abstract: A thin film transistor (TFT), an array substrate including the TFT, and methods of manufacturing the TFT and the array substrate. The TFT includes an active layer, and a metal member that corresponds to a portion of each of the source region and the drain region of the active layer, and is arranged on the active layer, a portion of the metal member contacts the source and drain regions of the active layer and the source and drain electrodes, and portions of the active layer that corresponds to portions below the metal member of the active layer are not doped.Type: GrantFiled: April 4, 2011Date of Patent: March 18, 2014Assignee: Samsung Display Co., Ltd.Inventors: Dae-Hyun Noh, Sung-Ho Kim
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Publication number: 20140070337Abstract: An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate including at least one environmental sensor. The integrated circuit also includes a cap layer located on a major surface of the substrate. The integrated circuit further includes at least one elongate channel for allowing access of said sensor to an environment surrounding the integrated circuit.Type: ApplicationFiled: September 5, 2013Publication date: March 13, 2014Applicant: NXP B. V.Inventors: Willem Frederik Adrianus Besling, Martien Kengen
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Publication number: 20140070383Abstract: A MEMS lead frame package body encloses a MEMS device enclosed in an internal cavity formed by the mold body and cover. A conductive internal shell with a connection window sits in the cavity. The MEMS device is mounted in the shell and electrically coupled to the lead frame through wire bonds directed through the connection window. To accommodate a MEMS microphone, an acoustic aperture extends through the mold body aligned with a hole in the internal shell.Type: ApplicationFiled: March 12, 2013Publication date: March 13, 2014Applicant: Analog Devices, Inc.Inventor: Thomas M. Goida
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Publication number: 20140073927Abstract: An ultrasonic transducer includes: a first electrode layer disposed on an upper substrate and a support; a second electrode layer which is disposed on a lower surface of the upper substrate and is separated from the first electrode layer; an upper electrode disposed on an upper surface of a membrane to contact an upper surface of the first electrode layer; a trench formed through the upper electrode, the membrane, the support, and the upper substrate; and a pad substrate disposed under the upper substrate and including bonding pads that electrically connect to the first and second electrode layers, respectively.Type: ApplicationFiled: September 11, 2013Publication date: March 13, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Seok-whan CHUNG
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Publication number: 20140061824Abstract: A packaging scheme for MEMS device is provided. A method of packaging MEMS device in a semiconductor structure includes forming an insulation fence that surrounds the MEMS device on the semiconductor structure. The method further includes attaching a wafer of dielectric material to the insulation fence. The lid wafer, the insulation fence, and the semiconductor structure enclose the MEMS device.Type: ApplicationFiled: March 4, 2013Publication date: March 6, 2014Applicant: STMICROELECTRONICS, INC.Inventor: STMicroelectronics, Inc.
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Patent number: 8664029Abstract: A process for fabricating a capacitance type tri-axial accelerometer comprises of preparing a wafer having an upper layer, an intermediate layer and a lower layer, etching the lower layer of the wafer to form an isolated proof mass having a core and four segments extending from the core, etching the upper layer of the wafer to form a suspension and four separating plates, etching away a portion of the intermediate layer located between the four segments of the proof mass and the plates of the upper layer, and disposing an electrical conducting means to pass through the intermediate layer from the suspension to the core of the proof mass.Type: GrantFiled: October 19, 2009Date of Patent: March 4, 2014Assignee: Domintech Co., Ltd.Inventor: Ming-Ching Wu
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Patent number: 8658452Abstract: A method of providing microelectromechanical structures (MEMS) that are compatible with silicon CMOS electronics is provided. The method providing for processes and manufacturing sequences limiting the maximum exposure of an integrated circuit upon which the MEMS is manufactured to below 350° C., and potentially to below 250° C., thereby allowing direct manufacturing of the MEMS devices onto electronics, such as Si CMOS circuits. The method further providing for the provisioning of MEMS devices with multiple non-conductive structural layers such as silicon carbide separated with small lateral gaps. Such silicon carbide structures offering enhanced material properties, increased environmental and chemical resilience whilst also allowing novel designs to be implemented taking advantage of the non-conductive material of the structural layer.Type: GrantFiled: July 8, 2009Date of Patent: February 25, 2014Assignee: The Royal Institution for the Advancement of Learning / McGill UniversityInventors: Mourad El-Gamal, Frederic Nabki, Paul-Vahe Cicek
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Patent number: 8659099Abstract: A method for manufacturing a micromechanical structure includes: forming a first insulation layer above a substrate; forming a first micromechanical functional layer on the first insulation layer; forming multiple first trenches in the first micromechanical functional layer, which trenches extend as far as the first insulation layer; forming a second insulation layer on the first micromechanical functional layer, which second insulation layer fills up the first trenches; forming etch accesses in the second insulation layer, which etch accesses locally expose the first micromechanical functional layer; and etching the first micromechanical functional layer through the etch accesses, the filled first trenches and the first insulation layer acting as an etch stop.Type: GrantFiled: August 15, 2012Date of Patent: February 25, 2014Assignee: Robert Bosch GmbHInventors: Jochen Reinmuth, Heribert Weber
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Patent number: 8659167Abstract: A method (80) entails providing (82) a structure (117), providing (100) a controller element (102, 24), and bonding (116) the controller element to an outer surface (52, 64) of the structure. The structure includes a sensor wafer (92) and a cap wafer (94). Inner surfaces (34, 36) of the wafers (92, 94) are coupled together, with sensors (30) interposed between the wafers. One wafer (94, 92) includes a substrate portion (40, 76) with bond pads (42) formed on its inner surface (34, 36). The other wafer (94, 92) conceals the substrate portion (40, 76). After bonding, methodology (80) entails forming (120) conductive elements (60) on the element (102, 24), removing (126) material sections (96, 98, 107) from the wafers to expose the bond pads, forming (130) electrical interconnects (56), applying (134) packaging material (64), and singulating (138) to produce sensor packages (20, 70).Type: GrantFiled: August 29, 2012Date of Patent: February 25, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Philip H. Bowles, Paige M. Holm, Stephen R. Hooper, Raymond M. Roop
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Patent number: 8653634Abstract: A wafer level package including a shield connected to a plurality of conductive elements disposed on a silicon wafer. The conductive elements are arranged to individually enclose micro-structure elements located on the silicon wafer within cavities formed by the conductive elements for better shielding performance. The shield and the conductive elements function as the EMI shield.Type: GrantFiled: June 11, 2012Date of Patent: February 18, 2014Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Chi Tsung Chiu, Ying-Te Ou
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Patent number: 8652866Abstract: A sensor device and method. One embodiment provides a first semiconductor chip having a sensing region. A porous structure element is attached to the first semiconductor chip. A first region of the porous structure element faces the sensing region of the first semiconductor chip. An encapsulation material partially encapsulates the first semiconductor chip and the porous structure element.Type: GrantFiled: January 3, 2013Date of Patent: February 18, 2014Assignee: Infineon Technologies AGInventors: Klaus Elian, Georg Meyer-Berg, Horst Theuss
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Patent number: 8652865Abstract: A MEMS is attached to a bonding wafer in part by forming a support layer over the MEMS. A first eutectic layer is formed over the support layer. The eutectic layer is patterned into segments to relieve stress. A second eutectic layer is formed over the bonding wafer. A eutectic bond is formed with the segments and the second eutectic layer to attach the bonding wafer to the MEMS.Type: GrantFiled: August 16, 2011Date of Patent: February 18, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Lisa H. Karlin, Hemant D. Desai
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Publication number: 20140042565Abstract: A system and a method for forming a packaged MEMS device are disclosed. In one embodiment a packaged MEMS device includes a MEMS device having a first main surface with a first area along a first direction and a second direction, a membrane disposed on the first main surface of the MEMS device and a backplate adjacent to the membrane. The packaged MEMS device further includes an encapsulation material that encapsulates the MEMS device and that defines a back volume, the back volume having a second area along the first direction and the second direction, wherein the first area is smaller than the second area.Type: ApplicationFiled: August 9, 2012Publication date: February 13, 2014Applicant: INFINEON TECHNOLOGIES AGInventors: Edward Fuergut, Horst Theuss, Rainer Leuschner
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Publication number: 20140045290Abstract: A method for manufacturing a semiconductor device is provided, the method comprising: fabricating a semiconductor element on a semiconductor substrate; joining a surface of the semiconductor substrate to a support member, the surface being on a side where the semiconductor element is fabricated; and polishing a surface on an opposite side of the surface of the semiconductor substrate where the semiconductor element is fabricated and reducing a thickness of the semiconductor substrate, in a state where the semiconductor substrate and the support member are joined.Type: ApplicationFiled: March 18, 2011Publication date: February 13, 2014Applicant: OMRON CORPORATIONInventors: Yasuhiro Horimoto, Yusuke Nakagawa, Tadashi Inoue, Toshiyuki Takahashi
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Publication number: 20140042564Abstract: A switch and the manufacturing method thereof are provided. The switch comprises a chip structure providing a one-piece bonding surface. An actuating member of a mechanical switch could receive an external force to contact the one-piece bonding surface so as to actuate the chip structure.Type: ApplicationFiled: April 12, 2012Publication date: February 13, 2014Inventors: Chou-Hsien Tsai, Chia-Chin Su
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Patent number: 8648430Abstract: A semiconductor-centered MEMS device (100) integrates the movable microelectromechanical parts, such as mechanical elements, flexible membranes, and sensors, with the low-cost device package, and leaving only the electronics and signal-processing parts in the integrated circuitry of the semiconductor chip. The package is substrate-based and has an opening through the thickness of the substrate. Substrate materials include polymer tapes with attached metal foil, and polymer-based and ceramic-based multi-metal-layer dielectric composites with attached metal foil. The movable part is formed from the metal foil attached to a substrate surface and extends at least partially across the opening. The chip is flip-assembled to span at least partially across the membrane, and is separated from the membrane by a gap.Type: GrantFiled: November 6, 2012Date of Patent: February 11, 2014Assignee: Texas Instruments IncorporatedInventors: Edgar R. Zuniga-Ortiz, William R. Krenik
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Patent number: 8647962Abstract: The present disclosure provides a method of bonding a plurality of substrates. In an embodiment, a first substrate includes a first bonding layer. The second substrate includes a second bonding layer. The first bonding layer includes silicon; the second bonding layer includes aluminum. The first substrate and the second substrate are bonded forming a bond region having an interface between the first bonding layer and the second bonding layer. A device having a bonding region between substrates is also provided. The bonding region includes an interface between a layer including silicon and a layer including aluminum.Type: GrantFiled: March 23, 2010Date of Patent: February 11, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Martin Liu, Richard Chu, Hung Hua Lin, Hsin-Ting Huang, Jung-Huei Peng, Yuan-Chih Hsieh, Lan-Lin Chao, Chun-Wen Cheng, Chia-Shiung Tsai
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Patent number: 8646335Abstract: A method for producing a contact stress sensor that includes one or more MEMS fabricated sensor elements, where each sensor element of includes a thin non-recessed portion, a recessed portion and a pressure sensitive element adjacent to the recessed portion. An electric circuit is connected to the pressure sensitive element. The circuit includes a pressure signal circuit element configured to provide a signal upon movement of the pressure sensitive element.Type: GrantFiled: January 12, 2012Date of Patent: February 11, 2014Assignee: Lawrence Livermore National Security, LLCInventor: Jack Kotovsky
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Patent number: 8647908Abstract: A semiconductor pressure sensor includes a first substrate having a concave portion and an alignment mark at a main surface thereof, and a second substrate formed on the main surface of the first substrate and having a diaphragm provided to cover a space inside the concave portion of the first substrate and a gauge resistor provided on the diaphragm. The alignment mark is provided to be exposed from the second substrate. Accordingly, it is possible to obtain a semiconductor pressure sensor and a method of manufacturing the same with reduced production costs and with improved pressure measuring accuracy.Type: GrantFiled: March 7, 2012Date of Patent: February 11, 2014Assignee: Mitsubishi Electric CorporationInventors: Eiji Yoshikawa, Shinichi Izuo
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Publication number: 20140035071Abstract: A device with multiple encapsulated functional layers, includes a substrate, a first functional layer positioned above a top surface of the substrate, the functional layer including a first device portion, a first encapsulating layer encapsulating the first functional layer, a second functional layer positioned above the first encapsulating layer, the second functional layer including a second device portion, and a second encapsulating layer encapsulating the second functional layer.Type: ApplicationFiled: July 31, 2012Publication date: February 6, 2014Applicant: Robert Bosch GmbHInventors: Po-Jui Chen, Gary Yama, Matthieu Liger, Andrew Graham
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Publication number: 20140033814Abstract: An overmolded pressure sensor package is provided. The pressure sensor die (Pcell) is capped so that the Pcell has enhanced rigidity to withstand stress effects produced by the molding encapsulant. The Pcell cap includes a hole located away from the Pcell diaphragm, so that external gas pressure can be experienced by the Pcell, while at the same time directing moisture away from the diaphragm. Gel does not need to be used, and instead a soft film can be deposited on the Pcell to protect the Pcell diaphragm from excess moisture, if needed. The Pcell cap can take the form of, for example, a dummy silicon wafer or a functional ASIC.Type: ApplicationFiled: July 31, 2012Publication date: February 6, 2014Inventors: Jian Wen, William G. McDonald
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Patent number: 8642370Abstract: A process of forming a MEMS device with a device cavity underlapping an overlying dielectric layer stack having an etchable sublayer over an etch-resistant lower portion, including: etching through at least the etchable sublayer of the overlying dielectric layer stack in an access hole to expose a lateral face of the etchable sublayer, covering exposed surfaces of the etchable sublayer by protective material, and subsequently performing a cavity etch. A cavity etch mask may cover the exposed surfaces of the etchable sublayer. Alternatively, protective sidewalls may be formed by an etchback process to cover the exposed surfaces of the etchable sublayer. Alternatively, the exposed lateral face of the etchable sublayer may be recessed by an isotropic etch, than isolated by a reflow operation which causes edges of an access hole etch mask to drop and cover the exposed lateral face of the etchable sublayer.Type: GrantFiled: March 5, 2012Date of Patent: February 4, 2014Assignee: Texas Instruments IncorporatedInventors: Ricky Alan Jackson, Karen Hildegard Ralston Kirmse, Kandis Meinel
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Patent number: 8643125Abstract: A structure and a process for a microelectromechanical system (MEMS)-based sensor are provided. The structure for a MEMS-based sensor includes a substrate chip. A first insulating layer covers a top surface of the substrate chip. A device layer is disposed on a top surface of the first insulating layer. The device layer includes a periphery region and a sensor component region. The periphery region and a sensor component region have an air trench therebetween. The component region includes an anchor component and a moveable component. A second insulating layer is disposed on a top surface of the device layer, bridging the periphery region and a portion of the anchor component. A conductive pattern is disposed on the second insulating layer, electrically connecting to the anchor component.Type: GrantFiled: December 15, 2011Date of Patent: February 4, 2014Assignee: Industrial Technology Research InstituteInventors: Lung-Tai Chen, Shih-Chieh Lin, Yu-Wen Hsu
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Patent number: 8643127Abstract: A sensor device and a method of forming comprises a die pad receives a sensor device, such as a MEMS device. The MEMS device has a first coefficient of thermal expansion (CTE). The die pad is made of a material having a second CTE compliant with the first CTE. The die pad includes a base and a support structure with a CTE compliant with the first and second CTE. The die pad has a support structure that protrudes from a base. The support structure has a height and wall thickness which minimize forces felt by the die pad and MEMS device when the base undergoes thermal expansion or contraction forces from a header.Type: GrantFiled: August 21, 2008Date of Patent: February 4, 2014Assignee: S3C, Inc.Inventors: John Dangtran, Roger Horton
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Patent number: 8637943Abstract: An integrated multi-axis mechanical device and integrated circuit system. The integrated system can include a silicon substrate layer, a CMOS device region, four or more mechanical devices, and a wafer level packaging (WLP) layer. The CMOS layer can form an interface region, on which any number of CMOS and mechanical devices can be configured. The mechanical devices can include MEMS devices configured for multiple axes or for at least a first direction. The CMOS layer can be deposited on the silicon substrate and can include any number of metal layers and can be provided on any type of design rule. The integrated MEMS devices can include, but not exclusively, any combination of the following types of sensors: magnetic, pressure, humidity, temperature, chemical, biological, or inertial. Furthermore, the overlying WLP layer can be configured to hermetically seal any number of these integrated devices.Type: GrantFiled: January 2, 2011Date of Patent: January 28, 2014Assignee: mCube Inc.Inventor: Xiao “Charles” Yang
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Publication number: 20140024161Abstract: An inertial sensor including at least one measurement beam and one active body formed of a proof body and of deformable plates, said active body being maintained in suspension inside of a tight enclosure via its plates, the measurement beam connecting a portion of the proof body to an internal wall of said enclosure, said measurement beam having a lower thickness than the proof body.Type: ApplicationFiled: February 2, 2012Publication date: January 23, 2014Applicant: Tronic's MicrosystemsInventors: Stéphane Renard, Antoine Filipe, Joël Collet
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Patent number: 8633049Abstract: A method of bonding of germanium to aluminum between two substrates to create a robust electrical and mechanical contact is disclosed. An aluminum-germanium bond has the following unique combination of attributes: (1) it can form a hermetic seal; (2) it can be used to create an electrically conductive path between two substrates; (3) it can be patterned so that this conduction path is localized; (4) the bond can be made with the aluminum that is available as standard foundry CMOS process. This has the significant advantage of allowing for wafer-level bonding or packaging without the addition of any additional process layers to the CMOS wafer.Type: GrantFiled: December 21, 2011Date of Patent: January 21, 2014Assignee: Invensense, Inc.Inventors: Steven S. Nasiri, Anthony F. Flannery, Jr.
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Publication number: 20140017843Abstract: Various aspects of the present invention, for example and without limitation, comprise a semiconductor device package and/or method for manufacturing a semiconductor device package. Such a device package may, for example, comprise a MEMS device package.Type: ApplicationFiled: July 9, 2013Publication date: January 16, 2014Inventors: Jong Dae Jung, Dong Hyun Bang, Yung Woo Lee, EunNaRa Cho, Byung Jun Kim
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Publication number: 20140015071Abstract: An encapsulated micro-electro-mechanical device, wherein a MEMS chip is encapsulated by a package formed by a first, a second, and a third substrates that are bonded together. The first substrate has a main surface bearing the MEMS chip, the second substrate is bonded to the first substrate and defines a chamber surrounding the MEMS chip, and the third substrate is bonded to the second substrate and upwardly closes the chamber. A grid or mesh structure of electrically conductive material is formed in or on the third substrate and overlies the MEMS chip; the second substrate has a conductive connection structure coating the walls of the chamber, and the first substrate incorporates an electrically conductive region, which forms, together with the conductive layer and the grid or mesh structure, a Faraday cage.Type: ApplicationFiled: September 17, 2013Publication date: January 16, 2014Applicant: STMicroelectronics S.r.l.Inventors: Mark Andrew Shaw, Gianmarco Antonio Camillo
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Publication number: 20140015069Abstract: MEMS devices, packaged MEMS devices, and methods of manufacture thereof are disclosed. In one embodiment, a microelectromechanical system (MEMS) device includes a first MEMS functional structure and a second MEMS functional structure. An interior region of the second MEMS functional structure has a pressure that is different than a pressure of an interior region of the first MEMS functional structure.Type: ApplicationFiled: July 13, 2012Publication date: January 16, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kai-Chih Liang, Chun-Wen Cheng
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Publication number: 20140015072Abstract: The electronic device package includes a package substrate including a frame portion and a cantilever portion surrounded by the frame portion, at least one semiconductor chip mounted on the cantilever portion, and a molding member disposed on the package substrate to cover the at least one semiconductor chip. The cantilever portion has a first edge connected to the frame portion and declines from the first edge toward a second edge located opposite to the first edge. Related methods are also provided.Type: ApplicationFiled: December 18, 2012Publication date: January 16, 2014Applicant: SK HYNIX INC.Inventor: Tae Jim KANG
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Patent number: 8629541Abstract: A semiconductor structure having a ring. The semiconductor structure includes a substrate, at least one chip, and the ring. The substrate has a first surface. The chip is located on the first surface of the substrate and electrically connected to the substrate. The ring has a first portion and a second portion. In various embodiments, the first and second portions different coefficients of thermal expansion (CTE), and or different cross-sectional widths. In another embodiment, the ring includes a third portion having a CTE different from both the first and second CTEs.Type: GrantFiled: April 28, 2011Date of Patent: January 14, 2014Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Min-Shin Ou, Chun-Yang Lee, Jun Zhai
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Publication number: 20140008740Abstract: The present invention relates to a MEMS microphone and a method of manufacturing the same, the MEMS microphone comprising: a monolithic silicon chip incorporating an acoustic sensing element and one or more conditioning CMOS integrated circuits; a silicon-based carrier chip having an acoustic cavity; a substrate for surface mounting the assembly of the monolithic chip and the silicon-based carrier chip thereon; a conductive cover attached and electrically connected to the substrate to accommodates the assembly of the monolithic chip and the silicon-based carrier chip; and an acoustic port formed on either the conductive cover or the substrate for an external acoustic wave to reach the acoustic sensing element, wherein the monolithic silicon chip, the silicon-based carrier chip and the acoustic port are configured in such a way that the diaphragm of the acoustic sensing element can be vibrated by the external sound wave from one side thereof.Type: ApplicationFiled: December 30, 2010Publication date: January 9, 2014Inventors: Zhe Wang, Qinglin Song, Shengli Pang, Fanghui Gu
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Publication number: 20140008737Abstract: A packaged sensor MEMS (100) has a semiconductor chip (101) with a protected cavity (102) including a sensor (105), the cavity surrounded by solder bumps (130) attached to the chip terminals; further a leadframe with elongated and radially positioned leads (131), the central lead ends (131a) attached to the bumps. Insulating material (120) encapsulates chip and central lead ends, leaving the chip surface (101a) opposite the cavity and the peripheral lead ends (131b) un-encapsulated. The un-encapsulated peripheral lead ends are bent into cantilevers for attachment to a horizontal substrate (160), the cantilevers having a geometry to accommodate, under a force lying in the plane of the substrate, elastic bending and stretching beyond the limit of simple elongation based upon inherent material characteristics, especially when supported by lead portions with curved, toroidal, or multiple-bendings geometries.Type: ApplicationFiled: July 6, 2012Publication date: January 9, 2014Applicant: TEXAS INSTRUMENTS INCORPORATEDInventor: Sreenivasan KODURI
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Publication number: 20140008738Abstract: The present subject matter relates to systems and methods for sealing one or more MEMS devices within an encapsulated cavity. A first material layer can be positioned on a substrate, the first material layer comprising a first cavity and a second cavity that each have one or more openings out of the first material layer. At least the first cavity can be exposed to a first atmosphere and sealed while it is exposed to the first atmosphere while not sealing the second cavity. The second cavity can then be exposed to a second atmosphere that is different than the first atmosphere, and the second cavity can be sealed while it is exposed to the second atmosphere.Type: ApplicationFiled: June 26, 2013Publication date: January 9, 2014Applicant: WISPRYInventors: Arthur S. Morris, III, Dana DeReus
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LEADFRAME-BASED PREMOLDED PACKAGE HAVING AIR CHANNEL FOR MICROELECTROMECHANICAL SYSTEM (MEMS) DEVICE
Publication number: 20140011313Abstract: A low-cost microelectromechanical system (MEMS) device has a mass-produced carrier fabricated as a pre-molded leadframe so that the space of the leadframe center is filled with compound and a two-tier stepped recess is created in the center. The first tier is filled by an inset with a first perforation and a second perforation. An integrated circuit chip with an opening and a membrane at the end of the opening, operable as a pressure sensor, microphone, speaker, etc, is assembled on the inset so that the chip opening is aligned with the first perforation. The chip is protected by a cover transected by a vent aligned with the second inset perforation. An air channel extends from the ambient exterior through the vent and the second perforation to the second tier recess, which acts as a channel and connects to the first perforation and the chip opening to the membrane.Type: ApplicationFiled: September 10, 2013Publication date: January 9, 2014Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: James R. Huckabee, Ray H. Purdom -
Patent number: 8624370Abstract: A method of manufacture of an integrated circuit packaging system includes: mounting a device over an integrated circuit having a through via; attaching an interposer, having an opening, and the integrated circuit with the device within the opening; and forming an encapsulation at least partially covering the integrated circuit and the interposer facing the integrated circuit.Type: GrantFiled: March 20, 2009Date of Patent: January 7, 2014Assignee: Stats Chippac Ltd.Inventors: HeeJo Chi, NamJu Cho, Taewoo Lee
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Publication number: 20140001580Abstract: A packaged integrated device includes a package substrate having a first surface and a second surface opposite the first surface, and the package substrate has a hole therethrough. The integrated device package also includes a first lid mounted on the first surface of the package substrate to define a first cavity, and a second lid mounted on the second surface of the package substrate to define a second cavity. A microelectromechanical systems (MEMS) die can be mounted on the first surface of the package substrate inside the first cavity and over the hole. A port can be formed in the first lid or the second lid.Type: ApplicationFiled: June 24, 2013Publication date: January 2, 2014Inventors: David Bolognia, Kieran P. Harney
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Patent number: 8617943Abstract: A method for fabricating a flexible semiconductor device includes: preparing a layered film 80 including a first metal layer 10, an inorganic insulating layer 20, a semiconductor layer 30, and a second metal layer 40 which are sequentially formed; etching the first metal layer 10 to form a gate electrode 12g; compression bonding a resin layer 50 to a surface of the layered film 80 provided with the gate electrode 12g to allow the gate electrode 12g to be embedded in the resin layer 50; and etching the second metal layer 40 to form a source electrode 42s and a drain electrode 42d, wherein the inorganic insulating layer 20 on the gate electrode 12g functions as a gate insulating film 22, and the semiconductor layer 30 between the source electrode 42s and drain electrode 42d on the inorganic insulating layer 20 functions as a channel 32.Type: GrantFiled: July 22, 2009Date of Patent: December 31, 2013Assignee: Panasonic CorporationInventors: Takashi Ichiryu, Seiichi Nakatani, Koichi Hirano, Yoshihisa Yamashita, Shingo Komatsu
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Patent number: 8618619Abstract: A top port MEMS package includes a substrate and an interposer mounted to the substrate. The interposer includes an interposer aperture and an interposer channel fluidly coupled to the interposer aperture. A MEMS electronic component is mounted to the interposer above the interposer aperture. A top port lid includes a top port and a chimney structure fluidly coupling to the top port to the interposer channel. A front volume including the top port, the flue, the interposer channel, and the interposer aperture is acoustically sealed from a relatively large back volume defined by a lid cavity of the top port lid. By acoustically sealing the front volume from the back volume and further by maximizing the back volume, the noise to signal ratio is minimized thus maximizing the sensitivity of top port MEMS microphone package as well as the range of applications.Type: GrantFiled: January 28, 2011Date of Patent: December 31, 2013Inventors: Jeffrey Alan Miks, Louis B. Troche, Jr.
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Publication number: 20130341741Abstract: Described herein are ruggedized wafer level MEMS force dies composed of a platform and a silicon sensor. The silicon sensor employs multiple flexible sensing elements containing Piezoresistive strain gages and wire bonds.Type: ApplicationFiled: June 21, 2013Publication date: December 26, 2013Inventor: Amnon Brosh
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Publication number: 20130341742Abstract: A composite wafer level MEMS force dies including a spacer coupled to a sensor is described herein. The sensor includes at least one flexible sensing element, such as a beam or diaphragm, which have one or more sensor elements formed thereon. Bonding pads connected to the sensor elements are placed on the outer periphery of the sensor. The spacer, which protects the flexible sensing element and the wire bonding pads, is bonded to the sensor. For the beam version, the bond is implemented at the outer edges of the die. For the diaphragm version, the bond is implemented in the center of the die. An interior gap between the spacer and the sensor allows the flexible sensing element to deflect. The gap can also be used to limit the amount of deflection of the flexible sensing element in order to provide overload protection.Type: ApplicationFiled: June 21, 2013Publication date: December 26, 2013Inventor: Amnon Brosh
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Publication number: 20130341737Abstract: One example includes an integrated circuit including at least one electrical interconnects disposed on an elongate are extending away from a main portion of the integrated circuit and a microelectromechanical layer including an oscillating portion, the microelectromechanical layer coupled to the main portion of the integrated circuit.Type: ApplicationFiled: September 18, 2011Publication date: December 26, 2013Applicant: Fairchild Semiconductor CorporationInventors: Janusz Bryzek, John Gardner Bloomsburgh, Cenk Acar
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Publication number: 20130341736Abstract: This invention discloses and claims a cost-effective, wafer-level package process for microelectromechanical devices (MEMS). Specifically, the movable part of MEMS device is encapsulated and protected while in wafer form so that commodity, lead-frame packaging can be used. An overcoat polymer, such as, epoxycyclohexyl polyhedral oligomeric silsesquioxanes (EPOSS) has been used as a mask material to pattern the sacrificial polymer as well as overcoat the air-cavity. The resulting air-cavities are clean, debris-free, and robust. The cavities have substantial strength to withstand molding pressures during lead-frame packaging of the MEMS devices. A wide range of cavities from 20 ?m×400 ?m to 300 ?m×400 ?m have been fabricated and shown to be mechanically stable. These could potentially house MEMS devices over a wide range of sizes. The strength of the cavities has been investigated using nano-indentation and modeled using analytical and finite element techniques.Type: ApplicationFiled: December 6, 2012Publication date: December 26, 2013Applicant: Georgia Tech Research CorporationInventor: Georgia Tech Research Corporation