Plural Responsive Devices (e.g., Array, Etc.) Patents (Class 438/66)
  • Patent number: 10224440
    Abstract: A method for forming a solar cell including steps of (1) providing a semiconductor wafer having an upper surface; (2) applying an electrical contact material to the upper surface, the electrical contact material forming an electrically conductive grid that includes grid lines extending from a bus bar; (3) forming an isolation channel in the semiconductor wafer to define a solar cell portion and a wing portion, wherein the wing portion is electrically isolated from the solar cell portion, and wherein the wing portion is substantially free of the electrical contact material; (4) submerging the semiconductor wafer in a solvent, wherein formation of metal dendrites on the grid lines of the electrically conductive grid is inhibited; and (5) separating the solar cell portion from the wing portion.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: March 5, 2019
    Assignee: The Boeing Company
    Inventors: Xiaobo Zhang, Vincent A. Lim, Hoon H. Lee, John P. Serra, Uming T. Jeng, Steven M. Bunyan, Julie J. Hoskin, Kent E. Barbour, Dimitri D. Krut
  • Patent number: 10153314
    Abstract: The present technology relates to a semiconductor apparatus, a solid-state image pickup device, an image pickup apparatus, and an electronic apparatus capable of improving impedance characteristics while preventing an occurrence of a flare and an interference due to a bonding jig, and achieving downsizing an apparatus. By aligning the heights of a cover glass and a semiconductor device, a distance between the cover glass and the semiconductor device is set to be minimum, and thus it is possible to suppress an occurrence of a flare due to incident light reflected on a side surface of the semiconductor device, and improve the impedance characteristics of the semiconductor device and the semiconductor image pickup device. Further, the interference of the jig used for the semiconductor device is reduced. The present technology can be applied to a CMOS image sensor.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: December 11, 2018
    Assignee: SONY CORPORATION
    Inventor: Satoru Wakiyama
  • Patent number: 9935224
    Abstract: The present invention provides for a multi-layered structure adapted to be applied to the surface of a back-contact back-sheet for a photovoltaic module comprising back-contact solar cells. The multi-layered structure comprises a non-extendible intermediate layer (240) comprised of a dielectric material. The multi-layered structure further comprises an upper layer (280) of an encapsulating material coupled to the upper surface (242) of the intermediate layer, as well as a lower layer (270) of a thermo-adhesive material coupled to the lower surface (244) of the intermediate layer (240). The multi-layered structure also has a plurality of through-holes pierced at predetermined positions.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: April 3, 2018
    Assignee: EBFOIL, S.R.L.
    Inventors: Elisa Baccini, Luigi Marras, Bruno Bucci
  • Patent number: 9842946
    Abstract: The semiconductor device comprises a semiconductor substrate (1), a photosensor (2) integrated in the substrate (1) at a main surface (10), an emitter (12) of radiation mounted above the main surface (10), and a cover (6), which is at least partially transmissive for the radiation, arranged above the main surface (10). The cover (6) comprises a cavity (7), and the emitter (12) is arranged in the cavity (7). A radiation barrier (9) can be provided on a lateral surface of the cavity (7) to inhibit cross-talk between the emitter (12) and the photosensor (2).
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: December 12, 2017
    Assignee: AMS AG
    Inventors: Rainer Minixhofer, Bernhard Stering, Harald Etschmaier
  • Patent number: 9730573
    Abstract: An in-vivo imaging device for capturing one or more narrow band images of the gastrointestinal tract, or other body lumens or cavities of a patient, using one or more narrow band illumination sources and an imager having an array of light sensitive elements.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: August 15, 2017
    Assignee: GIVEN IMAGING LTD.
    Inventor: Amit Pascal
  • Patent number: 9494792
    Abstract: An electroluminescent display or lighting product incorporates a panel including a collection of distinct light-emitting elements formed on a substrate. A plurality of distinct local seals are formed below respective individual light-emitting elements or groups of light-emitting elements. Some embodiments combine a metal foil substrate and glass local seals in a flexible bottom-emitting product. The local seal may be used in conjunction with a continuous thin film encapsulation structure. Optical functions can be provided by each local seal, including refraction, filtering, color shifting, and scattering. Each local seal is formed by depositing a low melting temperature glass powder suspension or paste using inkjet technology, and fusing the glass powder using a scanning laser beam having a tailored beam profile. In other embodiments, a lower encapsulation substrate incorporating local window seals is wholly or partially pre-formed.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: November 15, 2016
    Assignee: Global OLED Technology LLC
    Inventor: Rajeev Rohatgi
  • Patent number: 9196776
    Abstract: A first surface of a first section of a connection member includes a first conductive region, and a second surface of a second section of the connection member includes a second conductive region. The first conductive region is formed along an n-side electrode included in one solar cell, and is electrically connected to the n-side electrode. The second conductive region is formed along a p-side electrode included in a different solar cell, and is electrically connected to the p-side electrode. The first conductive region and the second conductive region are electrically connected to each other.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: November 24, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Shigeharu Taira
  • Patent number: 9184313
    Abstract: Methods and devices for removing entrapped bubbles or air in photovoltaic solar cells during a manufacturing process including an encapsulation process include, for example, wiggling the photovoltaic solar cells or pushing out air bubbles by applying vibrations and/or light pressures. Optional additional steps include liquid wetting or dispensing to or around the photovoltaic solar cell matrix for air releasing before the placement of the matrix into a liquid for encapsulation.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: November 10, 2015
    Assignee: Flextronics AP, LLC
    Inventors: Dennis Willie, Chris Stratas, Tilak Gopalarathnam, Susan Ciby Abraham
  • Patent number: 9099574
    Abstract: An optoelectronic semiconductor chip (12) is disclosed comprising a thin-film semiconductor body (8), which comprises a semiconductor layer sequence (2, 20) having an active region (3) suitable for generating radiation, and comprising a carrier layer (7), which is formed on the semiconductor layer sequence and carries the thin-film semiconductor body.
    Type: Grant
    Filed: September 4, 2006
    Date of Patent: August 4, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Klaus Streubel
  • Patent number: 9074915
    Abstract: The invention concerns a PV system in which a multitude of PV modules are interconnected to PV generators. Each of the PV modules comprises a network interface for transmitting module-specific data to a control device and analyzing the same. The data network is designed as a self-organizing network, in particular as a self-organizing meshed radio network.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: July 7, 2015
    Assignee: Phoenix Contact GmbH & Co. KG
    Inventors: Johannes Kalhoff, Thorsten Temme, Roland Bent
  • Publication number: 20150136207
    Abstract: A roof panel with an integrated photovoltaic module is discussed. The roof panel has at least a substrate and an outer pane, which are laminarily bonded to each other via a thermoplastic layer, and embedded in the thermoplastic layer, at least one photovoltaic system that contains at least two strip-shaped solar cells that are connected in series via at least one electrically conductive connecting element.
    Type: Application
    Filed: May 17, 2013
    Publication date: May 21, 2015
    Inventors: Jean-Christophe Giron, Harald Stoffel, Uwe Van Der Meulen, Andreas Nositschka, Pascal Remy, Marc-Oliver Prast, Dirk Neumann
  • Publication number: 20150137301
    Abstract: A method for manufacturing a solid-state imaging device comprises a first step of preparing an imaging element including a second principal surface having an electrode arranged thereon, and a photoelectric converter part configured to photoelectrically convert the incident energy line so as to generate a signal charge; a second step of preparing a support substrate, provided with at least one through hole extending in a thickness direction thereof, having a third principal surface; a third step of aligning the imaging element and the support substrate with each other so that the one electrode is exposed out of the one through hole while the second and third principal surfaces oppose each other and joining the imaging element and the support substrate to each other; and a fourth step of embedding a conductive member in the through hole after the third step.
    Type: Application
    Filed: February 21, 2013
    Publication date: May 21, 2015
    Inventors: Yasuhito Yoneta, Ryoto Takisawa, Shingo Ishihara, Hisanori Suzuki, Masaharu Muramatsu
  • Patent number: 9035311
    Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a lower capacitor electrode disposed on the gate insulating layer in the capacitor region, an interlayer insulating layer disposed on the substrate, and an upper capacitor electrode disposed on the interlayer insulating layer and facing the lower capacitor electrode, wherein regions of each of the buffer layer, the gate insulating layer, the interlayer insulating layer, the lower capacitor electrode, and the upper capacitor electrode have surfaces in which protrusions having the same shape as grain boundaries of the semiconductor layer are formed. The resultant capacitor has an increased surface area, and therefore, an increased capacitance.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Soo-Beom Jo, Dong-Hyun Lee, Kil-Won Lee, Maxim Lisachenko, Yun-Mo Chung, Bo-Kyung Choi, Jong-Ryuk Park, Ki-Yong Lee
  • Patent number: 9034733
    Abstract: In one embodiment, semiconductor die are singulated from a semiconductor wafer having a backmetal layer by placing the semiconductor wafer onto a carrier tape with the backmetal layer adjacent the carrier tape, forming singulation lines through the semiconductor wafer to expose the backmetal layer within the singulation lines, and separating portions of the backmetal layer within the singulation lines using a pressurized fluid applied to the carrier tape.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: May 19, 2015
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: William F. Burghout, Dennis Lee Conner, Michael J. Seddon, Jay A. Yoder, Gordon M. Grivna
  • Patent number: 9035337
    Abstract: An object is to provide a light-emitting module in which a light-emitting element suffering a short-circuit failure does not cause wasteful electric power consumption. Another object is to provide a light-emitting panel in which a light-emitting element suffering a short-circuit failure does not allow the reliability of an adjacent light-emitting element to lower. Focusing on heat generated by a light-emitting element suffering a short-circuit failure, provided is a structure in which electric power is supplied to a light-emitting element through a positive temperature coefficient thermistor (PTC thermistor) thermally coupled with the light-emitting element.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: May 19, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaaki Hiroki, Satoshi Seo, Yasuo Nakamura
  • Publication number: 20150129017
    Abstract: A lamination stack for etching solar cells is provided. At least two solar cell wafers are attached to corresponding backplane sheets which are larger than the solar cell wafers. Release layers larger than the solar cells and smaller than the backplane sheets are positioned on the backplane sheets on the opposite side of the attached solar cell wafers. The backplane sheets are bonded together along the exposed peripheral boundary formed by the release layers.
    Type: Application
    Filed: July 8, 2014
    Publication date: May 14, 2015
    Inventors: David Dutton, Pranav Anbalagan, Karl-Josef Kramer, Mehrdad M. Moslehi
  • Publication number: 20150129013
    Abstract: A roof panel having an integrated photovoltaic module is described. The roof panel has at least a substrate and an outer panel, which are laminarily bonded to each other by means of a thermoplastic layer, wherein a photovoltaic layer system is embedded in the thermoplastic layer and the substrate contains at least one polymer.
    Type: Application
    Filed: May 17, 2013
    Publication date: May 14, 2015
    Inventors: Andreas Nositschka, Pascal Remy, Marc-Oliver Prast, Dirk Neumann, Harald Stoffel
  • Patent number: 9029183
    Abstract: Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a BSI sensor device with an application specific integrated circuit (ASIC) are disclosed. A bond pad array may be formed in a bond pad area of a BSI sensor where the bond pad array comprises a plurality of bond pads electrically interconnected, wherein each bond pad of the bond pad array is of a small size which can reduce the dishing effect of a big bond pad. The plurality of bond pads of a bond pad array may be interconnected at the same layer of the pad or at a different metal layer. The BSI sensor may be bonded to an ASIC in a face-to-face fashion where the bond pad arrays are aligned and bonded together.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Szu-Ying Chen, Tzu-Jui Wang, Dun-Nian Yaung, Jen-Cheng Liu
  • Patent number: 9023676
    Abstract: A wafer packaging method includes the following steps. A light transmissive carrier is provided. A hydrolytic temporary bonding layer is formed on the light transmissive carrier. A first surface of a light transmissive protection sheet is bonded to the hydrolytic temporary bonding layer, such that the hydrolytic temporary bonding layer is located between the light transmissive protection sheet and the light transmissive carrier. A second surface of the light transmissive protection sheet facing away from the first surface is bonded to a third surface of a wafer. The light transmissive carrier, the hydrolytic temporary bonding layer, the light transmissive protection sheet, and the wafer are immersed in a high temperature liquid, such that adhesion force of the hydrolytic temporary bonding layer is eliminated. The light transmissive protection sheet and the wafer are obtained from the high temperature liquid.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: May 5, 2015
    Assignee: Xintec Inc.
    Inventors: Chih-Hao Chen, Bai-Yao Lou, Shih-Kuang Chen
  • Publication number: 20150114454
    Abstract: A solar cell module and a method for manufacturing the same are disclosed. The solar cell module includes a first solar cell and a second solar cell each including a plurality of first electrodes formed on a back surface of a semiconductor substrate, a plurality of second electrodes which are formed in parallel with the plurality of first electrodes on the back surface of the semiconductor substrate, a first auxiliary electrode connected to the plurality of first electrodes, and a second auxiliary electrode connected to the plurality of second electrodes, and an interconnector for electrically connecting the first auxiliary electrode of the first solar cell to the second auxiliary electrode of the second solar cell.
    Type: Application
    Filed: October 27, 2014
    Publication date: April 30, 2015
    Applicant: LG ELECTRONICS INC.
    Inventors: Taeyoon KIM, Minpyo KIM, Hyeyoung YANG, Taeki WOO
  • Publication number: 20150115290
    Abstract: The invention disclosure relates to a manufacturing method comprising the formation of elemental LED or photovoltaic structures on a first substrate, each comprising at least one p-type layer, an active zone and an n-type layer, formation of a first planar metal layer on the elemental structures, provision of a transfer substrate comprising a second planar metal layer, assembly of the elemental structures with the transfer substrate by bonding of the first and second metal layers by molecular adhesion at room temperature, and removal of the first substrate.
    Type: Application
    Filed: June 14, 2013
    Publication date: April 30, 2015
    Inventor: Pascal Guenard
  • Publication number: 20150108598
    Abstract: There is provided a solid-state imaging device including: a semiconductor substrate that is formed with a photodiode for each pixel; a light shielding film that is laminated on the semiconductor substrate on a side of a light irradiated surface which is irradiated with light, and is formed to include an opening corresponding to a spot in which at least the photodiode is arranged; and a photoelectric conversion film that is laminated to cover the light irradiated surface of the semiconductor substrate and the light shielding film, and is configured to generate an electrical charge by absorbing light. The photoelectric conversion film is formed of a material which has higher light absorptivity than light absorptivity of the semiconductor substrate.
    Type: Application
    Filed: October 14, 2014
    Publication date: April 23, 2015
    Inventor: Terumi Kambe
  • Publication number: 20150107658
    Abstract: A multijunction solar cell including an upper first solar subcell having a first band gap; a second solar subcell adjacent to the first solar subcell and having a second band gap smaller than the first band gap; a first graded interlayer adjacent to the second solar subcell; the first graded interlayer having a third band gap greater than the second band gap; and a third solar subcell adjacent to the first graded interlayer, the third subcell having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell. A second graded interlayer is provided adjacent to the third solar subcell; the second graded interlayer having a fifth band gap greater than the fourth band gap; and a lower fourth solar subcell is provided adjacent to the second graded interlayer, the lower fourth subcell having a sixth band gap smaller than the fourth band gap such that the fourth subcell is lattice mismatched with respect to the third subcell.
    Type: Application
    Filed: April 2, 2014
    Publication date: April 23, 2015
    Applicant: Emcore Soloar Power, Inc.
    Inventors: Arthur Cornfeld, Benjamin Cho
  • Patent number: 8999743
    Abstract: A solar cell module is manufactured by forming silicone coating films (2, 2) on panels (1a, 1b), placing a solar cell matrix (3) on the silicone coating film on panel (1a), providing a seal member (4) consisting of a base seal member (4a) of butyl rubber and protrusive seal segments (4b) of butyl rubber on a peripheral region of panel (1a), mating the two panels together such that the seal member (4) may abut against a peripheral region of panel (1b), and the solar cell matrix (3) may be sandwiched between the silicone coating films (2), and compressing and heating the mated panels (1a, 1b) in vacuum for establishing a seal around the solar cell matrix (3).
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: April 7, 2015
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tomoyoshi Furihata, Hiroto Ohwada, Naoki Yamakawa, Masahiro Hinata
  • Publication number: 20150090319
    Abstract: A solar cell module includes a solar cell module body (11), an adhesive (30), and a support rail (12) bonded and fixed by the adhesive (30) to a back surface of the solar cell module body (11), in which a spacer member (40) for ensuring the thickness of the adhesive (30) is arranged between the back surface of the solar cell module body (11) and an adhesive surface (12a1) of the support rail (12).
    Type: Application
    Filed: April 1, 2013
    Publication date: April 2, 2015
    Inventors: Kazuhiro Mizuo, Takashi Hayakawa
  • Publication number: 20150090314
    Abstract: One embodiment of the present invention provides a solar panel. The solar panel includes a plurality of subsets of solar cells. The solar cells in a subset are coupled in series, and the subsets of solar cells are coupled in parallel. The number of solar cells in a respective subset is sufficiently large such that the output voltage of the solar panel is substantially the same as an output voltage of a conventional solar panel with all of its substantially square shaped solar cells coupled in series.
    Type: Application
    Filed: December 8, 2014
    Publication date: April 2, 2015
    Inventors: Bobby Yang, Peter P. Nguyen, Jiunn Benjamin Heng, Anand J. Reddy, Zheng Xu
  • Patent number: 8993364
    Abstract: Photovoltaic modules may include multiple flexible thin film photovoltaic cells electrically connected in series, and laminated to a substantially transparent top sheet having a conductive grid pattern facing the cells. Methods of manufacturing photovoltaic modules including integrated multi-cell interconnections are provided. Methods may include steps of coordinating, integrating, and registering multiple rolls of substrates in continuous processes.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: March 31, 2015
    Assignee: Hanergy Hi-Tech Power (HK) Limited
    Inventors: Scott Wiedeman, Jeffrey S. Britt, Zulima Rhodes, Eric Sheehan
  • Publication number: 20150083188
    Abstract: This solar cell module is provided with a plurality of solar cells, and connecting members that connect the solar cells to each other. The area of each of the bonding layers that bonds each of the connecting members to the light receiving surface of each of the solar cells is larger than the area of each of the bonding layers that bonds each of the connecting members to the rear surface of each of the solar cells.
    Type: Application
    Filed: December 4, 2014
    Publication date: March 26, 2015
    Inventor: Masahiro IWATA
  • Publication number: 20150087102
    Abstract: A method comprises implanting ions in a substrate to form a plurality of photo diodes, forming an interconnect layer over a first side of the substrate and applying a first halogen treatment process to a second side of the substrate and forming a first silicon-halogen compound layer over the second side of the substrate as a result of applying the first halogen treatment process.
    Type: Application
    Filed: November 19, 2014
    Publication date: March 26, 2015
    Inventors: Shiu-Ko JangJian, Chin-Nan Wu, Chun Che Lin
  • Patent number: 8980676
    Abstract: A method of forming a window cap wafer (WCW) structure for semiconductor devices includes machining a plurality of cavities into a front side of a first substrate; bonding the first substrate to a second substrate, at the front side of the first substrate; removing a back side of the first substrate so as to expose the plurality of cavities, thereby defining the WCW structure comprising the second substrate and a plurality of vertical supports comprised of material of the first substrate.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: March 17, 2015
    Assignee: Raytheon Company
    Inventors: Buu Diep, Stephen H. Black
  • Patent number: 8981206
    Abstract: A photovoltaic cell including: (a) a housing including an at least partially transparent cell wall having an interior surface; (b) an electrolyte, containing an iodide based species; (c) a transparent electrically conductive coating disposed on the interior surface; (d) an anode disposed on the conductive coating, the anode including: (i) a porous film containing titania, the porous film adapted to make intimate contact with the iodide based species, and (ii) a dye, absorbed on a surface of the porous film, the dye and the porous film adapted to convert photons to electrons; (e) a cathode disposed on an interior surface of the housing; (f) electrically-conductive metallic wires, disposed within the cell, and electrically contacting the anode and the coating, and (g) a second electrically conductive coating including an inorganic binder and an inorganic electrically conductive filler, the second coating bridging between each of the wires and the transparent coating.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: March 17, 2015
    Assignee: 3GSolar Photovoltaics Ltd.
    Inventor: Jonathan Goldstein
  • Patent number: 8980675
    Abstract: A method for manufacturing a spectroscopic sensor 1 comprises a first step of forming a cavity layer 21 by etching a surface layer disposed on a handle substrate, a second step of forming a first mirror layer 22 on the cavity layer 21 after the first step, a third step of joining a light-transmitting substrate 3 onto the first mirror layer 22 after the second step, a fourth step of removing the handle substrate from the cavity layer 21 after the third step, a fifth step of forming a second mirror layer 23 on the cavity layer 21 devoid of the handle substrate after the fourth step, and a sixth step of joining a light-detecting substrate 4 onto the second mirror layer after the fifth step.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: March 17, 2015
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Katsumi Shibayama, Takashi Kasahara
  • Patent number: 8979562
    Abstract: A connector assembly that includes an electrical connector and an electrically conductive busbar. The connector can include a housing that defines a receptacle, a first row of at least one power contact, and a second row of at least one power contact at a location spaced from the first row along a first direction. Each power contact of the first and second rows can define at least two mating ends that are at least partially disposed in the receptacle so as to define a slot that extends between the mating ends of the first row and the mating ends of the second row. The housing can include a first attachment member. The electrically conductive busbar can include a first end, a second end opposite the first end, and an attachment member that is configured to mate with the first attachment member so as to attach the busbar to the housing.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: March 17, 2015
    Assignee: FCI Americas Technology LLC
    Inventors: Alan Crighton, Christopher Geiski, Hung Viet Ngo
  • Patent number: 8981513
    Abstract: An electrical circuit includes a solar cell that has a photovoltaically active front side and a back side. An electronic or micromechanical component is arranged on the back side of the solar cell and is electrically connected to the photovoltaically active front side of the solar cell by a contact-making structure. The electrical circuit also includes a transparent first protective layer that is arranged on the photovoltaically active front side of the solar cell. The contact-making structure has a first contact-making section that is arranged on a front side of the first protective layer facing away from the solar cell.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: March 17, 2015
    Assignee: Robert Bosch GmbH
    Inventors: Ricardo Ehrenpfordt, Mathias Bruendel, Daniel Pantel, Frederik Ante, Johannes Kenntner
  • Publication number: 20150068588
    Abstract: A system and method for improved photovoltaic module structure is described. One embodiment includes a photovoltaic module comprising a front substrate, a photovoltaic structure attached to the front substrate, wherein the photovoltaic structure comprises at least one photovoltaic cell, a back substrate, wherein the back substrate is spaced apart from the photovoltaic structure, and a structural component, wherein the structural component is located between the back substrate and the photovoltaic structure. In some embodiments, the structural component may be configured to provide thermal conduction between the front substrate and the back substrate, and/or the structural component may be configured to retain the front substrate and/or back substrate during breakage.
    Type: Application
    Filed: June 9, 2014
    Publication date: March 12, 2015
    Inventors: Kurt L. Barth, John C. Powell, Neil Morris, Nader Mahvan
  • Patent number: 8975694
    Abstract: A semiconductor device includes a semiconductor substrate with doped regions of a first type and doped regions of a second type. A first metallization layer connects to the doped regions of the first type through conductive paths, such that current is able to flow within the metallization layer along a plurality of linear axes. A second metallization layer connects to the doped regions of the second type through conductive paths, such that that current is able to flow within the metallization layer along a plurality of linear axes. Contacts on an exterior surface of the semiconductor device can be arranged concentrically.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: March 10, 2015
    Assignee: VLT, Inc.
    Inventors: Patrizio Vinciarelli, Sergey Luzanov
  • Patent number: 8975637
    Abstract: A thin film diode (100A) includes a semiconductor layer (130) having first, second, and third semiconductor regions, a first insulating layer (122) formed on the semiconductor layer (130), and a second insulating layer (123) formed on the first insulating layer (122). The first semiconductor region (134A) contains an impurity of a first-conductivity type at a first concentration; the second semiconductor region (135A) contains an impurity of a second-conductivity type different from the first conductivity type at a second concentration; and the third semiconductor region (133A) contains the first-conductivity type impurity at a third concentration lower than the first concentration, or contains the second-conductivity type impurity at a third concentration lower than the second concentration. The first semiconductor region (134A) conforms to an aperture pattern in the second insulating layer (123), or the second semiconductor region (135A) conforms to an aperture pattern in the second insulating layer (123).
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: March 10, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Matsukizono, Tomohiro Kimura, Hiroyuki Ogawa
  • Publication number: 20150064834
    Abstract: An image sensor die may include a pixel array formed in an image sensor substrate. The image sensor die may be mounted to a thin metal interconnect layer that has been deposited on a sacrificial carrier substrate. The thin metal interconnect layer may include one or more metal layers that are patterned to form metal traces that serve as contact pads, signal lines, and other interconnects in the interconnect layer. The image sensor die may be wire bonded, flip-chip mounted, or otherwise mechanically and electrically coupled to the metal interconnect layer. The sacrificial carrier substrate may be etched or otherwise removed to expose the metal interconnects on the metal interconnect layer. An array of solder balls may be formed on the exposed metal interconnects to form a ball grid array package, or the exposed contact pads may be plated to form a leadless chip carrier package.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 5, 2015
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Jonathan Michael Stern
  • Patent number: 8969990
    Abstract: A semiconductor light detection element has a plurality of channels, each of which consists of a photodiode array including a plurality of avalanche photodiodes operating in Geiger mode, quenching resistors connected in series to the respective avalanche photodiodes, and signal lines to which the quenching resistors are connected in parallel. A mounting substrate is configured so that a plurality of electrodes corresponding to the respective channels are arranged on a third principal surface side and so that a signal processing unit for processing output signals from the respective channels is arranged on a fourth principal surface side. In a semiconductor substrate, through-hole electrodes electrically connected to the signal lines are formed for the respective channels. The through-hole electrodes and the electrodes are electrically connected through bump electrodes.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: March 3, 2015
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Terumasa Nagano, Noburo Hosokawa, Tomofumi Suzuki, Takashi Baba
  • Publication number: 20150053265
    Abstract: A photovoltaic solar module including at least one photovoltaic cell including a first transparent polymer layer surrounding the cell on all or some of its sides and a second transparent polymer layer surrounding the first transparent polymer layer on all or some of its sides. The second transparent polymer layer has a thickness greater than or equal to 0.5 mm and a Shore hardness D greater than that of the first polymer layer.
    Type: Application
    Filed: April 24, 2013
    Publication date: February 26, 2015
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Julien Gaume, Stephane Guillerez, Eric Pilat
  • Publication number: 20150050769
    Abstract: A solar-powered autonomous CMOS circuit structure is fabricated with monolithically integrated photovoltaic solar cells. The structure includes a device layer including an integrated circuit and a solar cell layer. Solar cell structures in the solar cell layer can be series connected during metallization of the device layer or subsequently. The device layer and the solar cell layer are formed using a silicon-on-insulator substrate. Subsequent spalling of the silicon-on-insulator substrate through the handle substrate thereof facilitates production of a relatively thin solar cell layer that can be subjected to a selective etching process to isolate the solar cell structures.
    Type: Application
    Filed: October 31, 2014
    Publication date: February 19, 2015
    Inventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20150040966
    Abstract: Photovoltaic modules are disclosed. The photovoltaic module comprises a front transparency, a fluid encapsulant deposited on at least a portion of the front transparency, electrically interconnected photovoltaic cells applied to the fluid encapsulant and a backcoat deposited on at least a portion of the electrically interconnected photovoltaic cells. Methods of making photovoltaic modules are also disclosed.
    Type: Application
    Filed: March 14, 2013
    Publication date: February 12, 2015
    Inventors: Stuart D. Hellring, Jiping Shao, James E. Poole, Irina G. Schwendeman, Brian K. Rearick, Bruce Vimelson, Edward R. Millero, JR., Willaim H. Retsch, Debra L. Singer, Heather Hunter
  • Publication number: 20150040972
    Abstract: An inverted metamorphic multijunction solar cell including a contact layer with sulfur passivation on the surface of the contact layer.
    Type: Application
    Filed: August 12, 2013
    Publication date: February 12, 2015
    Applicant: Emcore Solar Power, Inc.
    Inventor: Arthur Cornfeld
  • Patent number: 8952242
    Abstract: A photovoltaic device includes one or more structures, an array of at least one of quantum dots and quantum dashes, at least one groove, and at least one conductor. Each of the structures comprises an intrinsic layer on one of an n type layer and a p type layer and the other one of the n type layer and the p type layer on the intrinsic layer. The array of at least one of quantum dots and quantum dashes is located in the intrinsic layer in at least one of the structures. The groove extends into at least one of the structures and the conductor is located along at least a portion of the groove.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: February 10, 2015
    Assignees: Rochester Institute of Technology, The United States of America as represented by the National Aeronautics and Space Administration
    Inventors: Ryne P. Raffaele, David M. Wilt
  • Patent number: 8952236
    Abstract: A hybrid type roof panel of a vehicle has a solar cell mounted on the roof panel, in which two types of solar cell modules are simultaneously mounted, in order to provide a sense of openness of the roof panel and simultaneously maximize performance of the solar cell. In the roof panel covered with roof glass, two types of solar cells are disposed over an entire area of the roof glass in a hybrid manner, including: a first solar cell having transparent characteristics disposed in a center of the roof glass; and a second solar cell having better photovoltaic performance than the first solar cell disposed in an edge part of the roof glass.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: February 10, 2015
    Assignee: Hyundai Motor Company
    Inventors: Mi Yeon Song, Hae Yoon Jung, Eun Young Lee, Sang Hak Kim, Won Jung Kim, Sung Geun Park, Ji Yong Lee
  • Publication number: 20150034152
    Abstract: A multijunction solar cell including a window layer with sulfur passivation on the surface of the window layer adjacent to the contact layer overlying the top subcell of the solar cell. The passivation is performed by application of a solution of ammonium sulphide.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 5, 2015
    Applicant: Emcore Solar Power, Inc.
    Inventor: Arthur Cornfeld
  • Publication number: 20150034151
    Abstract: An inverted metamorphic multijunction solar cell including a window layer with sulfur passivation on the surface of the window layer of the top solar subcell.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 5, 2015
    Applicant: Emcore Solar Power, Inc.
    Inventor: Arthur Cornfeld
  • Patent number: 8946732
    Abstract: A touch panel and fabricating method thereof are provided. The patterned transparent conductive layer, disposed on the substrate, includes first electrodes. The photo-sensing layers are disposed on the first electrodes. The first patterned conductive layer includes gate electrodes, scan lines and second electrodes. The gate electrodes and the scan lines are disposed on the substrate. The second electrodes are disposed on the photo-sensing layers. The first electrodes, the photo-sensing layers and the second electrodes constitute photo-sensors. The second patterned conductive layer includes source electrodes and drain electrodes, wherein the gate electrodes, the channel layers, the source electrodes and the drain electrodes constitute read-out transistors and each of the read-out transistors is electrically connected to the corresponding photo-sensor respectively.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 3, 2015
    Assignee: Au Optronics Corporation
    Inventors: Chi-Wen Fan, Tien-Hao Chang, Zao-Shi Zheng, Chun Chang, Wei-Peng Weng, An-Thung Cho, Jiun-Jye Chang
  • Publication number: 20150014662
    Abstract: One embodiment of the present invention discloses a method for pixel arrangement and a display using the same. The display areas are divided into a plurality of rectangular regions which have the same area according to a plurality of vertical grids which own the same distance between the adjacent. According to pre-positioning horizontal axis lines and pre-positioning vertical axis lines, each of the rectangular regions is divided into four parts including an upper left part, an upper right part, a lower left part and a lower right part. Each of the four parts are divided into two sub-pixel areas by a line which is inside the part. The line connects the angle point of the region which the part belongs to and the cross point of the horizontal axis line and the vertical axis line of the region which the part belongs to.
    Type: Application
    Filed: July 11, 2014
    Publication date: January 15, 2015
    Inventors: TianWang Huang, ChienLin Wu
  • Publication number: 20150018619
    Abstract: Apparatus, consisting of an integrated circuit (IC) die, and a circuit. The IC die includes a semiconductor substrate having a substrate plane face and a substrate edge, an imaging array formed on the substrate plane face, and a plurality of array pads mounted on the substrate plane face and connected to the imaging array. The circuit includes a circuit substrate having a circuit face and a circuit edge butted to the substrate edge, a plurality of circuit pads mounted on the circuit face, and a plurality of traces mounted on the circuit face and connected to the circuit pads. The apparatus further includes a plurality of connectors coupling the array pads to the circuit pads.
    Type: Application
    Filed: February 13, 2014
    Publication date: January 15, 2015
    Inventors: Doron Adler, Arie Blumenzweig