Plural Responsive Devices (e.g., Array, Etc.) Patents (Class 438/66)
  • Patent number: 11887907
    Abstract: A semiconductor package includes a semiconductor chip having chip pads on a first surface and having first and second side surfaces opposite to each other and third and fourth side surfaces opposite to each other, a molding member covering the third and fourth side surfaces and exposing the first and second side surfaces of the semiconductor chip, a redistribution wiring layer on a lower surface of the molding member to cover the first surface of the semiconductor chip and including a plurality of redistribution wirings electrically connected to the chip pads, and outer connection members arranged in a connection region defined on an outer surface of the redistribution wiring layer and electrically connected to the redistribution wirings.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: January 30, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Wonyoung Kim
  • Patent number: 11888007
    Abstract: An image sensor including a plurality of pixels, each pixel including a photodetector coupled to a control circuit, the photodetector being formed inside and on top of a first semiconductor substrate, and the control circuit including at least one first MOS transistor formed inside and on top of a second semiconductor substrate arranged on the first substrate, the sensor being intended to be illuminated on the side of the surface of the first substrate opposite to the second substrate, the sensor further comprising a shield arranged between the first and second substrates and extending over substantially the entire surface of the sensor, said shield including at least one electrically-conductive layer.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: January 30, 2024
    Assignee: Commissariat à l'Énergie Atomique et aux Énergies Alternatives
    Inventors: Lina Kadura, François Andrieu, Perrine Batude, Christophe Licitra
  • Patent number: 11830841
    Abstract: A semiconductor package includes an interconnect structure, an insulating layer and a conductive layer. The interconnect structure includes a first surface and a second surface opposite to the first surface. The insulating layer contacts the interconnect structure. The insulating layer includes a third surface contacting the second surface of the interconnect structure and a fourth surface opposite to the third surface. The conductive layer is electrically coupled to the interconnect structure. The conductive layer has a continuous portion extending from the second surface to the fourth surface.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: November 28, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chuei-Tang Wang, Chih-Chieh Chang, Yu-Kuang Liao, Hsing-Kuo Hsia, Chih-Yuan Chang, Jeng-Shien Hsieh, Chen-Hua Yu
  • Patent number: 11824484
    Abstract: A solar energy roof tile, thermally and/or electrically conductively connected to an adjacent solar energy roof tile, includes a lower face for placing on at least some regions of a roof construction, an upper face opposite the lower face formed at least in some regions by a solar energy utilisation module, two opposite lateral walls, a rear face connecting the lateral walls, and a front face opposite the rear face that connects the lateral walls. The two lateral walls, the rear face and front face together connect the lower and upper faces, such that a cavity is formed between the two lateral walls, the rear face, front face, and lower and upper faces. The lower face has, in the region of the front face, a lower opening for providing access. The upper face has, in the region of the rear face, an upper opening for providing access into the cavity.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: November 21, 2023
    Assignee: MEYER BURGER (GERMANY) GMBH
    Inventor: Peter Hakenberg
  • Patent number: 11776975
    Abstract: A sensor package structure is provided and includes a substrate, a sensor chip disposed on the substrate, a plurality of wires electrically coupled to the substrate and the sensor chip, a light-permeable layer, and a colloid formed on the substrate to fix the light-permeable layer. The colloid covers the wires, a peripheral portion of the sensor chip, and lateral surfaces of the light-permeable layer. A top curved surface of the colloid is partially arranged beside the lateral surfaces. In a cross section of the sensor package structure, the top curved surface has a reference point spaced apart from one of the lateral surfaces adjacent thereto by 100 ?m, a top edge of the top curved surface and the reference point define a connection line, and the connection line and the one of the lateral surfaces have an acute angle within a range from 25 degrees to 36 degrees.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: October 3, 2023
    Assignee: TONG HSING ELECTRONIC INDUSTRIES, LTD.
    Inventors: Chien-Chen Lee, Jui-Hung Hsu, Ya-Han Chang
  • Patent number: 11770906
    Abstract: The disclosure provides for methods of making electrically conductive apparatus, such as circuit boards. The methods include 3D-printing a ceramic material into a ceramic substrate that includes a void. A conductive material is infused into the void. The conductive materiel forms electrically conductive connections within the apparatus. Also disclosed are apparatus formed by the methods.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: September 26, 2023
    Assignee: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: John Michael Beshears, Steven O. Dunford
  • Patent number: 11765528
    Abstract: A sensing device and a method for packaging the same are provided. The sensing device includes a lead frame, a chip, an insulated housing, a sensor, and a protector. The lead frame includes a first surface, a second surface opposite to the first surface, a first die-bonding area and a plurality of wire bonding areas of the lead frame disposed on the first surface, and a second die-bonding area disposed on the second surface. The chip is disposed in the first die-bonding area and is electrically connected to the plurality of wire bonding areas of the lead frame. The insulated housing covers the chip and a portion of the lead frame. The sensor is disposed on the second die-bonding area of the lead frame, and the protector is disposed on the sensor.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: September 19, 2023
    Assignee: LITE-ON SINGAPORE PTE. LTD.
    Inventors: Guang-Li Song, Suresh Basoor Nijaguna, Qian Pang
  • Patent number: 11682451
    Abstract: The current disclosure is directed to a SRAM bit cell having a reduced coupling capacitance. In a vertical direction, a wordline “WL” and a bitline “BL” of the SRAM cell are stacked further away from one another to reduce the coupling capacitance between the WL and the BL. In an embodiment, the WL is vertically spaced apart from the BL with one or more metallization level that none of the WL or the BL is formed from. Connection island structures or jumper structures are provided to connect the upper one of the WL or the BL to the transistors of the SRAM cell.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: June 20, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Yuan Chang, Kian-Long Lim, Jui-Lin Chen, Feng-Ming Chang
  • Patent number: 11626525
    Abstract: A package structure is provided. The package structure includes a substrate, a sensor device, an encapsulant and a signal blocking structure. The substrate has a signal passing area. The sensor device is disposed over the substrate. The sensor device has a first surface, a second surface opposite to the first surface and a sensing area located at the second surface. The second surface of the sensor device faces the substrate. The encapsulant covers the sensor device and the substrate. The signal blocking structure extends from the substrate into the encapsulant.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: April 11, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chun Yu Ko, Tsu-Hsiu Wu, Meng-Jen Wang
  • Patent number: 11605625
    Abstract: The present technology relates to a semiconductor device and a manufacturing method therefor, a solid-state imaging element and electronic equipment that make it possible to suppress breakdown of a side wall insulating film by charge damage to suppress short-circuiting. The semiconductor device according to an aspect of the present technology includes a first semiconductor substrate on which a given circuit is formed, a second semiconductor substrate, and through electrodes that electrically connect the first semiconductor substrate and the second semiconductor substrate to each other. The through electrode is formed such that a through-hole is opened through a protection diode structure formed in the first semiconductor substrate, an insulating film is deposited on a side wall of the through-hole, and an electrode material is then filled inside the through-hole in which the insulating film is deposited. The present technology can be applied, for example, to a CMOS image sensor.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: March 14, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Hiroshi Takahashi
  • Patent number: 11587824
    Abstract: A method for manufacturing a semiconductor structure includes at least following steps. A device layer is formed on a first semiconductor substrate. The device layer is separated from the first semiconductor substrate. A dielectric layer is formed on a second semiconductor substrate. The device layer is bonded onto the dielectric layer.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: February 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Yu-Hsiang Tsai, Chung-Chuan Tseng, Chia-Wei Liu, Li-Hsin Chu
  • Patent number: 11574943
    Abstract: A semiconductor package is provided. The package includes a semiconductor chip that includes photoelectric conversion elements provided on an active array region of the semiconductor chip; a transparent member on the semiconductor chip; and a spacer between the semiconductor chip and the transparent member, and horizontally spaced apart from the active array region. The spacer includes: a supporter that extends from a top surface of the semiconductor chip toward a bottom surface of the transparent member; a first adhesive pattern that is between the semiconductor chip and a bottom surface of the supporter; and a second adhesive pattern that is between the transparent member a top surface of the supporter. The spacer protrudes from a lateral surface of the semiconductor chip, and a lateral surface of the spacer is offset from the lateral surface of the semiconductor chip.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: February 7, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Kyongsoon Cho
  • Patent number: 11489082
    Abstract: Embodiments provide solar panels and methods of assembly thereof, permitting operation of a photovoltaic material with reduced degradation. As one example, a solar panel comprises one or more solar cells that include perovskite, the one or more solar cells encapsulated by a film and housed in a glass exterior that is hermetically sealed to maintain a vacuum in an interior of the solar panel of 10?7 Pascal or less throughout a lifetime of the solar panel. In this way, degradation of the solar panel due to water ingress can be avoided, thereby increasing an operational lifetime of perovskite-based solar panels and reducing manufacturing costs as compared to silicon-based counterparts.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: November 1, 2022
    Assignee: EPIC BATTERY INC.
    Inventor: Melvin James Bullen
  • Patent number: 11482483
    Abstract: Provided is an interposer for a semiconductor package, the interposer including an interposer substrate comprising a first main surface and a second main surface opposite to the first main surface, a first through-electrode structure and a second through-electrode structure each passing through the interposer substrate and protruding from the first main surface, a connection terminal structure contacting both the first through-electrode structure and the second through-electrode structure, and a photosensitive polymer layer arranged between the connection terminal structure and the interposer substrate, and between the first through-electrode structure and the second through-electrode structure.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: October 25, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yukyung Park, Ungcheon Kim, Sungwoo Park, Seungkwan Ryu
  • Patent number: 11424381
    Abstract: The present disclosure provides a method of manufacturing a solar cell that includes providing a semiconductor growth substrate; depositing on said growth substrate a sequence of layers of semiconductor material forming a solar cell; applying a metal contact layer over said sequence of layers; affixing the adhesive polyimide surface of a permanent supporting substrate directly over said metal contact layer and permanently bonding it thereto by a thermocompressive technique; and removing the semiconductor growth substrate.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: August 23, 2022
    Assignee: SolAero Technologies Corp.
    Inventors: Arthur Cornfeld, Jeff Steinfeldt
  • Patent number: 11367746
    Abstract: A radiation sensor element comprises a support plate, having a front face, extending substantially along a base plane, defining a lateral extension of the radiation sensor element; a substrate, having a basal face, an interconnection face opposite the basal face, and an edge face connecting the basal face and the interconnection face; a sensor tile, having a back face facing the interconnection face; a copper-pillar interconnection element between the interconnection face and the back face; and a non-conductive film extending between the interconnection face and the back face. The front face comprises, laterally beyond the edge face, a depression extending in a thickness direction perpendicular to the base plane, and the non-conductive film comprises an edge protrusion part extending in the depression.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: June 21, 2022
    Assignee: DETECTION TECHNOLOGY OYJ
    Inventors: Petteri Heikkinen, Mikael Johansson
  • Patent number: 11362130
    Abstract: A backside illuminated image sensor includes a substrate having a frontside surface, a backside surface and a recess formed in a backside surface portion thereof, pixel regions disposed in the substrate, an insulating layer disposed on the frontside surface of the substrate, a bonding pad disposed on a frontside surface of the insulating layer, and a second bonding pad disposed in the recess and electrically connected with the bonding pad.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: June 14, 2022
    Assignee: DB HITEK CO., LTD.
    Inventors: Chang Hun Han, Jong Man Kim
  • Patent number: 10681292
    Abstract: There is provided an imaging device, an electronic apparatus including an imaging device, and an automotive vehicle including an electronic apparatus including an imaging device, including: a first substrate including a first set of photoelectric conversion units; a second substrate including a second set of photoelectric conversion units; and an insulating layer between the first substrate and the second substrate; where the insulating layer has a capability to reflect a first wavelength range of light and transmit a second wavelength range of light that is longer than the first wavelength range of light.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: June 9, 2020
    Assignee: Sony Corporation
    Inventor: Atsushi Toda
  • Patent number: 10529754
    Abstract: An omnidirectional image sensor and a method of manufacturing the omnidirectional image sensor are provided. An image sensor may include a plurality of photodiodes, and a spherical structure comprising a plurality of protrusions, wherein the plurality of photodiodes are disposed between the plurality of protrusions, and wherein the spherical structure comprises a plurality of spherical wedges.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: January 7, 2020
    Assignees: SAMSUNG ELECTRONICS CO., LTD., SNU R&DB FOUNDATION
    Inventors: Dong Kyung Nam, Dae Hyeong Kim, Yang Ho Cho, Mincheol Lee, Jun Kyul Song
  • Patent number: 10502842
    Abstract: Technologies are described for semiconductor radiation detectors. The semiconductor radiation detectors may comprise a semiconductor material. The semiconductor material may include a first surface and a second surface. The first surface may be opposite from the second surface. The semiconductor material may include at least one metal component. The semiconductor material may be effective to absorb radiation and induce a current pulse in response thereto. The semiconductor radiation detector may comprise an electrode contact. The electrode contact may include a metal doped oxide deposited on the first surface of the semiconductor material. The metal doped oxide may include the metal component element of the semiconductor material.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: December 10, 2019
    Assignees: BROOKHAVEN SCIENCE ASSOCIATES, LLC, NORFOLK STATE UNIVERSITY
    Inventors: Utpal N. Roy, Ralph B. James, Giuseppe Camarda, Yonggang Cui, Anwar Hossain, Ge Yang, Aswini Pradhan, Rajeh Mundle
  • Patent number: 10416425
    Abstract: CPV modules include a back plate having an array of 1 mm2 or smaller solar cells thereon. A backplane interconnect network is also provided on the back plate. This backplane interconnect network operates to electrically connect the array of solar cells together. A front plate, which is spaced-apart from the back plate, is provided. This front plate includes an array of primary lenses thereon that face the array of solar cells. The front plate can be configured to provide a greater than 1000× lens-to-cell light concentration to the array of solar cells. To achieve this 1000× lens-to-cell light concentration, the primary lenses can be configured as plano-convex lenses having a lens sag of less than about 4 mm. An array of secondary optical elements may also be provided, which extend between the array of primary lenses and the array of solar cells.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: September 17, 2019
    Assignee: X-Celeprint Limited
    Inventors: Etienne Menard, Christopher Bower, Scott Burroughs, Joe Carr, Bob Conner, Sergiy Dets, Bruce Furman, Matthew Meitl, Michael Sullivan
  • Patent number: 10373848
    Abstract: An LED display device includes a substrate and an LED encapsulation unit disposed on a side of the substrate, the LED encapsulation unit includes an LED stent and an LED chip encapsulated in the LED stent, a epoxy resin encapsulates the side of the substrate on which the LED encapsulation unit is disposed and the LED encapsulation unit to form a protection layer shielding the LED encapsulation unit. The epoxy resin completely encapsulates the substrate and the LED encapsulation unit to protect effectively the substrate and the LED encapsulation unit, which is sufficient to resist severe environment. Compared with the prior art, the service life of the LED display device is effectively prolonged, cost is reduced. The invention also provides a molding module for preparing the LED display device, and a preparation method thereof.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: August 6, 2019
    Assignee: SHENZHEN HOXLED OPTOELECTRONIC TECHNOLOGY CO., LTD.
    Inventors: Jun Deng, Youfa Zhou
  • Patent number: 10224440
    Abstract: A method for forming a solar cell including steps of (1) providing a semiconductor wafer having an upper surface; (2) applying an electrical contact material to the upper surface, the electrical contact material forming an electrically conductive grid that includes grid lines extending from a bus bar; (3) forming an isolation channel in the semiconductor wafer to define a solar cell portion and a wing portion, wherein the wing portion is electrically isolated from the solar cell portion, and wherein the wing portion is substantially free of the electrical contact material; (4) submerging the semiconductor wafer in a solvent, wherein formation of metal dendrites on the grid lines of the electrically conductive grid is inhibited; and (5) separating the solar cell portion from the wing portion.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: March 5, 2019
    Assignee: The Boeing Company
    Inventors: Xiaobo Zhang, Vincent A. Lim, Hoon H. Lee, John P. Serra, Uming T. Jeng, Steven M. Bunyan, Julie J. Hoskin, Kent E. Barbour, Dimitri D. Krut
  • Patent number: 10153314
    Abstract: The present technology relates to a semiconductor apparatus, a solid-state image pickup device, an image pickup apparatus, and an electronic apparatus capable of improving impedance characteristics while preventing an occurrence of a flare and an interference due to a bonding jig, and achieving downsizing an apparatus. By aligning the heights of a cover glass and a semiconductor device, a distance between the cover glass and the semiconductor device is set to be minimum, and thus it is possible to suppress an occurrence of a flare due to incident light reflected on a side surface of the semiconductor device, and improve the impedance characteristics of the semiconductor device and the semiconductor image pickup device. Further, the interference of the jig used for the semiconductor device is reduced. The present technology can be applied to a CMOS image sensor.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: December 11, 2018
    Assignee: SONY CORPORATION
    Inventor: Satoru Wakiyama
  • Patent number: 9935224
    Abstract: The present invention provides for a multi-layered structure adapted to be applied to the surface of a back-contact back-sheet for a photovoltaic module comprising back-contact solar cells. The multi-layered structure comprises a non-extendible intermediate layer (240) comprised of a dielectric material. The multi-layered structure further comprises an upper layer (280) of an encapsulating material coupled to the upper surface (242) of the intermediate layer, as well as a lower layer (270) of a thermo-adhesive material coupled to the lower surface (244) of the intermediate layer (240). The multi-layered structure also has a plurality of through-holes pierced at predetermined positions.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: April 3, 2018
    Assignee: EBFOIL, S.R.L.
    Inventors: Elisa Baccini, Luigi Marras, Bruno Bucci
  • Patent number: 9842946
    Abstract: The semiconductor device comprises a semiconductor substrate (1), a photosensor (2) integrated in the substrate (1) at a main surface (10), an emitter (12) of radiation mounted above the main surface (10), and a cover (6), which is at least partially transmissive for the radiation, arranged above the main surface (10). The cover (6) comprises a cavity (7), and the emitter (12) is arranged in the cavity (7). A radiation barrier (9) can be provided on a lateral surface of the cavity (7) to inhibit cross-talk between the emitter (12) and the photosensor (2).
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: December 12, 2017
    Assignee: AMS AG
    Inventors: Rainer Minixhofer, Bernhard Stering, Harald Etschmaier
  • Patent number: 9730573
    Abstract: An in-vivo imaging device for capturing one or more narrow band images of the gastrointestinal tract, or other body lumens or cavities of a patient, using one or more narrow band illumination sources and an imager having an array of light sensitive elements.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: August 15, 2017
    Assignee: GIVEN IMAGING LTD.
    Inventor: Amit Pascal
  • Patent number: 9494792
    Abstract: An electroluminescent display or lighting product incorporates a panel including a collection of distinct light-emitting elements formed on a substrate. A plurality of distinct local seals are formed below respective individual light-emitting elements or groups of light-emitting elements. Some embodiments combine a metal foil substrate and glass local seals in a flexible bottom-emitting product. The local seal may be used in conjunction with a continuous thin film encapsulation structure. Optical functions can be provided by each local seal, including refraction, filtering, color shifting, and scattering. Each local seal is formed by depositing a low melting temperature glass powder suspension or paste using inkjet technology, and fusing the glass powder using a scanning laser beam having a tailored beam profile. In other embodiments, a lower encapsulation substrate incorporating local window seals is wholly or partially pre-formed.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: November 15, 2016
    Assignee: Global OLED Technology LLC
    Inventor: Rajeev Rohatgi
  • Patent number: 9196776
    Abstract: A first surface of a first section of a connection member includes a first conductive region, and a second surface of a second section of the connection member includes a second conductive region. The first conductive region is formed along an n-side electrode included in one solar cell, and is electrically connected to the n-side electrode. The second conductive region is formed along a p-side electrode included in a different solar cell, and is electrically connected to the p-side electrode. The first conductive region and the second conductive region are electrically connected to each other.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: November 24, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Shigeharu Taira
  • Patent number: 9184313
    Abstract: Methods and devices for removing entrapped bubbles or air in photovoltaic solar cells during a manufacturing process including an encapsulation process include, for example, wiggling the photovoltaic solar cells or pushing out air bubbles by applying vibrations and/or light pressures. Optional additional steps include liquid wetting or dispensing to or around the photovoltaic solar cell matrix for air releasing before the placement of the matrix into a liquid for encapsulation.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: November 10, 2015
    Assignee: Flextronics AP, LLC
    Inventors: Dennis Willie, Chris Stratas, Tilak Gopalarathnam, Susan Ciby Abraham
  • Patent number: 9099574
    Abstract: An optoelectronic semiconductor chip (12) is disclosed comprising a thin-film semiconductor body (8), which comprises a semiconductor layer sequence (2, 20) having an active region (3) suitable for generating radiation, and comprising a carrier layer (7), which is formed on the semiconductor layer sequence and carries the thin-film semiconductor body.
    Type: Grant
    Filed: September 4, 2006
    Date of Patent: August 4, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Klaus Streubel
  • Patent number: 9074915
    Abstract: The invention concerns a PV system in which a multitude of PV modules are interconnected to PV generators. Each of the PV modules comprises a network interface for transmitting module-specific data to a control device and analyzing the same. The data network is designed as a self-organizing network, in particular as a self-organizing meshed radio network.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: July 7, 2015
    Assignee: Phoenix Contact GmbH & Co. KG
    Inventors: Johannes Kalhoff, Thorsten Temme, Roland Bent
  • Publication number: 20150137301
    Abstract: A method for manufacturing a solid-state imaging device comprises a first step of preparing an imaging element including a second principal surface having an electrode arranged thereon, and a photoelectric converter part configured to photoelectrically convert the incident energy line so as to generate a signal charge; a second step of preparing a support substrate, provided with at least one through hole extending in a thickness direction thereof, having a third principal surface; a third step of aligning the imaging element and the support substrate with each other so that the one electrode is exposed out of the one through hole while the second and third principal surfaces oppose each other and joining the imaging element and the support substrate to each other; and a fourth step of embedding a conductive member in the through hole after the third step.
    Type: Application
    Filed: February 21, 2013
    Publication date: May 21, 2015
    Inventors: Yasuhito Yoneta, Ryoto Takisawa, Shingo Ishihara, Hisanori Suzuki, Masaharu Muramatsu
  • Publication number: 20150136207
    Abstract: A roof panel with an integrated photovoltaic module is discussed. The roof panel has at least a substrate and an outer pane, which are laminarily bonded to each other via a thermoplastic layer, and embedded in the thermoplastic layer, at least one photovoltaic system that contains at least two strip-shaped solar cells that are connected in series via at least one electrically conductive connecting element.
    Type: Application
    Filed: May 17, 2013
    Publication date: May 21, 2015
    Inventors: Jean-Christophe Giron, Harald Stoffel, Uwe Van Der Meulen, Andreas Nositschka, Pascal Remy, Marc-Oliver Prast, Dirk Neumann
  • Patent number: 9035311
    Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a lower capacitor electrode disposed on the gate insulating layer in the capacitor region, an interlayer insulating layer disposed on the substrate, and an upper capacitor electrode disposed on the interlayer insulating layer and facing the lower capacitor electrode, wherein regions of each of the buffer layer, the gate insulating layer, the interlayer insulating layer, the lower capacitor electrode, and the upper capacitor electrode have surfaces in which protrusions having the same shape as grain boundaries of the semiconductor layer are formed. The resultant capacitor has an increased surface area, and therefore, an increased capacitance.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Soo-Beom Jo, Dong-Hyun Lee, Kil-Won Lee, Maxim Lisachenko, Yun-Mo Chung, Bo-Kyung Choi, Jong-Ryuk Park, Ki-Yong Lee
  • Patent number: 9034733
    Abstract: In one embodiment, semiconductor die are singulated from a semiconductor wafer having a backmetal layer by placing the semiconductor wafer onto a carrier tape with the backmetal layer adjacent the carrier tape, forming singulation lines through the semiconductor wafer to expose the backmetal layer within the singulation lines, and separating portions of the backmetal layer within the singulation lines using a pressurized fluid applied to the carrier tape.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: May 19, 2015
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: William F. Burghout, Dennis Lee Conner, Michael J. Seddon, Jay A. Yoder, Gordon M. Grivna
  • Patent number: 9035337
    Abstract: An object is to provide a light-emitting module in which a light-emitting element suffering a short-circuit failure does not cause wasteful electric power consumption. Another object is to provide a light-emitting panel in which a light-emitting element suffering a short-circuit failure does not allow the reliability of an adjacent light-emitting element to lower. Focusing on heat generated by a light-emitting element suffering a short-circuit failure, provided is a structure in which electric power is supplied to a light-emitting element through a positive temperature coefficient thermistor (PTC thermistor) thermally coupled with the light-emitting element.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: May 19, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaaki Hiroki, Satoshi Seo, Yasuo Nakamura
  • Publication number: 20150129017
    Abstract: A lamination stack for etching solar cells is provided. At least two solar cell wafers are attached to corresponding backplane sheets which are larger than the solar cell wafers. Release layers larger than the solar cells and smaller than the backplane sheets are positioned on the backplane sheets on the opposite side of the attached solar cell wafers. The backplane sheets are bonded together along the exposed peripheral boundary formed by the release layers.
    Type: Application
    Filed: July 8, 2014
    Publication date: May 14, 2015
    Inventors: David Dutton, Pranav Anbalagan, Karl-Josef Kramer, Mehrdad M. Moslehi
  • Publication number: 20150129013
    Abstract: A roof panel having an integrated photovoltaic module is described. The roof panel has at least a substrate and an outer panel, which are laminarily bonded to each other by means of a thermoplastic layer, wherein a photovoltaic layer system is embedded in the thermoplastic layer and the substrate contains at least one polymer.
    Type: Application
    Filed: May 17, 2013
    Publication date: May 14, 2015
    Inventors: Andreas Nositschka, Pascal Remy, Marc-Oliver Prast, Dirk Neumann, Harald Stoffel
  • Patent number: 9029183
    Abstract: Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a BSI sensor device with an application specific integrated circuit (ASIC) are disclosed. A bond pad array may be formed in a bond pad area of a BSI sensor where the bond pad array comprises a plurality of bond pads electrically interconnected, wherein each bond pad of the bond pad array is of a small size which can reduce the dishing effect of a big bond pad. The plurality of bond pads of a bond pad array may be interconnected at the same layer of the pad or at a different metal layer. The BSI sensor may be bonded to an ASIC in a face-to-face fashion where the bond pad arrays are aligned and bonded together.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Szu-Ying Chen, Tzu-Jui Wang, Dun-Nian Yaung, Jen-Cheng Liu
  • Patent number: 9023676
    Abstract: A wafer packaging method includes the following steps. A light transmissive carrier is provided. A hydrolytic temporary bonding layer is formed on the light transmissive carrier. A first surface of a light transmissive protection sheet is bonded to the hydrolytic temporary bonding layer, such that the hydrolytic temporary bonding layer is located between the light transmissive protection sheet and the light transmissive carrier. A second surface of the light transmissive protection sheet facing away from the first surface is bonded to a third surface of a wafer. The light transmissive carrier, the hydrolytic temporary bonding layer, the light transmissive protection sheet, and the wafer are immersed in a high temperature liquid, such that adhesion force of the hydrolytic temporary bonding layer is eliminated. The light transmissive protection sheet and the wafer are obtained from the high temperature liquid.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: May 5, 2015
    Assignee: Xintec Inc.
    Inventors: Chih-Hao Chen, Bai-Yao Lou, Shih-Kuang Chen
  • Publication number: 20150114454
    Abstract: A solar cell module and a method for manufacturing the same are disclosed. The solar cell module includes a first solar cell and a second solar cell each including a plurality of first electrodes formed on a back surface of a semiconductor substrate, a plurality of second electrodes which are formed in parallel with the plurality of first electrodes on the back surface of the semiconductor substrate, a first auxiliary electrode connected to the plurality of first electrodes, and a second auxiliary electrode connected to the plurality of second electrodes, and an interconnector for electrically connecting the first auxiliary electrode of the first solar cell to the second auxiliary electrode of the second solar cell.
    Type: Application
    Filed: October 27, 2014
    Publication date: April 30, 2015
    Applicant: LG ELECTRONICS INC.
    Inventors: Taeyoon KIM, Minpyo KIM, Hyeyoung YANG, Taeki WOO
  • Publication number: 20150115290
    Abstract: The invention disclosure relates to a manufacturing method comprising the formation of elemental LED or photovoltaic structures on a first substrate, each comprising at least one p-type layer, an active zone and an n-type layer, formation of a first planar metal layer on the elemental structures, provision of a transfer substrate comprising a second planar metal layer, assembly of the elemental structures with the transfer substrate by bonding of the first and second metal layers by molecular adhesion at room temperature, and removal of the first substrate.
    Type: Application
    Filed: June 14, 2013
    Publication date: April 30, 2015
    Inventor: Pascal Guenard
  • Publication number: 20150108598
    Abstract: There is provided a solid-state imaging device including: a semiconductor substrate that is formed with a photodiode for each pixel; a light shielding film that is laminated on the semiconductor substrate on a side of a light irradiated surface which is irradiated with light, and is formed to include an opening corresponding to a spot in which at least the photodiode is arranged; and a photoelectric conversion film that is laminated to cover the light irradiated surface of the semiconductor substrate and the light shielding film, and is configured to generate an electrical charge by absorbing light. The photoelectric conversion film is formed of a material which has higher light absorptivity than light absorptivity of the semiconductor substrate.
    Type: Application
    Filed: October 14, 2014
    Publication date: April 23, 2015
    Inventor: Terumi Kambe
  • Publication number: 20150107658
    Abstract: A multijunction solar cell including an upper first solar subcell having a first band gap; a second solar subcell adjacent to the first solar subcell and having a second band gap smaller than the first band gap; a first graded interlayer adjacent to the second solar subcell; the first graded interlayer having a third band gap greater than the second band gap; and a third solar subcell adjacent to the first graded interlayer, the third subcell having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell. A second graded interlayer is provided adjacent to the third solar subcell; the second graded interlayer having a fifth band gap greater than the fourth band gap; and a lower fourth solar subcell is provided adjacent to the second graded interlayer, the lower fourth subcell having a sixth band gap smaller than the fourth band gap such that the fourth subcell is lattice mismatched with respect to the third subcell.
    Type: Application
    Filed: April 2, 2014
    Publication date: April 23, 2015
    Applicant: Emcore Soloar Power, Inc.
    Inventors: Arthur Cornfeld, Benjamin Cho
  • Patent number: 8999743
    Abstract: A solar cell module is manufactured by forming silicone coating films (2, 2) on panels (1a, 1b), placing a solar cell matrix (3) on the silicone coating film on panel (1a), providing a seal member (4) consisting of a base seal member (4a) of butyl rubber and protrusive seal segments (4b) of butyl rubber on a peripheral region of panel (1a), mating the two panels together such that the seal member (4) may abut against a peripheral region of panel (1b), and the solar cell matrix (3) may be sandwiched between the silicone coating films (2), and compressing and heating the mated panels (1a, 1b) in vacuum for establishing a seal around the solar cell matrix (3).
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: April 7, 2015
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tomoyoshi Furihata, Hiroto Ohwada, Naoki Yamakawa, Masahiro Hinata
  • Publication number: 20150090314
    Abstract: One embodiment of the present invention provides a solar panel. The solar panel includes a plurality of subsets of solar cells. The solar cells in a subset are coupled in series, and the subsets of solar cells are coupled in parallel. The number of solar cells in a respective subset is sufficiently large such that the output voltage of the solar panel is substantially the same as an output voltage of a conventional solar panel with all of its substantially square shaped solar cells coupled in series.
    Type: Application
    Filed: December 8, 2014
    Publication date: April 2, 2015
    Inventors: Bobby Yang, Peter P. Nguyen, Jiunn Benjamin Heng, Anand J. Reddy, Zheng Xu
  • Publication number: 20150090319
    Abstract: A solar cell module includes a solar cell module body (11), an adhesive (30), and a support rail (12) bonded and fixed by the adhesive (30) to a back surface of the solar cell module body (11), in which a spacer member (40) for ensuring the thickness of the adhesive (30) is arranged between the back surface of the solar cell module body (11) and an adhesive surface (12a1) of the support rail (12).
    Type: Application
    Filed: April 1, 2013
    Publication date: April 2, 2015
    Inventors: Kazuhiro Mizuo, Takashi Hayakawa
  • Patent number: 8993364
    Abstract: Photovoltaic modules may include multiple flexible thin film photovoltaic cells electrically connected in series, and laminated to a substantially transparent top sheet having a conductive grid pattern facing the cells. Methods of manufacturing photovoltaic modules including integrated multi-cell interconnections are provided. Methods may include steps of coordinating, integrating, and registering multiple rolls of substrates in continuous processes.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: March 31, 2015
    Assignee: Hanergy Hi-Tech Power (HK) Limited
    Inventors: Scott Wiedeman, Jeffrey S. Britt, Zulima Rhodes, Eric Sheehan
  • Publication number: 20150083188
    Abstract: This solar cell module is provided with a plurality of solar cells, and connecting members that connect the solar cells to each other. The area of each of the bonding layers that bonds each of the connecting members to the light receiving surface of each of the solar cells is larger than the area of each of the bonding layers that bonds each of the connecting members to the rear surface of each of the solar cells.
    Type: Application
    Filed: December 4, 2014
    Publication date: March 26, 2015
    Inventor: Masahiro IWATA