Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor Patents (Class 438/64)
  • Patent number: 10355042
    Abstract: There is provided solid-state imaging devices and methods of forming the same, the solid-state imaging devices including: a semiconductor substrate; a glass substrate; an adhesion layer provided between the semiconductor substrate and the glass substrate; and a warpage correction film provided adjacent to one of the semiconductor substrate and the glass substrate.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: July 16, 2019
    Assignee: Sony Corporation
    Inventor: Hiroyasu Matsugai
  • Patent number: 10283653
    Abstract: A stacked-layered thin film solar cell. The solar cell has reduced absorber thickness and an improved back contact for Copper Indium Gallium Selenide solar cells. The back contact provides improved reflectance particularly for infrared wavelengths while still maintaining ohmic contact to the semiconductor absorber. This reflectance is achieved by producing a back contact having a highly reflecting metal separated from an absorbing layer with a dielectric layer.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: May 7, 2019
    Assignee: International Business Machines Corporation
    Inventors: Hans-Juergen Eickelmann, Michael Haag, Ruediger Kellmann, Markus Schmidt, Johannes Windeln
  • Patent number: 9780245
    Abstract: It is an object of the present invention to easily and inexpensively provide a structure of effectively utilizing a light incident on an invalid area of a solar cell. Moreover, it is another object to improve output characteristics of the solar cell by effectively utilizing the light. The gist of the present invention resides in a solar battery module in which plate-like solar cells are held between a light penetrable sheet member on a light receiving surface side and a sheet member on a back surface side, and internal apertures are filled. with a sealing resin, wherein a light diffusion section for diffusely reflecting a light or a light diffusion section of a white color is arranged in an invalid region of each solar cell.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: October 3, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MGMT CO., LTD.
    Inventor: Takahiro Haga
  • Patent number: 9761340
    Abstract: A method of preparing two dimension bent X-ray crystal analyzers in strips feature is provided. A crystal wafer in strips is bonded to a curved substrate which offers the desired focus length. A crystal wafer in strips is pressed against the surface of the substrate forming curved shape by anodic bonding or glue bonding. The bonding is permanently formed between crystal wafer and its substrate surface, which makes crystal wafer has same curvature as previously prepared substrate.
    Type: Grant
    Filed: September 25, 2016
    Date of Patent: September 12, 2017
    Inventor: Qing Qian
  • Patent number: 9741892
    Abstract: A solar cell module production method involves applying an adhesive on a light-receiving surface and a rear surface of a solar cell having electrodes on the light-receiving surface and the rear surface, and positioning and attaching a wiring material on the adhesive. Specifically, the solar cell, which is positioned with the light-receiving surface facing upward, is inverted so that the rear surface is facing upward, and the adhesive is applied on the rear surface; and then the solar cell is inverted once again so that the light-receiving surface is facing upward, and the adhesive is applied to the light-receiving surface.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: August 22, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Satoshi Suzuki, Yoshiyuki Kudoh, Masaya Nakai, Haruhisa Hashimoto
  • Patent number: 9716190
    Abstract: An optical sensor device comprises an element-mounting portion, an optical sensor element provided on the element-mounting portion, a lead having a first contact region connected to the optical sensor element and a second contact region for an external connection, and a resin-encapsulating portion which covers at least a light-receiving plane of the optical sensor element. The resin-encapsulating portion comprises a resin and a glass filler including borosilicate glass dispersed in the resin. The transmissivity of the resin-encapsulating portion in one example is equal to or more than 40% in a wavelength range between 300 nm to 400 nm, and in another example is equal to or more than 60% in a wavelength range between 300 nm and 350 nm.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: July 25, 2017
    Assignee: SII Semiconductor Corporation
    Inventors: Koji Tsukagoshi, Noriyoshi Higashi
  • Patent number: 9236512
    Abstract: An interconnected arrangement of photovoltaic cells is achieved using laminating current collector electrodes. The electrodes comprise a pattern of conductive material extending over a first surface of sheetlike substrate material. The first surface comprises material having adhesive affinity for a selected conductive surface. Application of the electrode to the selected conductive surface brings the first surface of the sheetlike substrate into adhesive contact with the conductive surface and simultaneously brings the conductive surface into firm contact with the conductive material extending over first surface of the sheetlike substrate. Use of the laminating current collector electrodes allows facile and continuous production of expansive area interconnected photovoltaic arrays.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: January 12, 2016
    Inventors: Daniel Luch, Daniel Randolph Luch
  • Patent number: 9208426
    Abstract: A chip module comprises a carrier, having a first main surface and a second main surface opposite to the first main surface. A first recess structure is arranged in the carrier in the first main surface, and a chip is arranged in the first recess structure of the carrier. A patterned metallization layer is deposited on the second main surface of the carrier, the metallization layer having a first metallization structure and a second metallization structure, the first metallization structure being electrically isolated from the second metallization structure. The chip is electrically connected to the first metallization structure and the second metallization structure. The chip module comprises in particular an RFID chip and is suited to be connected to a textile substrate by way of laser reflow soldering.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: December 8, 2015
    Assignee: Textilma AG
    Inventor: Stephan Buehler
  • Patent number: 9196779
    Abstract: A method of fabricating a thin film photovoltaic device is provided. The method subjects a soda lime glass substrate having a front side, backside, and edges to a first cleaning process and forms a first coating of silicon dioxide overlying the backside and the edges. The method further subjects the substrate to a second cleaning process and forms a second coating of silicon dioxide overlying the front side and the edges of the substrate. Furthermore, the method includes causing a barrier layer comprising the first coating and the second coating to encapsulate entirely the front side, backside, and edges. The barrier layer includes at least a thickness of oxygen rich silicon dioxide to contain any sodium bearing material within the substrate. Moreover, the method includes forming a thickness of metal material overlying the second coating on the front side followed by an absorber material and window material plus a top electrode.
    Type: Grant
    Filed: September 19, 2012
    Date of Patent: November 24, 2015
    Assignee: Stion Corporation
    Inventors: James H. Whittemore, IV, Laila Dounas, Chester A. Farris, III, Robert D. Wieting
  • Patent number: 9155212
    Abstract: A base body includes a fiducial stage part provided with an inner terminal group, and an upper stage part located at a side of an outer edge of a package with respect to the fiducial stage part and protruding with respect to the fiducial stage part through a step part. A frame body is bonded to the upper stage part, and an inner edge of the frame body is located at the side of the outer edge of the package with respect to the step part.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: October 6, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Tsuduki, Takanori Suzuki, Tadashi Kosaka, Yasuhiro Matsuki, Shin Hasegawa, Fujio Ito, Hisatane Komori, Yasushi Kurihara
  • Patent number: 9144617
    Abstract: A method of disinfection and lighting by using LEDs and an LED device thereof are provided. Two kinds of LEDs, i.e., the lighting LEDs, and the UV-LEDs, are fixed on a circuit board evenly and mixedly in a certain way, and a separator is also provided on the circuit board. Meanwhile, a controlling circuit module having a function of mode switching controls the UV-LEDs and the lighting LEDs, in such a manner that the functions of UV-LED disinfection and LED lighting are combined well in a same device. The method replaces a conventional method of sterilization and disinfection using ultraviolet (UV) rays emitted by a low pressure mercury vapor lamp. After being treated with light distribution by the separator, directionality of light emitted by the LED is stronger, and the LED is easier to operate.
    Type: Grant
    Filed: January 25, 2014
    Date of Patent: September 29, 2015
    Assignee: GUANGDONG LIGHT COLLECTION TECHNOLOGY COMPANY LIMITED
    Inventor: Weizeng Deng
  • Patent number: 9130074
    Abstract: Solar cells of varying composition are disclosed, generally including a central substrate, conductive layer(s), antireflection layers(s), passivation layer(s) and/or electrode(s). Multifunctional layers provide combined functions of passivation, transparency, sufficient conductivity for vertical carrier flow, the junction, and/or varying degrees of anti-reflectivity. Improved manufacturing methods including single-side CVD deposition processes and thermal treatment for layer formation and/or conversion are also disclosed.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: September 8, 2015
    Assignee: TetraSun, Inc.
    Inventors: Oliver Schultz-Wittmann, Denis DeCeuster
  • Patent number: 9123604
    Abstract: A backside illuminated image sensor includes a semiconductor layer having a back-side surface and a front-side surface. The semiconductor layer includes a pixel array region including a plurality of photodiodes configured to receive image light through the back-side surface of the semiconductor layer. The semiconductor layer also includes a peripheral circuit region including peripheral circuit elements for operating the plurality of photodiodes that borders the pixel array region. The peripheral circuit elements emit photons. The peripheral circuit region also includes a doped semiconductor region positioned to absorb the photons emitted by the peripheral circuit elements to prevent the plurality of photodiodes from receiving the photons.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: September 1, 2015
    Assignee: OmniVision Technologies, Inc.
    Inventors: Qingfei Chen, Qingwei Shan, Yin Qian, Dyson H. Tai
  • Patent number: 9105771
    Abstract: A method of producing an optoelectronic semiconductor component includes providing a carrier having a top side, an underside situated opposite the top side, and a plurality of connection areas arranged at the top side alongside one another in a lateral direction; applying a plurality of optoelectronic components arranged at a distance from one another in a lateral direction at the top side, the components having a contact area facing away from the carrier; applying protective elements to the contact and connection areas; applying an electrically insulating layer to exposed locations of the carrier, contact areas and protective elements; producing openings in the insulating layer by removing protective elements; and arranging an electrically conductive material on the insulating layer and in the openings, wherein the electrically conductive material connects a contact area to an assigned connection area.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: August 11, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Karl Weidner, Hans Wulkesch, Axel Kaltenbacher, Walter Wegleiter, Johann Ramchen
  • Patent number: 9087955
    Abstract: A method for processing a thin film photovoltaic module. The method includes providing a plurality of substrates, each of the substrates having a first electrode layer and an overlying absorber layer composed of copper indium gallium selenide (CIGS)or copper indium selenide (CIS) material. The absorber material comprises a plurality of sodium bearing species. The method maintains the plurality of substrates in a controlled environment after formation of at least the absorber layer through one or more processes up to a lamination process. The controlled environment has a relative humidity of less than 10% and a temperature ranging from about 10 degrees Celsius to about 40 degrees Celsius. The method subjects the plurality of substrates to a liquid comprising water at a temperature from about 10 degrees Celsius to about 80 degrees Celsius to process the plurality of substrates after formation of the absorber layer.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: July 21, 2015
    Assignee: Stion Corporation
    Inventor: Robert D. Wieting
  • Patent number: 9076922
    Abstract: In various embodiments, a method for fitting contact wires to a surface of a photovoltaic cell is provided. The method may include: feeding the contact wires to a contact wire positioning and placement device, wherein the contact wire positioning and placement device comprises a plurality of nozzles or eyes, wherein at least one contact wire is in each case passed through a respective nozzle or eye, for positioning and placement thereof onto the surface of the photovoltaic cell; positioning and placing the contact wires on the surface of the photovoltaic cell by means of the contact wire positioning and placement device; and attaching the contact wires to the surface of the photovoltaic cell.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: July 7, 2015
    Assignee: SolarWorld Innovations GmbH
    Inventors: Martin Kutzer, Olaf Storbeck, Harald Hahn, Andreas Krause, Christian Koch
  • Patent number: 9064984
    Abstract: Several embodiments for semiconductor devices and methods for forming semiconductor devices are disclosed herein. One embodiment is directed to a method for manufacturing a microelectronic imager having a die including an image sensor, an integrated circuit electrically coupled to the image sensor, and electrical connectors electrically coupled to the integrated circuit. The method can comprise covering the electrical connectors with a radiation blocking layer and forming apertures aligned with the electrical connectors through a layer of photo-resist on the radiation blocking layer. The radiation blocking layer is not photoreactive such that it cannot be patterned using radiation. The method further includes etching openings in the radiation blocking layer through the apertures of the photo-resist layer.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: June 23, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Swarnal Borthakur, Marc Sulfridge
  • Patent number: 9054006
    Abstract: Provision is a radiation detector that allows eliminating short between electric wires crossing over each other via an interlayer insulating layer and thus suppression of defective detecting elements. A construction of this embodiment has a design idea that eliminates short between electric wires of an amorphous selenium layer and an active matrix substrate. Specifically, the electric wires are in a position covered with a thick center portion of the amorphous selenium layer. This ensures to separate the electric wires away from an electrode layer, achieving provision of a radiation detector capable of being used for a long period of time.
    Type: Grant
    Filed: May 30, 2011
    Date of Patent: June 9, 2015
    Assignee: SHIMADZU CORPORATION
    Inventors: Kenji Sato, Hisao Tsuji
  • Patent number: 9041850
    Abstract: The present invention relates to a camera module including: a lens unit mounted with at least one or more lenses; an image sensor mounted with an image pickup device for converting a light converged through the lenses to an electric signal; a PCB (Printed Circuit Board) mounted with the image sensor; and a holder accommodated inside the lens unit for supporting the lens unit, wherein the lens unit is bonded and fixed at an inner surface of the holder, whereby the lens unit mounted with a plurality of lenses is bonded to a lateral surface of a holder to prevent generation of vertical tilting phenomenon at the lens unit caused by a conventional improper coating of epoxy, and particularly, the coating of epoxy on the lateral surface of the holder advantageously enhances adhesive power to increase a bonded area.
    Type: Grant
    Filed: June 22, 2011
    Date of Patent: May 26, 2015
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Hyunah Oh
  • Publication number: 20150140719
    Abstract: An embodiment of a die comprising: a semiconductor body including a front side, a back side, and a lateral surface; an electronic device, formed in said semiconductor body and including an active area facing the front side; a vertical conductive connection, extending through the semiconductor body and defining a conductive path between the front side and the back side of the semiconductor body; and a conductive contact, defining a conductive path on the front side of the semiconductor body, between the active area and the vertical conductive connection, wherein the vertical conductive connection is formed on the lateral surface of the die, outside the active area.
    Type: Application
    Filed: January 20, 2015
    Publication date: May 21, 2015
    Inventor: CROCIFISSO MARCO ANTONIO RENNA
  • Publication number: 20150136983
    Abstract: An infrared detecting element includes a recessed portion, a supporting section, and an infrared detecting section. A supporting section is located above the recessed portion such that a hollow space stands between the supporting section and the recessed portion. The infrared detecting section is provided on the supporting section and detects infrared rays. The recessed portion is covered with a water repellent film, and the supporting section is made of a material that has high rigidity compared to silicon and silicon oxide.
    Type: Application
    Filed: January 23, 2015
    Publication date: May 21, 2015
    Inventor: Kazuyuki MIYASHITA
  • Patent number: 9035173
    Abstract: A back electrode type solar cell in which a no-electrode-formed region where no electrode is placed is provided in a part of a peripheral portion of a back surface of the back electrode type solar cell such that a line connecting end portions of a plurality of electrodes to one another includes a partially inwardly recessed region and the no-electrode-formed region is located adjacent to each of an electrode for n-type and an electrode for p-type adjacent to each other, a solar cell module, a method of manufacturing a back electrode type solar cell with interconnection sheet, and a method of manufacturing a solar cell module are provided.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: May 19, 2015
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shinsuke Naito, Yasushi Sainoo, Tomohiro Nishina, Kohjiroh Morii, Tomoyo Shiraki, Akiko Tsunemi, Takayuki Yamada, Masatomo Tanahashi, Koji Fukuda
  • Publication number: 20150132872
    Abstract: Various embodiments may relate to a device for the surface treatment of a substrate, including a processing head, which is mounted rotatably about an axis of rotation, and which comprises multiple gas outlets, which are at least partially implemented on a radial outer edge of the processing head.
    Type: Application
    Filed: April 26, 2013
    Publication date: May 14, 2015
    Inventors: Juergen Bauer, Gerhard Doell, Klaus-Dieter Bauer, Philipp Erhard, Frank Vollkommer
  • Publication number: 20150129018
    Abstract: The present invention relates to a multilayer film for the encapsulation of photovoltaic cells, comprising: (a) at least a first, outer thermoplastic polymer layer;(b) a second thermoplastic polymer intermediate layer arranged between the first and the third layer, and (c) a second, outer thermoplastic polymer layer, wherein at least one of layers (a), (b) or (c) is opaque.
    Type: Application
    Filed: May 15, 2013
    Publication date: May 14, 2015
    Inventors: Johan Willy Declerck, Koen Hasaers, Kristof Proost
  • Publication number: 20150130000
    Abstract: A chip package structure includes a nanometer deposition layer and a chip having an electrical connection circuit, a photo sensing region and a plurality of electrical connection pads. The electrical connection pads and the photo sensing region are formed on the upper surface of the chip. The photo sensing region is covered with the nanometer deposition layer, which exposes the electrical connection pads. The nanometer deposition layer is used to provide electrical insulation, isolation and protection. The method for manufacturing the chip package structure includes cleaning the wafer with the chips, forming the nanometer deposition layer, and scribing the wafer to separate the chips. The present invention replaces the process of mold filling by directly forming the nanometer deposition layer so as to simplify the manufacturing steps, reduce the cost and facilitate the production, thereby shrinking the size of the chip package.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 14, 2015
    Inventor: Teng Yen Lin
  • Patent number: 9029183
    Abstract: Methods and apparatus for packaging a backside illuminated (BSI) image sensor or a BSI sensor device with an application specific integrated circuit (ASIC) are disclosed. A bond pad array may be formed in a bond pad area of a BSI sensor where the bond pad array comprises a plurality of bond pads electrically interconnected, wherein each bond pad of the bond pad array is of a small size which can reduce the dishing effect of a big bond pad. The plurality of bond pads of a bond pad array may be interconnected at the same layer of the pad or at a different metal layer. The BSI sensor may be bonded to an ASIC in a face-to-face fashion where the bond pad arrays are aligned and bonded together.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Szu-Ying Chen, Tzu-Jui Wang, Dun-Nian Yaung, Jen-Cheng Liu
  • Patent number: 9029968
    Abstract: An optical sensor element is mounted in a package which includes a glass substrate having a cavity, and a glass lid substrate bonded to the other substrate to close the cavity. The glass substrate with the cavity has metalized wiring patterns on front and rear surfaces thereof, and a through hole filled with metal to form a through-electrode interconnecting the wiring patterns on the front and rear surfaces. A metalized wiring pattern on the rear surface of the glass lid substrate is electrically connected to the wiring pattern on the front surface of the other substrate with an adhesive containing conductive particles. The glass lid substrate is made either of glass having a filter function or glass having a light shielding property with an opening therethrough filled with glass having a filter function.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: May 12, 2015
    Assignee: Seiko Instruments Inc.
    Inventors: Koji Tsukagoshi, Hitoshi Kamamori, Sadao Oku, Hiroyuki Fujita, Keiichiro Hayashi
  • Publication number: 20150125976
    Abstract: A method of producing a bulk semiconductor material comprises the steps of providing a base comprising a substantially planar substrate having a plurality of etched nano/micro-structures located thereon, each structure having an etched, substantially planar sidewall, wherein the plane of each said etched sidewall is arranged at an oblique angle to the substrate, and selectively growing the bulk semiconductor material onto the etched sidewall of each nano/micro-structure using an epitaxial growth process. A layered semiconductor device may be grown onto the bulk semiconductor material.
    Type: Application
    Filed: June 7, 2013
    Publication date: May 7, 2015
    Inventor: Wang Nang Wang
  • Publication number: 20150122331
    Abstract: An encapsulating sheet for solar cell for encapsulating a solar cell, in which, in a case in which a square sheet obtained by cutting the sheet so that a planar shape becomes a square shape is heated at the atmospheric pressure and 150° C. for 15 minutes and is thus thermally shrunk, when a length of one side of the square sheet before being thermally shrunk is represented by L, a direction in parallel with a first side is considered as a first direction, and a direction perpendicular to the first side is considered as a second direction, and in the thermally-shrunk square sheet, a shortest length in the first direction is represented by M1, and a shortest length in the second direction is represented by M2, 0?|(M1?M2)/L|?0.4 is satisfied.
    Type: Application
    Filed: February 7, 2013
    Publication date: May 7, 2015
    Applicant: Mitsui Chemicals Tohcello, Inc.
    Inventors: Hiroyuki Kuroda, Takatoshi Yaoita, Shigeyuki Shishido, Yukihiro Iwasaki, Takafumi Mori
  • Patent number: 9024344
    Abstract: A semiconductor device has a multilayer doping to provide improved passivation by quantum exclusion. The multilayer doping includes at least two doped layers fabricated using MBE methods. The dopant sheet densities in the doped layers need not be the same, but in principle can be selected to be the same sheet densities or to be different sheet densities. The electrically active dopant sheet densities are quite high, reaching more than 1×1014 cm?2, and locally exceeding 1022 per cubic centimeter. It has been found that silicon detector devices that have two or more such dopant layers exhibit improved resistance to degradation by UV radiation, at least at wavelengths of 193 nm, as compared to conventional silicon p-on-n devices.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: May 5, 2015
    Assignee: California Institute of Technology
    Inventor: Michael E. Hoenk
  • Publication number: 20150114452
    Abstract: This invention relates to photovoltaic modules wherein a polyethylene composition is used as an alternative, in whole or in part, to traditional ethylene vinyl acetate (EVA) resins in at least one layer. The polyethylene compositions are especially useful in the encapsulant and/or backsheet layers of photovoltaic modules. The polyethylene compositions comprise units derived from at least one C4 to C6 alpha-olefin comonomer, and have densities of 0.86 g/cm3 to 0.91 g/cm3.
    Type: Application
    Filed: May 7, 2013
    Publication date: April 30, 2015
    Inventors: Scott C. Solis, Danny Van Hoyweghen, Ashley Kropf
  • Publication number: 20150114451
    Abstract: An apparatus, method, and system, the apparatus and system including a flexible microsystems enabled microelectronic device package including a microelectronic device positioned on a substrate; an encapsulation layer encapsulating the microelectronic device and the substrate; a protective layer positioned around the encapsulating layer; and a reinforcing layer coupled to the protective layer, wherein the substrate, encapsulation layer, protective layer and reinforcing layer form a flexible and optically transparent package around the microelectronic device. The method including encapsulating a microelectronic device positioned on a substrate within an encapsulation layer; sealing the encapsulated microelectronic device within a protective layer; and coupling the protective layer to a reinforcing layer, wherein the substrate, encapsulation layer, protective layer and reinforcing layer form a flexible and optically transparent package around the microelectronic device.
    Type: Application
    Filed: October 31, 2013
    Publication date: April 30, 2015
    Applicant: Sandia Corporation
    Inventors: Benjamin John Anderson, Gregory N. Nielson, Jose Luis Cruz-Campa, Murat Okandan, Anthony L. Lentine, Paul J. Resnick
  • Patent number: 9019421
    Abstract: A method of manufacturing a miniaturization image capturing module includes adhesively placing a double side adhesive element onto a carrier board; adhesively placing an image capturing chip onto the double side adhesive element; adhesively placing a substrate unit onto the double side adhesive element, the substrate unit including a hollow substrate body adhered to the double side adhesive element and surrounding the image capturing chip; forming a fixing glue between the hollow substrate body and the image capturing chip to fix the position of the image capturing chip relative to the hollow substrate body; electrically connecting the image capturing chip to the substrate unit; positioning a lens unit on the top side of the hollow substrate body, the lens unit including a lens group disposed above the image capturing chip; and then removing the carrier board to expose the double side adhesive element.
    Type: Grant
    Filed: January 21, 2014
    Date of Patent: April 28, 2015
    Assignees: Lite-On Electronics (Guangzhou) Limited, Lite-On Technology Corporation
    Inventor: Ti-Lun Liu
  • Patent number: 9012264
    Abstract: An integrated circuit package is provided with a thin-film battery electrically connected to and encapsulated with an integrated circuit die. The battery can be fabricated on a dedicated substrate, on the die pad, or on the integrated circuit die itself.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: April 21, 2015
    Assignee: STMicroelectronics, Inc.
    Inventors: Michael J. Hundt, Haibin Du, Krishnan Kelappan, Frank Sigmund
  • Publication number: 20150102450
    Abstract: A semiconductor integrated circuit has one or more integral nitride-type sensors. In one embodiment, an integral nitride-type sensor and a coplanar supplemental circuit are formed from a common silicon substrate base. In another embodiment, an integral nitride-type sensor and a supplemental circuit are integrated in a vertical orientation.
    Type: Application
    Filed: November 24, 2014
    Publication date: April 16, 2015
    Applicant: RoseStreet Labs, LLC
    Inventor: Robert Forcier
  • Publication number: 20150097211
    Abstract: A composite photonic device comprises a platform, a chip, and a contact layer. The platform comprises silicon. The chip is made of a III-V material. The contact layer has indentations to help control a flow of solder during bonding of the platform with the chip. In some embodiments, pedestals are placed under an optical path to prevent solder from flowing between the chip and the platform at the optical path.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 9, 2015
    Applicant: Skorpios Technologies, Inc.
    Inventors: Stephen B. Krasulick, John Dallesasse, Amit Mizrahi, Timothy Creazzo, Elton Marchena, John Y. Spann
  • Publication number: 20150097210
    Abstract: A method for fabricating a composite device comprises providing a platform, providing a chip, and bonding the chip to the platform. The platform has a base layer and a device layer above the base layer. An opening in the device layer exposes a portion of the base layer. The chip is bonded to the portion of the base layer exposed by the opening in the device layer. A portion of the chip extends above the platform and is removed.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 9, 2015
    Applicant: Skorpios Technologies, Inc.
    Inventors: Stephen B. Krasulick, John Dallesasse, Amit Mizrahi, Timothy Creazzo, Elton Marchena, John Y. Spann
  • Patent number: 8999743
    Abstract: A solar cell module is manufactured by forming silicone coating films (2, 2) on panels (1a, 1b), placing a solar cell matrix (3) on the silicone coating film on panel (1a), providing a seal member (4) consisting of a base seal member (4a) of butyl rubber and protrusive seal segments (4b) of butyl rubber on a peripheral region of panel (1a), mating the two panels together such that the seal member (4) may abut against a peripheral region of panel (1b), and the solar cell matrix (3) may be sandwiched between the silicone coating films (2), and compressing and heating the mated panels (1a, 1b) in vacuum for establishing a seal around the solar cell matrix (3).
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: April 7, 2015
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Tomoyoshi Furihata, Hiroto Ohwada, Naoki Yamakawa, Masahiro Hinata
  • Patent number: 9000572
    Abstract: A semiconductor package substrate may include a first semiconductor chip, a second semiconductor chip, plugs and interconnection terminals. The second semiconductor chip may be arranged on an upper surface of the first semiconductor chip. The first and second semiconductor chips may have corresponding first regions and corresponding second regions. Conductive plugs may be built only in a first region of the first semiconductor chip. Circuitry of the second semiconductor chip may only be electrically connected to the first semiconductor chip through the conductive connectors corresponding to the first regions of the first and second semiconductor chips.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: April 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hoon Lee, Sang-Bo Lee
  • Publication number: 20150090333
    Abstract: An electrolyte-sealing structure for a dye-sensitized solar cell includes: a pair of opposing substrates; a fluid electrolyte sealed between the substrates; a thermoplastic resin layer positioned in such a way as to laminate the pair of substrates together while providing an area in which the fluid electrolyte is to be sealed; and a siloxane-containing layer between each of the substrates and the thermoplastic resin.
    Type: Application
    Filed: September 26, 2014
    Publication date: April 2, 2015
    Inventor: Hidenori SOMEI
  • Patent number: 8993365
    Abstract: A wafer packaging method includes the following steps. A wafer having a plurality of integrated circuit units is provided. A first surface of the wafer opposite to the integrated circuit units is ground. A release layer is formed on a second surface of a light transmissive carrier. An ultraviolet temporary bonding layer is formed on the second surface of the light transmissive carrier or a third surface of the wafer. The ultraviolet temporary bonding layer is used to adhere the second surface of the light transmissive carrier to the third surface of the wafer. The first surface of the wafer is adhered to an ultraviolet tape. A fourth surface of the light transmissive carrier is exposed to ultraviolet to eliminate adhesion force of the ultraviolet temporary bonding layer. The light transmissive carrier and the release layer are removed.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: March 31, 2015
    Assignee: Xintec Inc.
    Inventors: Yi-Ming Chang, Kuo-Hua Liu, Yi-Cheng Wang, Sheng-Yen Chang
  • Patent number: 8993364
    Abstract: Photovoltaic modules may include multiple flexible thin film photovoltaic cells electrically connected in series, and laminated to a substantially transparent top sheet having a conductive grid pattern facing the cells. Methods of manufacturing photovoltaic modules including integrated multi-cell interconnections are provided. Methods may include steps of coordinating, integrating, and registering multiple rolls of substrates in continuous processes.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: March 31, 2015
    Assignee: Hanergy Hi-Tech Power (HK) Limited
    Inventors: Scott Wiedeman, Jeffrey S. Britt, Zulima Rhodes, Eric Sheehan
  • Publication number: 20150083222
    Abstract: Provided are a backsheet for a photovoltaic module, a method of manufacturing the same, and a photovoltaic module. As a resin layer including a fluoropolymer is formed by coating an aqueous dispersion composition including a crystalline fluoropolymer, a pigment, an aqueous dispersion binder and water on a substrate by an in-line coating process in a process of manufacturing the substrate, a process of manufacturing the backsheet may be simplified. In addition, since the process of manufacturing the backsheet does not use a toxic organic solvent, the process may be environmentally friendly and economical, and may enhance both productivity and product quality.
    Type: Application
    Filed: November 26, 2014
    Publication date: March 26, 2015
    Inventors: Yoon Kyung KWON, Hyun Cheol KIM
  • Publication number: 20150084148
    Abstract: A sensor device and method of making same that includes a silicon substrate with opposing first and second surfaces, a sensor formed at or in the first surface, a plurality of first contact pads formed at the first surface which are electrically coupled to the sensor, and a plurality of cooling channels formed as first trenches extending into the second surface but not reaching the first surface. The cooling channels instead can be formed on one or more separate substrates that are attached to the silicon substrate for cooling the silicon substrate.
    Type: Application
    Filed: September 22, 2014
    Publication date: March 26, 2015
    Inventors: Vage Oganesian, Zhenhua Lu
  • Publication number: 20150084147
    Abstract: The present invention achieves reduction in size and thickness while removing the cause of defective image and the like. According to an image pickup module (1), a solid-state image pickup device (3) and a flexible substrate (2) are connected to each other by flip-chip bonding, and an opening (5) is formed in the flexible substrate 2 by melting the flexible substrate (2) and an anisotropically-conductive film (8) adhered to the flexible substrate (2).
    Type: Application
    Filed: March 1, 2013
    Publication date: March 26, 2015
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Naoki Sakota
  • Patent number: 8987029
    Abstract: A method of protecting a substrate during fabrication of semiconductor, MEMS devices. The method includes application of a protective thin film which typically has a thickness ranging from 3 angstroms to about 1,000 angstroms, wherein precursor materials used to deposit the protective thin film are organic-based precursors which include at least one fluorine-comprising functional group at one end of a carbon back bone and at least one functional bonding group at the opposite end of a carbon backbone, and wherein the carbon backbone ranges in length from 4 carbons through about 12 carbons. In many applications at least a portion of the protective thin film is removed during fabrication of the devices.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: March 24, 2015
    Assignee: Applied Microstructures, Inc.
    Inventors: Jeffrey D. Chinn, Boris Kobrin, Romuald Nowak
  • Publication number: 20150076645
    Abstract: Phosphate-based glass doped with copper ions having infrared blocking filter characteristics is formed into particles and is mixed with a transparent encapsulating resin to encapsulate a semiconductor element. The glass particles have a particle diameter four times or more as large as a wavelength of infrared radiation to be blocked. An optical semiconductor device can be obtained having a stable filter characteristics thereof even if an incident light angle changes and is resistant to moisture.
    Type: Application
    Filed: September 15, 2014
    Publication date: March 19, 2015
    Inventors: Hiroyuki FUJITA, Sadao OKU, Koji TSUKAGOSHI, Keiichiro HAYASHI
  • Patent number: 8980674
    Abstract: Provided is a semiconductor image sensor device. The image sensor device includes a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon nitride. The image sensor device includes a metal shield formed on the compressively-stressed layer. The metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a second compressively-stressed layer formed on the metal shield and the first compressively-stressed layer. The second compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the second compressively-stressed layer.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: March 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Weng, Hsun-Ying Huang, Yung-Cheng Chang, Jin-Hong Cho
  • Patent number: 8980673
    Abstract: Provided are a solar cell and a method of manufacturing the same. The method of manufacturing the solar cell includes stacking a solar cell device layer containing GaN on a sacrificial substrate, etching the solar cell device layer to expose the sacrificial substrate, thereby forming one or more solar cell devices comprising the solar cell device layer, anisotropically etching the exposed sacrificial substrate, contacting the solar cell devices to a stamping processor to remove the solar cell devices from the sacrificial substrate, and transferring the solar cell devices onto a receiving substrate. A high temperature semiconductor process may be performed on a substrate such as a silicon substrate to transfer the solar cell devices onto the substrate, thereby manufacturing flexible solar cells. Also, a large number of solar cells may be excellently aligned on a large area. In addition, economical solar cells may be manufactured.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: March 17, 2015
    Assignees: LG Siltron Incorporated, Korea Advanced Institute of Science
    Inventors: Keon Jae Lee, Sang Yong Lee, Seung Jun Kim
  • Patent number: RE45872
    Abstract: In a photovoltaic cell, an i-type amorphous silicon film and an n-type amorphous silicon film are formed in a region excluding a predetermined width of an outer periphery on a main surface of an n-type single crystalline silicon substrate. A front electrode is formed so as to cover the i-type amorphous silicon film and the n-type amorphous silicon film on a main surface of the n-type single crystalline silicon substrate. An i-type amorphous silicon film and a p-type amorphous silicon film are formed on the entire area of a back surface of the n-type single crystalline silicon substrate. A back electrode is formed in a region excluding a predetermined width of an outer periphery on the p-type amorphous silicon film. A surface, on the side of the front electrode, of the photovoltaic cell is a primary light incidence surface.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: January 26, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Akira Terakawa, Toshio Asaumi