Assembly Of Plural Semiconductor Substrates Patents (Class 438/67)
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Patent number: 8574946Abstract: A method for forming a photovoltaic structure includes forming a stack, from bottom to top, of a conductive substrate, at least one electrical isolation layer, and a patterned conductive material layer. At least one solar concentrator receiver plate configured to mount a photovoltaic concentrator cells and at least one metallic wiring structure are formed in the patterned conductive material layer. The at least one electrical isolation layer can include a stack of an electrically insulating metal-containing compound layer and an organic or inorganic dielectric material that provides thermal conduction and electrical isolation. The at least one solar concentrator receiver plate can be thicker than the at least one metallic wiring structure so as to provide enhanced thermal spreading and conduction through the at least one electrical isolation layer and into the conductive substrate.Type: GrantFiled: August 15, 2012Date of Patent: November 5, 2013Assignee: International Business Machines CorporationInventors: Yves C. Martin, Theodore G. van Kessel, Brent A. Wacaser
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Publication number: 20130284242Abstract: The fabrication and characterization of large scale inverted organic solar array fabricated using all-spray process is disclosed. Solar illumination has been demonstrated to improve transparent solar photovoltaic devices. The technology using SAM has potential to revolute current silicon-based photovoltaic technology by providing a complete solution processable manufacturing process. The semi-transparent property of the solar module allows for applications on windows and windshields. The inventive modules are more efficient than silicon solar cells in artificial light environments. This significantly expands their use in indoor applications. Additionally, these modules can be integrated into soft fabric substances such as tents, military back-packs or combat uniforms, providing a highly portable renewable power supply for deployed military forces.Type: ApplicationFiled: May 31, 2013Publication date: October 31, 2013Applicant: UNIVERSITY OF SOUTH FLORIDAInventors: Xiaomei Jane Jiang, Jason Erik Lewis
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Patent number: 8563351Abstract: A photovoltaic device manufacturing method is disclosed. Methods include manufacturing a photovoltaic cell using nanoimprint technology to define individual cell units of the photovoltaic device. The methods can include providing a substrate; forming a first conductive layer over the substrate; forming first grooves in the first conductive layer using a nanoimprint and etching process; forming an absorption layer over the first conductive layer, the absorption layer filling in the first grooves; forming second grooves in the absorption layer using a nanoimprint process; forming a second conductive layer over the absorption layer, the second conductive layer filling in the second grooves; and forming third grooves in the second conductive layer and the absorption layer, thereby defining a photovoltaic cell unit.Type: GrantFiled: June 25, 2010Date of Patent: October 22, 2013Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Chiang Tu, Chun-Lang Chen
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Patent number: 8564011Abstract: The present invention discloses a light-emitting diode (LED) package structure, which includes a housing, a first electrode plate, a second electrode plate, a light-emitting diode, and a voltage regulation diode. The housing has a top surface forming a cavity, and the cavity contains therein a wall that divides the cavity into a light emission section and a voltage regulation section. By separately arranging the light-emitting diode and the voltage regulation diode in two different sections of the light emission section and the voltage regulation section, the present invention prevents the voltage regulation diode from affecting light flux of the light-emitting diode by absorbing light, thereby enhancing overall lighting performance of the LED package structure.Type: GrantFiled: August 30, 2011Date of Patent: October 22, 2013Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.Inventors: Kuangyao Chang, Weiwei Zheng
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Publication number: 20130273685Abstract: A process for annealing photovoltaic polymer encapsulation film (3), the film comprising polymer molecules substantially oriented along a machine direction, characterized in that the film is heated, supported on a support surface of support means (12), with heating means to a relaxation temperature to increase the isotropy of the polymer molecules such that the film is at least partly annealed, the support means (12) comprising a fluid (13) between the film (3) and the support surface.Type: ApplicationFiled: October 11, 2010Publication date: October 17, 2013Applicant: NOVOPOLYMERS N.V.Inventor: Johan Willy Declerck
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Patent number: 8558234Abstract: Highly efficient, low energy, low light level imagers and photodetectors are provided. In particular, a novel class of Della-Doped Electron Bombarded Array (DDEBA) photodetectors that will reduce the size, mass, power, complexity, and cost of conventional imaging systems while improving performance by using a thinned imager that is capable of detecting low-energy electrons, has high gain, and is of low noise.Type: GrantFiled: February 11, 2011Date of Patent: October 15, 2013Assignee: California Institute of TechnologyInventors: Shouleh Nikzad, Chris Martin, Michael E. Hoenk
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Patent number: 8557674Abstract: Provided are a high voltage semiconductor device in which a field shaping layer is formed on the entire surface of a semiconductor substrate and a method of fabricating the same. Specifically, the high voltage semiconductor device includes a first conductivity-type semiconductor substrate. A second conductivity-type semiconductor layer is disposed on a surface of the semiconductor substrate, and a first conductivity-type body region is formed in semiconductor layer. A second conductivity-type source region is formed in the body region. A drain region is formed in the semiconductor layer and is separated from the body region. The field shaping layer is formed on the entire surface of the semiconductor layer facing the semiconductor layer.Type: GrantFiled: February 21, 2013Date of Patent: October 15, 2013Assignee: Fairchild Korea Semiconductor Ltd.Inventors: Yong-cheol Choi, Chang-ki Jeon, Min-suk Kim
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Patent number: 8552518Abstract: A microelectronic assembly and method of making, which includes a first microelectronic element (including a substrate with first and second opposing surfaces, a semiconductor device, and conductive pads at the first surface which are electrically coupled to the semiconductor device) and a second microelectronic element (including a handier with first and second opposing surfaces, a second semiconductor device, and conductive pads at the handler first surface which are electrically coupled to the second semiconductor device). The first and second microelectronic elements are integrated such that the second surfaces face each other. The first microelectronic element includes conductive elements each extending from one of its conductive pads, through the substrate to the second surface. The second microelectronic element includes conductive elements each extending between the handler first and second surfaces.Type: GrantFiled: June 9, 2011Date of Patent: October 8, 2013Assignee: Optiz, Inc.Inventor: Vage Oganesian
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Patent number: 8551803Abstract: Provided is a process of producing a solar battery module 1 including plural solar battery cells 4 sealed by a resin 5 between a transparent panel 2 of the light reception surface side and a back face panel 3, which is characterized by arranging plural solar battery cells 4 at a prescribed interval and mutually connecting them to each other by a conductor 8; arranging a first sealing resin sheet 12 substantially covering the entire surface of the transparent panel 2 of the light reception surface side between the transparent panel 2 of the light reception surface side and the solar battery cells 4; arranging a second sealing resin sheet 10 substantially covering the entire surface of the back face panel 3 between the back face panel 3 and the solar battery cells 4; arranging sealing resin sheet pieces 18, 19 which are thicker than the solar battery cells 4 at a space 9 between the solar battery cells 4 so as to be sandwiched by the first sealing resin sheet 12 and the second sealing resin sheet 10; discharginType: GrantFiled: February 14, 2011Date of Patent: October 8, 2013Assignee: Nakajima Glass Co., Inc.Inventors: Takeshi Yuuki, Masaru Akiyama, Keizo Masada
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Publication number: 20130260505Abstract: A solar-powered autonomous CMOS circuit structure is fabricated with monolithically integrated photovoltaic solar cells. The structure includes a device layer including an integrated circuit and a solar cell layer. Solar cell structures in the solar cell layer can be series connected during metallization of the device layer or subsequently. The device layer and the solar cell layer are formed using a silicon-on-insulator substrate. Subsequent spalling of the silicon-on-insulator substrate through the handle substrate thereof facilitates production of a relatively thin solar cell layer that can be subjected to a selective etching process to isolate the solar cell structures.Type: ApplicationFiled: December 17, 2012Publication date: October 3, 2013Applicant: International Business Machines CorporationInventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
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Publication number: 20130240020Abstract: An ultraviolet light-absorbing solar module is disclosed. The ultraviolet light transmission of a first sealant disposed between a solar cell and a transparent substrate is greater than the ultraviolet light transmission of a second sealant disposed between the solar cell and a back plate. The ultraviolet light can pass through the first sealant and be utilized by the solar cell. The ultraviolet light can be further absorbed by the second sealant. Therefore the degradation of the back plate caused by being exposed of ultraviolet light can be prevented. A fabricating method of the ultraviolet light-absorbing solar module is also disclosed.Type: ApplicationFiled: August 28, 2012Publication date: September 19, 2013Applicant: AU Optronics CorporationInventors: Wei-Jieh LEE, Chia-Hsun Tsai, Chun-Ming Yang
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Publication number: 20130234275Abstract: Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.Type: ApplicationFiled: April 19, 2013Publication date: September 12, 2013Applicant: ROUND ROCK RESEARCH, LLCInventors: Todd O. Bolken, Chad A. Cobbley
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Publication number: 20130221470Abstract: A multi-chip package may include an image sensor chip, an image signal processor (ISP) chip, a cover glass, and a package substrate. The ISP chip may be placed on the substrate. The image sensor chip may be placed over the ISP chip. An adhesive film may be formed between the ISP and image sensor chips. A cover glass may be suspended above the image sensor chip. The ISP chip and the image sensor chip may be wire bonded to the substrate. The multi-chip package may be hermetically sealed using a liquid compound or a dam structure. During normal operation, the ISP chip sends control signals to the image sensor chip via a first set of wire bond members and conductive traces in the substrate while the image sensor chip sends output signals to the ISP chip via a second set of wire bond terminals and conductive traces in the substrate.Type: ApplicationFiled: July 23, 2012Publication date: August 29, 2013Inventors: Larry D. Kinsman, Chi-Yao Kuo
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Publication number: 20130206201Abstract: A solar cell assembly provides a solar cell with a reduced size potting ring that retains the conductive contact strips that extend through the solar cell substrate and are coupled to the solar cell circuitry on the front surface of the solar cell substrate. A reduced volume of potting material is required and the solar cells are advantageously packed, shipped and stored in this configuration. Diode connections and power cable connections are made external the potting box once the solar cell assemblies are received at their installation location.Type: ApplicationFiled: February 10, 2012Publication date: August 15, 2013Applicant: TSMC Solar Ltd.Inventors: Szu-Han Li, Tong Hong Fu, Wei-Wen Chen
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Publication number: 20130183789Abstract: A method for contacting and connecting solar cells, according to which at least one electrode is formed by at least one wire conductor, and including the following steps: positioning a continuous wire conductor so that the continuous wire conductor extends across a plurality of solar cells, interrupting the electrodes at the positions required for the connection, and contacting the solar cells and electrodes.Type: ApplicationFiled: November 28, 2012Publication date: July 18, 2013Applicant: SolarWorld Innovations GmbHInventor: SolarWorld Innovations GmbH
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Micro/nanostructure PN junction diode array thin-film solar cell and method for fabricating the same
Patent number: 8486749Abstract: The present invention discloses a micro/nanostructure PN junction diode array thin-film solar cell and a method for fabricating the same, wherein a microstructure or sub-microstructure PN junction diode array, such as a nanowire array or a nanocolumns array, is transferred from a source-material wafer to two pieces of transparent substrates, which are respectively corresponding to two electric conduction types, to fabricate a thin-film solar cell. In the present invention, the micro/nanostructure PN junction diode array has advantages of a fine-quality crystalline semiconductor, and the semiconductor substrate can be reused to save a lot of semiconductor material. Besides, the present invention can make the best of sunlight energy via stacking up the solar cells made of different types of semiconductor materials to absorb different wavebands of the sunlight spectrum.Type: GrantFiled: November 14, 2011Date of Patent: July 16, 2013Assignee: National Taiwan UniversityInventors: Ching-Fuh Lin, Jiun-Jie Chao, Shu-Chia Shiu -
Publication number: 20130167910Abstract: The present invention provides an improved photovoltaic cell assembly (10) that includes at least plurality of photovoltaic calls (20). The cells include a photoactive portion (24) sandwiched between a top electrically conductive structure (28) on some regions of a top surface (28) of the photoactive portion leaving exposed top surface on other regions; and an opposing conductive substrate layer (22). The improved photovoltaic cell assembly also includes a plurality of conductive elements (80); a first encapsulant layer (40) In contact with the top electrically conductive structure and the exposed fop surface of the photoactive portion; and a second encapsulant layer (50) in contact with the opposing conductive substrate layer, the encapsulants holding the conductive elements to the cell layers.Type: ApplicationFiled: September 14, 2011Publication date: July 4, 2013Applicant: DOW GLOBAL TECHNOLOGIES LLCInventors: Marty W. DeGroot, Michael E. Mills, Thomas J. Parsons, Narayan Ramesh, Matt Stempki, Douglas J. Wirsing
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Publication number: 20130164876Abstract: A method includes a first bonding step of bonding a first main surface of a first solar cell and one side portion of a first wiring member to each other in such a way that the first main surface of the first solar cell and the one side portion are heated and pressed against each other by heated first and second tools in a state where the first main surface of the first solar cell and the one side portion face each other with the resin adhesive interposed therebetween. The first bonding step is performed with the first tool disposed in such a way that, in an extending direction of the first wiring member, both end portions of the first tool are located outside both ends of a portion of the first wiring member, the portion facing the first solar cell with the resin adhesive interposed therebetween.Type: ApplicationFiled: February 19, 2013Publication date: June 27, 2013Applicant: SANYO ELECTRIC CO., LTD.Inventor: Sanyo Electric Co., Ltd.
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Publication number: 20130152996Abstract: The present invention is premised upon an improved photovoltaic cell assembly that include at least plurality of photovoltaic cells with a photoactive portion with a top surface, a top collection structure on the top surface and an opposing conductive substrate layer on a side of the photoactive portion opposite the top surface. Also including a first conductive element with a first surface and wherein the first conductive element is bent at least once and wherein the first surface is in contact with the top collection structure and/or the top surface of a first photovoltaic cell and the opposing conductive substrate layer of an adjacent second photovoltaic cell; further wherein at least a portion of the first surface is held in contact to the cells by an adhesive.Type: ApplicationFiled: August 29, 2011Publication date: June 20, 2013Applicant: Dow Global Technologies LLCInventors: Marty DeGroot, Marc Guy Langlois
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Patent number: 8466040Abstract: The method may include providing a first substrate, the first substrate including a sacrificial layer, an active layer having an image sensor circuit portion and an interconnection layer electrically connected to the image sensor circuit portion sequentially stacked; performing an edge-trimming process with respect to the first substrate to form an interconnection layer pattern, an active layer pattern and a sacrificial layer pattern; adhering the first substrate to a second substrate; removing the sacrificial layer pattern to expose the active layer pattern; and forming a transillumination layer to provide light to an image sensor portion on the active layer pattern.Type: GrantFiled: December 14, 2009Date of Patent: June 18, 2013Assignee: Samsung Electronics Co., Ltd.Inventor: Byungjun Park
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Publication number: 20130133714Abstract: Thin film photovoltaic devices are provided that include a first submodule and a second submodule. An insulation layer can be positioned over first submodule and second submodule such that the insulation layer extends from a first bus bar to a second bus bar. A conductive link can be positioned on the insulation layer and electrically connected to the first bus bar and the second bus bar. An encapsulation substrate can be positioned over the first submodule and the second submodule. A first prong can extend through a first aperture defined in the encapsulation substrate to contact the conductive link to establish an electrical connection thereto, and a second prong can extend through a second aperture defined in the encapsulation substrate to contact the joint bus bar to establish an electrical connection thereto.Type: ApplicationFiled: November 30, 2011Publication date: May 30, 2013Applicant: PRIMESTAR SOLAR, INC.Inventor: Troy Alan Berens
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Publication number: 20130118559Abstract: PV module composed of individual PV cells oriented and electrically connected according to a methodology that is viable for at least i) bifacial cells with substantially equal solar-energy conversion efficiency achievable on each side of each cell, and ii) PV modules with low operating current. Embodiments of the invention facilitate the use of different busing technologies to reduce cost and complexity of the resulting PV module while increasing the electrical energy harvested by the PV module.Type: ApplicationFiled: November 14, 2012Publication date: May 16, 2013Applicant: Prism Solar Technologies IncorporatedInventor: Prism Solar Technologies Incorporated
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Patent number: 8440492Abstract: An assembly technique for assembling solar cell arrays is provided. During the fabrication of a solar cell, openings through the semiconductor layer are etched through to a top surface of the backmetal layer. The solar cells include an exposed top surface of the backmetal layer. A plurality of solar cells are assembled into a solar cell array where adjacent cells are interconnected in an electrically serial or parallel fashion solely from the top surface of the solar cells.Type: GrantFiled: October 11, 2012Date of Patent: May 14, 2013Assignee: MicroLink Devices, Inc.Inventors: Raymond Chan, Christopher Youtsey
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Patent number: 8441088Abstract: A manufacturing method of a solid-state imaging device includes: preparing a photoelectric conversion device; forming an insulating layer on a surface of the photoelectric conversion device; forming a wire-grid polarizer on a support base; bonding a forming surface of the wire-grid polarizer on the support base to the insulating layer on the surface of the photoelectric conversion device and removing the support base from the wire-grid polarizer.Type: GrantFiled: December 16, 2011Date of Patent: May 14, 2013Assignee: Sony CorporationInventor: Yutaka Ooka
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Patent number: 8435823Abstract: According to one embodiment, a method of manufacturing a back-illuminated solid-state imaging device including forming a mask with apertures corresponding to a pixel pattern on the surface of a semiconductor layer, implanting second-conductivity-type impurity ions into the semiconductor layer from the front side of the layer to form second-conductivity-type photoelectric conversion parts and forming a part where no ion has been implanted into a pixel separation region, forming at the surface of the semiconductor layer a signal scanning circuit for reading light signals obtained at the photoelectric conversion parts after removing the mask, and removing the semiconductor substrate and a buried insulating layer from the semiconductor layer after causing a support substrate to adhere to the front side of the semiconductor layer.Type: GrantFiled: August 2, 2010Date of Patent: May 7, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Hirofumi Yamashita
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Publication number: 20130098421Abstract: A flexible solar battery module includes a flexible insulating base and a plurality of solar batteries separately disposed on the flexible insulating base. The solar battery includes a substrate disposed on the flexible insulating base, a first electrode disposed on the substrate, a photoelectric transducing layer disposed on the first electrode and exposing parts of the first electrode, and a second electrode disposed on the photoelectric transducing layer. The flexible solar battery module further includes an insulating layer disposed on the exposed first electrode of each solar battery and the exposed flexible insulating base between the adjacent solar batteries, and an auxiliary electrode disposed on the second electrode of each solar battery and the exposed first electrode of the adjacent solar battery for setting the plurality of solar batteries in a series connection.Type: ApplicationFiled: April 17, 2012Publication date: April 25, 2013Inventors: Shih-Wei Lee, Yao-Tsang Tsai, Ming-Hung Lin
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Patent number: 8426237Abstract: An assembly technique for assembling solar cell arrays is provided. During the fabrication of a solar cell, openings through the semiconductor layer are etched through to a top surface of the backmetal layer. The solar cells include an exposed top surface of the backmetal layer. A plurality of solar cells are assembled into a solar cell array where adjacent cells are interconnected in an electrically serial or parallel fashion solely from the top surface of the solar cells.Type: GrantFiled: October 11, 2012Date of Patent: April 23, 2013Assignee: MicroLink Devices, Inc.Inventors: Raymond Chan, Christopher Youtsey
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Publication number: 20130074919Abstract: An actuatable punch assembly forms a hole within an article. The actuatable punch assembly comprises a base plate coupled to the actuator. At least one segment block is adjustably coupled to the base plate. At least one cutting device for forming the hole within the article is coupled to the segment block. The segment block is adjustable relative to the base plate. The cutting device is adjustable relative to the segment block. As such, the cutting device is adjustable relative to the base plate for varying a position of the cutting device relative to the article to vary a size of the hole formed in the article.Type: ApplicationFiled: September 21, 2012Publication date: March 28, 2013Applicant: DOW CORNING CORPORATIONInventor: Dow Coming Corporation
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Patent number: 8404510Abstract: A method for forming a CMOS image sensing pixel, which is configured to determine a color, includes providing an n-type substrate that includes a first thickness and a first width. The method also includes forming a p-type layer, the p-type layer overlaying the n-type substrate. The p-type layer includes a second thickness and a second width. The second thickness and the second width are associated with a light characteristic. The method additionally includes forming an n-type layer, the n-type layer overlaying the p-type layer. The n-type layer includes a third thickness and a third width. In addition, the method includes forming a pn junction between the p-type layer and the n-type layer. The pn junction includes a fourth width. The method also includes providing a control circuit. The control circuit is electrically coupled to the n-type substrate.Type: GrantFiled: November 23, 2010Date of Patent: March 26, 2013Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Hong Zhu, Jim Yang
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Publication number: 20130061913Abstract: A method of making a photovoltaic panel includes previously preparing one or more pre-formed substrates with a first temperature and pressure to be non-planar, textured, embossed, colored, or combinations thereof. A manufacturer can then prepare a laminate assembly comprising one or more organic photovoltaic components one or more pre-formed substrates, and a barrier layer with one or more thermally-activated thermoplastic tie layers there between. The manufacturer can then finish the photovoltaic panel lamination by subjecting the assembly to a second set of temperatures and pressures sufficient to activate and bond the pre-formed substrate, barrier layer, and photovoltaic components without significantly softening the pre-formed substrates or otherwise degrading/damaging the organic photovoltaic components. A non-planar panel made by this method can be used in both exterior and interior decorative and/or structural applications where electrical generation is desired.Type: ApplicationFiled: September 13, 2012Publication date: March 14, 2013Applicant: 3FORM, INC.Inventors: John E.C. Willham, M. Hoyt Brewster
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Publication number: 20130052770Abstract: A method of assembling a matrix of photovoltaic cells includes positioning photovoltaic cells in a desired orientation, aligning the row of photovoltaic cells relative to each other, and enabling a homogeneous downward pressure on the row of photovoltaic cells to facilitate electrical and mechanical connectivity between the photovoltaic cells.Type: ApplicationFiled: August 31, 2011Publication date: February 28, 2013Applicant: ALTA DEVICES, INC.Inventors: Joseph O. DeAngelo, Sara Kieu Lesperance, Kasiraman Krishnan
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Publication number: 20130037074Abstract: Thin film PV cells and strings of such cells that may be electrically joined with conductive tabs or ribbons. A semi-flexible, electrically conductive adhesive is applied to join the tabs to the front and back of a cell, providing a conductive pathway between the tab and solar cell, with good adhesion to both. The tabs may be constructed of one or more materials having a thermal expansion coefficient that closely matches that of the substrate material of the cells, so that when the string or module is subsequently heated, mechanical stress between the tab and solar cell is minimized. The semi-flexible nature of the ECA also acts to relieve stress between the tab and the solar cell, decreasing the possibility of adhesion failure at critical locations. One or more dielectric materials may be applied to the PV cells and/or the tabs in regions where a tab crosses the edge of a cell, to avoid electrical shorting between the negative and positive electrodes of the cell.Type: ApplicationFiled: May 29, 2012Publication date: February 14, 2013Applicant: GLOBAL SOLAR ENERGY, INC.Inventors: Jeffrey S. Britt, Eric Kanto, Charles D. Gambill, II
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Publication number: 20130014802Abstract: Solar cell including a substrate with first p-n-junction, separating the substrate into front portion having first doping and rear portion having second doping, being located close to front surface of substrate. A front layer having a p-n-junction, separating the front layer into front portion having first doping and rear portion having second doping. At least one first electric contact provided on front side of the solar cell electrically connected to front portion of the front layer, and second electric contact provided on rear side of solar cell electrically connected to a contact point provided on front side of the solar cell. Contact point is placed on a bottom surface of a groove open to front side of the cell and extending to rear portion of substrate, and an electrical connection between the second electric contact and the contact point is provided by the rear portion.Type: ApplicationFiled: July 9, 2012Publication date: January 17, 2013Applicant: ASTRIUM GMBHInventor: Claus ZIMMERMAN
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Patent number: 8349640Abstract: A method of manufacturing an image sensor having a plurality of pixels, each pixel having a photoelectric converter including an accumulation region, and a transfer gate, the accumulation region extending under a corresponding transfer gate, the plurality of pixels including a plurality of pixel groups, each pixel group including N adjacent pixels, and the channels of the N adjacent pixels, in each pixel group, being configured to transfer the charges of the N adjacent pixels away from each other, the method comprising a step of forming a resist pattern having one opening corresponding to each pixel group, and a step of forming a charge accumulation region for each of the N adjacent pixels by implanting ions into a substrate through the one opening of the resist pattern along N ion implantation directions so as to implant the ions under the transfer gate of each of the N adjacent pixels.Type: GrantFiled: April 28, 2011Date of Patent: January 8, 2013Assignee: Canon Kabushiki KaishaInventor: Takehiko Soda
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Patent number: 8343795Abstract: The present disclosure relates generally to a method to break and assemble solar cells to make solar panel. The present disclosure provides a method to produce solar pieces from solar cell, as well as assemble them together. The present disclosure device is unique when compared with other known devices and solutions because the present disclosure provides a high speed method to break scribed cells into pieces. A method of forming a string of solar cells includes providing a scribe line on a solar cell and placing a first ribbon on the solar cell. The method then includes placing the solar cell on a supporter and then breaking the solar cell into a plurality of solar cell pieces. The method then has the step of placing a second ribbon on the solar cell pieces and soldering the first and second ribbons and the solar cell pieces and then assembling the solar cell pieces into a string of solar cells.Type: GrantFiled: September 8, 2010Date of Patent: January 1, 2013Inventors: Yuhao Luo, Zhi-min Ling
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Publication number: 20120325282Abstract: A plurality of solar cells is connected together in a shingled fashion. Each of the solar cells includes grid wires that are attached to an electrode of the solar cell so as to receive charge carriers produced when photons are absorbed by the solar cell. The grid wires are then interconnected with adjacent solar cells when the solar cells are shingled together. The grid wires may be applied to the solar cells via a laminate and the electrical interconnection of the grid wires may be achieved by the use of a conductive epoxy.Type: ApplicationFiled: June 24, 2011Publication date: December 27, 2012Applicant: SoloPower, Inc.Inventors: Richard Snow, Eric Lee, Burak Metin, Serkan Erdemli, Anjuli Appapillai
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Publication number: 20120318330Abstract: A voltage matched multijunction solar cell having first and second solar cell stacks which are electrically connected parallel to each other. The first solar cell stack is optimized for absorption of incoming solar light in a first wavelength range and the second solar cell stack is optimized for absorption of incoming solar light in a second wavelength range, wherein the first and the second wavelength range do not or at most only partially overlap each other.Type: ApplicationFiled: March 17, 2011Publication date: December 20, 2012Applicant: SOITECInventors: Andreas Gombert, Sascha Van Riesen
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Publication number: 20120312358Abstract: A highly reliable solar cell module and method for manufacturing same are disclosed. The solar cell module is provided with first and second solar cell elements, each of which has a semiconductor substrate and an output taking out electrode; a circuit film which electrically connects together the first solar cell element and the second solar cell element; and a sealing material disposed between the circuit film and the second surface of the first and the second solar cell elements. The sealing material has a through hole, and the circuit film has: a base sheet having a protruding section which protrudes toward the second surface of the solar cell element; and a wiring conductor which electrically connects the output taking out electrode of the first solar cell element and the output taking out electrode of the second solar cell element.Type: ApplicationFiled: February 24, 2011Publication date: December 13, 2012Applicant: KYOCERA CORPORATIONInventors: Mitsuo Yamashita, Takeshi Kyouda
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Publication number: 20120313209Abstract: A microelectronic assembly and method of making, which includes a first microelectronic element (including a substrate with first and second opposing surfaces, a semiconductor device, and conductive pads at the first surface which are electrically coupled to the semiconductor device) and a second microelectronic element (including a handier with first and second opposing surfaces, a second semiconductor device, and conductive pads at the handler first surface which are electrically coupled to the second semiconductor device). The first and second microelectronic elements are integrated such that the second surfaces face each other. The first microelectronic element includes conductive elements each extending from one of its conductive pads, through the substrate to the second surface. The second microelectronic element includes conductive elements each extending between the handler first and second surfaces.Type: ApplicationFiled: June 9, 2011Publication date: December 13, 2012Inventor: Vage Oganesian
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Patent number: 8329495Abstract: A method of forming a PV module includes forming conductors on a top surface of a PV coated substrate; forming insulators on the top surface of the PV coated substrate; and cutting the PV coated substrate to form a plurality of individual PV cells. The PV coated substrate is cut so that each of the PV cells has some of the conductors and an insulator on its top surface. Multiple PV cells are then joined to form a PV module by attaching an edge of a first one of the PV cells under an edge of a second one of the PV cells so that at least a portion of the conductors on the first PV cell electrically contacts a bottom surface of the second PV cell.Type: GrantFiled: February 16, 2011Date of Patent: December 11, 2012Assignee: Preco, Inc.Inventor: Chris Walker
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Publication number: 20120298173Abstract: The photovoltaic cell has a block that includes at least one semiconductor substrate in which is formed at least one photovoltaic junction that is connected to a first electrical contact element of a first pole and to a second electrical contact element of a second pole. The cell includes a first transparent cover that is placed on a first surface of the block and defines with the block of the cell a first recess groove of a first electrically conductive wire element.Type: ApplicationFiled: December 18, 2009Publication date: November 29, 2012Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Dominique Vicard, Jean Brun, Pierre Perichon
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Publication number: 20120298172Abstract: A method for fabricating a photovoltaic module is disclosed. In one aspect, the method includes: providing a plurality of photovoltaic substrates having a front side; attaching the plurality of photovoltaic substrates to a transparent carrier with the front side of the photovoltaic substrates facing the carrier; and rear side processing of the plurality of photovoltaic substrates for forming photovoltaic cells, wherein rear side processing includes a single metallization process for forming electrical contacts to n-type regions and to p-type regions at the rear side of the plurality of photovoltaic cells and for interconnecting the photovoltaic cells within the photovoltaic module.Type: ApplicationFiled: May 29, 2012Publication date: November 29, 2012Applicant: IMECInventor: Kris Baert
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Patent number: 8307521Abstract: A method for manufacturing an acceleration sensing unit includes: providing an element support substrate in which a plurality of element supporting members is arranged so as to form a plane, each of the element supporting members being coupled to the other element supporting member through a supporting part and having a fixed part and a movable part that is supported by the fixed part through a beam, the beam having a flexibility with which the movable part is displaced along an acceleration detection axis direction when an acceleration is applied to the movable part; providing an stress sensing element substrate in which a plurality of stress sensing elements is arranged so as to form a plane, each of the stress sensing elements being coupled to the other stress sensing element through an element supporting part and having a stress sensing part and fixed ends that are formed so as to have a single body with the stress sensing part at both ends of the stress sensing part; disposing the stress sensing elementType: GrantFiled: April 27, 2011Date of Patent: November 13, 2012Assignee: Seiko Epson CorporationInventor: Yoshikuni Saito
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Patent number: 8283764Abstract: A microelectronic assembly and a method for forming a microelectronic assembly are provided. A semiconductor substrate is provided. The semiconductor substrate has first and second opposing sides and first and second portions. A tuning depression is formed on the second opposing side and the second portion of the semiconductor substrate. A radio frequency conductor is formed on the first opposing side of the first semiconductor substrate. The radio frequency conductor has a first end on the first portion of the first semiconductor substrate and a second end on the second portion of the first semiconductor substrate. A microelectronic die having an integrated circuit formed therein is attached to the first opposing side and the first portion of the semiconductor substrate such that the integrated circuit is electrically connected to the first end of the radio frequency conductor.Type: GrantFiled: March 30, 2012Date of Patent: October 9, 2012Assignee: Freescale Semiconductors, Inc.Inventor: Jinbang Tang
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Patent number: 8273596Abstract: Process for producing strip-shaped and/or point-shaped electrically conducting contacts on a semiconductor component like a solar cell, includes the steps of applying a moist material forming the contacts in a desired striplike and/or point-like arrangement on at least one exterior surface of the semiconductor component; drying the moist material by heating the semiconductor component to a temperature T1 and keeping the semiconductor element at temperature T1 over a time t1; sintering the dried material by heating the semiconductor component to a temperature T2 and keeping the semiconductor component at temperature T2 over a time t2; cooling the semiconductor component to a temperature T3 that is equal or roughly equal to room temperature, and keeping the semiconductor component at temperature T3 over a time T3; cooling the semiconductor component to a temperature T4 with T4??35° C.Type: GrantFiled: May 17, 2010Date of Patent: September 25, 2012Assignee: Schott Solar AGInventors: Henning Nagel, Wilfried Schmidt, Ingo Schwirtlich, Dieter Franke
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Publication number: 20120234369Abstract: A solar cell interconnection process for forming a solar cell sub-module for a photovoltaic device, the process including the steps of mounting a plurality of elongate solar cells (101) on a crossbeam (102) on patches of solderable material (201) which is used to maintain solder in position, the elongate solar cells being in a substantially longitudinally parallel and generally co-planar configuration: and establishing one or more conductive pathways (204) extending between adjacent cells to electrically interconnect the elongate solar cells via the contacts (202, 203): wherein the one or more conductive pathways are established by wave soldering.Type: ApplicationFiled: March 22, 2012Publication date: September 20, 2012Inventors: Vernie Allan Everett, Andrew William Blakers, Klaus Johannes Weber
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Publication number: 20120211047Abstract: A method of forming a multijunction solar cell string by mounting first and second multijunction solar cells on a first side of a perforated carrier; attaching a first electrical interconnect to the contact pad of said first multijunction solar cell, the electrical interconnect extending through said perforated carrier; attaching a second electrical interconnect to the metal contact layer of said second multijunction solar cell, the electrical interconnect extending through said perforated carrier; and connecting said first electrical interconnect to said second electrical interconnect.Type: ApplicationFiled: April 5, 2012Publication date: August 23, 2012Applicant: Emcore Solar Power, Inc.Inventor: Arthur Cornfeld
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Patent number: 8247259Abstract: On an epitaxy substrate (1), a layer structure (5, 6, 7) provided for light-emitting diodes or other optoelectronic components using thin-film technology is produced and provided with a first connecting layer (2), which comprises one or a plurality of solder materials. A second connecting layer (3) is applied over the whole area on a carrier (10) and permanently connected to the first connecting layer (2) by means of a soldering process.Type: GrantFiled: November 21, 2008Date of Patent: August 21, 2012Assignee: Osram Opto Semiconductors GmbHInventors: Vincent Grolier, Andreas Plössl
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Patent number: 8222086Abstract: A plurality of FPGA dice is disposed upon a semiconductor substrate. In order both to connect thousands of signal interconnect lines between the plurality of FPGA dice and to supply the immense power required, it is desired that the substrate construction include two different portions, each manufactured using incompatible processes. The first portion is a signal interconnect structure containing a thin conductor layers portion characterized as having a plurality of thin, fine-pitch conductors. The second portion is a power connection structure that includes thick conductors and vertical through-holes. The through-holes contain conductive material and supply power to the FPGA dice from power bus bars located at the other side of the semiconductor substrate. The portions are joined at the wafer level by polishing the wafer surfaces within a few atoms of flatness and subsequent cleaning. The portions are then fusion bonded together or combined using an adhesive material.Type: GrantFiled: April 4, 2011Date of Patent: July 17, 2012Assignee: Research Triangle InstituteInventor: Robert O. Conn
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Patent number: 8217269Abstract: Devices and methods for electrical interconnection for microelectronic circuits are disclosed. One method of electrical interconnection includes forming a bundle of microfilaments, wherein at least two of the microfilaments include electrically conductive portions extending along their lengths. The method can also include bonding the microfilaments to corresponding bond pads of a microelectronic circuit substrate to form electrical connections between the electrically conductive portions and the corresponding bond pads. A microelectronic circuit can include a bundle of microfilaments bonded to corresponding bond pads to make electrical connection between corresponding bonds pads and electrically-conductive portions of the microfilaments.Type: GrantFiled: August 18, 2011Date of Patent: July 10, 2012Assignee: Raytheon CompanyInventors: Stephen C. Jacobsen, David P. Marceau, Shayne M. Zum, David T. Markus