Utilizing Electromagnetic Or Wave Energy Patents (Class 438/746)
  • Patent number: 10594107
    Abstract: A semiconductor laser device includes a mounting board, a semiconductor laser element provided on the mounting board, and an optical member. The optical member is made of silicon having a first {110} plane, a first {100} plane that is adjacent to the first {110} plane, a second {110} plane, and a second {100} plane that is adjacent to the second {110} plane, with the second {100} plane being fixed on the mounting board, and the first {110} plane being covered by a reflective film to reflect laser light emitted from the semiconductor laser element.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: March 17, 2020
    Assignee: NICHIA CORPORATION
    Inventor: Shingo Tanisaka
  • Patent number: 9926225
    Abstract: Described herein are aqueous acidic glass etching solutions or media comprising HF and H2SO4, wherein HF is present in concentrations not exceeding about 1.3M. The etching solutions are used to treat glass articles such as thin glass sheets at above-ambient temperatures to etch slight thicknesses of surface glass therefrom, the etching solutions exhibiting improved stability against dissolved glass precipitation and rapid glass removal rates at slightly elevated temperatures.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: March 27, 2018
    Assignee: CORNING INCORPORATED
    Inventors: Yunfeng Gu, Jun Hou, Timothy James Orcutt, Daniel Arthur Sternquist, Jeffery Scott Stone
  • Patent number: 9305793
    Abstract: A wafer processing method for forming a via hole in a wafer. The wafer processing method includes a filament forming step of applying a pulsed laser beam to the wafer, the pulsed laser beam having a transmission wavelength to the wafer, in the condition where the focal point of the pulsed laser beam is set inside the wafer in a subject area where the via hole is to be formed, thereby forming an amorphous filament inside the wafer in the subject area, and an etching step of etching the amorphous filament formed inside the wafer by using an etching agent to thereby form the via hole inside the wafer.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: April 5, 2016
    Assignee: Disco Corporation
    Inventors: Hiroshi Morikazu, Noboru Takeda
  • Publication number: 20150137321
    Abstract: A magnetic field-guided method of metal-assisted chemical etching comprises immersing a structure that comprises a two-dimensional magnetic pattern layer on a surface thereof in an etchant solution. The magnetic pattern layer sinks into the structure as portions of the structure directly under the magnetic pattern layer are etched. A programmable magnetic field H(t) is applied to the structure during etching to guide the sinking of the magnetic pattern layer, thereby controlling the etching of the structure in three dimensions.
    Type: Application
    Filed: November 14, 2014
    Publication date: May 21, 2015
    Inventors: Xiuling Li, Weidong Zhou, Wen Huang
  • Publication number: 20150064928
    Abstract: Among other things, one or more systems and techniques for removing a photoresist from a semiconductor wafer are provided. The photoresist is formed over the semiconductor wafer for patterning or material deposition. Once completed, the photoresist is removed in a manner that mitigates damage to the semiconductor wafer or structures formed thereon. In an embodiment, trioxygen liquid is supplied to the photoresist. The trioxygen liquid is activated using an activator, such as an ultraviolet activator or a hydrogen peroxide activator, to create activated trioxygen liquid used to remove the photoresist. In an embodiment, the activation of the trioxygen liquid results in free radicals that aid in removing the photoresist. In an embodiment, an initial photoresist strip, such as using a sulfuric acid hydrogen peroxide mixture, is performed to remove a first portion of the photoresist, and the activated trioxygen liquid is used to remove a second portion of the photoresist.
    Type: Application
    Filed: August 30, 2013
    Publication date: March 5, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shang-Yuan Yu, Shao-Yen Ku, Hsiao Chien-Wen, Shao-Fu Hsu, Yuan-Chih Chiang, Wen-Chang Tsai, Jui-Chuan Chang
  • Publication number: 20140256150
    Abstract: A wafer processing method for forming a via hole in a wafer. The wafer processing method includes a filament forming step of applying a pulsed laser beam to the wafer, the pulsed laser beam having a transmission wavelength to the wafer, in the condition where the focal point of the pulsed laser beam is set inside the wafer in a subject area where the via hole is to be formed, thereby forming an amorphous filament inside the wafer in the subject area, and an etching step of etching the amorphous filament formed inside the wafer by using an etching agent to thereby form the via hole inside the wafer.
    Type: Application
    Filed: February 25, 2014
    Publication date: September 11, 2014
    Applicant: Disco Corporation
    Inventors: Hiroshi Morikazu, Noboru Takeda
  • Publication number: 20140248782
    Abstract: A substrate processing method includes rotating a substrate about a central axis thereof; starting irradiation of a surface of the substrate with soft X-rays; simultaneously with or after starting the irradiation of the surface of the substrate with the soft X-rays, starting supply of pure water onto the surface of the substrate; stopping the supply of the pure water onto the surface of the substrate; and then stopping the irradiation of the surface of the substrate with the soft X-rays.
    Type: Application
    Filed: February 26, 2014
    Publication date: September 4, 2014
    Inventor: Tomoatsu ISHIBASHI
  • Publication number: 20140248781
    Abstract: A composition is provided that is effective for removing post etch treatment (PET) polymeric films and photoresist from semiconductor substrates. The composition exhibits excellent polymer film removal capability while maintaining compatibility with copper and low-? dielectrics and contains water, ethylene glycol, a glycol ether solvent, morpholinopropylamine and a corrosion inhibiting compound and optionally one or more metal ion chelating agent, one or more other polar organic solvent, one or more tertiary amine, one or more aluminum corrosion inhibition agent, and one or more surfactant.
    Type: Application
    Filed: May 31, 2012
    Publication date: September 4, 2014
    Applicant: Avantor Performance Materials, Inc.
    Inventors: William R. Gemmill, Glenn Westwood
  • Publication number: 20140242805
    Abstract: A method for sharpening a nanotip involving a laser-enhanced chemical etching is provided. The method includes immersing a nanotip in an etchant solution. The nanotip includes a base and an apex, the apex having a diameter smaller than a diameter of the base. The method also includes irradiating the nanotip with laser fluence to establish a temperature gradient in the nanotip along a direction from the apex to the base of the nanotip such that the apex and base are etched at different rates.
    Type: Application
    Filed: December 4, 2013
    Publication date: August 28, 2014
    Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: ZhiHong MAI, Jeffrey C. LAM, Mohammed Khalid BIN DAWOOD, Tsu Hau NG
  • Publication number: 20140213063
    Abstract: A wet chemical processing method and apparatus for use in semiconductor manufacturing and in other applications, is provided. The method and apparatus provide for energizing a processing liquid such as a cleaning or etching liquid using ultrasonic, megasonic or other energy waves or by combining the liquid with a pressurized gas to form a pressurized spray, or using both. The energized, pressurized fluid is directed to a substrate surface using a fluid delivery system and overcomes any surface tensions associated with liquids, solids, or air and enables the processing liquid to completely fill any holes such as contact holes, via holes or trenches, formed on the semiconductor substrate.
    Type: Application
    Filed: January 30, 2013
    Publication date: July 31, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Yen HSU, Shao-Yen KU, Chun-Li CHOU, Tsai-Pao SU
  • Patent number: 8748324
    Abstract: Systems and methods for separating components of a multilayer stack of electronic components. The multilayer stack includes an electronic assembly, a substrate, and a sacrificial anode portion that is located between the electronic assembly and the substrate and that operatively attaches the electronic assembly to the substrate. The systems and methods may include locating the multilayer stack within an electrically conductive fluid to form an electrochemical cell. The systems and methods further may include generating a potential difference between a cathode portion of the electronic assembly and the sacrificial anode portion such that the cathode portion forms a cathode of the electrochemical cell and the sacrificial anode portion forms an anode of the electrochemical cell.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: June 10, 2014
    Assignee: The Boeing Company
    Inventors: Robyn L. Woo, Xiaobo Zhang, Christopher M. Fetzer, Eric M. Rehder
  • Publication number: 20140145311
    Abstract: Methods of forming features are disclosed. One method comprises forming a resist over a pool of acidic or basic material on a substrate structure, selectively exposing the resist to an energy source to form exposed resist portions and non-exposed resist portions, and diffusing acid or base of the acidic or basic material from the pool into proximal portions of the resist. Another method comprises forming a plurality of recesses in a substrate structure. The plurality of recesses are filled with a pool material comprising acid or base. A resist is formed over the pool material and the substrate structure and acid or base is diffused into adjacent portions of the resist. The resist is patterned to form openings in the resist. The openings comprise wider portions distal to the substrate structure and narrower portions proximal to the substrate structure. Additional methods and semiconductor device structures including the features are disclosed.
    Type: Application
    Filed: November 28, 2012
    Publication date: May 29, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Adam L. Olson, Kaveri Jain, Lijing Gou, William R. Brown, Ho Seop Eom, Xue Chen, Anton J. deVilliers
  • Patent number: 8637409
    Abstract: An etching method includes: applying a radiation to an etching aqueous solution; and etching a material to be etched by using the etching aqueous solution irradiated with the radiation.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: January 28, 2014
    Assignee: Fujitsu Limited
    Inventors: Shirou Ozaki, Masayuki Takeda
  • Publication number: 20130288484
    Abstract: The use of surfactants A, the 1% by weight aqueous solutions of which exhibit a static surface tension <25 mN/m, the said surfactants A containing at least three short-chain perfluorinated groups Rf selected from the group consisting of trifluoromethyl, pentafluoroethyl, 1-heptafluoropropyl, 2-heptafluoropropyl, heptafluoroisopropyl, and pentafluorosulfanyl; for manufacturing integrated circuits comprising patterns having line-space dimensions below 50 nm and aspect ratios >3; and a photolithographic process making use of the surfactants A in immersion photoresist layers, photoresist layers exposed to actinic radiation, developer solutions for the exposed photoresist layers and/or in chemical rinse solutions for developed patterned photoresists comprising patterns having line-space dimensions below 50 nm and aspect ratios >3.
    Type: Application
    Filed: January 17, 2012
    Publication date: October 31, 2013
    Applicant: BASF SE
    Inventors: Andreas Klipp, Dieter Mayer
  • Publication number: 20130273744
    Abstract: A method of processing a substrate is disclosed. The method uses a substrate processing apparatus including a processing tank that retains a processing liquid and that accommodates a workpiece substrate, a recirculation system recirculating the processing liquid into the processing tank by supplying the processing liquid heated by a recirculation system heater from a lower portion of the processing tank and collecting the processing liquid from an upper portion of the processing tank, a plurality of heaters distributed on an upper portion and a lower portion of the processing tank to heat the processing liquid. The method includes setting a first temperature setpoint to a heater located on the upper portion of the processing tank, and setting a second temperature setpoint lower than the first temperature setpoint to a heater located on the lower portion of the processing tank.
    Type: Application
    Filed: March 7, 2013
    Publication date: October 17, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroaki YAMADA, Hiroyasu IIMORI, Junichi IGARASHI
  • Patent number: 8524610
    Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: September 3, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Theodore M. Taylor, Stephen J. Kramer
  • Publication number: 20130224962
    Abstract: Embodiments of the present invention provide apparatus and methods for supporting, positioning or rotating a semiconductor substrate during processing. One embodiment of the present invention provides a method for processing a substrate comprising positioning the substrate on a substrate receiving surface of a susceptor, and rotating the susceptor and the substrate by delivering flow of fluid from one or more rotating ports.
    Type: Application
    Filed: March 5, 2013
    Publication date: August 29, 2013
    Inventors: Blake KOELMEL, Nyi O. MYO
  • Publication number: 20130196513
    Abstract: Disclosed is a processing method which can achieve a high processing rate, and is capable of making a surface smooth, In order to achieve this an SiC substrate is arranged in a potassium hydroxide solution containing hydrogen peroxide, and ultraviolent radiation is irradiated on the surface of the SiC substrate.
    Type: Application
    Filed: March 18, 2011
    Publication date: August 1, 2013
    Inventors: Akihisa Kubota, Mutsumi Touge
  • Patent number: 8384089
    Abstract: A nitride semiconductor device including: a substrate; a nitride semiconductor layer formed on the substrate and having a heterojunction interface; and a recess portion formed on the nitride semiconductor layer, wherein the nitride semiconductor layer includes: a carrier transit layer, which has a composition represented by the formula: Alx1Inx2Ga1?x1?x2N, (0?x1?1, 0?x2?1, 0?(x1+x2)?1); and a carrier supply layer including: a first layer formed on the carrier transit layer, said first layer having a composition represented by the formula: AlyGa1?yN, (0<y?1, x1<y); a second layer formed on the first layer, said second layer containing GaN; and a third layer formed on the second layer, said third layer having a composition represented by the formula: AlzGa1?zN, (0<z?1, x1<z), and wherein the recess portion is formed to penetrate the third layer and expose a surface of the second layer at a bottom portion of the recess portion.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: February 26, 2013
    Assignee: Sanken Electric Co., Ltd.
    Inventor: Ken Sato
  • Publication number: 20130005153
    Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.
    Type: Application
    Filed: September 11, 2012
    Publication date: January 3, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Theodore M. Taylor, Stephen J. Kramer
  • Patent number: 8344300
    Abstract: A substrate heating apparatus configured to be coupled to a processing system and radiatively heat a substrate is described. The substrate heating apparatus includes a radiative heat source coupled to a processing system and configured to produce electromagnetic (EM) radiation, a translucent object positioned between the radiative heat source and the substrate along a the EM radiation path, and an opaque object also positioned between the radiative heat source and the substrate along the EM radiation path. The translucent object includes at least one textured surface to cause random refraction of the EM radiation passing through the translucent object, or an optical waveguide configured to encapsulate the opaque object and direct the EM radiation around the opaque object, or both, to prevent creation of a shadow of the opaque object on the substrate.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: January 1, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Ronald Nasman
  • Patent number: 8329595
    Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: December 11, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Theodore M. Taylor, Stephen J. Kramer
  • Publication number: 20120282781
    Abstract: A method for removing a plurality of dielectric materials from a supporting substrate by providing a substrate with a plurality of materials, contacting the substrate at a first temperature with a solution to more quickly remove a first dielectric material than a second dielectric materials at the first temperature, and then contacting the substrate at a second temperature with a solution to more quickly remove the second dielectric material than the first dielectric material at the second temperature. Thus, the dielectric materials exhibit different etch rates when etched at the first and second temperatures. The solutions to which the first and second dielectric materials are exposed may contain phosphoric acid. The first dielectric material may be silicon nitride and the second dielectric material may be silicon oxide. Under these conditions, the first temperature may be about 175° C., and the second temperature may be about 155° C.
    Type: Application
    Filed: July 17, 2012
    Publication date: November 8, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Li Li, Don L. Yates
  • Publication number: 20120273363
    Abstract: Improved methods and apparatus for cleaning substrates and enhancing diffusion limited reaction at substrate surfaces use piezoelectric transducers operating in the gigasonic domain. The resonator assemblies include plural transducer stacks each including a thin film piezoelectric element coupled to a resonator plate that faces the substrate. At the disclosed frequencies and powers used, Eckart or Rayleigh streaming can be induced in a liquid treatment medium without substantial generation of cavitation.
    Type: Application
    Filed: April 28, 2011
    Publication date: November 1, 2012
    Applicant: LAM RESEARCH AG
    Inventors: Frank HOLSTEYNS, Alexander LIPPERT
  • Publication number: 20120238104
    Abstract: An etching method includes: applying a radiation to an etching aqueous solution; and etching a material to be etched by using the etching aqueous solution irradiated with the radiation.
    Type: Application
    Filed: February 17, 2012
    Publication date: September 20, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Masayuki Takeda
  • Publication number: 20120181668
    Abstract: The present invention refers to a method for contactless deposition of new etching compositions onto surfaces of semiconductor devices as well as to the subsequent etching of functional layers being located on top of these semiconductor devices. Said functional layers may serve as surface passivation layers and/or anti-reflective coatings (ARCs).
    Type: Application
    Filed: August 20, 2010
    Publication date: July 19, 2012
    Applicant: MERCK PATENT GESELLSCHAFT MIT BESCHRANKTER HAFTUNG
    Inventors: Oliver Doll, Edward Plummer, Mark James, Ingo Koehler, Lana Nanson
  • Publication number: 20120184102
    Abstract: The invention discloses a smoothing method to decrease bowing of group III nitride semiconductor substrate. The certain face of group III nitride semiconductor substrates is etched under the appropriate etching recipe and time, the certain morphology such as rod-type and other structures are appeared at the certain face. And such structures releases the compressive stresses at these certain faces, resulting in clearly increasing the bowing radius of the group III nitride semiconductor substrates, finally decreasing the bowing phenomenon of the group III nitride semiconductor substrate.
    Type: Application
    Filed: May 18, 2011
    Publication date: July 19, 2012
    Applicant: National Chiao Tung University
    Inventors: Wei-I Lee, Kuei-Ming Chen, Yin-Hao Wu, Yen-Hsien Yeh
  • Patent number: 8216384
    Abstract: Embodiments of the current invention describe a cleaning solution for the removal of high dose implanted photoresist, along with methods of applying the cleaning solution to remove the high dose implanted photoresist and combinatorially developing the cleaning solution.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: July 10, 2012
    Assignee: Intermolecular, Inc.
    Inventors: Nitin Kumar, Guizhen Zhang
  • Patent number: 8159050
    Abstract: A single crystal silicon etching method includes providing a single crystal silicon substrate having at least one trench therein. The single crystal silicon substrate is exposed to an anisotropic etchant that undercuts the single crystal silicon. By controlling the length of the etch, single crystal silicon islands or smooth vertical walls in the single crystal silicon may be created.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: April 17, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Janos Fucsko, David H. Wells, Patrick Flynn, Whonchee Lee
  • Patent number: 8153019
    Abstract: Methods for preventing isotropic removal of materials at corners formed by seams, keyholes, and other anomalies in films or other structures include use of etch blockers to cover or coat such corners. This covering or coating prevents exposure of the corners to isotropic etch solutions and cleaning solutions and, thus, prevents higher material removal rates at the corners than at smoother areas of the structure or film from which material is removed. Solutions, including wet etchants and cleaning solutions, that include at least one type of etch blocker are also disclosed, as are systems for preventing higher rates of material removal at corners formed by seams, crevices, or recesses in a film or other structure. Semiconductor device structures in which etch blockers are located so as to prevent isotropic etchants from removing material from corners of seams, crevices, or recesses in a surface of a film or other structure at undesirably high rates are also disclosed.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: April 10, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Nishant Sinha, J. Neil Greeley
  • Publication number: 20120018853
    Abstract: A method for photoelectrochemical (PEC) etching of a p-type semiconductor layer simply and efficiently, by providing a driving force for holes to move towards a surface of a p-type cap layer to be etched, wherein the p-type cap layer is on a heterostructure and the heterostructure provides the driving force from an internal bias generated internally in the heterostructure; generating electron-hole pairs in a separate area of the heterostructure than the surface to be etched; and using an etchant solution to etch the surface of the p-type layer.
    Type: Application
    Filed: September 28, 2011
    Publication date: January 26, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: ADELE TAMBOLI, EVELYN LYNN HU, MATHEW C. SCHMIDT, SHUJI NAKAMURA, STEVEN P. DENBAARS
  • Publication number: 20120015524
    Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.
    Type: Application
    Filed: September 28, 2011
    Publication date: January 19, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Theodore M. Taylor, Stephen J. Kramer
  • Publication number: 20120015523
    Abstract: To remove a silicon nitride layer on a silicon wafer, phosphoric acid is applied onto the wafer in a sealed chamber. The phosphoric acid may be atomized and sprayed onto the wafer as a mist or aerosol. The wafer is heated to a processing temperature and then maintained at or near the processing temperature with a coating of phosphoric acid on the wafer. The heating and applying phosphoric acid are then stopped, the wafer is cooled, and then removed from the process chamber. An infrared radiating assembly above the processing chamber may project infrared radiation into the chamber to heat the wafer. The wafer may be cooled by optionally spraying de-ionized water and/or nitrogen gas onto the workpiece. A cooling assembly may be used to cool an infrared radiating assembly. Silicon nitride is rapidly removed using very small amounts of phosphoric acid, and without the risks and disadvantages of conventional hot phosphoric bath techniques.
    Type: Application
    Filed: July 15, 2010
    Publication date: January 19, 2012
    Inventors: Jerry Dustin LEONHARD, Eric Jeffery BERGMAN
  • Publication number: 20110294302
    Abstract: Method for the electrochemical etching of macropores in n-type silicon wafers, using illumination of the wafer reverse sides and using an aqueous electrolyte, characterized in that the electrolyte is an aqueous acetic acid solution with the composition of H2O: CH3COOH in the range between 2:1 and 7:3, with an addition of at least 9 percent by weight hydrofluoric acid.
    Type: Application
    Filed: February 28, 2009
    Publication date: December 1, 2011
    Applicant: CHRISTIAN-ALBRECHTS-UNIVERSITAET ZU KIEL
    Inventors: Emmanuel Ossei-Wusu, Ala Cojocaru, Juergen Carstensen, Helmut Foell
  • Patent number: 8053264
    Abstract: A method for photoelectrochemical (PEC) etching of a p-type semiconductor layer simply and efficiently, by providing a driving force for holes to move towards a surface of a p-type cap layer to be etched, wherein the p-type cap layer is on a heterostructure and the heterostructure provides the driving force from an internal bias generated internally in the heterostructure; generating electron-hole pairs in a separate area of the heterostructure than the surface to be etched; and using an etchant solution to etch the surface of the p-type layer.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: November 8, 2011
    Assignee: The Regents of the University of California
    Inventors: Adele Tamboli, Evelyn Lynn Hu, Mathew C. Schmidt, Shuji Nakamura, Steven P. DenBaars
  • Publication number: 20110263130
    Abstract: A method for etching a layer over a substrate in a process chamber, wherein the process chamber including a first electrode and a second electrode and the first electrode is disposed opposite of the second electrode is provided. The method includes placing the substrate on the second electrode and providing an etching gas into the process chamber. The method also includes providing a first radio frequency (RF) signal into the process chamber and modulating the first RF signal. The method further includes providing a second RF signal into the process chamber and modulating the second RF signal.
    Type: Application
    Filed: July 7, 2011
    Publication date: October 27, 2011
    Inventors: Peter Loewenhardt, Mukund Sriniyasan, Andreas Fischer
  • Publication number: 20110263129
    Abstract: Disclosed is a method of etching semiconductor nanocrystals, which includes dissolving semiconductor nanocrystals in a halogenated solvent containing phosphine so that anisotropic etching of the surface of semiconductor nanocrystals is induced or adding a primary amine to a halogenated solvent containing phosphine and photoexciting semiconductor nanocrystals thus inducing isotropic etching of the surface of the nanocrystals, thereby reproducibly controlling properties of semiconductor nanocrystals including absorption wavelength, emission wavelength, emission intensity, average size, size distribution, shape, and surface state.
    Type: Application
    Filed: December 28, 2010
    Publication date: October 27, 2011
    Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Seung Koo Shin, Won Jung Kim, Sung Jun Lim
  • Publication number: 20110217848
    Abstract: A processing chamber successfully removes hardened photoresist via direct infrared radiation onto the wafer, in the presence of an acid such as sulfuric acid, optionally along with an oxidizer such as hydrogen peroxide. The processing chamber includes a fixture for holding and optionally rotating the wafer. An infrared irradiating assembly has infrared lamps outside of the processing chamber positioned to radiate infrared light into the processing chamber. The infrared lamps may be arranged to irradiate substantially the entire surface of a wafer on the rotor. A cooling assembly can be associated with the infrared radiating assembly to provide a quick cool down and avoid over-processing. Photoresist is removed using small amounts of chemical solutions.
    Type: Application
    Filed: March 3, 2010
    Publication date: September 8, 2011
    Inventors: Eric J. Bergman, Jerry Dustin Leonhard, Bryan Puch, Jason Rye
  • Patent number: 7993936
    Abstract: By evaluating a status signal on the basis of a fault detection classification mechanism in an electrochemical etch tool, a corresponding failure status of the tool may be obtained for each single substrate, thereby significantly reducing the risk of significant yield loss compared to conventional strategies. The fault detection and classification mechanism may be advantageously applied to the electrochemical removal of underbump metallization layers during the formation of solder bump structures.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: August 9, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kerstin Siury, Niels Rackwitz, Joern Schnapke, Frank Kuechenmeister
  • Patent number: 7985700
    Abstract: A method for fabricating a semiconductor device utilizing the step of forming a first insulating film of a porous material over a substrate; the step of forming on the first insulating film a second insulating film containing a silicon compound containing Si—CH3 bonds by 30-90%, and the step of irradiating UV radiation with the second insulating film formed on the first insulating film to cure the first insulating film. Thus, UV radiation having the wavelength which eliminates CH3 groups is sufficiently absorbed by the second insulating film, whereby the first insulating film is highly strengthened with priority by the UV cure, and the first insulating film can have the film density increased without having the dielectric constant increased.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: July 26, 2011
    Assignee: Fujitsu Limited
    Inventors: Shirou Ozaki, Yoshihiro Nakata, Ei Yano
  • Patent number: 7951725
    Abstract: A translucent solar cell and a manufacturing method thereof are provided. The translucent solar cell at least includes a substrate, a front electrode layer, a photoconductive layer, and a back electrode layer stacked in order. Therein, a plurality of apertures are formed on the front electrode layer. In addition, a plurality of light-transmissive regions are formed on the back electrode layer and further extended in a depth direction so as to reach the plurality of apertures on the front electrode layer. Thus, the projected area of each light-transmissive region is within and smaller than that of the corresponding aperture.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: May 31, 2011
    Assignee: Nexpower Technology Corp.
    Inventors: Chun-Hsiung Lu, Chien-Chung Bi
  • Patent number: 7935266
    Abstract: A substrate supporting film to be etched is held on a rotating stage. Ultraviolet light having a wavelength of 200 nm or shorter radiated from first lamps irradiates the film in air, thereby removing an organic coatings from the film and making the surface of the film hydrophilic. A chemical solution is applied to the hydrophilic film while rotating the substrate. Ultraviolet light having a wavelength longer than 200 nm is radiated from second lamps and onto the film through the chemical solution.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: May 3, 2011
    Assignees: Renesas Electronics Corporation, Ushio Denki Kabushiki Kaisha
    Inventors: Satoshi Kume, Nobuyuki Hishinuma, Hiroshi Sugahara
  • Publication number: 20110065281
    Abstract: A method for fabricating semiconductor devices includes providing a semiconductor substrate having a surface region containing one or more contaminants and having an overlying oxide layer. In an embodiment, the one or more contaminants are at least a carbon species. The method includes processing the surface region using at least a wet processing process to selectively remove the overlying oxide layer and expose the surface region including the one or more contaminants. The method includes subjecting the surface region to a high energy electromagnetic radiation having wavelengths ranging from about 300 to about 800 nanometers for a time period of less than 1 second to increase a temperature of the surface region to greater than 1000 degrees Celsius to remove the one or more contaminants. The method includes removing the high energy electromagnetic radiation to cause a reduction in temperature to about 300 to about 600 degrees Celsius in a time period of less than 1 second.
    Type: Application
    Filed: August 26, 2010
    Publication date: March 17, 2011
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: DAVID GAO, Fumitake Mieno
  • Patent number: 7887636
    Abstract: A substrate dryer includes, among other things, means for generating isopropyl alcohol bubbles, and a vibrator to atomize stored isopropyl alcohol. A heater may be provided to heat pumped isopropyl alcohol, as wells as a spray nozzle to spray the heated IPA to the vibrator. It is possible to increase the concentration of the isopropyl alcohol supplied for the purpose of drying the substrate. Improved substrate drying is achieved.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: February 15, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Hyeon Nam, Seung-Kun Lee
  • Patent number: 7883951
    Abstract: A semiconductor device and a method for forming it are described. The semiconductor device comprises a metal NMOS gate electrode that is formed on a first part of a substrate, and a silicide PMOS gate electrode that is formed on a second part of the substrate.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: February 8, 2011
    Assignee: Intel Corporation
    Inventors: Justin K. Brask, Mark L. Doczy, Jack Kavalieros, Matthew V. Metz, Chris E. Barns, Uday Shah, Suman Datta, Christopher D. Thomas, Robert S. Chau
  • Patent number: 7776756
    Abstract: An etching apparatus includes a chamber containing an etching solution including first and second components and water, a concentration of the water in the etching solution is at a specified level or lower; a circulation path circulating the etching solution; a concentration controller sampling the etching liquid from the circulation path and controls concentrations of the etching solution respectively; and a refilling chemical liquid feeder feeding a refilling chemical liquid including the first component having a concentration higher than the first component in the etching solution.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: August 17, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisashi Okuchi, Hiroyasu Iimori, Mami Saito, Yoshihiro Ogawa, Hiroshi Tomita, Soichi Nadahara
  • Patent number: 7776757
    Abstract: The present disclosure provides a method for fabricating a semiconductor device. The method includes providing a semiconductor substrate having a first region and a second region, forming a high-k dielectric layer over the semiconductor substrate, forming a first metal layer and a first silicon layer by an in-situ deposition process, patterning the first silicon layer to remove a portion overlying the second region, patterning the first metal layer using the patterned first silicon layer as a mask, and removing the patterned first silicon layer including applying a solution. The solution includes a first component having an [F-] concentration greater than 0.01M, a second component configured to adjust a pH of the solution from about 4.3 to about 6.7, and a third component configured to adjust a potential of the solution to be greater than ?1.4 volts.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: August 17, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Simon Su-Horng Lin, Yu-Ming Lee, Shao-Yen Ku, Chi-Ming Yang, Chyi-Shyuan Chern, Chin-Hsiang Lin
  • Publication number: 20100195684
    Abstract: A method for fabricating a semiconductor laser device, by etching facets using a photoelectrochemical (PEC) etch, so that the facets are sufficiently smooth to support optical modes within a cavity bounded by the facets.
    Type: Application
    Filed: February 1, 2010
    Publication date: August 5, 2010
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Adele C. Tamboli, Evelyn L. Hu, Steven P. DenBaars, Arpan Chakraborty
  • Publication number: 20100190351
    Abstract: A method for removing a plurality of dielectric films from a supporting substrate by providing a substrate with a dielectric layer overlying another dielectric layer, contacting the substrate at a first temperature with an acid solution exhibiting a positive etch selectivity at the first temperature, and then contacting the substrate at a second temperature with an acid solution exhibiting a positive etch selectivity at the second temperature. The dielectric layers exhibit different etch rates when etched at the first and second temperatures. The first and second acid solutions may contain phosphoric acid. The first dielectric layer may be silicon nitride and the second dielectric layer may be silicon oxide. Under these conditions, the first temperature may be about 175° C. and the second temperature may be about 155° C.
    Type: Application
    Filed: April 6, 2010
    Publication date: July 29, 2010
    Applicant: Micron Technology, Inc.
    Inventors: Li Li, Don L. Yates
  • Patent number: 7732351
    Abstract: In a manufacturing process of a semiconductor device, a manufacturing technique and a manufacturing apparatus of a semiconductor device which simplify a lithography step using a photoresist is provided, so that the manufacturing cost is reduced, and the throughput is improved. An irradiated object, in which a light absorbing layer and an insulating layer are stacked over a substrate, is irradiated with a multi-mode laser beam and a single-mode laser beam so that both the laser beams overlap with each other, and an opening is formed by ablation in part of the irradiated object the irradiation of which is performed so that both the laser beams overlap with each other.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: June 8, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hirotada Oishi, Koichiro Tanaka