Silicon Patents (Class 438/753)
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Patent number: 8466071Abstract: An object of the present invention is to provide a method for etching a single wafer, which effectively realizes a high flatness of wafer and an increase in productivity thereof. In a method for etching a single wafer, a single thin disk-like wafer sliced from a silicon single crystal ingot is spun, and a front surface of the wafer is etched with an etching solution supplied thereto. In the method, a plurality of supply nozzles are disposed above and opposite to the front surface of the wafer at different portions in the radial direction of the wafer, respectively; and then one or more conditions selected from the group consisting of temperatures, kinds, and supply flow rates of etching solutions from the plurality of supply nozzles are changed.Type: GrantFiled: January 24, 2007Date of Patent: June 18, 2013Assignee: Sumco CorporationInventors: Sakae Koyata, Tomohiro Hashii, Katsuhiko Murayama, Kazushige Takaishi, Takeo Katoh
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Patent number: 8466003Abstract: Embodiments of the current invention describe methods of forming different types of crystalline silicon based solar cells that can be combinatorially varied and evaluated. Examples of these different types of solar cells include front and back contact silicon based solar cells, all-back contact solar cells and selective emitter solar cells. These methodologies all incorporate the formation of site-isolated regions using a combinatorial processing tool and the use of these site-isolated regions to form the solar cell area. Therefore, multiple solar cells may be rapidly formed on a single crystalline silicon substrate for use in combinatorial methodologies. Any of the individual processes of the methods described may be varied combinatorially to test varied process conditions or materials.Type: GrantFiled: April 9, 2012Date of Patent: June 18, 2013Assignee: Intermolecular, Inc.Inventors: Jian Li, James Craig Hunter, Nikhil Kalyankar, Nitin Kumar, Minh Anh Anh Nguyen
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Patent number: 8461057Abstract: The present invention relates to a novel process for producing textured surfaces on multicrystalline, tricrystalline and monocrystalline silicon surfaces of solar cells or on silicon substrates which are used for photovoltaic purposes. It relates in particular to an etching process and an etching agent for producing a textured surface on a silicon substrate.Type: GrantFiled: October 18, 2010Date of Patent: June 11, 2013Assignee: BASF AktiengesellschaftInventors: Arnim Kuebelbeck, Claudia Zielinski, Thomas Goelzenleuchter
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Patent number: 8455325Abstract: A method of manufacturing a semiconductor device which includes forming a gate insulating film and a gate electrode over a semiconductor substrate, forming a first recess in the first semiconductor substrate on both sides of the gate electrode by dry etching, forming a second recess by removing a bottom and sidewalls of the first recess by wet etching, and forming a semiconductor layer in the second recess.Type: GrantFiled: January 10, 2012Date of Patent: June 4, 2013Assignee: Fujitsu Semiconductor LimitedInventors: Masahiro Fukuda, Yosuke Shimamune
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Patent number: 8455324Abstract: A method of manufacturing a semiconductor device which includes forming a gate insulating film and a gate electrode over a semiconductor substrate, forming a first recess in the first semiconductor substrate on both sides of the gate electrode by dry etching, forming a second recess by removing a bottom and sidewalls of the first recess by wet etching, and forming a semiconductor layer in the second recess.Type: GrantFiled: October 2, 2009Date of Patent: June 4, 2013Assignee: Fujitsu Semiconductor LimitedInventors: Masahiro Fukuda, Yosuke Shimamune
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Publication number: 20130137278Abstract: Disclosed herein is an etching composition for texturing a crystalline silicon wafer, comprising, based on a total amount of the composition: (A) 0.1 to 20 wt % of an alkaline compound; (B) 0.1 to 50 wt % of a cyclic compound having a boiling point of 100° C. or more; (C) 0.000001 to 10 wt % of a fluorine-based surfactant; and (D) residual water. The etching composition can maximize the absorbance of light of the surface of a crystalline silicon wafer.Type: ApplicationFiled: August 12, 2011Publication date: May 30, 2013Applicant: DONGWOO FINE-CHEM CO., LTD.Inventors: Hyung-Pyo Hong, Jae-Youn Lee, Dae-Sung Lim
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Publication number: 20130137277Abstract: In some embodiments, the present invention discloses an etchant solution hydrochloric acid and nitric acid to etch doped polysilicon at low etch rates. The doped polysilicon can be doped with Ge, In, B and Ga. Preferably, the concentration of hydrochloric acid can be greater than 1 vol %, and the concentration of nitric acid is greater than 15 vol %.Type: ApplicationFiled: November 29, 2011Publication date: May 30, 2013Applicant: Intermolecular, Inc.Inventor: Shuogang Huang
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Publication number: 20130130508Abstract: Texturing composition for texturing silicon wafers having one or more surfactants. Methods of texturing silicon wafers having the step of wetting said wafer with a texturing composition having one or more surfactants.Type: ApplicationFiled: May 18, 2012Publication date: May 23, 2013Applicant: Air Products and Chemicals, Inc.Inventors: Aiping Wu, Madhukar Bhaskara Rao, Dnyanesh Chandrakant Tamboli
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Publication number: 20130122717Abstract: A method for treating silicon to form pillars, especially for use as the active anode material in Li-ion batteries, is disclosed. The process is simple to operate on a commercial scale since it uses a solution containing only a small number of ingredients whose concentration needs to be controlled and it can be cheaper to operate than previous processes. The solution includes: 0.01 to 5M HF 0.002 to 0.2M of metal ions capable of nucleating on and forming a porous layer comprising regions of elemental metal on the silicon surface; 0.001 to 0.7M of an oxidant selected from the group O2, O3, H2O2, the acid, ammonium or alkali metal salt of NO3?, S2O82?, NO2?, B4O72? and ClO4? or a mixture thereof. The treated silicon is suitably removed from the solution.Type: ApplicationFiled: April 8, 2011Publication date: May 16, 2013Applicant: NEXEON LIMITEDInventors: Mino Green, Feng-Ming Liu, Yuxiong Jiang, Valerie Elizabeth Dawn Stevens, Benjamin Odarkwei Mills-Lamptey
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Patent number: 8440573Abstract: A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer, which is followed by wet processing and drying. During drying, pattern collapse can occur. This pattern collapse can be repaired to allow for additional processing of the wafer. In some instance, pattern collapse can be repaired via etching where the etching breaks bonds that can have formed during pattern collapse.Type: GrantFiled: January 26, 2010Date of Patent: May 14, 2013Assignee: Lam Research CorporationInventors: Katrina Mikhaylichenko, Denis Syomin, Qian Fu, Glenn W. Gale, Shenjian Liu, Mark H. Wilcoxson
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Patent number: 8435903Abstract: In one embodiment, a method for treating a surface of a semiconductor substrate is disclosed. The semiconductor substrate has a first pattern covered by a resist and a second pattern not covered by the resist. The method includes supplying a resist-insoluble first chemical solution onto a semiconductor substrate to subject the second pattern to a chemical solution process. The method includes supplying a mixed liquid of a water repellency agent and a resist-soluble second chemical solution onto the semiconductor substrate after the supply of the first chemical solution, to form a water-repellent protective film on a surface of at least the second pattern and to release the resist. In addition, the method can rinse the semiconductor substrate using water after the formation of the water-repellent protective film, and dry the rinsed semiconductor substrate.Type: GrantFiled: March 22, 2011Date of Patent: May 7, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Yoshihiro Ogawa, Shinsuke Kimura, Tatsuhiko Koide, Hisashi Okuchi, Hiroshi Tomita
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Patent number: 8419965Abstract: A method for texturing a glass substrate includes cleaning the glass substrate with at least one surfactant and etching the glass substrate using a caustic solution. The percentage of caustic solution is provided by controlling a fluid flow and temperature to control the depth of the etching. The method also includes acid cleaning the etched glass substrate to remove glass residuals and surfactants.Type: GrantFiled: June 16, 2009Date of Patent: April 16, 2013Assignee: Rockwell Collins, Inc.Inventors: Paul R. Nemeth, John W. Sackfield
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Patent number: 8419962Abstract: A method of the present invention comprises: preparing the first substrate comprising a surface with a first recess and a second recess of which a bottom comprises a first electrode; immersing the first substrate into a electrolyte solution; inserting a second electrode into the electrolyte solution; injecting a bubble into the electrolyte solution with applying a voltage between the first and the second electrodes to dispose the bubble onto only the first recess; dispersing the first microstructure into the electrolyte solution to dispose it onto the first recess; injecting the bubble into the electrolyte solution to dispose the bubble onto the second recess; and dispersing the second microstructure into the electrolyte solution to dispose it onto the second recess.Type: GrantFiled: July 27, 2011Date of Patent: April 16, 2013Assignee: Panasonic CorporationInventor: Tohru Nakagawa
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Patent number: 8415254Abstract: A method is provided for fabricating a semiconductor device. The method includes removing a silicon material from a gate structure located on a substrate through a cycle including: etching the silicon material to remove a portion thereof, where the substrate is spun at a spin rate, applying a cleaning agent to the substrate, and drying the substrate; and repeating the cycle, where a subsequent cycle includes a subsequent spin rate for spinning the substrate during the etching and where the subsequent spin rate does not exceed the spin rate of the previous cycle.Type: GrantFiled: November 20, 2008Date of Patent: April 9, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Matt Yeh, Fan-Yi Hsu, Shun Wu Lin, Shu-Yuan Ku, Hui Ouyang
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Patent number: 8409462Abstract: A method for manufacturing surgical blades from either a crystalline or poly-crystalline material, preferably in the form of a wafer, is disclosed. The method includes preparing the crystalline or poly-crystalline wafers by mounting them and machining trenches into the wafers. The methods for machining the trenches, which form the bevel blade surfaces, include a diamond blade saw, laser system, ultrasonic machine, and a hot forge press. The wafers are then placed in an etchant solution which isotropically etches the wafers in a uniform manner, such that layers of crystalline or poly-crystalline material are removed uniformly, producing single or double bevel blades. Nearly any angle can be machined into the wafer which remains after etching. The resulting radii of the blade edges is 5-500 nm, which is the same caliber as a diamond edged blade, but manufactured at a fraction of the cost.Type: GrantFiled: February 9, 2011Date of Patent: April 2, 2013Assignee: Beaver-Visitec International (US), Inc.Inventors: Joseph Francis Keenan, Vadim Mark Daskal, James Joseph Hughes
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Publication number: 20130078756Abstract: An aqueous alkaline etching and cleaning composition for treating the surface of silicon substrates, the said composition comprising: (A) a quaternary ammonium hydroxide; and (B) a component selected from the group consisting of water-soluble acids and their water-soluble salts of the general formulas (I) to (V): (R1—S03-)nXn+ (I), R—P032?(Xn+)3-n (II); (RO—S03-)nXn+ (III), RO—P032?(Xn+)3-n, (IV), and [(RO)2P02-]nXn+ (V); wherein the n=1 or 2; X is hydrogen or alkaline or alkaline-earth metal; the variable R1 is an olefinically unsaturated aliphatic or cycloaliphatic moiety and R is R1 or an alkylaryl moiety; the use of the composition for treating silicon substrates, a method for treating the surface of silicon substrates, and methods for manufacturing devices generating electricity upon the exposure to electromagnetic radiation.Type: ApplicationFiled: June 1, 2011Publication date: March 28, 2013Applicant: BASF SEInventors: Berthold Ferstl, Simon Braun, Achim Fessenbecker
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Patent number: 8399326Abstract: Disclosed is a memory device and method of operation thereof. The memory device may include a source region and a drain region of a first dopant type, the source and drain regions contain a first semiconductor material; a body region of a second dopant type, the body region being sandwiched between the source and drain regions, the body comprising a second semiconductor material; a gate dielectric layer over at least the body region; and a gate comprising a conductive material over the gate dielectric layer. Specifically, one of the first semiconductor material and the second semiconductor material is lattice matched with the other of the first semiconductor material and the second semiconductor material and has an energy gap smaller than the energy gap of the other of the first semiconductor material and the second semiconductor material.Type: GrantFiled: May 24, 2010Date of Patent: March 19, 2013Assignee: MACRONIX International Co., Ltd.Inventors: Ta-Wei Lin, Wen-Jer Tsai
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Patent number: 8387230Abstract: In a method of making an ultrasonic transducer, a piezoelectric ceramic material that is at least partially covered by metal plating is provided. A plurality of substantially parallel cuts is formed in the plating so as to define a plurality of transducer elements and a ground element. A plurality of conductors is provided. An end portion of each conductor is operatively connected, such as by ultrasonic bonding, to a respective one of the transducer elements or the ground element. Next, a backing material is bonded to the plurality of transducer elements and the ground element such that the end portion of each conductor is sandwiched between the backing material and a respective one of the transducer elements or the ground element. The conductors are bent to allow for operative connection to an ultrasound system. The operative connection between the conductors and the transducer elements is maintained during the bending step.Type: GrantFiled: August 27, 2010Date of Patent: March 5, 2013Assignee: TransducerWorks, LLCInventors: Matthew Todd Spigelmyer, Derek Ryan Greenaway
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Patent number: 8383523Abstract: In a method for the treatment of silicon wafers in the production of solar cells, a treatment liquid is applied to the surface of the silicon wafers for the purpose of texturization thereof. The treatment liquid contains, as additive, ethyl hexanol or cyclohexanol in an amount ranging from 0.5% to 3%, by weight.Type: GrantFiled: September 2, 2011Date of Patent: February 26, 2013Assignee: Gebr. Schmid GmbHInventor: Izaaryene Maher
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Publication number: 20130012028Abstract: A high purity, non-toxic, environmentally friendly method for anisotropically etching single crystal silicon and etching polysilicon, suitable for microelectronics, optoelectronics and microelectromechanical (MEMS) device fabrication, using high purity aqueous ammonium hydroxide (NH4OH) solution generated at the point of use, is presented. The apparatus of the present invention supports generation of high purity aqueous NH4OH solution from ammonia NH3 gas dissolved into distilled/deionized water and maintained in equilibrium with an overpressure of NH3, within a hermetically enclosed chamber at the optimal temperature between 70-90° C., preventing evaporation of NH3 gas from aqueous NH4OH solution for achieving a high anisotropic etching rate. Other liquid anisotropic etching methods for silicon may use tetramethylammonium hydroxide (TMAH).Type: ApplicationFiled: July 8, 2011Publication date: January 10, 2013Inventor: Alvin Gabriel Stern
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Patent number: 8343873Abstract: A method for producing a semiconductor wafer includes a number of steps in order including a bilateral material-removing process followed by rounding off an edge of the wafer and grinding front and back sides of the wafer by holding one side and grinding the other. The front and back arc then polished with a polishing cloth including bound abrasives and subsequently treated with an etching medium to carry out a material removal of no more than 1 ?m on each side. The front side is then polished using a polishing cloth including bound abrasives and the back side is simultaneously polished using a polishing cloth free of abrasives while a polish with abrasives is provided. The edge is then polished followed by polishing the back with a polishing cloth including bound abrasives and simultaneously polishing the front with a cloth free of abrasives while a polish including abrasives is provided.Type: GrantFiled: August 11, 2010Date of Patent: January 1, 2013Assignee: Siltronic AGInventor: Juergen Schwandner
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Publication number: 20120329284Abstract: Surface treatment is performed with a liquid, while shielding a semiconductor surface from light. When the method is employed for surface treatment in wet processes such as cleaning, etching and development of the semiconductor surface, increase of surface microroughness can be reduced. Thus, electrical characteristics and yield of the semiconductor device are improved.Type: ApplicationFiled: August 31, 2012Publication date: December 27, 2012Inventors: Tadahiro Ohmi, Hitoshi Morinaga
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Patent number: 8329589Abstract: A semiconductor device comprises a gate structure on a semiconductor substrate and a recessed region in the semiconductor substrate. The recessed region has a widest lateral opening that is near a top surface of the semiconductor substrate. The widest lateral opening undercuts the gate structure.Type: GrantFiled: September 9, 2011Date of Patent: December 11, 2012Assignee: Texas Instruments IncorporatedInventors: Antonio Luis Pacheco Rotondaro, Tracy Q. Hurd, Elizabeth Marley Koontz
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Patent number: 8329046Abstract: Methods for performing damage etch and texturing of single crystal silicon substrates, particularly for use as solar cells or photovoltaic cells. Damage etch with a TMAH solution followed by texturing using solution of KOH or NaOH mixed with IPA is particularly advantageous. The substitution of some of the IPA with ethylene glycol further improves results. Also disclosed is a process that combines both damage etch and texturing etch into a single step.Type: GrantFiled: February 5, 2009Date of Patent: December 11, 2012Assignee: Asia Union Electronic Chemical CorporationInventors: Curtis Dove, Cindy Dutton, Greg Bauer, Christopher Myers, Mehdi Balooch
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Patent number: 8329595Abstract: Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.Type: GrantFiled: September 28, 2011Date of Patent: December 11, 2012Assignee: Micron Technology, Inc.Inventors: Theodore M. Taylor, Stephen J. Kramer
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Patent number: 8329547Abstract: A semiconductor process is disclosed. The semiconductor process includes the steps of: providing a substrate having a specific area defined thereon; and performing an etch process by using an etchant comprising H2O2 to etch the specific area for forming a recess.Type: GrantFiled: July 22, 2010Date of Patent: December 11, 2012Assignee: United Microelectronics Corp.Inventors: Chun-Yuan Wu, Chiu-Hsien Yeh, Chin-Cheng Chien
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Patent number: 8330036Abstract: A method of fabricating a multi-junction solar cell on a separable substrate, and structure formed thereby are provided. The method comprises establishing a substrate having a semiconductive composition and forming a sacrificial layer upon the substrate. A solar cell portion is formed upon the sacrificial layer, such that the solar cell portion includes a plurality of multi junction layers. A stabilizing cell layer of semiconductor material is then formed on the solar cell portion, with the stabilizing cell layer having a predetermined thickness greater than a thickness of any individual one of the III-V multi junction layers. Etching is thereafter carried out to remove the sacrificial layer for releasing the solar cell portion from the substrate.Type: GrantFiled: August 31, 2009Date of Patent: December 11, 2012Inventor: Seoijin Park
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Patent number: 8324113Abstract: A silicon processing method includes: forming a mask pattern on a principal plane of a single-crystal silicon substrate; and applying crystal anisotropic etching to the principal surface to form a structure including a (111) surface and a crystal surface equivalent thereto and having width W1 and length L1. The principal plane includes a (100) surface and a crystal surface equivalent thereto or a (110) surface and a crystal surface equivalent thereto. A determining section for determining the width W1 of the structure is formed in the mask pattern. The width of the determining section for the width W1 of the mask pattern is width W2. The width of the mask pattern other than the determining section is larger than the width W2 over a length direction of the mask pattern.Type: GrantFiled: August 21, 2009Date of Patent: December 4, 2012Assignee: Canon Kabushiki KaishaInventors: Takahisa Kato, Yasuhiro Shimada
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Publication number: 20120295447Abstract: Pre-texturing composition for texturing silicon wafers having one or more surfactants. Methods of texturing silicon wafers having the step of wetting said wafer with a pre-texturing composition having one or more surfactants followed by a texturing step.Type: ApplicationFiled: November 15, 2011Publication date: November 22, 2012Applicant: Air Products and Chemicals, Inc.Inventors: Dnyanesh Chandrakant Tamboli, Madhukar Bhaskara Rao, Aiping Wu
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Publication number: 20120289055Abstract: A liquid composition used to carry out crystal anisotropic etching of a silicon substrate provided with an etching mask formed of a silicon oxide film with the silicon oxide film used as a mask includes cesium hydroxide, an alkaline organic compound, and water.Type: ApplicationFiled: July 24, 2012Publication date: November 15, 2012Applicant: CANON KABUSHIKI KAISHAInventors: Hiroyuki Abo, Taichi Yonemoto, Shuji Koyama, Kenta Furusawa, Keisuke Kishimoto
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Publication number: 20120289009Abstract: A manufacturing method for a semiconductor structure includes providing a substrate having at least a gate structure formed thereon, performing a first wet etching process to etch the substrate at two sides of the gate structure, performing a second wet etching process to etch the substrate to form a recess respectively at two sides of the gate structure, and performing a selective epitaxial growth method to form an epitaxial layer having a diamond shape with a flat bottom respectively in the recess.Type: ApplicationFiled: May 11, 2011Publication date: November 15, 2012Inventors: Chiu-Hsien Yeh, Chin-Cheng Chien, Yu-Wen Wang
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Patent number: 8304860Abstract: Epitaxially coated silicon wafers have a rounded and polished edge region and a region adjacent to the edge having a width of 3 mm on the front and rear sides, a surface roughness in edge region of 0.1-1.5 nm RMS relative to a spatial wavelength range of 10-80 ?m, and a variation of surface roughness of 1-10%. The wafer edges, after polishing, are examined for defects and roughness at the edge and surrounding region. Silicon wafers having a surface roughness of less than 1 nm RMS are pretreated in single wafer epitaxy reactors, first in a hydrogen atmosphere at a flow rate of 1-100 slm and in a second step, an etching medium with a flow rate of 0.5-5 slm is conducted onto the edge region of the wafer by a gas distribution device. The wafer is then epitaxially coated.Type: GrantFiled: February 16, 2010Date of Patent: November 6, 2012Assignee: Siltronic AGInventors: Friedrich Passek, Frank Laube, Martin Pickel, Reinhard Schauer
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Patent number: 8298962Abstract: A device made of single-crystal silicon having a first side, a second side which is situated opposite to the first side, and a third side which extends from the first side to the second side, the first side and the second side each extending in a 100 plane of the single-crystal silicon, the third side extending in a first area in a 111 plane of the single-crystal silicon. The third side extends in a second area in a 110 plane of the single-crystal silicon. Furthermore, a production method for producing a device made of single-crystal silicon is described.Type: GrantFiled: September 28, 2010Date of Patent: October 30, 2012Assignee: Robert Bosch GmbHInventors: Arnd Kaelberer, Helmut Baumann, Roland Scheuerer, Heribert Weber
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Patent number: 8298437Abstract: An alkali etching liquid for a silicon wafer that includes an aqueous solution of potassium hydroxide, and from 0.1 g/L to 0.5 g/L of diethylene triamine pentaacetic acid. Furthermore, the Fe concentration of the aqueous solution of potassium hydroxide is no more than 50 ppb. An etching method that including a step of etching a silicon wafer with a resistivity of no more than 1 ?·cm using the etching liquid.Type: GrantFiled: October 8, 2009Date of Patent: October 30, 2012Assignee: Sumco CorporationInventors: Takahisa Nakashima, Makoto Takemura, Yasuyuki Hashimoto
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Patent number: 8288291Abstract: The invention provides a single-step method for removing bulk metal contamination from III-V semiconductor substrates. The method comprises immersing a metal contaminated III-V semiconductor substrate in a mixture of sulfuric acid and peroxide with a volume ratio of sulfuric acid to peroxide (e.g., hydrogen peroxide) between about 3:1 and about 9:1. After treating the III-V semiconductor substrates with the sulfuric acid-peroxide mixture, the bulk metal contamination may be substantially removed from the substrate while a surface roughness of the substrate after treatment of below about 0.5 nm RMS (2 ?m×2 ?m) is obtained. The invention further provides a method for manufacturing a semiconductor device by removing bulk metal contamination according to the single-step method of the invention before performing processing steps for forming the semiconductor device.Type: GrantFiled: January 28, 2008Date of Patent: October 16, 2012Assignee: IMECInventors: Sonja Sioncke, Marc Meuris
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Patent number: 8287747Abstract: A method of processing a substrate includes the steps of providing a silicon substrate that has an etching mask layer with an opening portion at a first surface thereof and has plane orientation of {100} with the surface of the silicon being exposed from the opening portion; preparing a recessed portion that faces from the first surface to a second surface, opposite to the first surface, in the opening portion of the silicon substrate; and forming a penetration port that passes through the first surface and the second surface of the silicon substrate by executing crystalline anisotropic etching in the silicon substrate using an etching liquid in which an etching rate for etching a (100) surface of silicon is higher than an etching rate for etching a (110) surface of silicon, from the recessed portion of the silicon substrate toward the second surface.Type: GrantFiled: May 20, 2010Date of Patent: October 16, 2012Assignee: Canon Kabushiki KaishaInventors: Keisuke Kishimoto, Taichi Yonemoto
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Patent number: 8268729Abstract: A method for processing a semiconductor fin structure is disclosed. The method includes thermal annealing a fin structure in an ambient containing an isotope of hydrogen. Following the thermal annealing step, the fin structure is etched in a crystal-orientation dependent, self-limiting, manner. The crystal-orientation dependent etch may be selected to be an aqueous solution containing ammonium hydroxide (NH4OH). The completed fin structure has smooth sidewalls and a uniform thickness profile. The fin structure sidewalls are {110} planes.Type: GrantFiled: August 21, 2008Date of Patent: September 18, 2012Assignee: International Business Machines CorporationInventors: Kangguo Cheng, Bruce B. Doris, Johnathan E. Faltermeier, Ying Zhang
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Patent number: 8263853Abstract: A method of forming a plurality of discrete, interconnected solar cells mounted on a carrier by providing a first semiconductor substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell structure; forming a metal back contact layer over the solar cell structure; mounting a carrier on top of the metal back contact; removing the first substrate; and lithographically patterning and etching the solar cell structure to form a plurality of discrete solar cells mounted on the carrier.Type: GrantFiled: August 7, 2008Date of Patent: September 11, 2012Assignee: Emcore Solar Power, Inc.Inventor: Tansen Varghese
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Publication number: 20120225563Abstract: Disclosed are an etching liquid which is used for etching a silicon substrate rear surface in a through silicon via process, etches only a silicon substrate without etching a connecting plug composed of a metal such as copper, tungsten, etc., or polysilicon or the like, and has an excellent etching rate; and a method for manufacturing a semiconductor chip having a through silicon via using the same. The etching liquid is an etching liquid for etching a silicon substrate rear surface in a through silicon via process containing potassium hydroxide, hydroxylamine, and water; and the method for manufacturing a semiconductor chip includes a silicon substrate rear surface etching step using the etching liquid.Type: ApplicationFiled: November 8, 2010Publication date: September 6, 2012Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INCInventors: Ryuji Sotoaka, Yoshiko Fujioto
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Publication number: 20120208370Abstract: The invention relates to a method for etching of silicon surfaces with the following steps: Furnishing an aqueous alkaline hydrocolloid etching solution containing at least one hydrocolloid, at a temperature of 50° C. to 95° C., bringing the silicon surface in contact with the hydrocolloid etching solution for a specified duration, and Removing the hydrocolloid etching solution from the silicon surface.Type: ApplicationFiled: June 2, 2010Publication date: August 16, 2012Applicant: RENA GmbHInventors: Ahmed Abdelbar El Jaouhari, Jürgen Schweckendiek
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Patent number: 8236667Abstract: Ion injection is performed to a single crystal silicon wafer to form an ion injection layer, with the ion injection surface of the single crystal silicon wafer and/or the surface of the transparent insulation substrate are/is processed using plasma and/or ozone. The ion injection surface of the single crystal silicon wafer and the surface of the transparent insulation substrate are bonded to each other by bringing them into close contact with each other at room temperature. A silicon on insulator (SOI) wafer is obtained by mechanically peeling the single crystal silicon wafer by giving an impact to the ion injection layer, to form an SOI layer on the transparent insulation substrate, and thermal processing for flattening the SOI layer surface is performed to the SOI wafer, under an atmosphere of an inert gas, a hydrogen gas, and a mixture gas of them.Type: GrantFiled: June 27, 2008Date of Patent: August 7, 2012Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Atsuo Ito, Yoshihiro Kubota, Kiyoshi Mitani
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Publication number: 20120190210Abstract: Provided are an etching solution in which in etching processing of silicon, particularly in anisotropic etching processing of silicon in a manufacturing process of semiconductors or MEMS parts, a high etching rate is realized by suppressing a lowering an Si etching rate, which is characteristic in a hydroxylamine-containing etching solution and is caused when Cu exists in the solution, and an etching method. The etching solution is a silicon etching solution which is an alkaline aqueous solution containing an alkaline hydroxide, hydroxylamine, and a thiourea and is characterized by dissolving anisotropically monocrystalline silicon therein, and the etching method is an etching method of silicon using the etching solution.Type: ApplicationFiled: September 29, 2010Publication date: July 26, 2012Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.Inventors: Yoshiko Fujioto, Ryuji Sotoaka
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Patent number: 8216946Abstract: A patterning method has a mask layer and undoped patterns sequentially formed on a target layer. A doping process is performed to surfaces of the undoped patterns to form doped patterns from the surfaces of the undoped patterns. A material is filled in the gaps between the doped patterns. A portion of the doped patterns are then removed to expose the top surfaces of the remaining undoped patterns. The material and the exposed undoped patterns are removed. A portion of the mask layer is removed using the remaining doped patterns as a mask to form a first pattern on the mask layer. A portion of the target layer is removed using the mask layer having the first pattern thereon as a mask so as to form on the target layer a second pattern complementary to the first pattern.Type: GrantFiled: June 23, 2009Date of Patent: July 10, 2012Assignee: Nanya Technology CorporationInventors: Wei-Cheng Shiu, Hai-Han Hung, Ya-Chih Wang, Chien-Mao Liao, Shing-Yih Shih
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Patent number: 8216434Abstract: A micromachined sensor for measuring vascular parameters, such as fluid shear stress, includes a substrate having a front-side surface, and a backside surface opposite the front-side surface. The sensor includes a diaphragm overlying a cavity etched within the substrate, and a heat sensing element disposed on the front-side surface of the substrate and on top of the cavity and the diaphragm. The heat sensing element is electrically couplable to electrode leads formed on the backside surface of the substrate. The sensor includes an electronic system connected to the backside surface and configured to measure a change in heat convection from the sensing element to surrounding fluid when the sensing element is heated by applying an electric current thereto, and further configured to derive from the change in heat convection vascular parameters such as the shear stress of fluid flowing past the sensing element.Type: GrantFiled: March 3, 2008Date of Patent: July 10, 2012Assignee: University of Southern CaliforniaInventors: Tzung K. Hsiai, Gopikrishnan Soundararajan, Eun Sok Kim, Hongyu Yu, Mahsa Rouhanizadeh, Christina Tiantian Lin
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Patent number: 8211810Abstract: An additive containing a hexafluorosilicic acid solution (H2SiF6+H2O) is sequentially inputted into a phosphoric acid solution pooled in an immersion bath from an additive input mechanism. Further, a trap agent containing a fluoroboric acid solution (HBF4+H2O) is inputted into the phosphoric acid solution from a trap agent input mechanism. F? which accelerates etching of a silicon nitride film is added as appropriate by sequentially inputting the additive and siloxane which increases by the sequential input is etched with hydrofluoric acid generated by decomposition of the fluoroboric acid, to thereby suppress a significant increase in the concentration of siloxane. This makes it possible to maintain respective initial etching rates of the silicon nitride film and a silicon oxide film.Type: GrantFiled: September 3, 2008Date of Patent: July 3, 2012Assignee: Dainippon Screen Mfg. Co., Ltd.Inventor: Hiromi Kiyose
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Publication number: 20120160320Abstract: An aqueous acidic etching solution suitable for texturing the surface of single crystal and polycrystal silicon substrates and containing, based on the complete weight of the solution, 3 to 10% by weight of hydrofluoric acid; 10 to 35% by weight of nitric acid; 5 to 40% by weight of sulfuric acid; and 55 to 82% by weight of water; a method for texturing the surface of single crystal and polycrystal silicon substrates comprising the step of (1) contacting at least one major surface of a substrate with the said aqueous acidic etching solution; (2) etching the at least one major surface of the substrate for a time and at a temperature sufficient to obtain a surface texture consisting of recesses and protrusions; and (3) removing the at least one major surface of the substrate from the contact with the aqueous acidic etching solution; and a method for manufacturing photovoltaic cells and solar cells using the said solution and the said texturing method.Type: ApplicationFiled: September 9, 2010Publication date: June 28, 2012Applicants: GP SOLAR GmbH, BASF SEInventors: Simon Braun, Julian Proelss, Ihor Melnyk, Michael Michel, Stefan Mathijssen
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Patent number: 8187982Abstract: The invention permits a plurality of strips of resin adhesive film having a desired width and unwound from a single feeding reel to be simultaneously pasted on a solar cell. For this purpose, the invention comprises the steps of: unwinding a resin adhesive film sheet from a reel on which the resin adhesive film sheet is wound; splitting the unwound resin adhesive film into two or more film strips in correspondence to lengths of wiring material to bond; pasting the strips of resin adhesive film on an electrode of the solar cell; and placing the individual lengths of wiring material on the electrode of the solar cell having the plural strips of resin adhesive film pasted thereon and thermally setting the resin adhesive film by heating so as to fix together the electrode of the solar cell and the wiring material.Type: GrantFiled: March 22, 2010Date of Patent: May 29, 2012Assignee: Sanyo Electric Co., Ltd.Inventors: Yousuke Ishii, Shingo Okamoto
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Patent number: 8182710Abstract: A method of structuring multicrystalline silicon surfaces comprises the provision of a texturing solution, the application of the texturing solution to a surface of a semiconductor substrate to be structured and the heating of the texturing solution to a texturing temperature, wherein the texturing solution comprises at least a portion of phosphoric acid.Type: GrantFiled: November 17, 2008Date of Patent: May 22, 2012Assignee: Deutsche Cell GmbHInventor: Detlef Sontag
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Patent number: 8182706Abstract: In a method for texturing silicon wafers for producing solar cells, the step of introducing a silicon wafer involves the use of a texturing solution which is at a temperature of at least 80 degrees Celsius and which comprises water admixed with 1 percent by weight to 6 percent by weight KOH or 2 percent by weight to 8 percent by weight NaOH and with a surfactant or a surfactant mixture constituting less than 0.01 percent by weight. Very economic texturing can be performed in this way.Type: GrantFiled: July 12, 2007Date of Patent: May 22, 2012Assignee: Universitat KonstanzInventors: Peter Fath, Ihor Melnyk, Eckard Wefringhaus
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Patent number: 8173030Abstract: A method for forming a self-aligned hole through a substrate to form a fluid feed passage is provided by initially forming an insulating layer on a first side of a substrate having two opposing sides; and forming a feature on the insulating layer. Next, etch an opening through the insulating layer, such that the opening is physically aligned with the feature on the insulating layer; and coat the feature with a layer of protective material. Patterning the layer of protective material will expose the opening through the insulating layer. Dry etching from the first side of the substrate forms a blind feed hole in the substrate corresponding to the location of the opening in the insulating layer, the blind feed hole including a bottom. Subsequently, grind a second side of the substrate and blanket etch it to form a hole through the entire substrate.Type: GrantFiled: September 30, 2008Date of Patent: May 8, 2012Assignee: Eastman Kodak CompanyInventors: John Andrew Lebens, Weibin Zhang, Christopher Newell Delametter