Microwave Gas Energizing Patents (Class 438/777)
  • Patent number: 10157786
    Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on copper instead of insulating or dielectric materials. In some embodiments, a first precursor forms a layer on the first surface and is subsequently reacted or converted to form a metallic layer. The deposition temperature may be selected such that a selectivity of above about 50% or even about 90% is achieved.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: December 18, 2018
    Assignee: ASM INTERNATIONAL N.V.
    Inventors: Suvi P. Haukka, Antti Niskanen, Marko Tuominen
  • Patent number: 8937000
    Abstract: A chemical vapor deposition reactor and method. Reactive gases, such as gases including a Group III metal source and a Group V metal source, are introduced into the chamber (10) of a rotating-disc reactor and directed downwardly onto a wafer carrier (32) and substrates (40) which are maintained at an elevated substrate temperature, typically above about 400° C. and normally about 700-1100° C. to deposit a compound such as a III-V semiconductor. The gases are introduced into the reactor at an inlet temperature desirably above about 75° C. and most preferably about 100°-350° C. The walls of the reactor may be at a temperature close to the inlet temperature. Use of an elevated inlet temperature allows the use of a lower rate of rotation of the wafer carrier, a higher operating pressure, lower flow rate, or some combination of these.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: January 20, 2015
    Assignee: Veeco Instruments Inc.
    Inventors: Alex Gurary, Mikhail Belousov, Bojan Mitrovic
  • Patent number: 8916483
    Abstract: Methods of fabricating semiconductor structures include the formation of molybdenum nitride at one or more surfaces of a substrate comprising molybdenum, and providing a layer of III-V semiconductor material, such as GaN, over the substrate. Semiconductor structures formed by methods described herein may include a substrate comprising molybdenum, molybdenum nitride at one or more surfaces of the substrate, and a layer of GaN bonded to the molybdenum nitride.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: December 23, 2014
    Assignee: SOITEC
    Inventor: Christiaan J. Werkhoven
  • Patent number: 8906790
    Abstract: In some embodiments of the present invention, methods of using one or more small spot showerhead apparatus to deposit materials using CVD, PECVD, ALD, or PEALD on small spots in a site isolated, combinatorial manner are described. The small spot showerheads may be configured within a larger combinatorial showerhead to allow multi-layer film stacks to be deposited in a combinatorial manner.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: December 9, 2014
    Assignee: Intermolecular, Inc.
    Inventors: Albert Lee, Tony P. Chiang, Jason Wright
  • Publication number: 20140342543
    Abstract: Methods and apparatus for selective one-step nitridation of semiconductor substrates is provided. Nitrogen is selectively incorporated in silicon regions of a semiconductor substrate having silicon regions and silicon oxide regions by use of a selective nitridation process. Nitrogen containing radicals may be directed toward the substrate by forming a nitrogen containing plasma and filtering or removing ions from the plasma, or a thermal nitridation process using selective precursors may be performed. A remote plasma generator may be coupled to a processing chamber, optionally including one or more ion filters, showerheads, and radical distributors, or an in situ plasma may be generated and one or more ion filters or shields disposed in the chamber between the plasma generation zone and the substrate support.
    Type: Application
    Filed: June 9, 2014
    Publication date: November 20, 2014
    Inventors: Udayan GANGULY, Theresa Kramer GUARINI, Matthew Scott ROGERS, Yoshitaka YOKOTA, Johanes S. SWENBERG, Malcolm J. BEVAN
  • Patent number: 8748259
    Abstract: Methods and apparatus for selective one-step nitridation of semiconductor substrates is provided. Nitrogen is selectively incorporated in silicon regions of a semiconductor substrate having silicon regions and silicon oxide regions by use of a selective nitridation process. Nitrogen containing radicals may be directed toward the substrate by forming a nitrogen containing plasma and filtering or removing ions from the plasma, or a thermal nitridation process using selective precursors may be performed. A remote plasma generator may be coupled to a processing chamber, optionally including one or more ion filters, showerheads, and radical distributors, or an in situ plasma may be generated and one or more ion filters or shields disposed in the chamber between the plasma generation zone and the substrate support.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: June 10, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Udayan Ganguly, Theresa Kramer Guarini, Matthew Scott Rogers, Yoshitaka Yokota, Johanes S. Swenberg, Malcolm J. Bevan
  • Patent number: 8741779
    Abstract: A plasma processing apparatus for processing an object to be processed using a plasma. The apparatus includes a processing chamber defining a processing cavity for containing an object to be processed and a process gas therein, a microwave radiating antenna having a microwave radiating surface for radiating a microwave in order to excite a plasma in the processing cavity, and a dielectric body provided so as to be opposed to the microwave radiating surface, in which the distance D between the microwave radiating surface and a surface of the dielectric body facing away from the microwave radiating surface, which is represented with the wavelength of the microwave being a distance unit, is determined to be in the range satisfying the inequality 0.7×n/4?D?1.3×n/4 (n being a natural number).
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: June 3, 2014
    Assignees: ROHM Co., Ltd.
    Inventors: Tadahiro Ohmi, Kazuhide Ino, Takahiro Arakawa
  • Patent number: 8728951
    Abstract: A method of processing a substrate includes performing a first exposure that comprises generating a plasma containing reactive gas ions in a plasma chamber and generating a bias voltage between the substrate and the plasma chamber. The method also includes providing a plasma sheath modifier having an aperture disposed between the plasma and substrate and operable to direct the reactive gas ions toward the substrate, and establishing a pressure differential between the plasma chamber and substrate region while the reactive gas ions are directed onto the substrate.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: May 20, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Ludovic Godet, Xianfeng Lu, Deepak A. Ramappa
  • Patent number: 8609519
    Abstract: In some embodiments of the present invention, methods of using one or more small spot showerhead apparatus to deposit materials using CVD, PECVD, ALD, or PEALD on small spots in a site isolated, combinatorial manner are described. The small spot showerheads may be configured within a larger combinatorial showerhead to allow multi-layer film stacks to be deposited in a combinatorial manner.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: December 17, 2013
    Assignee: Intermolecular, Inc.
    Inventors: Albert Lee, Tony P. Chiang, Jason Wright
  • Patent number: 8580670
    Abstract: A method of producing a thin film using plasma enhanced chemical vapor deposition, including the steps of supplying a cation species to a substrate region when there is at most a relatively low flux of a plasma based anion species in the substrate region, and supplying the plasma based anion species to the substrate region when there is at most a relatively low flux of the cation species in the substrate region. This enables delivery of gaseous reactants to be separated in time in PECVD and/or RPECVD based film growth systems, which provides a significant reduction in the formation of dust particles for these plasma based film growth techniques.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: November 12, 2013
    Inventor: Kenneth Scott Alexander Butcher
  • Patent number: 8547085
    Abstract: An arrangement for measuring process parameters within a processing chamber is provided. The arrangement includes a probe arrangement disposed in an opening of an upper electrode. Probe arrangement includes a probe head, which includes a head portion and a flange portion. The arrangement also includes an o-ring disposed between the upper electrode and the flange portion. The arrangement further includes a spacer made of an electrically insulative material positioned between the head portion and the opening of the upper electrode to prevent the probe arrangement from touching the upper electrode. The spacer includes a disk portion configured for supporting an underside of the flange portion. The spacer also includes a hollow cylindrical portion configured to encircle the head portion. The spacer forms a right-angled path between the o-ring and an opening to the processing chamber to prevent direct line-of-sight path between the o-ring and the opening to the processing chamber.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: October 1, 2013
    Assignee: Lam Research Corporation
    Inventors: Jean-Paul Booth, Douglas Keil
  • Patent number: 8513137
    Abstract: A plasma processing apparatus for processing an object to be processed using a plasma. The apparatus includes a processing chamber defining a processing cavity for containing an object to be processed and a process gas therein, a microwave radiating antenna having a microwave radiating surface for radiating a microwave in order to excite a plasma in the processing cavity, and a dielectric body provided so as to be opposed to the microwave radiating surface, in which the distance D between the microwave radiating surface and a surface of the dielectric body facing away from the microwave radiating surface, which is represented with the wavelength of the microwave being a distance unit, is determined to be in the range satisfying the inequality 0.7×n/4?D?1.3×n/4 (n being a natural number).
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 20, 2013
    Assignees: Rohm Co., Ltd., Tadahiro Ohmi
    Inventors: Tadahiro Ohmi, Kazuhide Ino, Takahiro Arakawa
  • Patent number: 8273641
    Abstract: Apparatus and method for plasma deposition of thin film photovoltaic materials at microwave frequencies. The apparatus avoids unintended deposition on windows or other microwave transmission elements that couple microwave energy to deposition species. The apparatus includes a microwave applicator with one or more conduits passing therethrough that carry deposition species. The applicator transfers microwave energy to the deposition species to activate or energize them to a reactive state. The conduits physically isolate deposition species that would react or otherwise combine to form a thin film material at the point of microwave power transfer and deliver the microwave-excited species to a deposition chamber. One or more supplemental material streams may be delivered directly to the deposition chamber without passing through the microwave applicator and may combine with deposition species exiting the one or more conduits to form a thin film material.
    Type: Grant
    Filed: December 31, 2010
    Date of Patent: September 25, 2012
    Assignee: Ovshinsky Innovation LLC
    Inventor: Stanford R. Ovshinsky
  • Patent number: 8252666
    Abstract: A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of through hole vias (THV) is formed in first and second offset rows in the die extension region. A conductive material is deposited in the THVs. A first RDL is formed between contact pads on the semiconductor die and the THVs. A second RDL is formed on a backside of the semiconductor die in electrical contact with the THVs. An under bump metallization is formed in electrical contact with the second RDL. Solder bumps are formed on the under bump metallization. The die extension region is singulated to separate the semiconductor die.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: August 28, 2012
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Lionel Chien Hui Tay, Arnel Senosa Trasporto
  • Patent number: 8216900
    Abstract: Provided are a nonvolatile memory device, a method of manufacturing the nonvolatile memory device, and a method of manufacturing a flat panel display device provided therein with the nonvolatile memory device. According to an embodiment, an amorphous silicon layer is formed on a substrate, and then annealed by using an Excimer laser to form a crystallized silicon layer. A nitrogen plasma treatment is performed for the crystallized silicon layer to planarize an upper surface of the crystallized silicon layer. An ONO layer is formed on the nitrogen plasma-treated crystallized silicon layer. A metal layer is formed on the ONO layer. The metal layer, the ONO layer and the nitrogen plasma-treated crystallized silicon layer are patterned.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: July 10, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Dae Young Kim
  • Publication number: 20120164845
    Abstract: The present invention generally provides apparatus and method for processing a substrate. Particularly, the present invention provides apparatus and methods to obtain a desired distribution of a process gas. One embodiment of the present invention provides an apparatus for processing a substrate comprising an injection nozzle having a first fluid path including a first inlet configured to receive a fluid input, and a plurality of first injection ports connected with the first inlet, wherein the plurality of first injection ports are configured to direct a fluid from the first inlet towards a first region of a process volume, and a second fluid path including a second inlet configured to receive a fluid input, and a plurality of second injection ports connected with the second inlet, wherein the second injection ports are configured to direct a fluid from the second inlet towards a second region of the process volume.
    Type: Application
    Filed: March 8, 2012
    Publication date: June 28, 2012
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Wei Liu, Johanes S. Swenberg, Hanh D. Nguyen, Son T. Nguyen, Roger Curtis, Philip A. Bottini
  • Patent number: 8097959
    Abstract: A semiconductor device and method. One embodiment provides an integral array of first carriers and an integral array of second carries connected to the integral array of first carriers. First semiconductor chips are arranged on the integral array of first carriers. The integral array of second carriers is arranged over the first semiconductor chips.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: January 17, 2012
    Assignee: Infineon Technologies AG
    Inventors: Stefan Landau, Joachim Mahler, Thomas Wowra
  • Patent number: 8048782
    Abstract: Apparatus and method for plasma deposition of thin film photovoltaic materials at microwave frequencies. The apparatus avoids deposition on windows or other microwave transmission elements that couple microwave energy to deposition species. The apparatus includes a microwave applicator with conduits passing therethrough that carry deposition species. The applicator transfers microwave energy to the deposition species to transform them to a reactive state conducive to formation of a thin film material. The conduits physically isolate deposition species that would react to form a thin film material at the point of microwave power transfer. The deposition species are separately energized and swept away from the point of power transfer to prevent thin film deposition. The invention allows for the ultrafast formation of silicon-containing amorphous semiconductors that exhibit high mobility, low porosity, little or no Staebler-Wronski degradation, and low defect concentration.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: November 1, 2011
    Assignee: Ovshinsky Innovation LLC
    Inventors: Stanford R. Ovshinsky, David Strand, Patrick Klersy, Boil Pashmakov
  • Patent number: 8008216
    Abstract: Metal Oxide Semiconductor (MOS) transistors fabricated using current art may utilize a nitridation process on the gate dielectric to improve transistor reliability. Nitridation by the current art, which involves exposing the gate dielectric to a nitridation source, produces a significant concentration of nitrogen at the interface of the gate dielectric and the transistor substrate, which adversely affects transistor performance. This invention comprises the process of depositing a sacrificial layer on the gate dielectric prior to nitridation, exposing the sacrificial layer to a nitridation source, during which time nitrogen atoms diffuse through the sacrificial layer into the gate dielectric, then removing the sacrificial layer without degrading the gate dielectric. Work associated with this invention on high-k gate dielectrics has demonstrated a 20 percent reduction in nitrogen concentration at the gate dielectric—transistor substrate interface.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: August 30, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Husam Alshareef, Manuel Quevedo Lopez
  • Patent number: 7989281
    Abstract: Provided is a method for manufacturing a dual gate in a semiconductor device. The method includes forming a gate insulating layer and a gate conductive layer on a semiconductor substrate, forming a diffusion barrier layer on the gate conductive layer, forming a barrier metal layer on the diffusion barrier layer, depositing a first gate metal layer on the barrier metal layer, forming a metal nitride barrier layer on a surface of the first gate metal layer by supplying nitrogen (N2) plasma on the first gate metal layer, forming a second gate metal layer on the metal nitride barrier layer, and forming a hard mask layer on the second gate metal layer.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: August 2, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hyun Phill Kim
  • Patent number: 7968470
    Abstract: A nitriding process is performed at a process temperature of 500° C. or more by causing microwave-excited high-density plasma of a nitrogen-containing gas to act on silicon in the surface of a target object, inside a process container of a plasma processing apparatus. The plasma is generated by supplying microwaves into the process container from a planar antenna having a plurality of slots.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: June 28, 2011
    Assignees: Tohoku University, Tokyo Electron Limited
    Inventors: Tadahiro Ohmi, Akinobu Teramoto, Minoru Honda, Toshio Nakanishi
  • Patent number: 7928018
    Abstract: The application of oxynitriding treatment to electronic appliances involve the problem that N2 ions are formed to thereby damage any oxynitride film. It is intended to provide a method of plasma treatment capable of realizing high-quality oxynitriding and to provide a process for producing an electronic appliance in which use is made of the method of plasma treatment. There is provided a method of plasma treatment, comprising generating plasma with a gas for plasma excitation and introducing a treating gas in the plasma to thereby treat a treatment subject, wherein the treating gas contains nitrous oxide gas, this nitrous oxide gas introduced in a plasma of <2.24 eV electron temperature, so that the generation of ions tending to damage any insulating film is reduced to thereby realize high-quality oxynitriding. Further, there is provided a process for producing an electronic appliance in which use is made of the method of plasma treatment.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: April 19, 2011
    Assignee: Foundation for Advancement of International Science
    Inventors: Tadahiro Ohmi, Akinobu Teramoto, Hiroshi Yamauchi, Yukio Hayakawa
  • Patent number: 7910494
    Abstract: A gas delivery system for supplying a process gas from a gas supply to a thermal processing furnace, a thermal processing furnace equipped with the gas delivery system, and methods for delivering process gas to a thermal processing furnace. The gas delivery system comprises a plurality of regulators, such as mass flow controllers, in a process gas manifold coupling a gas supply with a thermal processing furnace. The regulators establish a corresponding plurality of flows of a process gas at a plurality of flow rates communicated by the process gas manifold to the thermal processing furnace. The gas delivery system may be a component of the thermal processing furnace that further includes a liner that surrounds a processing space inside the thermal processing furnace.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: March 22, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Anthony Dip, Eric J. Malstrom
  • Patent number: 7906362
    Abstract: An assembly method to enable local electrical bonds between zones located on a face of a first substrate and corresponding zones located on a face of a second substrate, the faces being located facing each other, at least one of the substrates having a surface topography. The method forms an intermediate layer including at least one burial layer on the face of the substrate or substrates having a surface topography to make it (them) compatible with molecular bonding of the faces of substrates to each other from a topographic point of view, resistivity and/or thickness of the intermediate layer being chosen to enable the local electrical bonds, brings the two faces into contact, the substrates positioned to create electrical bonds between areas on the first substrate and corresponding areas on the second substrate, and bonds the faces by molecular bonding.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: March 15, 2011
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Guy Feuillet, Hubert Moriceau, Stephane Pocas, Eric Jalaguier, Norbert Moussy
  • Publication number: 20100323529
    Abstract: A method for forming an insulating film includes a step of preparing a substrate, which is to be processed and has silicon exposed on the surface; a step of performing first nitriding to the silicon exposed on the surface of the substrate, and forming a silicon nitride film having a thickness of 0.2 nm but not more than 1 nm on the surface of the substrate; and a step of performing first heat treatment to the silicon nitride film in N2O atmosphere and forming a silicon nitride film. This method may further include a step of performing second nitriding to the silicon oxynitride film, and furthermore, may include a step of performing second heat treatment to the silicon oxynitride film after the second nitriding.
    Type: Application
    Filed: December 20, 2007
    Publication date: December 23, 2010
    Applicant: Tokyo Electron Limited
    Inventors: Minoru Honda, Yoshihiro Sato, Toshio Nakanishi
  • Patent number: 7855153
    Abstract: A method for manufacturing an insulating film, which is used as an insulating film used for a semiconductor integrated circuit, whose reliability can be ensured even though it has small thickness, is provided. In particular, a method for manufacturing a high-quality insulating film over a substrate having an insulating surface, which can be enlarged, at low substrate temperature, is provided. A monosilane gas (SiH4), nitrous oxide (N2O), and a rare gas are introduced into a chamber to generate high-density plasma at a pressure higher than or equal to 10 Pa and lower than or equal to 30 Pa so that an insulating film is formed over a substrate having an insulating surface. After that, the supply of a monosilane gas is stopped, and nitrous oxide (N2O) and a rare gas are introduced without exposure to the air to perform plasma treatment on a surface of the insulating film.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: December 21, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuhiro Ichijo, Kenichi Okazaki, Tetsuhiro Tanaka, Takashi Ohtsuki, Seiji Yasumoto, Shunpei Yamazaki
  • Patent number: 7795158
    Abstract: In an oxidation method for a semiconductor process, target substrates are placed at intervals in a vertical direction within a process field of a process container. An oxidizing gas and a deoxidizing gas are supplied to the process field from one side of the process field while gas is exhausted from the other side. One or both of the oxidizing gas and the deoxidizing gas are activated. The oxidizing gas and the deoxidizing gas are caused to react with each other, thereby generating oxygen radicals and hydroxyl group radicals within the process field. An oxidation process is performed on the surfaces of the target substrate by use of the oxygen radicals and the hydroxyl group radicals.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: September 14, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Takehiko Fujita, Jun Ogawa, Shigeru Nakajima, Kazuhide Hasebe
  • Patent number: 7718484
    Abstract: In a film formation method of a semiconductor device including a plurality of silicon-based transistors or capacitors, there exist hydrogen at least in a part of the silicon surface in advance, and the film formation method removes the hydrogen by exposing the silicon surface to a first inert gas plasma. Thereafter a silicon compound layer is formed on the surface of the silicon gas by generating plasma while using a mixed gas of a second inert gas and one or more gaseous molecules, such that there is formed a silicon compound layer containing at least a pat of the elements constituting the gaseous molecules, on the surface of the silicon gas.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: May 18, 2010
    Assignee: Foundation for Advancement of International Science
    Inventors: Tadahiro Ohmi, Shigetoshi Sugawa, Masaki Hirayama, Yasuyuki Shirai
  • Patent number: 7691725
    Abstract: An insulating film is formed as a pore-wall protective film (103) on pore walls in a porous layer (102) by the use of a mixed gas plasma of a noble gas and an insulating film forming gas generated by microwave excitation. As a result, the pore-wall protective film can have film properties as a protective film.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: April 6, 2010
    Inventors: Tadahiro Ohmi, Akinobu Teramoto
  • Patent number: 7682973
    Abstract: A method of forming a Carbon NanoTube (CNT) structure and a method of manufacturing a Field Emission Device (FED) using the method of forming a CNT structure includes: forming an electrode on a substrate, forming a buffer layer on the electrode, forming a catalyst layer in a particle shape on the buffer layer, etching the buffer layer exposed through the catalyst layer, and growing CNTs from the catalyst layer formed on the etched buffer layer.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: March 23, 2010
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Ha-Jin Kim, In-Taek Han, Young-Chul Choi, Kwang-Seok Jeong
  • Patent number: 7678672
    Abstract: A device and method associated with carbon nanowires, such as single walled carbon nanowires having a high degree of alignment are set forth herein. A catalyst layer is deposited having a predetermined crystallographic configuration so as to control a growth parameter, such as an alignment direction, a diameter, a crystallinity and the like of the carbon nanowire. The catalyst layer is etched to expose a sidewall portion. The carbon nanowire is nucleated from the exposed sidewall portion. An electrical circuit device can include a single crystal substrate, such as Silicon, and a crystallographically oriented catalyst layer on the substrate having an exposed sidewall portion. In the device, carbon nanowires are disposed on the single crystal substrate aligned in a direction associated with the crystallographic properties of the catalyst layer.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: March 16, 2010
    Assignee: Northrop Grumman Space & Mission Systems Corp.
    Inventors: Vincent Gambin, Roger Su-Tsung Tsai
  • Patent number: 7671398
    Abstract: An apparatus includes a plurality of wash durable clothing strands; an array of nano electronic elements fabricated in the strands; and an array of memory elements coupled to the nano electronic elements. The nano electronic elements can include solar cells, display elements, or antennas, among others.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: March 2, 2010
    Inventor: Bao Q. Tran
  • Patent number: 7645647
    Abstract: A thin film transistor includes a multi-coaxial silicon nanowire unit including a plurality of coaxial silicon nanowires on a substrate, the multi-coaxial silicon nanowire unit including a central portion and end portions of the central portion; a gate electrode on the central portion; and a source electrode and a drain electrode on the respective end portions, respectively, so as to electrically connect to the multi-coaxial silicon nanowire unit.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: January 12, 2010
    Assignee: LG. Display Co., Ltd.
    Inventors: Gee-Sung Chae, Mi-Kyung Park
  • Publication number: 20090197403
    Abstract: A method for forming an insulating film includes forming a silicon nitride film on a silicon surface by subjecting a target substrate wherein silicon is exposed in the surface to a treatment for nitriding the silicon, forming a silicon oxynitride film by heating the target substrate provided with the silicon nitride film in an N2O atmosphere, and nitriding the silicon oxynitride film.
    Type: Application
    Filed: May 30, 2007
    Publication date: August 6, 2009
    Inventors: Minoru Honda, Yoshihiro Sato, Toshio Nakanishi
  • Patent number: 7560396
    Abstract: An electronic device material comprising at least an electronic device substrate and a silicon oxynitride film disposed on the substrate is provided. The silicon oxynitride film is characterized by containing nitrogen atoms in a large amount in the vicinity of the oxynitride film surface when the nitrogen content distribution in the thickness direction of the silicon oxynitride film is examined by SIMS (secondary ion mass spectrometry) analysis. By virtue of this constitution, an electronic device material comprising an oxynitride film having an excellent effect of preventing penetration of boron and having excellent gate leak properties can be obtained.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: July 14, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Takuya Sugawara, Shigenori Ozaki, Masaru Sasaki
  • Patent number: 7534731
    Abstract: A method for growing an oxynitride film on a substrate includes positioning the substrate in a process chamber, heating the process chamber, flowing a wet process gas comprising water vapor and a nitriding gas comprising nitric oxide into the process chamber. The wet process gas and the nitriding gas form a processing ambient that reacts with the substrate such that an oxynitride film grows on the substrate. In yet another embodiment, the method further comprises flowing a diluting gas into the process chamber while flowing the wet process gas to control a growth rate of the oxynitride film. In another embodiment, the method further comprises annealing the substrate and the oxynitride film in an annealing gas. According to embodiments of the method where the substrate is silicon, a silicon oxynitride film forms that exhibits a nitrogen peak concentration of at least approximately 6 atomic % and an interface state density of less than approximately 1.5 ×10 12 per cc.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: May 19, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Kimberly G. Reid, Anthony Dip
  • Publication number: 20090104787
    Abstract: A nitriding process is performed at a process temperature of 500° C. or more by causing microwave-excited high-density plasma of a nitrogen-containing gas to act on silicon in the surface of a target object, inside a process container of a plasma processing apparatus. The plasma is generated by supplying microwaves into the process container from a planar antenna having a plurality of slots.
    Type: Application
    Filed: June 7, 2006
    Publication date: April 23, 2009
    Applicants: Tohoku University, TOKYO ELECTRON LIMITED
    Inventors: Tadahiro Ohmi, Akinobu Teramoto, Minoru Honda, Toshio Nakanishi
  • Patent number: 7517751
    Abstract: A substrate processing method includes the step of forming an oxide film by oxidizing a silicon substrate surface and the step of nitriding the oxide film to form an oxynitride film, wherein there is provided a step of purging oxygen after the oxidizing step but before said nitriding step from an ambient in which said nitriding processing is conducted.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: April 14, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Takuya Sugawara, Seiji Matsuyama, Masaru Sasaki
  • Patent number: 7517814
    Abstract: A method for preparing an oxynitride film on a substrate comprising forming the oxynitride film by exposing a surface of the substrate to oxygen radicals and nitrogen radicals formed by plasma induced dissociation of a process gas comprising nitrogen and oxygen using plasma based on microwave irradiation via a plane antenna member having a plurality of slits.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: April 14, 2009
    Assignees: Tokyo Electron, Ltd., International Business Machines Corporation
    Inventors: Cory S. Wajda, Kristen Scheer, Toshihara Furakawa
  • Patent number: 7498271
    Abstract: The present invention, in one embodiment, provides a method of forming a gate structure including providing a substrate including a semiconducting device region, a high-k dielectric material present atop the semiconducting device region, and a metal gate conductor atop the high-k dielectric material, applying a photoresist layer atop the metal gate conductor; patterning the photoresist layer to provide an etch mask overlying a portion of the metal gate conductor corresponding to a gate stack; etching the metal gate conductor and the high-k dielectric material selective to the etch mask; and removing the etch mask with a substantially oxygen free nitrogen based plasma.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: March 3, 2009
    Assignee: International Business Machines Corporation
    Inventors: Ricardo A. Donaton, Rashmi Jha, Siddarth A. Krishnan, Xi Li, Renee T. Mo, Naim Moumen, Wesley C. Natzle, Ravikumar Ramachandran, Richard S. Wise
  • Patent number: 7485516
    Abstract: A method of formation of integrated circuit devices includes forming a gate electrode stack over a portion of a semiconductor. The stack includes a gate dielectric layer with a gate electrode thereabove. Implant diatomic nitrogen and/or nitrogen atoms into the substrate aside from the stack at a maximum energy less than or equal to 10 keV for diatomic nitrogen and at a maximum energy less than or equal to 5 keV for atomic nitrogen at a temperature less than or equal to 1000° C. for a time of less than or equal to 30 minutes. Then form silicon oxide offset spacers on sidewalls of the stack. Form source/drain extension regions in the substrate aside from the offset spacers. Form nitride sidewall spacers on outer surfaces of the offset spacers over another portion of the nitrogen implanted layer. Then form source/drain regions in the substrate aside from the sidewall spacers.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: February 3, 2009
    Assignee: International Business Machines Corporation
    Inventors: Thomas W. Dyer, Jinhong Li, Zhijiong Luo
  • Patent number: 7465677
    Abstract: A manufacturing method of a semiconductor device of the present invention includes the steps of forming a first insulating film over a substrate, forming a semiconductor film over the first insulating film, oxidizing or nitriding the semiconductor film by conducting a plasma treatment to the semiconductor film under a condition of an electron density of 1×1011 cm?3 or more and 1×1013 cm?3 or less and an electron temperature of 0.5 eV or more and 1.5 eV or less, using a high frequency wave, forming a second insulating film to cover the semiconductor film, forming a gate electrode over the second insulating film, forming a third insulating film to cover the gate electrode, and forming a conductive film over the third insulating film.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: December 16, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Satoshi Murakami, Tamae Takano, Shunpei Yamazaki
  • Patent number: 7462565
    Abstract: A substrate having a copper wiring is prepared. An insulating film is formed on the copper wiring. The insulating film is etched with a gas containing fluorine to form an opening reaching the copper wiring. A plasma treatment is carried out on a surface of copper exposed at a bottom of the opening without turning plasma discharge off after forming the opening in the same chamber as the formation of the opening.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: December 9, 2008
    Assignee: Renesas Technology Corp.
    Inventor: Kenji Tabaru
  • Patent number: 7439121
    Abstract: In a film formation method of a semiconductor device including a plurality of silicon-based transistors or capacitors, there exist hydrogen at least in a part of the silicon surface in advance, and the film formation method removes the hydrogen by exposing the silicon surface to a first inert gas plasma. Thereafter a silicon compound layer is formed on the surface of the silicon gas by generating plasma while using a mixed gas of a second inert gas and one or more gaseous molecules, such that there is formed a silicon compound layer containing at least a pat of the elements constituting the gaseous molecules, on the surface of the silicon gas.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: October 21, 2008
    Inventors: Tadahiro Ohmi, Shigetoshi Sugawa, Masaki Hirayama, Yasuyuki Shirai
  • Patent number: 7427572
    Abstract: A method for forming a silicon nitride film first deposits a silicon nitride film on a target substrate by CVD in a process field within a reaction container. This step is arranged to supply a first process gas containing a silane family gas and a second process gas containing a nitriding gas to the process field, and set the process field at a first temperature and a first pressure, for a first time period. The method then nitrides a surface of the silicon nitride film in the process field. This step is arranged to supply a surface-treatment gas containing a nitriding gas to the process field without supplying the first process gas, and set the process field at a second temperature and a second pressure, for a second time period shorter than the first time period.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: September 23, 2008
    Assignee: Tokyo Electron Limited
    Inventors: Kazuhide Hasebe, Mitsuhiro Okada
  • Patent number: 7345001
    Abstract: The present invention provides a gate dielectric having a flat nitrogen profile, a method of manufacture therefor, and a method of manufacturing an integrated circuit including the flat nitrogen profile. In one embodiment, the method of manufacturing the gate dielectric includes forming a gate dielectric layer (410) on a substrate (310), and subjecting the gate dielectric layer (410) to a nitrogen containing plasma process (510), wherein the nitrogen containing plasma process (510) has a ratio of helium to nitrogen of 3:1 or greater.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: March 18, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, Husam N. Alshareef, Rajesh Khamankar, Toan Tran
  • Patent number: 7226874
    Abstract: A substrate processing method forming an oxynitride film by nitriding an oxide film formed on a silicon substrate includes a nitridation processing step that nitrides a surface of the oxide film by radicals or ions formed by exciting a nitrogen gas by microwave-excited plasma, the nitridation processing is conducted at a substrate temperature of 500° C. or less by setting an electron temperature of the microwave-excited plasma to 2 eV or less, and by setting the resident time of oxygen in the processing space in which the substrate to be processed is held, to two seconds or less.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: June 5, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Seiji Matsuyama, Takuya Sugawara, Shigenori Ozaki, Toshio Nakanishi, Masaru Sasaki
  • Patent number: 7205216
    Abstract: A method and structure for fabricating semiconductor wafers. The method comprises providing a plurality of semiconductor wafers. The plurality of semiconductor wafers comprises a first semiconductor wafer and a second semiconductor wafer. The first semiconductor wafer is located adjacent to the second semiconductor wafer. A relationship is provided between a plurality of values for an electrical characteristic and a plurality of materials. A material is chosen from the plurality of materials existing in the relationship. A substructure is formed comprising the material sandwiched between a topside of the first semiconductor wafer and a backside of a portion of the of the second semiconductor wafer. The plurality of semiconductor wafers are placed into a furnace comprising an elevated temperature for processing resulting in a value for the first semiconductor wafer of the electrical characteristic that corresponds to said material in said relationship.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: April 17, 2007
    Assignee: International Business Machines Corporation
    Inventors: Casey J. Grant, Heidi L. Greer, Steven M. Shank, Michael C. Triplett
  • Patent number: 7183143
    Abstract: A method for forming a nitrided tunnel oxide layer is described. A silicon oxide layer as a tunnel oxide layer is formed on a semiconductor substrate, and a plasma nitridation process is performed to implant nitrogen atoms into the silicon oxide layer. A thermal drive-in process is then performed to diffuse the implanted nitrogen atoms across the silicon oxide layer.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: February 27, 2007
    Assignee: Macronix International Co., Ltd.
    Inventor: Tzu-Yu Wang
  • Patent number: 7176094
    Abstract: DPN (decoupled plasma nitridation) is used to improve robustness of ultra thin gate oxides. Conventionally, this is followed by an anneal in pure helium to remove structural defects in the oxide. However, annealing under these conditions has been found to cause a deterioration of the electrical performance of devices. This problem has been overcome by annealing, in a 1:4 oxygen-nitrogen mixture (1,050° C. at about 10 torr) instead of in helium or nitrogen oxide. This results in a gate oxide that is resistant to boron contamination without suffering any loss in its electrical properties.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: February 13, 2007
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Dong Zhong, Yun Ling Tan, Chew Hoe Ang, Jia Zhen Zheng