Abstract: The present invention relates to a process that minimizes the cracking of low-k dielectric polymers. In an example embodiment, on a semiconductor substrate (200), there is a method of forming a composite dielectric disposed on a metal layer passivated with plasma deposited silicon oxide SiOx. The method comprises depositing a first layer of a first predetermined thickness of a spin-on dielectric on the metal layer protected with a plasma deposited silicon oxide SiOx. Next a thin stress relief layer of a second predetermined thickness is disposed on the first layer of spin-on-dielectric. Upon the thin stress-relief layer, a second layer of a third predetermined thickness of spin-on dielectric is deposited. Low-k spin-on dielectrics may include hydrogen silsequioxane (HSQ) and methyl silsequioxane (MSQ).

Abstract: A method for the duplication of microscopic patterns from a master to a substrate is disclosed, in which a replica of a topographic structure on a master is formed and transferred when needed onto a receiving substrate using one of a variety of printing or imprint techniques, and then dissolved. Additional processing steps can also be carried out using the replica before transfer, including the formation of nanostructures, microdevices, or portions thereof. These structures are then also transferred onto the substrate when the replica is transferred, and remain on the substrate when the replica is dissolved. This is a technique that can be applied as a complementary process or a replacement for various lithographic processing steps in the fabrication of integrated circuits and other microdevices.

Abstract: A method to improve a high-k dielectric film and metal gate interface in the fabrication of a MOSFET by depositing a metal gate on a high-k dielectric, the method includes annealing a substrate with a high-k dielectric film deposited thereon in a thermal annealing module and depositing a metal gate material on the annealed substrate in a metal gate deposition module, wherein the annealing step and the depositing step are carried out consecutively without a vacuum break.

Abstract: A method for changing a physical vapor deposition film form comprises: providing at least one sample with an active area; delivering the sample to a physical vapor deposition machine with one adjustable angle of one collimator; changing the angle of the collimator in the physical vapor deposition machine; performing physical vapor deposition operation, forming a uniform thin film disposed on one active area of the sample.

Abstract: A method of fabricating a semiconductor device includes applying a coating oxide film to a surface of a substrate including a semiconductor substrate so that a recess formed in the surface is filled with the coating oxide film, applying a steam oxidation treatment to the substrate at a first temperature, soaking the substrate in heated water while applying a megasonic wave to the substrate in the heated water, and applying a steam oxidation treatment to the substrate at a second temperature higher than the first temperature.

Abstract: In a device (35) and a method a thin organic or inorganic layer is applied to individual component positions of band-like structures (1). The layer can effect improved or optimized adhesion between a coated surface and a plastic housing compound. Furthermore, the layer can be used as a corrosion prevention layer, an electrical insulating layer or as a dielectric for the coated surfaces. For the selective application of the layer, the device (35) has a jet printer (2) having a plurality of electronically controllable jet heads (4-7). The jet printer (2) coats the band-like structures (1) selectively on the upper side (17) in a first coating position (15) and coats the band-like structures (1) selectively on the underside (18) in a second coating position (16).

Abstract: A method for producing a thin film titanium dioxide is disclosed. The disclosed method for producing the thin film titanium dioxide includes performing a magnetron reactive sputtering process to vaporize at least portions of a titanium source in a sputtering chamber that is supplied with gaseous oxygen. The vaporized titanium reacts with the oxygen to form anatase titanium dioxide, which is deposited on a substrate within the sputtering chamber.

Abstract: A method of applying a pattern on a topography includes first applying a polymer film to an elastomer member, such as PDMS, to form a pad. The pad is then applied to a substrate having a varying topography under pressure. The polymer film is transferred to the substrate due to the plastic deformation of the polymer film under pressure compared to the elastic deformation of the PDMS member. Thus, upon removal of the pad from the substrate, the PDMS member pulls away from the polymer layer, thereby depositing the polymer layer upon the substrate.

Abstract: Methods and compositions for electrolessly depositing Co, Ni, or alloys thereof onto a substrate in manufacture of microelectronic devices. Grain refiners, levelers, oxygen scavengers, and stabilizers for electroless Co and Ni deposition solutions.

Abstract: Methods and compositions for electrolessly depositing Co, Ni, or alloys thereof onto a substrate in manufacture of microelectronic devices. Grain refiners, levelers, oxygen scavengers, and stabilizers for electroless Co and Ni deposition solutions.

Abstract: Methods and compositions for electrolessly depositing Co, Ni, or alloys thereof onto a substrate in manufacture of microelectronic devices. Grain refiners, levelers, oxygen scavengers, and stabilizers for electroless Co and Ni deposition solutions.

Abstract: An apparatus and process operate to impose sonic pressure upon a spin-on film liquid mass that exhibits a liquid topography and in a solvent vapor overpressure to alter the liquid topography. Other apparatus and processes are disclosed.

Abstract: A method for forming a photoresist layer is provided. The method includes following steps. A wafer is provided in a semiconductor machine. The wafer is spun at a first spin speed. A pre-wet solvent is dispensed on the spinning wafer by using a nozzle disposed at a fixed position. The pre-wet solvent then stops dispensing. The spin speed of the wafer is adjusted from the first spin speed to a second spin speed which is faster than the first spin speed. Thereafter, a photoresist layer is coated on the wafer.

Abstract: A method of filling gaps in dielectric layers is disclosed. A wafer is provided having a dielectric layer containing gaps to be filled with copper, some of the gaps, denoted deeper gaps, having aspect ratios so large that filling these gaps with copper using ECP could result in pinhole like voids. A blanket conformal metal barrier layer is formed and the wafer is then submerged in a solution to electroless plate a blanket conformal copper seed layer. A partial filling of deeper gaps with copper reduces the effective aspect ratios of the deeper gaps to the extent that ECP could be used to complete the copper filling of the gaps without forming pinhole like voids. ECP is then used to complete the copper filling of the gaps. The wafer is annealed and CMP performed to planarize the surface, giving rise to a structure in which the gaps are filled with copper and are separated by the dielectric layer.

Abstract: Methods of forming an insulating layer in a semiconductor device are provided in which a metal oxide layer is formed on a semiconductor structure that includes a plurality of gap regions thereon. A spin-on-glass layer is formed on the metal oxide layer, and then the semiconductor structure is heated to a temperature of at least about 400° C. The spin-on-glass layer may comprise a siloxane-based material, a silanol-based material or a silazane-based material.

Abstract: A spin-on glass (SOG) composition and a method of forming a silicon oxide layer utilizing the SOG composition are disclosed. The method includes coating on a semiconductor substrate having a surface discontinuity, an SOG composition containing polysilazane having a compound of the formula —(SiH2NH)n— wherein n represents a positive integer, a weight average molecular weight within the range of about 3,300 to 3,700 to form a planar SOG layer. The SOG layer is converted to a silicon oxide layer with a planar surface by curing the SOG layer. Also disclosed is a semiconductor device made by the method.

Abstract: A coating system and method of coating semiconductor wafers is disclosed that is able to maintain a wet condition on the outer portion of the semiconductor wafer to provide ease of spreading for a photo-resist or anti-reflective coating (ARC) that is being dispensed. The system can include a plurality of nozzles on a movable arm. A first nozzle dispenses a pre-wet solvent onto the semiconductor wafer. A second nozzle then dispenses the photo-resist or ARC coating onto the semiconductor wafer. A third nozzle dispenses additional pre-wet solvent onto the outer edge of the semiconductor wafer as the photo-resist or ARC coating is being dispensed. The nozzles dispense solutions onto the semiconductor wafer as it rotates. The system produces semiconductor wafers with few coating defects and uses less photo-resist or ARC coating.

Abstract: A method of manufacturing a semiconductor device includes forming a trench for isolation on a surface of a substrate including a semiconductor substrate, filling the trench with a solution containing a perhydrosilazane polymer by applying the solution on the substrate, converting the solution into a film containing the perhydrosilazane polymer by heating the solution, and converting the film into a silicon dioxide film including heating the film at a first temperature in an atmosphere containing vapor, and heating the film heated at the first temperature at a second temperature lower than the first temperature in an atmosphere containing vapor or in pure water.

Abstract: The present invention provides a semiconductor device having a coating film of a predetermined thickness provided along the circumference of a semiconductor light emitting element, and provide a method for easily manufacturing the semiconductor device. A semiconductor light emitting element 2 that emits blue light is mounted face down on the top face of a pedestal 1, and a coating film 3 containing a YAG fluorescent material 6 that emits yellow light is placed so as to cover the top face and side face of the semiconductor light emitting element 2 and the top face of the pedestal 1. With the semiconductor light emitting element 2 and other elements placed between a first film 8 and a second film 9, the films are laminated in vacuum, thereby to fasten the coating film 3 onto the semiconductor light emitting element 2.

Abstract: The invention discloses a method of forming an isolation layer in a semiconductor device. The method includes providing a semiconductor substrate having a trench formed therein; forming a first insulating layer in the trench; and forming a densified second insulating layer on the first insulating layer. In the above method, a void is not generated in the isolation layer so a bending phenomenon of an active region can be reduced or prevented to improve an electrical characteristic of the semiconductor.

Abstract: A spin-on glass composition includes a solvent, about 3 to about 20 percent by weight of a porogen, and about 3 to about 20 percent by weight of a silsesquioxane oligomer represented by formula (1), where, in the formula (1), Y1 and Y2 independently represent a hydrolyzable alkoxy group, R represents a lower alkyl group, and n and m independently represent an integer in a range of one to nine both inclusive.

Abstract: The invention is directed to a method for manufacturing semiconductor device. The method comprises steps of providing a substrate and then forming a dielectric material-containing device over the substrate. A plasma vapor deposition process is performed to form a dielectric layer over the substrate. A first baking process is performed.

Abstract: When a coating film is formed on a substrate, the inplane uniformity of the thickness of the coating film is enhanced to improve through put. Above the substrate, there are provided main and auxiliary nozzles separately movable, and monitoring means for monitoring the state of the surface of the substrate to detect the occurrence of an uncoated region on the surface of the substrate. On the basis of previously prepared coating data, a coating liquid is spirally applied on the substrate by the main nozzle. Then, if the monitoring means detects the occurrence of the uncoated region in a coated region in which the coating liquid has been applied by the main nozzle, a control part detects whether it is required to supply the coating liquid to the uncoated region. If it is required, the coating liquid is supplied to the uncoated region by the auxiliary nozzle. On the other hand, the portion of occurrence of the uncoated region has been grasped by the control part.

Abstract: A method of depositing dielectric material into sub-micron spaces and resultant structures is provided. After a trench is etched in the surface of a wafer, a liner layer preferably is deposited into the trench. An anisotropic plasma process is then performed on the trench. A silicon layer may be deposited on the base of the trench during the plasma process, or the plasma can treat the liner layer. The trench is then filled with a spin-on precursor. A densification or reaction process is then applied to convert the spin-on material into an insulator, and oxidizing the silicon rich layer on the base of the trench. The resulting trench has a consistent etch rate from top to bottom of the trench.

Abstract: A method of shortening a photoresist coating process for a plurality of wafers is provided, wherein the photoresist coating process includes a first coating operation to a first wafer using a first photoresist liquid and a second coating operation to a second wafer using a second photoresist liquid. The method includes performing a dummy dispense operation of the second photoresist liquid within the period of the backend part of the first coating operation that needs no nozzle.

Abstract: An object of the present invention is to provide a method for fabricating a semiconductor device capable of implementing planarization of an insulating film formed on a semiconductor substrate formed thereon with a circuit pattern and inhibiting unevenness of a film thickness of the insulating film, and a device thereof. According to the present invention, when etching is progressed to an A-A line, a part of a BPSG film 14 is exposed from an SOG film 16. A point at which the part of the BPSG film 14 is exposed is an “exposure start point”. A change of a plasma emission intensity of oxygen atoms during etching is observed to detect the “exposure start point”. An EPD detection in which an “etching end point” is set using the “exposure start point” as a reference is performed. The etching is continued even after a start of exposure of the BPSG film 14. Before a B-B line at which an entire surface of the BPSG film 14 is exposed is reached, the etching is ended at a C-C line.

Abstract: A plasma treatment process for increasing the tensile stress of a silicon wafer is described. Following deposition of a dielectric layer on a substrate, the substrate is lifted to an elevated position above the substrate receiving surface and exposed to a plasma treatment process which treats both the top and bottom surface of the wafer and increases the tensile stress of the deposited layer. Another embodiment of the invention involves biasing of the substrate prior to plasma treatment to bombard the wafer with plasma ions and raise the temperature of the substrate. In another embodiment of the invention, a two-step plasma treatment process can be used where the substrate is first exposed to a plasma at a processing position directly after deposition, and then raised to an elevated position where both the top and bottom of the wafer are exposed to the plasma.

Abstract: The present invention provides a process for preparing a melt-processed organic-inorganic hybrid material including the steps of maintaining a solid organic-inorganic hybrid material at a temperature above the melting point but below the decomposition temperature of the organic-inorganic hybrid material for a period of time sufficient to form a uniform melt and thereafter, cooling the uniform melt to an ambient temperature under conditions sufficient to produce the melt-processed organic-inorganic hybrid material.

Abstract: A method is provided for performing plasma immersion ion implantation with a highly uniform seasoning film on the interior of a reactor chamber having a ceiling and a cylindrical side wall and a wafer support pedestal facing the ceiling. The method includes providing a gas distribution ring with plural gas injection orifices on a periphery of a wafer support pedestal, the orifices facing radially outwardly from the wafer support pedestal. Silicon-containing gas is introduced through the gas distribution orifices of the ring to establish a radially outward flow pattern of the silicon-containing gas. The reactor includes pairs of conduit ports in the ceiling adjacent the side wall at opposing sides thereof and respective external conduits generally spanning the diameter of the chamber and coupled to respective pairs of the ports. The method further includes injecting oxygen gas through the conduit ports into the chamber to establish an axially downward flow pattern of oxygen gas in the chamber.

Abstract: A system and method affecting mass transport to reduce or eliminate iso-dense bias in spin-on-dielectric (SOD) or spin-on-glass (SOG) processes use a nozzle to dispense the liquid dielectric and a separate nozzle for jetting N2 or other gas onto a semiconductor wafer. The gas is jetted onto the wafer shortly after spin-on-dielectric liquid is dispensed. The jetting of the gas in the spin-coating process increases the volumetric flow of the liquid coating material in the radial direction, which in turn reduces the field thickness above isolated or no patterned areas to that at the more densely patterned areas, thereby improving the uniformity of the spun-on dielectric thickness on the wafer.

Abstract: A relatively thick electrode is positioned opposite the surface of a substrate/second electrode. The electrode and the substrate surface are both contacted by a solution including silicon nanoparticles. The substrate surface is completely immersed in the solution in a manner such that there is not an air/solution interface and there is no meniscus at the substrate surface. Application of electrical potential between the electrode and the substrate creates a film of silicon nanoparticles on the substrate. Drying of the film induces the film to roll up and form a silicon nanoparticle nanotube material. A film may be subdivided into an array of identical portions, and the identical portions will roll into identical tubes having same length and diameter. A silicon nanoparticle nanotube material of the invention includes nanotubes formed of silicon nanoparticles.

Abstract: The present invention provides porous organosilicate layers, and vapor deposition systems and methods for preparing such layers on substrates. The porous organosilicate layers are useful, for example, as masks.

Abstract: Methods and compositions for electrolessly depositing Co, Ni, or alloys thereof onto a substrate in manufacture of microelectronic devices. Grain refiners, levelers, oxygen scavengers, and stabilizers for electroless Co and Ni deposition solutions.

Abstract: The present invention provides the method includes forming source/drain regions 170 in a semiconductor wafer substrate 110 adjacent a gate structure 130 located on a front side of the semiconductor wafer substrate 110. The source/drain regions 170 have a channel region 175 located between them. A first stress-inducing layer 190 is placed on a backside of the semiconductor wafer substrate 110 and is subjected to a thermal anneal to cause a stress to form in the channel region 175.

Abstract: A method of providing a gate conductor on a semiconductor is provided. The method includes defining an organic polymer plating mandrel on the semiconductor, activating one or more sites of the organic polymer plating mandrel, binding a seed layer to the activated sites, and plating the dummy gate on the seed layer. The dummy gate defines a location for the gate conductor. Semiconductor devices having a dummy gate plated thereon to a width of between about 10 to about 70 nanometers are also provided.

Abstract: A liquid chemical supply apparatus includes a storage unit, addition unit, and nozzle unit. The storage unit stores a liquid chemical. The addition unit adds, to the liquid chemical supplied from the storage unit, a modifier in an amount corresponding to the degree of deterioration of the liquid chemical. The nozzle unit supplies, onto a substrate, the liquid chemical to which the modifier is added.

Abstract: A method of forming a coating. The method includes: providing a substrate having a surface; forming a layer of water on the surface; and forming a layer of a material on the layer of water.

Abstract: A method of forming a film pattern includes the steps of forming a bank for partitioning a pattern forming area including a first pattern forming area and a second pattern forming area having an intersection with the first pattern forming area and divided in the intersection into sub-areas, disposing a functional liquid to the first pattern forming area to form a first film pattern, and disposing a functional liquid to the sub-areas to form second film patterns, executing a lyophobic process on the entire surface of a substrate including the first film pattern, the second film patterns, and the bank, weakening the lyophobicity on the substrate while selectively maintaining the lyophobicity on predetermined positions of the respective second film patterns formed in a divided condition after executing the lyophobic process, stacking a cap layer on the first film pattern and the second film patterns after weakening the lyophobicity, removing the lyophobicity in the predetermined positions of the respective secon

Abstract: In one embodiment the present invention is a method of conducting multiple step multiple chamber chemical vapor deposition while avoiding reactant memory in the relevant reaction chambers. The method includes depositing a layer of semiconductor material on a substrate using vapor deposition in a first deposition chamber followed by evacuation of the growth chamber to reduce vapor deposition source gases remaining in the first deposition chamber after the deposition growth and prior to opening the chamber. The substrate is transferred to a second deposition chamber while isolating the first deposition chamber from the second deposition chamber to prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining an ambient that minimizes or eliminates growth stop effects. After the transferring step, an additional layer of a different semiconductor material is deposited on the first deposited layer in the second chamber using vapor deposition.

Abstract: An apparatus for depositing a thin film on a substrate and product produced thereby are disclosed. In particular, deposition of the thin film is carried out on the substrate having an applied pressure. This applied pressure flexes the substrate to reduce in-plane stresses, wherein removal of the applied pressure after deposition of the thin film modifies the in-film stress for the thin film. With the above-described arrangement, it is possible to minimize the deterioration of electric characteristics of a semiconductor device and the occurrence of defects, such as film delamination, substrate cracks, and the like.

Abstract: A method of fabricating semiconductor integrated circuits includes (1) providing a spin-on tool comprising a rotatable platen for holding and spinning a wafer disposed thereon, a fluid supply system for providing spin-on solution onto the wafer, and a detector fixed in a position above the wafer, wherein the wafer has a radius R; (2) spin-on coating the wafer by depositing the spin-on solution onto surface of the wafer from its center and spinning-off to leave a spin coat material layer; and (3) spinning the wafer and scanning the spin coat material layer by impinging an incident light beam emanated from the fixed detector and detecting a reflected light beam.

Abstract: A method for forming a mechanically robust dielectric film comprises depositing a dielectric film on a substrate and then inducing a compressive strain in a top surface of the dielectric film to form a compressive strained surface. The compressive strain may be induced using an ion implantation process that bombards the dielectric film with ions that become implanted in the top surface of the dielectric film. The damage caused during ion implantation, as well as the implanted ions themselves, causes an expansion of the top surface which induces a biaxial compressive residual stress, thereby forming a compressive strained surface. The compressive strain reduces the amount of surface flaws present on the top surface, thereby improving the toughness of the dielectric film. In addition, the ion implantation process may modify the plasticity of the top surface and reduce the likelihood of fracture mechanisms based on dislocation pileup for crack initiation.

Abstract: A method for the duplication of microscopic patterns from a master to a substrate is disclosed, in which a replica of a topographic structure on a master is formed and transferred when needed onto a receiving substrate using one of a variety of printing or imprint techniques, and then dissolved. Additional processing steps can also be carried out using the replica before transfer, including the formation of nanostructures, microdevices, or portions thereof. These structures are then also transferred onto the substrate when the replica is transferred, and remain on the substrate when the replica is dissolved. This is a technique that can be applied as a complementary process or a replacement for various lithographic processing steps in the fabrication of integrated circuits and other microdevices.

Abstract: A method of forming a trench isolation layer can include forming an isolation layer in a trench using High Density Plasma Chemical Vapor Deposition (HDPCVD) with a carrier gas comprising hydrogen. Other methods are disclosed.

Abstract: Disclosed is a method and apparatus for fabricating a patterned thin film layer within a flat panel display that employs a soft mold and heat treatment in place of a photolithographic process. The disclosed method may reduce process time as well as substantially minimize pattern deformities.

Abstract: A method for forming a color filter is provided. The method comprises steps of providing a substrate having a passivasion layer formed thereon. The substrate has at least one complementary metal-oxide semiconductor formed therein and the passivasion layer has at least trench formed therein in a peripheral region of the substrate. At least two adjacent color filter blocks are sequentially formed over the passivasion layer and the color filter blocks comprises a first color filter block and a second color filter block. The first color filter block and the second color filter block are disposed within a display region of the substrate. Moreover, the material for forming the first color filter, which is formed prior to the formation of the second color filter block, further fills the trench in the peripheral region simultaneously with a formation of the first color filter block.

Abstract: Methods for forming metal silicate films are provided. The methods comprise contacting a substrate with alternating and sequential vapor phase pulses of a metal source chemical, a silicon source chemical and an oxidizing agent. In preferred embodiments, an alkyl amide metal compound and a silicon halide compound are used. Methods according to preferred embodiments can be used to form hafnium silicate and zirconium silicate films with substantially uniform film coverages on substrate surfaces comprising high aspect ratio features (e.g., vias and/or trenches).

Abstract: A method for applying a passivation layer selectively on an exposed silicon surface includes use of a liquid phase solution supersaturated in silicon dioxide. The application is conducted at substantially atmospheric temperature and pressure and achieves an effective passivation layer in an abbreviated immersion time, and without subsequent heat treatment. In one embodiment, rapid coating of a wafer back side with silicon dioxide permits the use of a high-speed electroless process for plating the bond pad with a solder-enhancing material. In another embodiment, the walls of via holes and microvia holes in a silicon body may be passivated by applying the supersaturated solution prior to plugging the holes with conductive material.

Abstract: The present memory device includes first and second electrodes, an active layer; and a passive layer, the active and passive layers being between the first and second electrodes, with at least one of the active layer and passive layer being a doped a sol-gel.

Abstract: A method for forming a coating film, comprises the steps of: applying a raw material of a low dielectric constant onto a surface of a plate-like material; reducing oxygen concentration in the atmosphere surrounding the plate-like material to be less than or equal to 1% before a surface temperature of said plate-like material to be treated rises to 200° C.; thereafter heating said plate-like material to a temperature greater than or equal to 400° C.; and then maintaining the oxygen content in the atmosphere to be less than or equal to 1% until the surface temperature of said plate-like material to be treated lowers to 200° C. The raw material is an organic SOG obtained by hydrolyzing and condensing at least one alkoxysilane compound into an organic solvent under an acid catalyst.