Tertiary Silicon Containing Compound Formation (e.g., Oxynitride Formation, Etc.) Patents (Class 438/786)
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Publication number: 20150004805Abstract: A method of forming a silicon-containing dielectric material. The method includes forming a plasma comprising nitrogen radicals, absorbing the nitrogen radicals onto a substrate, and exposing the substrate to a silicon-containing precursor in a non-plasma environment to form monolayers of a silicon-containing dielectric material on the substrate. Additional methods are also described, as are semiconductor device structures including the silicon-containing dielectric material and methods of forming the semiconductor device structures.Type: ApplicationFiled: July 1, 2013Publication date: January 1, 2015Inventors: Thomas R. Omstead, Cole S. Franklin
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Publication number: 20150001681Abstract: A method includes holding bonded wafers by a wafer holding module. A gap between the bonded wafers along an edge is filled with a protection material.Type: ApplicationFiled: July 1, 2013Publication date: January 1, 2015Inventors: Chen-Fa Lu, Yeur-Luen Tu, Shu-Ju Tsai, Cheng-Ta Wu, Chia-Shiung Tsai, Xiaomeng Chen
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Publication number: 20140363985Abstract: Provided are a novel amino-silyl amine compound, a method for preparing the same, and a silicon-containing thin-film using the same, wherein the amino-silyl amine compound has thermal stability and high volatility and is maintained in a liquid state at room temperature and under a pressure where handling is easy to thereby form a silicon-containing thin-film having high purity and excellent physical and electrical properties by various deposition methods.Type: ApplicationFiled: June 4, 2014Publication date: December 11, 2014Inventors: Se Jin Jang, Sang Do Lee, Sung Gi Kim, Jong Hyun Kim, Byeong IL Yang, Jang Hyeon Seok, Sang Ick Lee, Myong Woon Kim
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Patent number: 8906455Abstract: This invention discloses the method of forming silicon nitride, silicon oxynitride, silicon oxide, carbon-doped silicon nitride, carbon-doped silicon oxide and carbon-doped oxynitride films at low deposition temperatures. The silicon containing precursors used for the deposition are monochlorosilane (MCS) and monochloroalkylsilanes. The method is preferably carried out by using plasma enhanced atomic layer deposition, plasma enhanced chemical vapor deposition, and plasma enhanced cyclic chemical vapor deposition.Type: GrantFiled: September 21, 2012Date of Patent: December 9, 2014Assignee: Air Products and Chemicals, Inc.Inventors: Liu Yang, Xinjian Lei, Bing Han, Manchao Xiao, Eugene Joseph Karwacki, Jr., Hansong Cheng
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Patent number: 8901556Abstract: In a semiconductor device including a transistor including an oxide semiconductor film and a protective film over the transistor, an oxide insulating film containing oxygen in excess of the stoichiometric composition is formed as the protective film under the following conditions: a substrate placed in a treatment chamber evacuated to a vacuum level is held at a temperature higher than or equal to 180° C. and lower than or equal to 260° C.; a source gas is introduced into the treatment chamber so that the pressure in the treatment chamber is set to be higher than or equal to 100 Pa and lower than or equal to 250 Pa; and a high-frequency power higher than or equal to 0.17 W/cm2 and lower than or equal to 0.5 W/cm2 is supplied to an electrode provided in the treatment chamber.Type: GrantFiled: March 12, 2013Date of Patent: December 2, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kenichi Okazaki, Toshinari Sasaki, Shuhei Yokoyama, Takashi Hamochi
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Publication number: 20140349492Abstract: A semiconductor device manufacturing method includes forming a thin film containing silicon, oxygen, carbon and a specified Group III or Group V element on a substrate by performing a cycle a predetermined number of times. The cycle includes: supplying a precursor gas containing silicon, carbon and a halogen element and having an Si—C bonding and a first catalytic gas to the substrate; supplying an oxidizing gas and a second catalytic gas to the substrate; and supplying a modifying gas containing the specified Group III or Group V element to the substrate.Type: ApplicationFiled: March 31, 2014Publication date: November 27, 2014Applicant: C/O HITACHI KOKUSAI ELECTRIC INC.Inventors: Satoshi SHIMAMOTO, Yoshiro HIROSE, Atsushi SANO, Tsukasa KAMAKURA, Takaaki NODA
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Patent number: 8895456Abstract: A method of depositing a film of forming a doped oxide film including a first oxide film containing a first element and doped with a second element on substrates mounted on a turntable including depositing the first oxide film onto the substrates by rotating the turntable predetermined turns while a first reaction gas containing the first element is supplied from a first gas supplying portion, an oxidation gas is supplied from a second gas supplying portion, and a separation gas is supplied from a separation gas supplying portion, and doping the first oxide film with the second element by rotating the turntable predetermined turns while a second reaction gas containing the second element is supplied from one of the first and second gas supplying portions, an inert gas is supplied from another one, and the separation gas is supplied from the separation gas supplying portion.Type: GrantFiled: December 18, 2013Date of Patent: November 25, 2014Assignee: Tokyo Electron LimitedInventors: Mitsuhiro Tachibana, Hiroaki Ikegawa, Yu Wamura, Muneyuki Otani, Jun Ogawa, Kosuke Takahashi
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Patent number: 8895388Abstract: An object is to provide a technique for manufacturing an insulating layer with favorable withstand voltage. Another object is to provide a technique for manufacturing a semiconductor device having an insulating layer with favorable withstand voltage. By subjecting a semiconductor layer or semiconductor substrate mainly containing silicon to a high density plasma treatment, an insulating layer is formed on a surface of the semiconductor layer or a top surface of the semiconductor substrate. At this time, the high density plasma treatment is performed by switching a supply gas in the middle of the treatment from a gas containing a rare gas, oxygen, and hydrogen, to a gas containing a rare gas and oxygen.Type: GrantFiled: July 13, 2007Date of Patent: November 25, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tetsuya Kakehata, Tomokazu Yokoi
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Patent number: 8889567Abstract: Methods and apparatus for a low k dielectric layer of porous SiCOH. A method includes placing a semiconductor substrate into a vapor deposition chamber; introducing reactive gases into the vapor deposition chamber to form a dielectric film comprising SiCOH and a decomposable porogen; depositing the dielectric film to have a ratio of Si—CH3 to SiOnetwork bonds of less than or equal to 0.25; and performing a cure for a cure time to remove substantially all of the porogen from the dielectric film. In one embodiment the porogen comprises a cyclic hydrocarbon. The porogen may be UV curable. In embodiments, different lowered Si—CH3 to SiOnetwork ratios for the deposition of the dielectric film are disclosed. An apparatus of a semiconductor device including the low k dielectric layers is disclosed.Type: GrantFiled: September 16, 2011Date of Patent: November 18, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Yun Peng, Keng-Chu Lin, Joung-Wei Liou, Hui-Chun Yang
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Patent number: 8871655Abstract: The method of forming a silicon oxycarbonitride film on a base includes stacking a silicon carbonitride film and a silicon oxynitride film on the base to form the silicon oxycarbonitride film.Type: GrantFiled: December 26, 2012Date of Patent: October 28, 2014Assignee: Tokyo Electron LimitedInventors: Keisuke Suzuki, Kentaro Kadonaga, Byoung Hoon Lee, Eun Jo Lee, Sung Duk Son, Jae Hyuk Jang, Do Hyun Park
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Publication number: 20140315393Abstract: A method of manufacturing a semiconductor device includes: pre-treating a surface of a substrate by supplying an oxygen-containing gas and a hydrogen-containing gas to the substrate heated in a process chamber under a pressure less than atmospheric pressure; and forming a film on the pre-treated substrate by performing a cycle a predetermined number of times. The cycle includes: supplying a precursor gas to the substrate in the process chamber; and supplying a reaction gas to the substrate in the process chamber.Type: ApplicationFiled: March 31, 2014Publication date: October 23, 2014Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Takashi OZAKI, Hideki HORITA
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Publication number: 20140302689Abstract: Methods for depositing flowable dielectric films are provided. In some embodiments, the methods involve introducing a silicon-containing precursor to a deposition chamber wherein the precursor is characterized by having a partial pressure:vapor pressure ratio between 0.01 and 1. In some embodiments, the methods involve depositing a high density plasma dielectric film on a flowable dielectric film. The high density plasma dielectric film may fill a gap on a substrate. Also provided are apparatuses for performing the methods.Type: ApplicationFiled: April 9, 2014Publication date: October 9, 2014Applicant: Novellus Systems, Inc.Inventors: Kaihan Ashtiani, Michael Wood, John Drewery, Naohiro Shoda, Bart van Schravendijk, Lakshminarayana Nittala, Nerissa Draeger
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Publication number: 20140302688Abstract: Methods are described for forming a dielectric layer on a patterned substrate. The methods may include combining a silicon-and-carbon-containing precursor and a radical oxygen precursor in a plasma free substrate processing region within a chemical vapor deposition chamber. The silicon-and-carbon-containing precursor and the radical oxygen precursor react in to deposit a flowable silicon-carbon-oxygen layer on the patterned substrate. The resulting film possesses a low wet etch rate ratio relative to thermal silicon oxide and other standard dielectrics.Type: ApplicationFiled: July 3, 2013Publication date: October 9, 2014Applicant: Applied Materials, Inc.Inventors: Brian Saxton Underwood, Abhijit Basu Mallick, Nitin K. Ingle
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Patent number: 8846550Abstract: The negative effect of oxygen on some metal films can be reduced or prevented by contacting the films with a treatment agent comprising silane or borane. In some embodiments, one or more films in an NMOS gate stack are contacted with a treatment agent comprising silane or borane during or after deposition.Type: GrantFiled: March 14, 2013Date of Patent: September 30, 2014Assignee: ASM IP Holding B.V.Inventors: Eric Shero, Suvi Haukka
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Publication number: 20140287596Abstract: A method of manufacturing a semiconductor device including forming a thin film containing silicon, oxygen and carbon on a substrate by performing a cycle a predetermined number of times, the cycle including: supplying a precursor gas containing silicon, carbon and a halogen element and having an Si—C bonding, and a first catalytic gas to the substrate; and supplying an oxidizing gas and a second catalytic gas to the substrate.Type: ApplicationFiled: March 18, 2014Publication date: September 25, 2014Applicants: L'AIR LIQUIDE, SOCIETE ANONYME POUR L'ETUDE ET L'EXPLOITATION DES PROCEDES GEORGES CLAUDE, HITACHI KOKUSAI ELECTRIC INC.Inventors: Yoshiro HIROSE, Norikazu MIZUNO, Kazutaka YANAGITA, Shingo OKUBO
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Publication number: 20140287597Abstract: A method of manufacturing a semiconductor device includes forming a thin film containing a predetermined element, boron, carbon, and nitrogen and having a borazine ring skeleton on a substrate by performing a cycle a predetermined number of times. The cycle includes supplying a first precursor gas containing the predetermined element and a halogen group to the substrate; supplying a second precursor gas containing the predetermined element and an amino group to the substrate; supplying a reaction gas including an organic borazine compound to the substrate; and supplying a carbon-containing gas to the substrate. In addition, the cycle is performed under a condition in which the borazine ring skeleton in the organic borazine compound is maintained.Type: ApplicationFiled: March 19, 2014Publication date: September 25, 2014Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Yoshiro HIROSE, Ryuji YAMAMOTO, Atsushi SANO
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Patent number: 8841182Abstract: Methods of treating metal-containing thin films, such as films comprising titanium carbide, with a silane/borane agent are provided. In some embodiments a film including titanium carbide is deposited on a substrate by an atomic layer deposition (ALD) process. The process may include a plurality of deposition cycles involving alternating and sequential pulses of a first source chemical that includes titanium and at least one halide ligand, a second source chemical that includes metal and carbon, where the metal and the carbon from the second source chemical are incorporated into the thin film, and a third source chemical, where the third source chemical is a silane or borane that at least partially reduces oxidized portions of the titanium carbide layer formed by the first and second source chemicals. The treatment can form a capping layer on the metal carbide film.Type: GrantFiled: March 14, 2013Date of Patent: September 23, 2014Assignee: ASM IP Holding B.V.Inventors: Jerry Chen, Vladimir Machkaoutsan, Brennan Milligan, Jan Willem Maes, Suvi Haukka, Eric Shero, Tom E. Blomberg, Dong Li
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Publication number: 20140273526Abstract: Provided are methods for the deposition of films comprising Si(C)N via atomic layer deposition processes. The methods include exposure of a substrate surface to a silicon precursor and a co-reagent comprising a compound selected from the group consisting of N?N?N—R, R2N—NR2, and (R3Si)qNH3-q, wherein q has a value of between 1 and 3, and each R is independently selected from organosilicons, C1-C6 substituted or un-substituted alkanes, branched or un-branched alkanes, substituted or un-substituted alkenes, branched or un-branched alkenes, substituted or un-substituted alkynes, branched or un-branched alkynes or substituted or un-substituted aromatics.Type: ApplicationFiled: March 12, 2014Publication date: September 18, 2014Inventor: David Thompson
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Patent number: 8835275Abstract: Semiconductor devices, and methods of fabricating the same, include forming device isolation regions in a substrate to define active regions, forming gate trenches in the substrate to expose the active regions and device isolation regions, conformally forming a preliminary gate insulating layer including silicon oxide on the active regions exposed in the grate trenches, nitriding the preliminary gate insulating layer using a radio-frequency bias having a frequency of about 13.56 MHz and power between about 100 W and about 300 W to form a nitrided preliminary gate insulating layer including silicon oxynitride, forming a gate electrode material layer on the nitride preliminary gate insulating layer, partially removing the nitrided preliminary gate insulating layer and the gate electrode material layer to respectively form a gate insulating layer and a gate electrode layer, and forming a gate capping layer on the gate electrode layer to fill the gate trenches.Type: GrantFiled: September 5, 2012Date of Patent: September 16, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Tai-Su Park, Jin-Hyuk Choi, Sang-Chul Han, Jung-Sup Oh, Young-Dong Lee
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Publication number: 20140256160Abstract: An apparatus for manufacturing semiconductor devices is provided with a processing liquid supply part for supplying processing liquid into a processing chamber which houses a substrate, a heater part for heating the processing liquid in the processing chamber, and a substrate support part which is provided in the processing chamber and supports the substrate.Type: ApplicationFiled: May 21, 2014Publication date: September 11, 2014Applicant: Hitachi Kokusai Electric Inc.Inventors: Yuichi Wada, Harunobu Sakuma, Hiroshi Ashihara, Hideto Tateno
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Publication number: 20140256159Abstract: A method of producing silicon containing thin films by the thermal polymerization of a reactive gas mixture bisaminosilacyclobutane and source gas selected from a nitrogen providing gas, an oxygen providing gas and mixtures thereof. The films deposited may be silicon nitride, silicon carbonitride, silicon dioxide or carbon doped silicon dioxide. These films are useful as dielectrics, passivation coatings, barrier coatings, spacers, liners and/or stressors in semiconductor devices.Type: ApplicationFiled: May 19, 2014Publication date: September 11, 2014Applicant: Dow Corning CorporationInventor: XIAOBING ZHOU
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Patent number: 8823064Abstract: Asymmetric FET devices and methods for fabrication thereof that employ a variable pitch gate are provided. In one aspect, a FET device is provided. The FET device includes a wafer; a plurality of active areas formed in the wafer; a plurality of gate stacks on the wafer, wherein at least one of the gate stacks is present over each of the active areas, and wherein the gate stacks have an irregular gate-to-gate spacing such that for at least a given one of the active areas a gate-to-gate spacing on a source side of the given active area is greater than a gate-to-gate spacing on a drain side of the given active area; spacers on opposite sides of the gate stacks; and an angled implant in the source side of the given active area.Type: GrantFiled: April 6, 2012Date of Patent: September 2, 2014Assignee: International Business Machines CorporationInventors: Josephine B. Chang, Chung-Hsun Lin, Isaac Lauer, Jeffrey W. Sleight
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Patent number: 8822278Abstract: Asymmetric FET devices and methods for fabrication thereof that employ a variable pitch gate are provided. In one aspect, a method for fabricating a FET device includes the following steps. A wafer is provided. A plurality of active areas is formed in the wafer using STI. A plurality of gate stacks is formed on the wafer, wherein the gate stacks have an irregular gate-to-gate spacing such that for at least a given one of the active areas a gate-to-gate spacing on a source side of the given active area is greater than a gate-to-gate spacing on a drain side of the given active area. Spacers are formed on opposite sides of the gate stacks. An angled implant is performed into the source side of the given active area. A FET device is also provided.Type: GrantFiled: March 29, 2012Date of Patent: September 2, 2014Assignee: International Business Machines CorporationInventors: Josephine B. Chang, Chung-Hsun Lin, Isaac Lauer, Jeffrey W. Sleight
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Publication number: 20140242813Abstract: A deposition for producing a porous organosilica glass film comprising: introducing into a vacuum chamber gaseous reagents including one precursor of an organosilane or an organosiloxane, and a porogen distinct from the precursor, wherein the porogen is aromatic in nature; applying energy to the gaseous reagents in the chamber to induce reaction of the gaseous reagents to deposit a film, containing the porogen; and removing substantially all of the organic material by UV radiation to provide the porous film with pores and a dielectric constant less than 2.6.Type: ApplicationFiled: May 6, 2014Publication date: August 28, 2014Applicant: AIR PRODUCTS AND CHEMICALS, INC.Inventors: Mary Kathryn Haas, Raymond Nicholas Vrtis, Laura M. Matz
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Patent number: 8809203Abstract: It is an object to provide a method for manufacturing a semiconductor device that has a semiconductor element including a film in which mixing impurities is suppressed. It is another object to provide a method for manufacturing a semiconductor device with high yield. In a method for manufacturing a semiconductor device in which an insulating film is formed in contact with a semiconductor layer provided over a substrate having an insulating surface with use of a plasma CVD apparatus, after an inner wall of a reaction chamber of the plasma CVD apparatus is coated with a film that does not include an impurity to the insulating film, a substrate is introduced in the reaction chamber, and the insulating film is deposited over the substrate. As a result, an insulating film in which the amount of impurities is reduced can be formed.Type: GrantFiled: May 30, 2008Date of Patent: August 19, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mitsuhiro Ichijo, Tetsuhiro Tanaka, Takashi Ohtsuki, Seiji Yasumoto, Kenichi Okazaki, Shunpei Yamazaki, Naoya Sakamoto
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Publication number: 20140227888Abstract: Embodiments described herein generally relate to methods for manufacturing flash memory devices. In one embodiment, the method includes generating a plasma comprising nitrogen-containing radicals in a remote plasma applicator, flowing the plasma comprising nitrogen-containing radicals into a processing region of the processing chamber where a semiconductor device is disposed, wherein the semiconductor device has a substrate comprising an oxide layer formed thereon, exposing an exposed surface of the oxide layer to the nitrogen-containing radicals, and incorporating nitrogen in the exposed surface of the oxide layer of the substrate.Type: ApplicationFiled: April 17, 2014Publication date: August 14, 2014Inventors: CHRISTOPHER S. OLSEN, Yoshitaka Yokota
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Patent number: 8796105Abstract: A method for depositing a polysilazane on a semiconductor wafer is provided. The method includes steps of disposing a silazane onto the semiconductor wafer, and heating the silazane to form the polysilazane on the semiconductor wafer. An apparatus for preparing a polysilazane on a semiconductor wafer is also provided.Type: GrantFiled: July 25, 2012Date of Patent: August 5, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: You-Hua Chou, Chih-Tsung Lee, Min-Hao Hong, Ming-Huei Lien, Chih-Jen Wu, Chen-Ming Huang
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Patent number: 8796078Abstract: An object is to provide a highly reliable semiconductor device including a thin film transistor having stable electric characteristics. In addition, another object is to manufacture a highly reliable semiconductor device at low cost with high productivity. In a method for manufacturing a semiconductor device including a thin film transistor including an oxide semiconductor layer as a channel formation region, the oxide semiconductor layer is heated under a nitrogen atmosphere to lower its resistance, thereby forming a low-resistance oxide semiconductor layer. Further, resistance of a region of the low-resistance oxide semiconductor layer, which is overlapped with a gate electrode layer, is selectively increased, thereby forming a high-resistance oxide semiconductor layer. Resistance of the oxide semiconductor layer is increased by forming a silicon oxide film in contact with the oxide semiconductor layer by a sputtering method.Type: GrantFiled: May 26, 2010Date of Patent: August 5, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshinari Sasaki, Hiroki Ohara, Junichiro Sakata
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Patent number: 8791034Abstract: A chemical vapor deposition method for forming an aluminum-silicon nitride layer upon a substrate uses an aluminum precursor, a silicon precursor and a nitrogen precursor under chemical vapor deposition conditions to deposit the aluminum-silicon nitride layer upon the substrate. The aluminum-silicon nitride layer has an index of refraction interposed between silicon nitride and aluminum nitride. The aluminum-silicon nitride layer also has a bandgap from about 4.5 to about 6 eV and a permittivity from about 6×10^-11 to about 8×10^-11 F/m. The aluminum-silicon nitride layer may be further thermally annealed to reduce a hydrogen content of the aluminum-silicon nitride layer.Type: GrantFiled: June 28, 2010Date of Patent: July 29, 2014Assignee: Cornell UniversityInventors: James R. Shealy, Richard Brown
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Patent number: 8785312Abstract: Electronic apparatus and methods of forming the electronic apparatus include HfSiON for use in a variety of electronic systems. In various embodiments, conductive material is coupled to a dielectric containing HfSiON, where such conductive material may include one or more monolayers of titanium nitride, tantalum, or combinations of titanium nitride and tantalum.Type: GrantFiled: November 28, 2011Date of Patent: July 22, 2014Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 8778793Abstract: A barrier insulating film is constituted from a first SiCN film formed with a tetramethylsilane gas flow rate lower than usual, a second SiCN film formed over the first SiCN film and formed with a usual tetramethylsilane gas flow rate, and a SiCO film formed over the second SiCN film.Type: GrantFiled: February 9, 2012Date of Patent: July 15, 2014Assignee: Renesas Electronics CorporationInventors: Takahisa Furuhashi, Naohito Suzumura
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Publication number: 20140138802Abstract: The invention provides a method for manufacturing a barrier layer on a substrate, the method comprising: —providing a substrate with an inorganic oxide layer having a pore volume between 0.3 and 10 vol. %; —treating said substrate with an inorganic oxide layer in a glow discharge plasma, said plasma being generated by at least two electrodes in a treatment space formed between said two electrodes, said treatment space also being provided with a gas comprising Nitrogen compounds; and —the treating of the substrate in said treatment space is done at a temperature below 150° C., e.g. below 100° C. The invention further provides a device for manufacturing a barrier layer on a substrate.Type: ApplicationFiled: April 24, 2012Publication date: May 22, 2014Applicant: FUJIFILM MANUFACTURING EUROPE BVInventors: Serguei Starostine, Hindrik De Vries
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Patent number: 8728954Abstract: A method of manufacturing a semiconductor device includes forming a thin film containing a specific element, oxygen, carbon, and nitrogen by performing a cycle a predetermined number of times. The cycle includes supplying a specific element-containing gas, supplying a carbon-containing gas, supplying an oxidizing gas, and supplying a nitriding gas. The act of supplying the nitriding gas is performed before the act of supplying the specific element-containing gas, and the act of supplying the carbon-containing gas and the act of supplying the oxidizing gas are not performed until the act of supplying the specific element-containing gas is performed.Type: GrantFiled: August 9, 2013Date of Patent: May 20, 2014Assignee: Hitachi Kokusai Electric Inc.Inventors: Ryota Sasajima, Yoshinobu Nakamura
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Patent number: 8728958Abstract: Novel gap fill schemes involving depositing both flowable oxide films and high density plasma chemical vapor deposition oxide (HDP oxide) films are provided. According to various embodiments, the flowable oxide films may be used as a sacrificial layer and/or as a material for bottom up gap fill. In certain embodiments, the top surface of the filled gap is an HDP oxide film. The resulting filled gap may be filled only with HDP oxide film or a combination of HDP oxide and flowable oxide films. The methods provide improved top hat reduction and avoid clipping of the structures defining the gaps.Type: GrantFiled: December 9, 2010Date of Patent: May 20, 2014Assignee: Novellus Systems, Inc.Inventors: Kaihan Ashtiani, Michael Wood, John Drewery, Naohiro Shoda, Bart van Schravendijk, Lakshminarayana Nittala, Nerissa Draeger
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Patent number: 8703624Abstract: Described herein are methods of forming dielectric films comprising silicon, such as, but not limited to, silicon oxide, silicon oxycarbide, silicon carbide, and combinations thereof, that exhibit at least one of the following characteristics: low wet etch resistance, a dielectric constant of 6.0 or below, and/or can withstand a high temperature rapid thermal anneal process. Also disclosed herein are the methods to form dielectric films or coatings on an object to be processed, such as, for example, a semiconductor wafer.Type: GrantFiled: March 4, 2010Date of Patent: April 22, 2014Assignee: Air Products and Chemicals, Inc.Inventors: Liu Yang, Manchao Xiao, Kirk Scott Cuthill, Bing Han, Mark Leonard O'Neill
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Publication number: 20140099796Abstract: A method for porogen removal of porous SiOCH film is provided, as well as devices obtained thereof. The devices and associated methods are in the field of advanced semiconductor interconnect technology, and more in particular in the development of dielectric films with low-k value.Type: ApplicationFiled: October 3, 2013Publication date: April 10, 2014Applicants: Centro de Investigación y de Estudios Avanzados del Instituto Politécnico Nacional, IMECInventors: Patrick Verdonck, Srinivas Godavarthi, Yasuhiro Matsumoto
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Patent number: 8691659Abstract: A method for forming a dielectric layer free of voids is disclosed. First, a substrate, a first stressed layer including a recess, a second stressed layer disposed on the first stressed layer and covering the recess and a patterned photoresist embedded in the recess are provided. Second, a first etching step is performed to totally remove the photoresist so that the remaining second stressed layer forms at least one protrusion adjacent to the recess. Then, a trimming photoresist is formed without exposure to fill the recess and to cover the protrusion. Later, a trimming etching step is performed to eliminate the protrusion and to collaterally remove the trimming photoresist.Type: GrantFiled: October 26, 2011Date of Patent: April 8, 2014Assignee: United Microelectronics Corp.Inventors: Ching-Pin Hsu, Yi-Po Lin, Jiunn-Hsiung Liao, Chieh-Te Chen, Feng-Yi Chang, Shang-Yuan Tsai, Li-Chiang Chen
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Publication number: 20140094038Abstract: The present invention provides methods and apparatuses for improving adhesion of dielectric and conductive layers on a substrate to the underlying layer. The methods involve passing a process gas through a plasma generator downstream of the substrate to create reactive species. The underlying layer is then exposed to reactive species that interact with the film surface without undesirable sputtering. The gas is selected such that the interaction of the reactive species with the underlying layer modifies the surface of the layer in a manner that improves adhesion to the subsequently formed overlying layer. During exposure to the reactive species, the substrate and/or process gas may be exposed to ultraviolet radiation to enhance surface modification. In certain embodiments, a single UV cure tool is used to cure the underlying film and improve adhesion.Type: ApplicationFiled: September 13, 2013Publication date: April 3, 2014Applicant: Novellus Systems, Inc.Inventors: Jason Dirk Haverkamp, Dennis Hausmann, Roey Shaviv
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Patent number: 8685866Abstract: A method of manufacturing a semiconductor device including alternately repeating a process of forming a first metal oxide film including a first metal element and a process of forming a second metal oxide film including a second metal element on a substrate accommodated in a processing chamber, so as to form a third metal oxide film including the first and second metal elements with a predetermined composition ratio on the substrate. One of the first and second metal elements of the third metal oxide film has a concentration higher than a concentration of the other, and one of the first and second metal oxide films including the higher-concentration metal element is formed in a chemical vapor deposition (CVD) mode or an atomic layer deposition (ALD) saturation mode, and the other of the first and second metal oxide films is formed in an ALD unsaturation mode.Type: GrantFiled: June 24, 2010Date of Patent: April 1, 2014Assignees: Hitachi Kokusai Electric, Inc., Renesas Electronics Corp.Inventors: Sadayoshi Horii, Atsushi Sano, Masahito Kitamura, Yoshitake Kato
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Patent number: 8679989Abstract: A method of manufacturing a semiconductor device has: carrying a substrate into a process chamber; depositing a thin film on the substrate by supplying inside the process chamber a first film deposition gas including at least one element among plural elements forming a thin film to be deposited and capable of accumulating a film solely and a second film deposition gas including at least another element among the plural elements and incapable of accumulating a film solely; carrying the substrate on which is deposited the thin film out from inside the process chamber; and removing a first sediment adhering to an interior of the process chamber and a second sediment adhering to an interior of the supply portion and having a chemical composition different from a chemical composition of the first sediment by supplying cleaning gases inside the process chamber and inside a supply portion that supplies the first film deposition gas while changing at least one of a supply flow rate, a concentration, and a type betweeType: GrantFiled: March 27, 2007Date of Patent: March 25, 2014Assignee: Hitachi Kokusai Electric Inc.Inventors: Sadao Nakashima, Takahiro Maeda, Kiyohiko Maeda, Kenji Kameda, Yushin Takasawa
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Publication number: 20140065842Abstract: Described are apparatus and methods for forming tantalum silicate layers on germanium or III-V materials. Such tantalum silicate layers may have Si/(Ta+Si) atomic ratios from about 0.01 to about 0.15. The tantalum silicate layers may be formed by atomic layer deposition of silicon oxide and tantalum oxide, followed by interdiffusion of the silicon oxide and tantalum oxide layers.Type: ApplicationFiled: August 27, 2013Publication date: March 6, 2014Inventors: Jeffrey W. Anthis, Khaled Z. Ahmed
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Publication number: 20140065844Abstract: The present invention is a method to increase the intrinsic compressive stress in plasma enhanced chemical vapor deposition (PECVD) silicon nitride (SiN) and silicon carbonitride (SiCN) thin films, comprising depositing the film from an amino vinylsilane-based precursor. More specifically the present invention uses the amino vinylsilane-based precursor selected from the formula: [RR1N]xSiR3y(R2)z, where x+y+z=4, x=1-3, y=0-2, and z=1-3; R, R1 and R3 can be hydrogen, C1 to C10 alkane, alkene, or C4 to C12 aromatic; each R2 is a vinyl, allyl or vinyl-containing functional group.Type: ApplicationFiled: November 4, 2013Publication date: March 6, 2014Inventors: Vasil Vorsa, Andrew David Johnson, Manchao Xiao
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Publication number: 20140061769Abstract: According to one embodiment, a nonvolatile semiconductor storage device includes a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a charge accumulation film formed on the first insulating film, a second insulating film formed on the charge accumulation film, and a control electrode formed on a second insulating film, and one of the first and the second insulating film includes a layer containing nitrogen, a layer that is formed on the layer containing nitrogen and that includes a first oxygen containing aluminum atoms and oxygen atoms, and a layer that is formed on the layer including the first oxygen and that includes a second oxygen containing silicon atoms and oxygen atoms; and a concentration of the aluminum atoms is from 1E12 atoms/cm2 to 1E16 atoms/cm2.Type: ApplicationFiled: September 3, 2013Publication date: March 6, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Kenichiro TORATANI, Masayuki TANAKA
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Patent number: 8664127Abstract: Aspects of the disclosure pertain to methods of depositing silicon oxide layers on substrates. In embodiments, silicon oxide layers are deposited by flowing a silicon-containing precursor having a Si—O bond, an oxygen-containing precursor and a second silicon-containing precursor, having both a Si—C bond and a Si—N bond, into a semiconductor processing chamber to form a conformal liner layer. Upon completion of the liner layer, a gap fill layer is formed by flowing a silicon-containing precursor having a Si—O bond, an oxygen-containing precursor into the semiconductor processing chamber. The presence of the conformal liner layer improves the ability of the gap fill layer to grow more smoothly, fill trenches and produce a reduced quantity and/or size of voids within the silicon oxide filler material.Type: GrantFiled: July 14, 2011Date of Patent: March 4, 2014Assignee: Applied Materials, Inc.Inventors: Sidharth Bhatia, Hiroshi Hamana, Paul Edward Gee, Shankar Venkataraman
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Solution composition for forming oxide thin film and electronic device including the oxide thin film
Patent number: 8658546Abstract: A solution composition for forming an oxide thin film may include a first compound including zinc, a second compound including indium, and a third compound including magnesium or hafnium, and an electronic device may include an oxide semiconductor including zinc, indium, and magnesium. The zinc and hafnium may be included at an atomic ratio of about 1:0.01 to about 1:1.Type: GrantFiled: October 12, 2012Date of Patent: February 25, 2014Assignees: Samsung Electronics Co., Ltd., Industry-Academic Cooperation FoundationInventors: Jong-Baek Seon, Hyun-Jae Kim, Sang-Yoon Lee, Myung-Kwan Ryu, Hyun-Soo Shin, Kyung-Bae Park, Woong-Hee Jeong, Gun-hee Kim, Byung-Du Ahn -
Publication number: 20140051264Abstract: Methods of depositing initially flowable dielectric films on substrates are described. The methods include introducing silicon-containing precursor to a deposition chamber that contains the substrate. The methods further include generating at least one excited precursor, such as radical nitrogen or oxygen precursor, with a remote plasma system located outside the deposition chamber. The excited precursor is also introduced to the deposition chamber, where it reacts with the silicon-containing precursor in a reaction zone deposits the initially flowable film on the substrate. The flowable film may be treated in, for example, a steam environment to form a silicon oxide film.Type: ApplicationFiled: February 12, 2013Publication date: February 20, 2014Applicant: Applied Materials, Inc.Inventors: Abhijit Basu Mallick, Nitin K. Ingle
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Patent number: 8642409Abstract: According to one embodiment, there is provided a method of manufacturing a semiconductor device. In the method, a substrate portion and a fin portion on the substrate portion are formed. A first silicon oxide film is formed on each side surface of the fin portion. A polysilazane film having an upper surface lower than the upper surface of the first silicon oxide film is formed on each side surface of the first silicon oxide film. The polysilazane film is converted into a silicon oxynitride film. The first silicon oxide film is etched to make the upper surface of the first silicon oxide film not higher than the upper surface of the silicon oxynitride film. A heavily doped semiconductor layer is formed in the fin portion.Type: GrantFiled: March 19, 2012Date of Patent: February 4, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Keisuke Nakazawa
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Publication number: 20140030866Abstract: A method for depositing a polysilazane on a semiconductor wafer is provided. The method includes steps of disposing a silazane onto the semiconductor wafer, and heating the silazane to form the polysilazane on the semiconductor wafer. An apparatus for preparing a polysilazane on a semiconductor wafer is also provided.Type: ApplicationFiled: July 25, 2012Publication date: January 30, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: You-Hua Chou, Chih-Tsung Lee, Min-Hao Hong, Ming-Huei Lien, Chih-Jen Wu, Chen-Ming Huang
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Patent number: 8614152Abstract: A method for forming a gate structure includes the following steps. A substrate is provided. A silicon oxide layer is formed on the substrate. A decoupled plasma-nitridation process is applied to the silicon oxide layer so as to form a silicon oxynitride layer. A first polysilicon layer is formed on the silicon oxynitride layer. A thermal process is applied to the silicon oxynitride layer having the first polysilicon layer. After the thermal process, a second polysilicon layer is formed on the first polysilicon layer. The first polysilicon layer can protect the gate dielectric layer during the thermal process. The nitrogen atoms inside the gate dielectric layer do not lose out of the gate dielectric layer. Thus, the out-gassing phenomenon can be avoided, and a dielectric constant of the gate dielectric layer can not be changed, thereby increasing the reliability of the gate structure.Type: GrantFiled: May 25, 2011Date of Patent: December 24, 2013Assignee: United Microelectronics Corp.Inventors: Chien-Liang Lin, Gin-Chen Huang, Ying-Wei Yen, Yu-Ren Wang
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Publication number: 20130337660Abstract: Provided: forming a specific element-containing layer by supplying a source gas to the substrate heated in a processing vessel, under a condition that a thermal decomposition reaction of the source gas is caused; changing the specific element-containing layer to a nitride layer by supplying a nitrogen-containing gas to the substrate; and changing the nitride layer to an oxynitride layer by supplying an oxygen-containing gas to the substrate, the source gas is sprayed in parallel to a surface of the substrate more strongly than a case of spraying the inert gas in parallel to the surface of the substrate in purging the inside of the processing vessel, by supplying an inert gas or a hydrogen-containing gas through the nozzle.Type: ApplicationFiled: December 16, 2011Publication date: December 19, 2013Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Yosuke Ota, Yoshiro Hirose, Naonori Akae, Yushin Takasawa