Organic Reactant Patents (Class 438/789)
  • Patent number: 11901179
    Abstract: A method for forming a layer on a substrate includes providing a substrate in a reactor of a semiconductor processing system, the reactor having a divider separating an upper chamber from a lower chamber and a substrate holder therein, the substrate having upper and lower surfaces. The wafer is positioned within the reactor using the substrate holder such that the upper surface bounds the upper chamber, a silicon-containing gas is flowed through the upper chamber to deposit a layer of the upper surface, and a halogen-containing gas is flowed through the lower chamber to etch a deposited film on at least one wall bounding the lower chamber while flowing the silicon-containing gas through the upper chamber. Semiconductor processing systems are also described.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: February 13, 2024
    Assignee: ASM IP Holding B.V.
    Inventors: John Tolle, Robert Vyne
  • Patent number: 11562904
    Abstract: Embodiments disclosed herein include methods of depositing a metal oxo photoresist using dry deposition processes. In an embodiment, the method comprises forming a first metal oxo film on the substrate with a first vapor phase process including a first metal precursor vapor and a first oxidant vapor, and forming a second metal oxo film over the first metal oxo film with a second vapor phase process including a second metal precursor vapor and a second oxidant vapor.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 24, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Lakmal Charidu Kalutarage, Mark Joseph Saly, Bhaskar Jyoti Bhuyan, Thomas Joseph Knisley, Kelvin Chan, Regina Germanie Freed, David Michael Thompson, Susmit Singha Roy, Madhur Sachan
  • Patent number: 11434390
    Abstract: A transparent coating film forming composition contains: (A) a polysilazane having units represented by the following formulae (1) and (2), and having predetermined modification rate and weight average molecular weight, (B) an organic solvent containing (B-1) and (B-2), (B-1) an organic solvent having a dielectric constant of 2.1 to 15.0 on average and a higher boiling point under atmospheric pressure (1013 hPa) than that of an organic solvent contained as the component (B-2), and (B-2) a saturated aliphatic hydrocarbon organic solvent; and (C) a predetermined curing catalyst. The mixing ratio of the component (A) and the component (B) satisfies a predetermined range. This provides a transparent coating film forming composition using an organic solvent having high polysilazane solubility, volatility at an appropriate speed during application, high safety and workability, the composition enabling formation of a coating film that is uniform and has high transparency and hardness after curing.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: September 6, 2022
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventor: Tatsuro Kaneko
  • Patent number: 11348782
    Abstract: A semiconductor device including a first dielectric layer and a second dielectric layer is formed by forming an inhibitor layer over a semiconductor material. The inhibitor layer includes at least silicon and nitrogen. The semiconductor material is heated in an oxygen-containing ambient which oxidizes the inhibitor layer and forms the first dielectric layer which includes the oxidized inhibitor layer, and oxidizes the semiconductor material to form the second dielectric layer. The second dielectric layer is thicker than, the first dielectric layer. The first dielectric layer and the second dielectric layer each include at least 90 weight percent silicon dioxide and less than 1 weight percent nitrogen. The first dielectric layer and the second dielectric layer may be used to form gate dielectric layers for a first MOS transistor and a second MOS transistor that operates at a higher voltage than the first MOS transistor.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: May 31, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mark Francis Arendt, Damien Thomas Gilmore
  • Patent number: 11328952
    Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for surrounding dielectric layers. The insert layer may be applied between two dielectric layers. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: May 10, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Cheng Chou, Chih-Chien Chi, Chung-Chi Ko, Yao-Jen Chang, Chen-Yuan Kao, Kai-Shiang Kuo, Po-Cheng Shih, Tze-Liang Lee, Jun-Yi Ruan
  • Patent number: 11131020
    Abstract: Liquid chromatography systems and liquid chromatography components are disclosed. In an embodiment, a liquid chromatography system includes a liquid chromatography component. The liquid chromatography component includes a substrate and an amorphous coating on the substrate. The amorphous coating has a base layer and a surface layer. The base layer includes carboxysilane.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: September 28, 2021
    Assignee: Silcotek Corp.
    Inventor: Gary A. Barone
  • Patent number: 11127654
    Abstract: A semiconductor device including: a substrate; a via which penetrates the substrate; a via insulating film formed along an inner wall of the via; and a core plug which fills the via, wherein a residual stress of the via insulating film is 60 MPa to ?100 MPa.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: September 21, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyeong Bin Lim, Sung Hyup Kim, Hyo Ju Kim, Ho Chang Lee, Jeong Min Na
  • Patent number: 11038153
    Abstract: Embodiments of the present disclosure generally relate to methods for forming an organic light emitting diode (OLED) device. Forming the OLED device comprises depositing a first barrier layer on a substrate having an OLED structure disposed thereon. A first sublayer of a buffer layer is then deposited on the first barrier layer. The first sublayer of the buffer layer is cured with a mixed gas plasma. Curing the first sublayer comprises generating water from the mixed gas plasma in a process chamber in which the curing occurs. The deposition of the first sublayer and the curing of the first sublayer is repeated one or more times to form a completed buffer layer. A second barrier layer is then deposited on the completed buffer layer.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: June 15, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Wen-Hao Wu, Jrjyan Jerry Chen
  • Patent number: 10879373
    Abstract: A structure and a formation method of a semiconductor device are provided. The method includes forming a dummy gate stack over a semiconductor substrate. The dummy gate stack has a dummy gate electrode and a dummy gate dielectric layer. The method also includes forming spacer elements over sidewalls of the dummy gate stack and partially removing the dummy gate electrode to form a recess. The method further includes partially removing the spacer elements to enlarge the recess and removing a remaining portion of the dummy gate electrode to expose the dummy gate dielectric layer. In addition, the method includes doping the spacer elements after the remaining portion of the dummy gate electrode is removed and removing the dummy gate dielectric layer. The method further includes forming a metal gate stack in the recess.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: December 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Xusheng Wu, Chang-Miao Liu, Huiling Shang
  • Patent number: 10760155
    Abstract: To provide a vapor deposition source of which material usage efficiency is higher as compared with the related art. A vapor deposition source (10) includes a vapor deposition particles ejecting unit (30) configured to include multistage of nozzle units layered apart from each other in a vertical direction, each of the nozzle units including at least one vapor deposition nozzle (32, 52), and at least one space part (43) provided between the multistage of vapor deposition nozzles, and a vacuum exhaust unit (14) connected with the at least one space part (43).
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: September 1, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Satoshi Inoue, Shinichi Kawato, Manabu Niboshi, Yuhki Kobayashi
  • Patent number: 10354883
    Abstract: Processes for surface treatment of a workpiece are provided. In one example implementation, a method can include performing an organic radical based surface treatment process on a workpiece. The organic radical based surface treatment process can include generating one or more species in a first chamber. The surface treatment process can include mixing one or more hydrocarbon molecules with the species to create a mixture. The mixture can include one or more organic radicals. The surface treatment process can include exposing a semiconductor material on the workpiece to the mixture in a second chamber.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: July 16, 2019
    Assignee: Mattson Technology, Inc.
    Inventors: Michael X. Yang, Hua Chung, Xinliang Lu
  • Patent number: 10181581
    Abstract: Methods for forming an OLED device are described. An encapsulation structure having organic buffer layer sandwiched between barrier layers is deposited over an OLED structure. The buffer layer is formed with a fluorine-containing plasma. The second barrier layer is then deposited over the buffer layer. Additionally, to ensure good adhesion, a buffer adhesion layer is formed between the buffer layer and the first barrier layer. Finally, to ensure good transmittance, a stress reduction layer is deposited between the buffer layer and the second barrier layer.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: January 15, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventor: Jrjyan Jerry Chen
  • Patent number: 9793480
    Abstract: The present invention relates to a method for manufacturing organic electronic devices including a dipyrannylidene film as an anodic interface layer, the method being carried out in a vacuum and without any exposure to air. The invention also relates to organic devices resulting from the method, more specifically to organic solar cells (OSC).
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: October 17, 2017
    Assignee: Centre National de la Recherche Scientifique
    Inventors: Denis Fichou, Ludovic Tortech, Moslem Alaaeddine
  • Patent number: 9490066
    Abstract: In order to prevent the ingress of moisture into a void section of a component main body of a ceramic electronic component, at least the component main body of the ceramic electronic component is provided with water repellency using a water repellent agent. The water repellent agent is dissolved in a supercritical fluid such as, a supercritical CO2 fluid, as a solvent to provide at least the component main body with water repellency. After providing the water repellency, the water repellent agent on the outer surface of the component main body is removed. As the water repellent agent, a silane coupling agent may be used.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: November 8, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Junichi Saito, Toshihiko Kobayashi, Makoto Ogawa, Akihiro Motoki, Kenichi Kawasaki, Tatsuo Kunishi
  • Patent number: 9362111
    Abstract: Implementations described herein generally relate to methods for forming dielectric films in high aspect ratio features. In one implementation, a method for forming a silicon oxide layer is provided. A silicon-containing precursor gas is flown into a processing chamber having a substrate having a high aspect ratio feature disposed therein. Then a high frequency plasma is applied to the silicon-containing precursor gas to deposit a silicon-containing layer over the surface of the high aspect ratio feature. The processing chamber is purged to remove by-products from the silicon-containing layer deposition process. An oxygen-containing precursor gas is flown into the processing chamber. A high frequency plasma and a low frequency plasma are applied to the oxygen-containing precursor gas to form the silicon oxide layer.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: June 7, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Zongbin Wang, Shalina Deepa Sudheeran, Arvind Sundarrajan, Bharat Bhushan
  • Patent number: 9355862
    Abstract: A method of removing titanium nitride hardmask is described. The hardmask resides above a low-k dielectric layer prior to removal and the low-k dielectric layer retains a relatively low net dielectric constant after the removal process. The low-k dielectric layer may be part of a dual damascene structure having copper at the bottom of the vias. A non-porous carbon layer is deposited prior to the titanium nitride hardmask removal to protect the low-k dielectric layer and the copper. The titanium nitride hardmask is removed with a gas-phase etch using plasma effluents formed in a remote plasma from a fluorine-containing precursor. Plasma effluents within the remote plasma are flowed into a substrate processing region where the plasma effluents react with the titanium nitride.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: May 31, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Mandar Pandit, Xikun Wang, Zhenjiang Cui, Mikhail Korolik, Anchuan Wang, Nitin K. Ingle
  • Patent number: 9169552
    Abstract: A process for the application of layers composed of ceramic or organoceramic materials on surfaces of metals, semimetals or compounds thereof and also components or assemblies made of these materials by a chemical deposition process from the gas phase at atmospheric pressure or 30% below this and process temperatures during deposition below 500° C. The deposition process is carried out in one operation, wherein the reactive chemical substances and the precursors are homogeneously backmixed in the common gas space, and the average residence time as a ratio of volume of the gas space to gas throughput is matched to the rate-determining step of the catalyzed gas-phase reaction of the coating process so as to achieve a deposition rate of from 10 to 2000 nm per hour.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: October 27, 2015
    Assignee: WIELAND-WERKE AG
    Inventors: Till Merkel, Christian Lehnert
  • Publication number: 20150147871
    Abstract: Described herein are precursors and methods for forming silicon-containing films.
    Type: Application
    Filed: June 2, 2014
    Publication date: May 28, 2015
    Applicant: AIR PRODUCTS AND CHEMICALS, INC.
    Inventors: Manchao Xiao, Xinjian Lei, Daniel P. Spence
  • Patent number: 9029171
    Abstract: The present disclosure relates to a structure and method to create a self-repairing dielectric material for semiconductor device applications. A porous dielectric material is deposited on a substrate, and exposed with treating agent particles such that the treating agent particles diffuse into the dielectric material. A dense non-porous cap is formed above the dielectric material which encapsulates the treating agent particles within the dielectric material. The dielectric material is then subjected to a process which creates damage to the dielectric material. A chemical reaction is initiated between the treating agent particles and the damage, repairing the damage. A gradient concentration resulting from the consumption of treating agent particles by the chemical reaction promotes continuous diffusion the treating agent particles towards the damaged region of the dielectric material, continuously repairing the damage.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Min Huang, Chung-Ju Lee, Tien-I Bao
  • Patent number: 9018107
    Abstract: A deposition for producing a porous organosilica glass film comprising: introducing into a vacuum chamber gaseous reagents including one precursor of an organosilane or an organosiloxane, and a porogen distinct from the precursor, wherein the porogen is aromatic in nature; applying energy to the gaseous reagents in the chamber to induce reaction of the gaseous reagents to deposit a film, containing the porogen; and removing substantially all of the organic material by UV radiation to provide the porous film with pores and a dielectric constant less than 2.6.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: April 28, 2015
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Mary Kathryn Haas, Raymond Nicholas Vrtis, Laura M. Matz
  • Patent number: 9006019
    Abstract: A method for manufacturing a light-emitting device includes a step of forming an etching resistant protection layer on a substrate provided with an organic planarizing layer, a step of forming a plurality of electrodes on the etching resistant protection layer, a step of forming an organic compound layer on the substrate provided with the plurality of electrodes, a step of forming a resist layer on the organic compound layer formed on parts of electrodes among the plurality of electrodes using a photolithographic method, and a step of removing the organic compound layer in a region not covered with the resist layer by dry etching, wherein an entire surface of the organic planarizing layer on the substrate on which steps up to the step of forming the plurality of electrodes have been performed is covered with at least one of the etching resistant protection layer and the electrode.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: April 14, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Manabu Otsuka, Tomoyuki Hiroki
  • Publication number: 20150087139
    Abstract: Described herein are precursors and methods for forming silicon-containing films. In one aspect, the precursor comprises a compound represented by one of following Formulae A through E below: In one particular embodiment, the organoaminosilane precursors are effective for a low temperature (e.g., 350° C. or less), atomic layer deposition (ALD) or plasma enhanced atomic layer deposition (PEALD) of a silicon-containing film. In addition, described herein is a composition comprising an organoaminosilane described herein wherein the organoaminosilane is substantially free of at least one selected from the amines, halides (e.g., Cl, F, I, Br), higher molecular weight species, and trace metals.
    Type: Application
    Filed: September 11, 2014
    Publication date: March 26, 2015
    Applicant: AIR PRODUCTS AND CHEMICALS, INC.
    Inventors: Mark Leonard O'Neill, Manchao Xiao, Xinjian Lei, Richard Ho, Haripin Chandra, Matthew R. MacDonald, Meiliang Wang
  • Patent number: 8969219
    Abstract: The present invention relates to a method for preparation of an ultraviolet (UV)-curable inorganic-organic hybrid resin containing about or less than 4% volatiles and less than 30% organic residues. The UV-curable inorganic-organic hybrid resin obtained according to this method can be UV-cured within a markedly very short time and enables, upon curing, the formation of a transparent shrink-and crack-free glass-like product having high optical quality, high thermal stability and good bonding properties. In view of these properties, this hybrid resin can be used in various applications such as electro-optic, microelectronic, stereolithography and biophotonic applications.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: March 3, 2015
    Assignee: Soreq Nuclear Research Center
    Inventor: Raz Gvishi
  • Publication number: 20150056821
    Abstract: A method for forming a modified low-k SiOCH film on a substrate, includes: providing a low-k SiOCH film formed on a substrate by flowable CVD; exposing the low-k SiOCH film to a gas containing a Si—N bond in its molecule without applying electromagnetic energy to increase Si—O bonds and/or Si—C bonds in the film; and then curing the low-k SiOCH film.
    Type: Application
    Filed: August 22, 2013
    Publication date: February 26, 2015
    Applicant: ASM IP Holding B.V.
    Inventors: Dai Ishikawa, Kiyohiro Matsushita, Akinori Nakano, Shintaro Ueda, Hirofumi Arai
  • Publication number: 20150004806
    Abstract: Methods for depositing flowable dielectric films using halogen-free precursors and catalysts on a substrate are provided herein. Halogen-free precursors and catalysts include self-catalyzing aminosilane compounds and halogen-free organic acids. Flowable films may be used to fill pores in existing dielectric films on substrates having exposed metallization layers. The methods involve hydrolysis and condensation reactions.
    Type: Application
    Filed: August 20, 2014
    Publication date: January 1, 2015
    Inventors: Nicholas Muga Ndiege, Krishna Nittala, Derek B. Wong, George Andrew Antonelli, Nerissa Sue Draeger, Patrick A. Van Cleemput
  • Patent number: 8912054
    Abstract: A method of manufacturing a thin-film semiconductor device according to the present disclosure includes: preparing a substrate; forming a gate electrode above the substrate; forming a first insulating film on the gate electrode; forming a semiconductor thin film that is to be a channel layer, on the first insulating film; forming a second insulating film on the semiconductor thin film; irradiating the second insulating film with a beam so as to increase a transmittance of the second insulating film; and forming a source electrode and a drain electrode above the channel layer.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: December 16, 2014
    Assignees: Panasonic Corporation, Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Hiroshi Hayashi, Takahiro Kawashima, Genshiro Kawashi
  • Publication number: 20140357091
    Abstract: Semiconductor fabrication processes are described. An embodiment of the semiconductor fabrication process includes providing a layer formed by decomposition of dimethylsilane through chemical vapor deposition, the layer being applied by a fluid material, and then positioning the layer in a system for producing a semiconductor product. Additionally or alternatively, the semiconductor product is produced and/or the layer is on a substrate.
    Type: Application
    Filed: August 21, 2014
    Publication date: December 4, 2014
    Inventor: James B. MATTZELA
  • Patent number: 8822350
    Abstract: An oxide film is formed, having a specific film thickness on a substrate by alternately repeating: forming a specific element-containing layer on the substrate by supplying a source gas containing a specific element, to the substrate housed in a processing chamber and heated to a first temperature; and changing the specific element-containing layer formed on the substrate, to an oxide layer by supplying a reactive species containing oxygen to the substrate heated to the first temperature in the processing chamber under a pressure of less than atmospheric pressure, the reactive species being generated by causing a reaction between an oxygen-containing gas and a hydrogen-containing gas in a pre-reaction chamber under a pressure of less than atmospheric pressure and heated to a second temperature higher than the first temperature.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: September 2, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kazuhiro Yuasa, Ryuji Yamamoto
  • Patent number: 8790785
    Abstract: A method of forming a porous insulation film uses an organic silica material gas having a 3-membered SiO cyclic structure and a 4-membered SiO cyclic structure, or an organic silica material gas having a 3-membered SiO cyclic structure and a straight-chain organic silica structure, and uses a plasma reaction in the filming process. A porous interlevel dielectric film having a higher strength and a higher adhesive property can be obtained.
    Type: Grant
    Filed: July 23, 2007
    Date of Patent: July 29, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Hironori Yamamoto, Fuminori Ito, Munehiro Tada, Yoshihiro Hayashi
  • Patent number: 8753986
    Abstract: A deposition for producing a porous organosilica glass film comprising: introducing into a vacuum chamber gaseous reagents including one precursor of an organosilane or an organosiloxane, and a porogen distinct from the precursor, wherein the porogen is aromatic in nature; applying energy to the gaseous reagents in the chamber to induce reaction of the gaseous reagents to deposit a film, containing the porogen; and removing substantially all of the organic material by UV radiation to provide the porous film with pores and a dielectric constant less than 2.6.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: June 17, 2014
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Mary Kathryn Haas, Raymond Nicholas Vrtis, Laura M. Matz
  • Patent number: 8741787
    Abstract: A silicon-based low-k dielectric material is formed on the basis of a single precursor material, such as OMTCS, without incorporating a porogen species. To this end, the initial deposition of the low-k dielectric material may be formed on the basis of a reduced process temperature, while a subsequent treatment, such as a UV treatment, may allow the adjustment of the final material characteristics without causing undue out-gassing of volatile organic components.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: June 3, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Ulrich Mayer, Hartmut Ruelke, Christof Streck
  • Patent number: 8736051
    Abstract: A semiconductor device includes an interlayer insulating film containing Si, O, C, and H, an under-bump metal film disposed over the interlayer insulating film and containing Ni, and a bump electrode disposed over the under-bump metal film. In the interlayer insulating film, a ratio of a peak height of Si—CH3 near a wave number 1270 cm?1 to a peak height of Si—O near a wave number 1030 cm?1 obtained by Fourier-transform infrared spectroscopy (FTIR) is 0.15 or greater and 0.27 or less. A ratio of a peak height of Si—CH2—Si near a wave number 1360 cm?1 to the peak height of Si—CH3 near the wave number 1270 cm?1 is 0.031 or greater.
    Type: Grant
    Filed: February 14, 2013
    Date of Patent: May 27, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Tatsuya Usami, Tomoyuki Nakamura, Naoki Fujimoto
  • Patent number: 8703624
    Abstract: Described herein are methods of forming dielectric films comprising silicon, such as, but not limited to, silicon oxide, silicon oxycarbide, silicon carbide, and combinations thereof, that exhibit at least one of the following characteristics: low wet etch resistance, a dielectric constant of 6.0 or below, and/or can withstand a high temperature rapid thermal anneal process. Also disclosed herein are the methods to form dielectric films or coatings on an object to be processed, such as, for example, a semiconductor wafer.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: April 22, 2014
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Liu Yang, Manchao Xiao, Kirk Scott Cuthill, Bing Han, Mark Leonard O'Neill
  • Patent number: 8664127
    Abstract: Aspects of the disclosure pertain to methods of depositing silicon oxide layers on substrates. In embodiments, silicon oxide layers are deposited by flowing a silicon-containing precursor having a Si—O bond, an oxygen-containing precursor and a second silicon-containing precursor, having both a Si—C bond and a Si—N bond, into a semiconductor processing chamber to form a conformal liner layer. Upon completion of the liner layer, a gap fill layer is formed by flowing a silicon-containing precursor having a Si—O bond, an oxygen-containing precursor into the semiconductor processing chamber. The presence of the conformal liner layer improves the ability of the gap fill layer to grow more smoothly, fill trenches and produce a reduced quantity and/or size of voids within the silicon oxide filler material.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: March 4, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Sidharth Bhatia, Hiroshi Hamana, Paul Edward Gee, Shankar Venkataraman
  • Publication number: 20130319290
    Abstract: Described herein are precursors and methods for forming silicon-containing films. In one aspect, there is a precursor of following Formula I: wherein R1 and R3 are independently selected from linear or branched C3 to C10 alkyl group, a linear or branched C3 to C10 alkenyl group, a linear or branched C3 to C10 alkynyl group, a C1 to C6 dialkylamino group, an electron withdrawing and a C6 to C10 aryl group; R2 and R4 are independently selected from hydrogen, a linear or branched C3 to C10 alkyl group, a linear or branched C3 to C10 alkenyl group, a linear or branched C3 to C10 alkynyl group, a C1 to C6 dialkylamino group, an electron withdrawing, and a C6 to C10 aryl group; and wherein any one, all, or none of R1 and R2, R3 and R4, R1 and R3, or R2 and R4 are linked to form a ring.
    Type: Application
    Filed: May 24, 2013
    Publication date: December 5, 2013
    Applicant: AIR PRODUCTS AND CHEMICALS, INC.
    Inventors: Manchao Xiao, Xinjian Lei, Daniel P. Spence, Haripin Chandra, Mark Leonard O'Neill
  • Patent number: 8557712
    Abstract: New methods of filling gaps with dielectric material are provided. The methods involve plasma-enhanced chemical vapor deposition (PECVD) of a flowable polymerized film in a gap, followed by an in-situ treatment to convert the film to a dielectric material. According to various embodiments, the in-situ treatment may be a purely thermal or plasma treatment process. Unlike conventional PECVD processes of solid material, which deposit film in a conformal process, the deposition results in bottom-up fill of the gap. In certain embodiments, a deposition-in situ treatment-deposition-in situ treatment process is performed to form dielectric layers in the gap. The sequence is repeated as necessary for bottom up fill of the gap. Also in certain embodiments, an ex-situ post-treatment process is performed after gap fill is completed. The processes are applicable to frontend and backend gapfill.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: October 15, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: George Andrew Antonelli, Bart Van Schravendijk
  • Publication number: 20130260575
    Abstract: A chemical vapor deposition method for producing a porous organosilica glass film comprising: introducing into a reaction chamber gaseous reagents comprising a porogenated precursor; optionally a structure former precursor selected from the group consisting an organosilane, an organosiloxane, and combinations thereof; and optionally a porogen precursor; applying an energy source to the gaseous reagents in the chamber to induce reaction of the gaseous reagents to deposit a preliminary film on the substrate, wherein the preliminary film contains the porogen; and removing from the preliminary film at least a portion of the porogen to provide the porous film with pores and a dielectric constant less than 2.6.
    Type: Application
    Filed: February 22, 2013
    Publication date: October 3, 2013
    Applicant: AIR PRODUCTS AND CHEMICALS, INC.
    Inventors: Jennifer Elizabeth Antoline Al-Rashid, Raymond Nicholas Vrtis, Irene Joann Hsu
  • Patent number: 8541318
    Abstract: This invention relates to silicon precursor compositions for forming silicon-containing films by low temperature (e.g., <550° C.) chemical vapor deposition processes for fabrication of ULSI devices and device structures. Such silicon precursor compositions comprise at least a silane or disilane derivative that is substituted with at least one alkylhydrazine functional groups and is free of halogen substitutes.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: September 24, 2013
    Assignee: Advanced Technology Materials, Inc.
    Inventors: Ziyun Wang, Chongying Xu, Thomas H. Baum
  • Patent number: 8501637
    Abstract: Methods are provided for depositing silicon dioxide containing thin films on a substrate by atomic layer deposition ALD. By using disilane compounds as the silicon source, good deposition rates and uniformity are obtained.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: August 6, 2013
    Assignee: ASM International N.V.
    Inventors: Raija H. Matero, Suvi P. Haukka
  • Patent number: 8461031
    Abstract: A method for making a thin-film structure includes a thin film stabilized on a substrate. The structure of the thin film is defined by a material which includes at least one first chemical species. The method includes a step of inputting particles of the first chemical species into the thin film so as to compensate for the flow of vacancies from the surface of the film.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: June 11, 2013
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Joël Eymery, Pascal Pochet
  • Patent number: 8426322
    Abstract: In a method for producing a semiconductor device, two or more kinds of organic siloxane compound materials each having a cyclic SiO structure as a main skeleton and having different structures are mixed and thereafter vaporized. Alternatively, those two or more kinds of organic siloxane compound materials are mixed and vaporized simultaneously to produce a vaporized gas. Then, the vaporized gas is transported to a reaction furnace together with a carrier gas. Then, in the reaction furnace, a porous insulating layer is formed by the plasma CVD method or the plasma polymerization method using the vaporized gas.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: April 23, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Hironori Yamamoto, Jun Kawahara, Tomonori Sakaguchi, Yoshihiro Hayashi
  • Patent number: 8415258
    Abstract: Provided is a method of manufacturing a semiconductor device. The method includes: loading a substrate into a process vessel; performing a process to form an film on the substrate by alternately repeating: (a) forming a layer containing an element on the substrate by supplying at least two types of source gases into the process vessel, each of the at least two types of source gases containing the element, and (b) changing the layer containing the element by supplying reaction gas into the process vessel, the reaction gas being different from the at least two types of source gases; and unloading the processed substrate from the process vessel.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: April 9, 2013
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Naonori Akae, Yoshiro Hirose, Yushin Takasawa, Yosuke Ota, Ryota Sasajima
  • Patent number: 8399358
    Abstract: Silicon oxide based low-k dielectric materials may receive superior hydrophobic surface characteristics on the basis of a plasma treatment using hydrogen and carbon containing radicals. For this purpose, the surface of the low-k dielectric material may be exposed to these radicals, at least in one in situ process in combination with another reactive plasma ambient, for instance used for patterning the low-k dielectric material. Consequently, superior surface characteristics may be established or re-established without significantly contributing to product cycle time.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: March 19, 2013
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Daniel Fischer, Matthias Schaller
  • Patent number: 8357619
    Abstract: A silicon-containing insulating film is formed on a target substrate by CVD, in a process field to be selectively supplied with a first process gas including di-iso-propylaminosilane gas and a second process gas including an oxidizing gas or nitriding gas. The film is formed by performing a plurality of times a cycle alternately including first and second steps. The first step performs supply of the first process gas, thereby forming an adsorption layer containing silicon on a surface of the target substrate. The second performs supply of the second process gas, thereby oxidizing or nitriding the adsorption layer on the surface of the target substrate. The second step includes an excitation period of supplying the second process gas to the process field while exciting the second process gas by an exciting mechanism.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: January 22, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Kazuhide Hasebe, Shigeru Nakajima, Jun Ogawa
  • Patent number: 8338315
    Abstract: Processes for curing silicon based low k dielectric materials generally includes exposing the silicon based low k dielectric material to ultraviolet radiation in an inert atmosphere having an oxidant in an amount of about 10 to about 500 parts per million for a period of time and intensity effective to cure the silicon based low k dielectric material so to change a selected one of chemical, physical, mechanical, and electrical properties and combinations thereof relative to the silicon based low k dielectric material prior to the ultraviolet radiation exposure. Also disclosed herein are silicon base low k dielectric materials substantially free of sub-oxidized SiO species.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: December 25, 2012
    Assignee: Axcelis Technologies, Inc.
    Inventors: Darren L. Moore, Carlo Waldfried, Ganesh Rajagopalan
  • Patent number: 8334203
    Abstract: An interconnect structure is provided which comprises a semiconductor substrate; a patterned and cured photoresist wherein the photoresist contains a low k dielectric substitutent and contains a fortification layer on its top and sidewall surfaces forming vias or trenches; and a conductive fill material in the vias or trenches. Also provided is a method for fabricating an interconnect structure which comprises depositing a photoresist onto a semiconductor substrate, wherein the photoresist contains a low k dielectric constituent; imagewise exposing the photoresist to actinic radiation; then forming a pattern of vias or trenches in the photoresist; surface fortifying the pattern of vias or trenches proving a fortification layer on the top and sidewalls of the vias or trenches; curing the pattern of vias or trenches thereby converting the photoresist into a dielectric; and filling the vias and trenches with a conductive fill material.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: December 18, 2012
    Assignee: International Business Machines Corporation
    Inventors: Qinghuang Lin, Dirk Pfeiffer, Ratnam Sooriyakumaran
  • Patent number: 8329518
    Abstract: The present invention provides methods for manufacturing a thin film transistor (TFT) array substrate and a display panel.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: December 11, 2012
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Jing-feng Xue, Jehao Hsu, Xiaohui Yao
  • Patent number: 8329575
    Abstract: A through-silicon via fabrication method includes etching a plurality of through holes in a silicon plate. An oxide liner is deposited on the surface of the silicon plate and on the sidewalls and bottom wall of the through holes. A metallic conductor is then deposited in the through holes. In another version, which may be used concurrently with the oxide liner, a silicon nitride passivation layer is deposited on the exposed back surface of the silicon plate of the substrate.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: December 11, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Nagarajan Rajagopalan, Ji Ae Park, Ryan Yamase, Shamik Patel, Thomas Nowak, Li-Qun Xia, Bok Hoen Kim, Ran Ding, Jim Baldino, Mehul Naik, Sesh Ramaswami
  • Patent number: 8304353
    Abstract: Embodiments disclosed herein pertain to silicon dioxide deposition methods using at least ozone and tetraethylorthosilicate (TEOS) as deposition precursors. In one embodiment, a silicon dioxide deposition method using at least ozone and TEOS as deposition precursors includes flowing precursors comprising ozone and TEOS to a substrate under subatmospheric pressure conditions effective to deposit silicon dioxide-comprising material having an outer surface onto the substrate. The outer surface is treated effective to one of add hydroxyl to or remove hydroxyl from the outer surface in comparison to any hydroxyl presence on the outer surface prior to said treating. After the treating, precursors comprising ozone and TEOS are flowed to the substrate under subatmospheric pressure conditions effective to deposit silicon dioxide-comprising material onto the treated outer surface of the substrate. Other embodiments are contemplated.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: November 6, 2012
    Assignee: Micron Technology, Inc.
    Inventors: John Smythe, Gurtej S. Sandhu
  • Patent number: 8304033
    Abstract: Disclosed are methods of operation to grow, modify, deposit, or dope a layer upon a substrate using a multi-nozzle and skimmer assembly for introducing a process gas mixture, or multiple process gases mixtures, in a gas cluster ion beam (GCIB) system. Also disclosed is a method of forming a shallow trench isolation (STI) structure on a substrate, for example, an SiO2 STI structure, using a multiple nozzle system with two separate gas supplies, for example providing a silicon-containing gas and an oxygen-containing gas.
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: November 6, 2012
    Assignee: TEL Epion Inc.
    Inventors: Martin D. Tabat, Matthew C. Gwinn, Robert K. Becker, Avrum Freytsis, Michael Graf