Organic Reactant Patents (Class 438/790)
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Patent number: 8268411Abstract: A method of forming a porous composite material in which substantially all of the pores within the composite material are small having a diameter of about 5 nm or less and with a narrow PSD is provided. The porous composite material includes a first solid phase having a first characteristic dimension and a second phase comprised of pores having a second characteristic dimension, wherein the characteristic dimensions of at least one of said phases is controlled to a value of about 5 nm or less.Type: GrantFiled: August 8, 2009Date of Patent: September 18, 2012Assignee: International Business Machines CorporationInventors: Stephen M. Gates, Alfred Grill, Deborah A. Neumayer, Son Nguyen, Vishnubhai V. Patel
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Patent number: 8263502Abstract: A substrate structure is produced by forming a first material layer on a substrate having a recess, removing the first material layer from the portion of the substrate except for the recess using a second material that reacts with the first material, and forming a deposition film from the first material layer using a third material that reacts with the first material. A method of manufacturing a device may include the method of forming a substrate structure.Type: GrantFiled: August 11, 2009Date of Patent: September 11, 2012Assignee: Synos Technology, Inc.Inventor: Sang In Lee
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Patent number: 8253255Abstract: An electronic device includes a substrate, a first chip mounted on the substrate and having a first terminal, a second terminal, an input pad and a semiconductor time switch connected to the first terminal and the second terminal and configured to disconnect the first terminal and the second terminal upon lapse of a prescribed lifetime, the input pad being configured to set the prescribed lifetime, a second chip mounted on the substrate and incorporating an operational device having a third terminal connected to the first terminal and a fourth terminal serving as an input terminal for an external device, a first memory device mounted on the substrate, having a fifth terminal connected to the second terminal and storing information required for operating the operational device, and an encapsulater covering at least the input pad of the first chip.Type: GrantFiled: March 17, 2008Date of Patent: August 28, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Watanabe, Kazuya Matsuzawa
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Patent number: 8252704Abstract: This disclosure relates to compositions that include (a) at least one substituted or unsubstituted cyclic alkene, and (b) an antioxidant composition including at least one compound of Formula (I): R1 through R4 in Formula (I) are described in the specification.Type: GrantFiled: July 11, 2011Date of Patent: August 28, 2012Assignee: Fujifilm Electronic Materials U.S.A., Inc.Inventors: Daniel J. Teff, John L. Chagolla
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Publication number: 20120202359Abstract: Methods for forming dielectric layers, and structures and devices resulting from such methods, and systems that incorporate the devices are provided. The invention provides an aluminum oxide/silicon oxide laminate film formed by sequentially exposing a substrate to an organoaluminum catalyst to form a monolayer over the surface, remote plasmas of oxygen and nitrogen to convert the organoaluminum layer to a porous aluminum oxide layer, and a silanol precursor to form a thick layer of silicon dioxide over the porous oxide layer. The process provides an increased rate of deposition of the silicon dioxide, with each cycle producing a thick layer of silicon dioxide of about 120 ? over the layer of porous aluminum oxide.Type: ApplicationFiled: April 17, 2012Publication date: August 9, 2012Inventors: Chris W. Hill, Garo J. Derderian
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Patent number: 8236708Abstract: Aspects of the disclosure pertain to methods of depositing dielectric layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS), ozone and molecular oxygen into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.Type: GrantFiled: August 13, 2010Date of Patent: August 7, 2012Assignee: Applied Materials, Inc.Inventors: Sasha Kweskin, Paul Edward Gee, Shankar Venkataraman, Kedar Sapre
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Publication number: 20120190215Abstract: A disclosed film deposition method comprises alternately repeating an adsorption step and a reaction step with an interval period therebetween. The adsorption step includes opening a first on-off valve of a source gas supplying system for a predetermined time period thereby to supply a source gas to a process chamber, closing the first valve after the predetermined time period elapses, and confining the source gas within the process tube, thereby allowing the source gas to be adsorbed on an object to be processed, while a third on-off valve of a vacuum evacuation system is closed. The reaction step includes opening a second on-off valve of a reaction gas supplying system thereby to supply a reaction gas to the process chamber, thereby allowing the source gas and the reaction gas to react with each other thereby to produce a thin film on the object to be processed.Type: ApplicationFiled: July 25, 2011Publication date: July 26, 2012Applicant: Tokyo Electron LimitedInventors: Toshiyuki IKEUCHI, Pao-Hwa Chou, Kazuya Yamamoto, Kentaro Sera
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Patent number: 8202806Abstract: A method of fabricating an integrated circuit having reduced threshold voltage shift is provided. A nonconducting region is formed on the semiconductor substrate and active regions are formed on the semiconductor substrate. The active regions are separated by the nonconducting region. A barrier layer and a dielectric layer are deposited over the nonconducting region and over the active regions. Heat is applied to the integrated circuit causing the barrier layer to anneal.Type: GrantFiled: October 3, 2005Date of Patent: June 19, 2012Assignee: Micron Technology, Inc.Inventors: Randhir P.S. Thakur, Ravi Iyer, Howard Rhodes
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Patent number: 8202805Abstract: A method for processing a substrate including a processing target layer and an organic film, include: a deposition/trimming process of forming a reinforcement film on a surface of the organic film and, at the same time, trimming a line width of a line portion of the organic film constituting an opening pattern. The deposition/trimming process includes an adsorption process for allowing a silicon-containing gas to be adsorbed onto the surface of the organic film and an oxidation process in which the line width of the organic film is trimmed while the adsorbed silicon-containing gas is converted into a silicon oxide film. A monovalent aminosilane is employed as the silicon-containing gas.Type: GrantFiled: March 9, 2010Date of Patent: June 19, 2012Assignee: Tokyo Electron LimitedInventors: Masato Kushibiki, Eiichi Nishimura
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Patent number: 8188576Abstract: A compound for filling small gaps in a semiconductor device, a composition for filling small gaps in a semiconductor device, and a method of fabricating a semiconductor capacitor, the compound including hydrolysates prepared by hydrolysis, in the presence of an acid catalyst, of compounds represented by Formulae 1, 2, and 3: [RO]3Si—[CH2]nR???(1) wherein, in Formula 1, n is an integer from 0 to about 10, and R and R? are each independently a hydrogen atom, a C1-C12 alkyl group, or a C6-C20 aryl group; HOOC[CH2]nR2Si—O—SiR?2[CH2]nCOOH??(2) wherein, in Formula 2, each n is independently an integer from 0 to about 10, and R and R? are each independently a C1-C12 alkyl group or a C6-C20 aryl group; and R3Si—O—X??(3) wherein, in Formula 3, X is R? or SiR?3, and R and R? are each independently a C1-C12 alkyl group or a C6-C20 aryl group, or a polycondensate prepared by polycondensation of the hydrolysates represented by Formulae 1, 2, and 3.Type: GrantFiled: March 2, 2011Date of Patent: May 29, 2012Assignee: Cheil Industries, Inc.Inventors: Sung Jae Lee, Hee Jae Kim, Tae Ho Kim, Sang Geun Yun, Chang Soo Woo
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Publication number: 20120100726Abstract: A method of forming silicon oxide includes depositing a silicon nitride-comprising material over a substrate. The silicon nitride-comprising material has an elevationally outermost silicon nitride-comprising surface. Such surface is treated with a fluid that is at least 99.5% H2O by volume. A polysilazane-comprising spin-on dielectric material is formed onto the H2O-treated silicon nitride-comprising surface. The polysilazane-comprising spin-on dielectric material is oxidized to form silicon oxide. Other implementations are contemplated.Type: ApplicationFiled: December 28, 2011Publication date: April 26, 2012Inventors: Yunjun Ho, Brent Gilgen
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Patent number: 8143174Abstract: A method for providing a dielectric film having enhanced adhesion and stability. The method includes a post deposition treatment that densifies the film in a reducing atmosphere to enhance stability if the film is to be cured ex-situ. The densification generally takes place in a reducing environment while heating the substrate. The densification treatment is particularly suitable for silicon-oxygen-carbon low dielectric constant films that have been deposited at low temperature.Type: GrantFiled: January 11, 2008Date of Patent: March 27, 2012Assignee: Applied Materials, Inc.Inventors: Li-Qun Xia, Frederic Gaillard, Ellie Yieh, Tian H. Lim
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Patent number: 8124545Abstract: The invention includes methods in which one or more components of a carboxylic acid having an aqueous acidic dissociation constant of at least 1×10?6 are utilized during the etch of oxide (such as silicon dioxide or doped silicon dioxide). Two or more carboxylic acids can be utilized. Exemplary carboxylic acids include trichloroacetic acid, maleic acid, and citric acid.Type: GrantFiled: May 11, 2010Date of Patent: February 28, 2012Assignee: Micron Technology, Inc.Inventors: Niraj B. Rana, Kevin R. Shea, Janos Fucsko
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Patent number: 8097932Abstract: A method for fabricating a SiCOH dielectric material comprising Si, C, O and H atoms from a single organosilicon precursor with a built-in organic porogen is provided. The single organosilicon precursor with a built-in organic porogen is selected from silane (SiH4) derivatives having the molecular formula SiRR1R2R3, disiloxane derivatives having the molecular formula R4R5R6—Si—O—Si—R7R8R9, and trisiloxane derivatives having the molecular formula R10R11R12—Si—O—Si—R13R14—O—Si—R15R16R17 where R and R1-17 may or may not be identical and are selected from H, alkyl, alkoxy, epoxy, phenyl, vinyl, allyl, alkenyl or alkynyl groups that may be linear, branched, cyclic, polycyclic and may be functionalized with oxygen, nitrogen or fluorine containing substituents. In addition to the method, the present application also provides SiCOH dielectrics made from the inventive method as well as electronic structures that contain the same.Type: GrantFiled: February 13, 2009Date of Patent: January 17, 2012Assignee: International Business Machines CorporationInventors: Son Van Nguyen, Stephen McConnell Gates, Deborah A. Neumayer, Alfred Grill
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Patent number: 8076251Abstract: Provided is a method of manufacturing a semiconductor device. The method includes: loading a substrate into a process vessel; performing a process to form an oxide, nitride, or oxynitride film on the substrate by alternately repeating: (a) forming a layer containing an element on the substrate by supplying and exhausting first and second source gases containing the element into and from the process vessel; and (b) changing the layer containing the element into an oxide, nitride, or oxynitride layer by supplying and exhausting reaction gas different from the first and second source gases into and from the process vessel; and unloading the substrate from the process vessel. The first source gas is more reactive than the second source gas, and an amount of the first source gas supplied into the process vessel is set to be less than that of the second source gas supplied into the process vessel.Type: GrantFiled: September 29, 2010Date of Patent: December 13, 2011Assignee: Hitachi Kokusai Electric, Inc.Inventors: Naonori Akae, Yoshiro Hirose, Yushin Takasawa, Yosuke Ota, Ryota Sasajima
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Patent number: 8034723Abstract: A film deposition apparatus for depositing a film on a substrate by performing a cycle of alternately supplying at least two kinds of reaction gases that react with each other on the substrate to produce a layer of a reaction product in a vacuum chamber is disclosed. The film deposition apparatus includes a ring-shaped locking member that may be provided in or around a wafer receiving portion of a turntable in which the substrate is placed, in order to keep the substrate in the substrate receiving portion.Type: GrantFiled: December 21, 2010Date of Patent: October 11, 2011Assignee: Tokyo Electron LimitedInventors: Yukio Ohizumi, Manabu Honma
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Patent number: 8034727Abstract: A semiconductor device manufacturing method according to the present invention uses a first raw material gas containing Si, a second raw material gas containing a metal element M and an oxidation gas, in which a first step of supplying the oxidation gas onto a substrate to be treated, and a second step of supplying the first raw material gas are sequentially performed. The method further includes, after the first and second steps, a step of supplying the second raw material gas or gas mixture of the first raw material gas and the second raw material gas.Type: GrantFiled: October 13, 2006Date of Patent: October 11, 2011Assignee: NEC CorporationInventor: Takashi Nakagawa
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Patent number: 8030221Abstract: Hydrophobicity of a low dielectric constant film comprising a porous silica film is improved by applying a raw material for forming a porous silica film onto a substrate, and performing vapor-phase transport treatment to expose the substrate to an atmosphere of organic amine vapor to which no water is added. Simultaneously, reduction in a dielectric constant, reduction in leakage current, and improvement in mechanical strength are attained by controlling a pore diameter in a predetermined range.Type: GrantFiled: November 12, 2009Date of Patent: October 4, 2011Assignee: Elpida Memory, Inc.Inventors: Yoshinori Cho, Takamaro Kikkawa
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Publication number: 20110223774Abstract: Aspects of the disclosure pertain to methods of depositing dielectric layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS), ozone and molecular oxygen into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.Type: ApplicationFiled: August 13, 2010Publication date: September 15, 2011Applicant: Applied Materials, Inc.Inventors: Sasha Kweskin, Paul Edward Gee, Shankar Venkataraman, Kedar Sapre
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Patent number: 8008146Abstract: A method (that produces a structure) patterns at least two wires of semiconductor material such that a first wire of the wires has a larger perimeter than a second wire of the wires. The method performs an oxidation process simultaneously on the wires to form a first gate oxide on the first wire and a second gate oxide on the second wire. The first gate oxide is thicker than the second gate oxide. The method also forms gate conductors over the first gate oxide and the second gate oxide, forms sidewall spacers on the gate conductors, and dopes portions of the first wire and the second wire not covered by the sidewall spacers and the gate conductors to form source and drain regions within the first wire and the second wire.Type: GrantFiled: December 4, 2009Date of Patent: August 30, 2011Assignee: International Business Machines CorporationInventors: Sarunya Bangsaruntip, Andres Bryant, Guy Cohen, Jeffrey W. Sleight
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Patent number: 7999356Abstract: According to one aspect of the present invention, there is provided a composition for film formation, comprising a compound represented by general formula (I) or a hydrolyzed-dehydrocondensation product thereof: X13-mR1mSiR2SiR3nX23-n??(I) wherein R1 and R3 represent a hydrogen atom or a monovalent substituent; R2 represents a divalent group having an alicyclic structure with four carbon atoms or a derivative of the divalent group; X1 and X2 represent a hydrolysable group; and m and n are an integer of from 0 to 2.Type: GrantFiled: August 27, 2009Date of Patent: August 16, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Yasushi Nakasaki, Nobuhide Yamada, Miyoko Shimada, Hideshi Miyajima, Kei Watanabe
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Patent number: 7994069Abstract: To improve the mechanical strength of a wafer comprising a low-k dielectric layer, the low-k dielectric layer is formed so as to have certain regions of low dielectric constant and the remainder having a higher mechanical strength. The higher-strength regions may have a relatively-higher value of dielectric constant. Selective ultraviolet curing of a dielectric material can be performed so as to expel a porogen from the region(s) desired to have low dielectric constant. A photomask, hardmask, or opaque resist, patterned so as to define the region(s) to have lower dielectric constant, is used to shield the remainder of the dielectric material from the ultraviolet radiation. Alternatively, a layer of dielectric material can be blanket cured to lower its dielectric constant, then non-critical regions thereof can be selectively over-cured whereby to produce regions of increased mechanical strength.Type: GrantFiled: March 31, 2005Date of Patent: August 9, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Brad Smith, Cindy Goldberg, Robert E. Jones
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Patent number: 7972975Abstract: The invention relates to dielectric layers with a low dielectric constant, said layers being used to separate metallic interconnections especially during the production of integrated circuit boards (in the BEOL part of the circuit). According to the invention, the dielectric layer comprises SiC and/or SiOC, and is obtained from at least one precursor comprising at least one —Si—C<SUB>n</SUB>—Si chain where n=1.Type: GrantFiled: June 21, 2006Date of Patent: July 5, 2011Assignee: L'Air Liquide, Societe Anonyme pour l'Etude et l'Exploitation des Procedes Georges ClaudeInventor: Christian Dussarrat
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Patent number: 7973390Abstract: A modifier for lowering relative dielectric constant of a low dielectric constant film used in semiconductor devices, the modifier of the low dielectric constant film being characterized in that it contains as an effective component a silicon compound represented by formula (1) R3-nHnSiN3??(1) in which R is a C1-C4 alkyl group, and n is an integer from 0 to 3.Type: GrantFiled: July 11, 2007Date of Patent: July 5, 2011Assignee: Central Glass Company, LimitedInventors: Tsuyoshi Ogawa, Mitsuya Ohashi
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Patent number: 7964442Abstract: The present invention generally provides a method for forming a dielectric barrier with lowered dielectric constant, improved etching resistivity and good barrier property. One embodiment provides a method for processing a semiconductor substrate comprising flowing a precursor to a processing chamber, wherein the precursor comprises silicon-carbon bonds and carbon-carbon bonds, and generating a low density plasma of the precursor in the processing chamber to form a dielectric barrier film having carbon-carbon bonds on the semiconductor substrate, wherein the at least a portion of carbon-carbon bonds in the precursor is preserved in the low density plasma and incorporated in the dielectric barrier film.Type: GrantFiled: October 9, 2007Date of Patent: June 21, 2011Assignee: Applied Materials, Inc.Inventors: Huiwen Xu, Yijun Liu, Li-Qun Xia, Derek R. Witty, Hichem M'Saad
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Patent number: 7951729Abstract: A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device.Type: GrantFiled: February 12, 2010Date of Patent: May 31, 2011Assignee: NXP B.V.Inventors: Janos Farkas, Srdjan Kordic, Cindy Goldberg
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Patent number: 7943531Abstract: A method of depositing a silicon oxide layer over a substrate includes providing a substrate to a deposition chamber. A first silicon-containing precursor, a second silicon-containing precursor and a NH3 plasma are reacted to form a silicon oxide layer. The first silicon-containing precursor includes at least one of Si—H bond and Si—Si bond. The second silicon-containing precursor includes at least one Si—N bond. The deposited silicon oxide layer is annealed.Type: GrantFiled: October 22, 2007Date of Patent: May 17, 2011Assignee: Applied Materials, Inc.Inventors: Srinivas D. Nemani, Abhijit Basu Mallick, Ellie Y. Yieh
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Patent number: 7923383Abstract: This invention relates to a method of treating a semiconductor wafer and in particular, but not exclusively, to planarisation. The method consists of depositing a liquid short-chain polymer formed from a silicon containing bas or vapour. Subsequently water and OH are removed and the layer is stabilised.Type: GrantFiled: March 28, 2003Date of Patent: April 12, 2011Assignee: Tokyo Electron LimitedInventors: Knut Beekmann, Guy Patrick Tucker
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Patent number: 7923386Abstract: A method of forming a layer on a substrate in a chamber, wherein the substrate has at least one formed feature across its surface, is provided. The method includes exposing the substrate to a silicon-containing precursor in the presence of a plasma to deposit a layer, treating the deposited layer with a plasma, and repeating the exposing and treating until a desired thickness of the layer is obtained. The plasma may be generated from an oxygen-containing gas.Type: GrantFiled: September 16, 2009Date of Patent: April 12, 2011Assignee: Applied Materials, Inc.Inventors: Mihaela Balseanu, Mei-yee Shek, Li-Qun Xia, Hichem M'Saad
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Patent number: 7923385Abstract: Methods of preparing a carbon doped oxide (CDO) layers having a low dielectric constant are provided. The methods involve, for instance, providing a substrate to a deposition chamber and exposing it to one or multiple carbon-doped oxide precursors having molecules with at least one carbon-carbon triple bond, or carbon-carbon double bond, or a combination of these groups and depositing the carbon doped oxide dielectric layer under conditions in which the resulting dielectric layer has a dielectric constant of not greater than about 2.7. Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon double or triple bonds. In other cases, one or both of the structure former precursor and porogen precursor has one or more bulky organic groups.Type: GrantFiled: June 5, 2009Date of Patent: April 12, 2011Assignee: Novellus Systems, Inc.Inventors: Qingguo Wu, Haiying Fu
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Patent number: 7915180Abstract: A method of fabricating a dielectric material that has an ultra low dielectric constant (or ultra low k) using at least one organosilicon precursor is described. The organosilicon precursor employed in the present invention includes a molecule containing both an Si—O structure and a sacrificial organic group, as a leaving group. The use of an organosilicon precursor containing a molecular scale sacrificial leaving group enables control of the pore size at the nanometer scale, control of the compositional and structural uniformity and simplifies the manufacturing process. Moreover, fabrication of a dielectric film from a single precursor enables better control of the final porosity in the film and a narrower pore size distribution resulting in better mechanical properties at the same value of dielectric constant.Type: GrantFiled: April 17, 2009Date of Patent: March 29, 2011Assignee: International Business Machines CorporationInventors: Stephen M. Gates, Alfred Grill, Robert D. Miller, Deborah A. Neumayer, Son Nguyen
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Patent number: 7915126Abstract: Some embodiments include methods of utilizing polysilazane in forming non-volatile memory cells. The memory cells may be multi-level cells (MLCs). The polysilazane may be converted to silicon nitride, silicon dioxide, or silicon oxynitride with thermal processing and exposure to an ambient that contains one or both of oxygen and nitrogen. The methods may include using the polysilazane in forming a charge trapping layer of a non-volatile memory cell. The methods may alternatively, or additionally include using the polysilazane in forming intergate dielectric material of a non-volatile memory cell. Some embodiments include methods of forming memory cells of a NAND memory array.Type: GrantFiled: February 14, 2007Date of Patent: March 29, 2011Assignee: Micron Technology, Inc.Inventor: Ronald A. Weimer
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Patent number: 7915181Abstract: Methods of repairing voids in a material are described herein that include: a) providing a material having a plurality of reactive silanol groups; b) providing at least one reactive surface modification agent; and c) chemically capping at least some of the plurality of reactive silanol groups with the at least one of the reactive surface modification agents. Methods of carbon restoration in a material are also described that include: a) providing a carbon-deficient material having a plurality of reactive silanol groups; b) providing at least one reactive surface modification agent; and c)chemically capping at least some of the plurality of reactive silanol groups with the at least one of the reactive surface modification agents.Type: GrantFiled: January 26, 2004Date of Patent: March 29, 2011Assignee: Honeywell International Inc.Inventors: Wenya Fan, Victor Lu, Michael Thomas, Brian Daniels, Tiffany Nguyen, De-Ling Zhou, Ananth Naman, Lei Jin, Anil Bhanap
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Patent number: 7902084Abstract: Embodiments disclosed herein pertain to silicon dioxide deposition methods using at least ozone and tetraethylorthosilicate (TEOS) as deposition precursors. In one embodiment, a silicon dioxide deposition method using at least ozone and TEOS as deposition precursors includes flowing precursors comprising ozone and TEOS to a substrate under subatmospheric pressure conditions effective to deposit silicon dioxide-comprising material having an outer surface onto the substrate. The outer surface is treated effective to one of add hydroxyl to or remove hydroxyl from the outer surface in comparison to any hydroxyl presence on the outer surface prior to said treating. After the treating, precursors comprising ozone and TEOS are flowed to the substrate under subatmospheric pressure conditions effective to deposit silicon dioxide-comprising material onto the treated outer surface of the substrate. Other embodiments are contemplated.Type: GrantFiled: July 5, 2007Date of Patent: March 8, 2011Assignee: Micron Technology, Inc.Inventors: John Smythe, Gurtej S. Sandhu
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Patent number: 7897519Abstract: Disclosed is a composition for preparing an organic insulator, including an organic silane material, having a vinyl group, an acetylene group or an acryl group as a functional group for participating in a crosslinking reaction, a crosslinking agent, and a solvent for dissolving the above components. The organic insulator of example embodiments may be provided in the form of a solid insulating film, which may increase charge mobility while decreasing the threshold voltage and operating voltage of OTFTs, and which also may generate relatively slight hysteresis.Type: GrantFiled: June 11, 2007Date of Patent: March 1, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Eun Jeong Jeong, Joo Young Kim, Kyung Seok Son, Eun Kyung Lee, Sang Yoon Lee
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Patent number: 7892648Abstract: A low-k dielectric material with increased cohesive strength for use in electronic structures including interconnect and sensing structures is provided that includes atoms of Si, C, O, and H in which a fraction of the C atoms are bonded as Si—CH3 functional groups, and another fraction of the C atoms are bonded as Si—R—Si, wherein R is phenyl, —[CH2]n— where n is greater than or equal to 1, HC?CH, C?CH2, C?C or a [S]n linkage, where n is a defined above.Type: GrantFiled: January 21, 2005Date of Patent: February 22, 2011Assignee: International Business Machines CorporationInventors: Daniel C. Edelstein, Stephen M. Gates, Alfred Grill, Michael Lane, Robert D. Miller, Deborah A. Neumayer, Son Van Nguyen
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Patent number: 7893538Abstract: An insulating-film-forming composition for a semiconductor device comprising an organic silica sol with a carbon atom content of 11 to 17 atom % and an organic solvent is disclosed. The organic silica sol comprises a hydrolysis-condensation product P1 and a hydrolysis-condensation product P2. The hydrolysis-condensation product P1 is obtained by hydrolyzing and condensing (A) a silane monomer comprising a hydrolyzable group and (B) a polycarbosilane comprising a hydrolyzable group in the presence of (C) a basic catalyst, and the hydrolysis-condensation product P2 is obtained by hydrolyzing and condensing (D) a silane monomer comprising a hydrolyzable group.Type: GrantFiled: January 31, 2007Date of Patent: February 22, 2011Assignee: JSR CorporationInventors: Hisashi Nakagawa, Tatsuya Yamanaka, Masahiro Akiyama, Terukazu Kokubo, Youhei Nobe
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Patent number: 7883986Abstract: This invention includes methods of forming trench isolation. In one implementation, isolation trenches are provided within a semiconductor substrate. A liquid is deposited and solidified within the isolation trenches to form a solidified dielectric within the isolation trenches. The dielectric comprises carbon and silicon, and can be considered as having an elevationally outer portion and an elevationally inner portion within the isolation trenches. At least one of carbon removal from and/or oxidation of the outer portion of the solidified dielectric occurs. After such, the dielectric outer portion is etched selective to and effective to expose the dielectric inner portion. After the etching, dielectric material is deposited over the dielectric inner portion to within the isolation trenches.Type: GrantFiled: October 1, 2009Date of Patent: February 8, 2011Assignee: Micron Technology, Inc.Inventor: Li Li
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Patent number: 7884032Abstract: A system, method and apparatus is capable of producing layers of various materials stacked on one another on a substrate without exposing the substrate to the pressure and contaminants of ambient air until the stack is complete. In one aspect, the stack of layers can include both an insulative layer of one or more insulative films, and a conductive metal layer of one or more conductive metal layer films. In another aspect, a bias signal of positive and negative voltage pulses may be applied to a target of a deposition chamber to facilitate deposition of the target material in a suitable fashion. In yet another aspect, one or more of the deposition chambers may have associated therewith a pump which combines a turbomolecular pump and a cryogenic pump to generate an ultra high vacuum in that chamber. Other features are described and claimed.Type: GrantFiled: October 28, 2005Date of Patent: February 8, 2011Assignee: Applied Materials, Inc.Inventors: Mengqi Ye, Peijun Ding, Hougong Wang, Zhendong Liu
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Patent number: 7858294Abstract: Silica dielectric films, whether nanoporous foamed silica dielectrics or nonporous silica dielectrics are readily damaged by fabrication methods and reagents that reduce or remove hydrophobic properties from the dielectric surface. The invention provides for methods of imparting hydrophobic properties to such damaged silica dielectric films present on a substrate. The invention also provides plasma-based methods for imparting hydrophobicity to both new and damaged silica dielectric films. Semiconductor devices prepared by the inventive processes are also provided.Type: GrantFiled: April 5, 2007Date of Patent: December 28, 2010Assignee: Honeywell International Inc.Inventors: Nigel P. Hacker, Michael Thomas, James S. Drage
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Patent number: 7858536Abstract: A semiconductor device comprising a semiconductor substrate, a gate dielectrics formed on the semiconductor substrate and including a silicon oxide film containing a metallic element, the silicon oxide film containing the metallic element including a first region near a lower surface thereof, a second region near an upper surface thereof, and a third region between the first and second regions, the metallic element contained in the silicon oxide film having a density distribution in a thickness direction of the silicon oxide film, a peak of the density distribution existing in the third region, and an electrode formed on the gate dielectrics.Type: GrantFiled: September 20, 2007Date of Patent: December 28, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Kazuhiro Eguchi, Seiji Inumiya, Yoshitaka Tsunashima
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Patent number: 7855154Abstract: A cap layer that enables a photopatternable, spin-on material to be used in the formation of semiconductor device structures at wavelengths that were previously unusable. The photopatternable, spin-on material is applied as a layer to a semiconductor substrate. The cap layer and a photoresist layer are each formed over the photopatternable layer. The cap layer absorbs or reflects radiation and protects the photopatternable layer from a first wavelength of radiation used in patterning the photoresist layer. The photopatternable, spin-on material is convertible to a silicon dioxide-based material upon exposure to a second wavelength of radiation.Type: GrantFiled: March 29, 2006Date of Patent: December 21, 2010Assignee: Micron Technology, Inc.Inventors: Weimin Li, Gurtej S. Sandhu
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Patent number: 7851385Abstract: The present invention generally provides apparatus and method for processing a semiconductor substrate. Particularly, embodiments of the present invention relate to a method and apparatus for forming semiconductor devices having a conformal silicon oxide layer formed at low temperature. One embodiment of the present invention provides a method for forming a semiconductor gate structure. The method comprises forming a gate stack on a semiconductor substrate, forming a conformal silicon oxide layer on the semiconductor substrate using a low temperature cyclic method, and forming a spacer layer on the conformal silicon oxide layer.Type: GrantFiled: September 30, 2008Date of Patent: December 14, 2010Assignee: Applied Materials, Inc.Inventors: Matthew Spuller, Melody Agustin, Meiyee (Maggie Le) Shek, Li-Qun Xia, Reza Arghavani
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Publication number: 20100283118Abstract: A method for manufacturing a SeOI substrate that includes a thin working layer made from one or more semiconductor material(s); a support layer; and a thin buried oxide layer between the working layer and the support layer. The method includes a manufacturing step of an intermediate SeOI substrate having a buried oxide layer with a thickness greater than a thickness desired for the thin buried oxide layer; and a dissolution step of the buried oxide layer in order to form therewith the thin buried oxide layer. After the dissolution step, an oxidation step of the substrate is conducted for creating an oxidized layer on the substrate, and an oxide migration step for diffusing at least a part of the oxide layer through the working layer in order to increase the electrical interface quality of the substrate and decrease its Dit value.Type: ApplicationFiled: February 20, 2008Publication date: November 11, 2010Applicant: S.O.I.TEC SILICON ON INSULATION TECHNOLOGIESInventors: Oleg Kononchuk, George K. Celler
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Patent number: 7825044Abstract: Methods of curing a silicon oxide layer on a substrate are provided. The methods may include the processes of providing a semiconductor processing chamber and a substrate and forming an silicon oxide layer filling a portion of a trench on the substrate, the silicon oxide layer including carbon species as a byproduct of formation. The methods also include introducing an acidic vapor into the semiconductor processing chamber, the acidic vapor reacting with the silicon oxide layer to remove the carbon species from the silicon oxide layer. The methods may further include depositing additional silicon oxide over the cured silicon oxide to fill the trench. The methods may also include removing the acidic vapor from the semiconductor processing chamber.Type: GrantFiled: June 17, 2010Date of Patent: November 2, 2010Assignee: Applied Materials, Inc.Inventors: Abhijit Basu Mallick, Srinivas D. Nemani, Timothy W. Weidman
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Patent number: 7816280Abstract: A method of forming a multi-layered insulation film includes forming a first insulation layer using a first feed gas, the first insulation layer including methyl silsesquioxane (MSQ), forming a second insulation layer using a second feed gas, the second insulation layer including a polysiloxane compound having an Si—H group such that the second insulation layer is in contact with a top of the first insulation layer, and forming a third insulation layer including an inorganic material such that the third insulation layer is in contact with a top of the second insulation layer.Type: GrantFiled: January 15, 2009Date of Patent: October 19, 2010Assignee: NEC Electronics CorporationInventor: Tatsuya Usami
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Patent number: 7803721Abstract: A semiconductor device includes a deposited-type insulating film disposed on a substrate; a coating-type insulating film disposed on a surface of the deposited-type insulating film and having a film density which is lower than a film density of the deposited-type insulating film; and an intermediate insulating film disposed between the deposited-type insulating film and the coating-type insulating film and having a film density which is intermediate between the film density of the deposited-type insulating film and the film density of the coating-type insulating film.Type: GrantFiled: March 14, 2007Date of Patent: September 28, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Kazuaki Iwasawa
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Patent number: 7803719Abstract: A material for passivating a dielectric layer in a semiconductor device has a molecular structure permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. The contemplated material may be constituted by multiple organic components. A semiconductor device including a layer of the passivating coupling material, and a method of manufacturing such a semiconductor device are also contemplated.Type: GrantFiled: February 24, 2006Date of Patent: September 28, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Janos Farkas, Maria Luisa Calvo-Munoz, Srdjan Kordic
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Patent number: 7799705Abstract: Methods of preparing a low stress porous low-k dielectric material on a substrate are provided. The methods involve the use of a structure former precursor and/or porogen precursor with one or more organic functional groups. In some cases, the structure former precursor has carbon-carbon double or triple bonds. In other cases, one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. In other cases, the structure former precursor has carbon-carbon double or triple bonds and one or both of the structure former precursor and porogen precursor has one or more bulky organic groups. Once the precursor film is formed, the porogen is removed, leaving a porous low-k dielectric matrix with high mechanical strength. Different types of structure former precursors and porogen precursors are described. The resulting low stress low-k porous film may be used as a low-k dielectric film in integrated circuit manufacturing applications.Type: GrantFiled: January 5, 2009Date of Patent: September 21, 2010Assignee: Novellus Systems, Inc.Inventors: Qingguo Wu, Haiying Fu, David C. Smith, David Mordo
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Publication number: 20100233886Abstract: Described herein are methods of forming dielectric films comprising silicon, such as, but not limited to, silicon oxide, silicon oxycarbide, silicon carbide, and combinations thereof, that exhibit at least one of the following characteristics: low wet etch resistance, a dielectric constant of 6.0 or below, and/or can withstand a high temperature rapid thermal anneal process. Also disclosed herein are the methods to form dielectric films or coatings on an object to be processed, such as, for example, a semiconductor wafer.Type: ApplicationFiled: March 4, 2010Publication date: September 16, 2010Applicant: AIR PRODUCTS AND CHEMICALS, INC.Inventors: Liu Yang, Manchao Xiao, Kirk Scott Cuthill, Bing Han, Mark Leonard O'Neill