Organic Reactant Patents (Class 438/790)
  • Patent number: 7098061
    Abstract: A method for forming an electronic device, comprising: forming a first conductive or semiconductive layer; forming a sequence of at least on insulating layer and at least one semiconducting layer over the first conductive or semiconductive layer; locally depositing solvents at a localised region of the insulating layer so as to dissolve the sequence of insulating and semiconducting layers in the region to leave a void extending through the sequence of layer; and depositing conductive or semiconductive material in the void.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: August 29, 2006
    Assignee: Plastic Logic Limited
    Inventors: Henning Sirringhaus, Richard Henry Friend, Takeo Kawase
  • Patent number: 7094442
    Abstract: A method is provided for forming an amorphous carbon layer, deposited on a dielectric material such as oxide, nitride, silicon carbide, carbon doped oxide, etc., or a metal layer such as tungsten, aluminum or poly-silicon. The method includes the use of chamber seasoning, variable thickness of seasoning film, wider spacing, variable process gas flows, post-deposition purge with inert gas, and post-deposition plasma purge, among others, to make the deposition of an amorphous carbon film at low deposition temperatures possible without any defects or particle contamination.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: August 22, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Martin Jay Seamons, Wendy H. Yeh, Sudha S. R. Rathi, Heraldo L. Botelho
  • Patent number: 7094709
    Abstract: The present invention relates to metal oxide coating materials that can be used as thin film thin film coatings on various substrate surfaces. The invention also concerns a method of making metal oxide material which are stable in aqueous phase and that can be deposited on a substrate by liquid phase deposition, such as spin-on deposition. The new materials can be patterned lithographically or non-lithographically and are applicable for building up various electronic and opto-electronic device structures, such as anti-reflection layers, high-k interlayer and gate oxide structures for ICs, etch stop layer, CMP stop layer, solar cells, OLEDs packaging, optical thin film filters, optical diffractive grating applications and hybrid thin film diffractive grating structures.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: August 22, 2006
    Assignee: Braggone Oy
    Inventor: Ari Kärkkäinen
  • Patent number: 7084080
    Abstract: A method of synthesizing an aminosilane source reagent composition, by reacting an aminosilane precursor compound with an amine source reagent compound in a solvent medium comprising at least one activating solvent component, to yield an aminosilane source reagent composition having less than 1000 ppm halogen.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: August 1, 2006
    Assignee: Advanced Technology Materials, Inc.
    Inventors: Alexander S. Borovik, Ziyun Wang, Chongying Xu, Thomas H. Baum, Brian L. Benac
  • Patent number: 7074690
    Abstract: Methods for selectively depositing a solid material on a substrate having gaps of dimension on the order of about 100 nm or less are disclosed. The methods involve exposing the substrate to a precursor of a solid material, such that the precursor forms liquid regions in at least some of the gaps, followed by exposing the substrate to conditions that evaporate the liquid precursor from regions outside the gaps but maintain at least some of the liquid regions in the gaps. The liquid precursor remaining in the gaps is then converted to solid material, thereby selectively filling the gaps with the material.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: July 11, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Vishal Gauri, Raashina Humayun
  • Patent number: 7067442
    Abstract: A method of fabricating an integrated circuit having reduced threshold voltage shift is provided. A nonconducting region is formed on the semiconductor substrate and active regions are formed on the semiconductor substrate. The active regions are separated by the nonconducting region. A barrier layer and a dielectric layer are deposited over the nonconducting region and over the active regions. Heat is applied to the integrated circuit causing the barrier layer to anneal.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: June 27, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Randhir P. S. Thakur, Ravi Iyer, Howard Rhodes
  • Patent number: 7067441
    Abstract: A process for removing resist (114) from a CDO dielectric material (110) that uses a non-damaging plasma in a reducing atmosphere under high power and using a structure (150) or other means to limit ions from the plasma from reaching the surface of the CDO material (110).
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: June 27, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Patricia B. Smith, Phillip D. Matz
  • Patent number: 7064088
    Abstract: A hard film is formed on an insulation film formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and optionally an additive gas such as alcohol to a reaction space of a plasma CVD apparatus, and applying low-frequency RF power and high-frequency RF power. The silicon-containing hydrocarbon compound includes a cyclic Si-containing hydrocarbon compound and/or a linear Si-containing hydrocarbon compound, as a basal structure, with reactive groups for form oligomers using the basal structure. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a low dielectric constant.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: June 20, 2006
    Assignee: ASM Japan K.K.
    Inventors: Yasuyoshi Hyodo, Atsuki Fukazawa, Yoshinori Morisada, Masashi Yamaguchi, Nobuo Matsuki
  • Patent number: 7060323
    Abstract: A material containing, as a main component, an organic silicon compound represented by the following general formula: R1xSi(OR2)4-x (where R1 is a phenyl group or a vinyl group; R2 is an alkyl group; and x is an integer of 1 to 3) is caused to undergo plasma polymerization or react with an oxidizing agent to form an interlayer insulating film composed of a silicon oxide film containing an organic component. As the organic silicon compound where R1 is a phenyl group, there can be listed phenyltrimethoxysilane or diphenyldimethoxysilane. As the organic silicon compound where R1 is a vinyl group, there can be listed vinyltrimethoxysilane or divinyldimethoxysilane.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: June 13, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Gaku Sugahara, Nobuo Aoi, Koji Arai, Kazuyuki Sawada
  • Patent number: 7056839
    Abstract: The invention provides an insulator having a main component of silicon dioxide, wherein the insulator includes at least one kind of organic polymer such as benzene nucleuses distributed therein in order to reduce a dielectric constant thereof as well as a method of forming the same.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: June 6, 2006
    Assignee: NEC Corporation
    Inventor: Kazuhiko Endo
  • Patent number: 7049249
    Abstract: A method is provided for processing a substrate including providing a processing gas comprising hydrogen gas and an organosilicon compound comprising a phenyl group to the processing chamber, and reacting the processing gas to deposit a low k silicon carbide barrier layer useful as a barrier layer in damascene or dual damascene applications with low k dielectric materials.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: May 23, 2006
    Assignee: Applied Materials
    Inventors: Lihua Li, Tzu-Fang Huang, Li-Qun Xia
  • Patent number: 7049200
    Abstract: A method of forming a sidewall spacer on a gate electrode of a metal oxide semiconductor device that includes striking a first plasma to form an oxide layer on a side of the gate electrode, where the first plasma is generated from a oxide gas that includes O3 and bis-(tertiarybutylamine)silane, and striking a second plasma to form a carbon-doped nitride layer on the oxide layer, where the second plasma may be generated from a nitride gas that includes NH3 and the bis-(tertiarybutylamine)silane. The first and second plasmas may be formed using plasma CVD and the bis-(tertiarybutylamine)silane flows uninterrupted between the striking of the first plasma and the striking of the second plasma.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: May 23, 2006
    Assignee: Applied Materials Inc.
    Inventors: Reza Arghavani, Ken MacWilliams, Hichem M'Saad
  • Patent number: 7037859
    Abstract: Embodiments of the present invention provide methods, apparatuses, and devices related to chemical vapor deposition of silicon oxide. In one embodiment, a single-step deposition process is used to efficiently form a silicon oxide layer exhibiting high conformality and favorable gap-filling properties. During a pre-deposition gas flow stabilization phase and an initial deposition stage, a relatively low ratio of silicon-containing gas:oxidant deposition gas is flowed, resulting in formation of highly conformal silicon oxide at relatively slow rates. Over the course of the deposition process step, the ratio of silicon-containing gas:oxidant gas is increased, resulting in formation of less-conformal oxide material at relatively rapid rates during later stages of the deposition process step.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: May 2, 2006
    Assignee: Applied Material Inc.
    Inventors: Nitin K. Ingle, Xinyua Xia, Zheng Yuan
  • Patent number: 7026257
    Abstract: A method is used for forming a low relative permittivity dielectric film by a vacuum ultraviolet CVD. The film is a silicon organic film (e.g., SiOCH, SiC, SiCH, and SiOF films) that has a controlled relative permittivity and is formed at temperatures below 350° C. The method can control the content of carbon in the film to achieve a desired relative permittivity. A desired relative permittivity can be achieved by: {circle around (1)} controlling the type and flow rate of added gas (O2, N2O) that contains oxygen atoms; {circle around (2)} controlling the flow rate of TEOS; {circle around (3)} controlling the intensity of light emitted from the excimer lamp; {circle around (4)} elevating the temperatures of the synthetic quartz window and the gas flowing in the vacuum chamber, and controlling the distance between the synthetic quartz window and the wafer; and {circle around (5)} controlling the temperature of the wafer.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: April 11, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Kiyohiko Toshikawa, Yoshikazu Motoyama, Yousuke Motokawa, Yusuke Yagi, Junichi Miyano, Tetsurou Yokoyama, Yutaka Ichiki
  • Patent number: 7015144
    Abstract: Compositions that can be used in semiconductor manufacturing processes, comprising perhydro-polysilazane having a weight average molecular weight of about 300 to about 3,000 and a polydispersity index of about 1.8 to about 3.0 are provided. Solutions comprising the compositions of the present invention, methods of forming films in a semiconductor manufacturing process, and methods of manufacturing semiconductor devices are also provided.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: March 21, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eunkee Hong, Kyutae Na, Juseon Goo, Hong Gun Kim
  • Patent number: 7008882
    Abstract: A method for forming an adhesion between dielectric layers, it includes forming a first dielectric layer and forming a second dielectric layer having a first portion and a second portion. The first portion is on the first dielectric layer and the second portion is on the first portion. The first portion and second portion are formed by an in-situ method. The first portion has at least one of the following a dielectric constant, hardness or SiCH3/SiO area ratio, which is higher than the second portion. A structure of enhanced-inter-adhesion dielectric layers includes a first dielectric layer and a second dielectric layer having a first portion on the first dielectric layer, and a second portion on the first portion. Herein, the first portion has a dielectric constant around 2.8 to 3.5 higher than second portion.
    Type: Grant
    Filed: November 28, 2003
    Date of Patent: March 7, 2006
    Assignee: United Microelectronics Corp.
    Inventor: Hsin-Chang Wu
  • Patent number: 7008885
    Abstract: A method is disclosed for removing liquids from a semiconductor substrate by contacting the liquid on the substrate with a liquid which attracts the liquid on the substrate, separating the liquids from the substrate, and inducing a phase transition in a layer on the substrate. In particular, the method is applicable to removing water from a water-containing layer on the substrate by contacting the layer with a hygroscopic liquid. Trenches on a substrate can be isolated by filling the trenches with a water-containing gel formed by reacting silane and hydrogen peroxide. The gel is contacted with sulfuric acid to remove a portion of the water from the gel before annealing to form silica in the trenches. Unlike filled trenches formed by conventional technology, there are no voids in the bottom of the trenches. The method is also applicable to forming dielectric layers which cover metal lines, low-dielectric layers, and interlayer dielectric layers.
    Type: Grant
    Filed: August 6, 2004
    Date of Patent: March 7, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Li Li, Weimin Li
  • Patent number: 7001844
    Abstract: Stress level of a nitride film is adjusted as a function of two or more of the following: identity of a starting material precursor used to make the nitride film; identity of a nitrogen-containing precursor with which is treated the starting material precursor; ratio of the starting material precursor to the nitrogen-containing precursor; a set of CVD conditions under which the film is grown; and/or a thickness to which the film is grown. A rapid thermal chemical vapor deposition (RTCVD) film produced by reacting a compound containing silicon, nitrogen and carbon (such as bis-tertiary butyl amino silane (BTBAS)) with NH3 can provide advantageous properties, such as high stress and excellent performance in an etch-stop application. An ammonia-treated BTBAS film is particularly excellent in providing a high-stress property, and further having maintainability of that high-stress property over repeated annealing.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: February 21, 2006
    Assignee: International Business Machines Corporation
    Inventors: Ashima B. Chakravarti, Shreesh Narasimha, Victor Chan, Judson Holt, Satya N. Chakravarti
  • Patent number: 6974780
    Abstract: The invention provides semiconductor processing methods of depositing SiO2 on a substrate. In a preferred aspect, the invention provides methods of reducing the formation of undesired reaction intermediates in a chemical vapor deposition (CVD) decomposition reaction. In one implementation, the method is performed by feeding at least one of H2O and H2O2 into a reactor with an organic silicon precursor. For example, in one exemplary implementation, such components are, in gaseous form, fed separately into the reactor. In another exemplary implementation, such components are combined in liquid form prior to introduction into the reactor, and thereafter rendered into a gaseous form for provision into the reactor. The invention can be practiced with or in both hot wall and cold wall CVD systems.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: December 13, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Klaus F. Schuegraf
  • Patent number: 6969690
    Abstract: Methods and apparatus are described for patterned deposition of nanostructure-containing materials by self-assembly and related articles. According to an exemplary embodiment self-assembly method for depositing nanostructure-containing materials includes forming a nanostructure-containing material. The nanostructure-containing material is chemically functionalized and dispersed in a liquid medium to form a suspension. At least a portion of a substrate having a surface that can attract the functionalized nanostructure-containing material is brought into contact with the suspension. The substrate is separated from the suspension. The nanostructure-containing material adheres to the portion of the substrate when separated from the suspension. According to another exemplary embodiment, hydrophilic and hydrophobic regions are formed on the surface of the substrate before bringing the substrate into contact with the suspension.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: November 29, 2005
    Assignee: The University of North Carolina at Chapel Hill
    Inventors: Otto Z. Zhou, Soojin Oh, Jian Zhang, Yuan Cheng, Hideo Shimoda
  • Patent number: 6964890
    Abstract: Thin-film semiconductor devices such as TFTs (thin-film transistors) and methods of fabricating the same. TFTs are formed on an insulating substrate. First, a substantially amorphous semiconductor coating is formed on the substrate. A protective coating transparent to laser radiation is formed on the semiconductor coating. The laminate is irradiated with laser radiation to improve the crystallinity of the semiconductor coating. Then, the protective coating is removed to expose the surface of the semiconductive coating. A coating for forming a gate-insulating film is formed. Subsequently, gate electrodes are formed. Another method relates to fabrication of semiconductor devices such as TFTs on an insulating substrate. After forming a first coating consisting mainly of aluminum nitride, a second coating consisting principally of silicon oxide is formed. Semiconductor devices such as TFTs or semiconductor circuits are built on the second coating serving as a base layer.
    Type: Grant
    Filed: February 23, 1999
    Date of Patent: November 15, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hongyong Zhang, Yasuhiko Takemura
  • Patent number: 6953731
    Abstract: A method of fabrication a semiconductor device includes the steps of forming an insulation film containing Si and oxygen on a silicon substrate, and depositing a metal oxide film on the insulation film by a chemical vapor deposition process that uses a metal organic source material, wherein the step of depositing the metal oxide film is conducted such that the metal oxide film takes a crystalline state immediately after the deposition step.
    Type: Grant
    Filed: June 10, 2003
    Date of Patent: October 11, 2005
    Assignee: Tokyo Electron Limited
    Inventors: Hiroshi Shinriki, Kazumi Kubo
  • Patent number: 6939792
    Abstract: In one embodiment, a method of fabricating an integrated circuit includes forming a low-k dielectric layer over metal lines, forming an adhesion layer over the low-k dielectric layer, and forming a capping layer over the adhesion layer. The low-k dielectric may comprise SiLK™ dielectric material, while the capping layer may comprise TEOS. The resulting stack of dielectric materials may be employed in a passivation level to protect the metal lines. For example, a topside layer may be formed over the capping layer.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: September 6, 2005
    Assignee: Cypress Semiconductor Corporation
    Inventors: Maryam Jahangiri, Mira Ben-Tzur
  • Patent number: 6939817
    Abstract: A method of removing residual carbon deposits from a flowable, insulative material. The flowable, insulative material comprises silicon, carbon, and hydrogen and is a flowable oxide material or a spin-on, flowable oxide material. The residual carbon deposits are removed from the flowable, insulative material by exposing the material to ozone. The flowable, insulative material is used to form an insulative layer in a trench located on a semiconductor substrate.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: September 6, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Li Li
  • Patent number: 6936551
    Abstract: One embodiment of the present invention is a method for fabricating a low-k dielectric film that includes steps of: (a) chemical vapor depositing a lower-k dielectric film; and (b) e-beam treating the lower-k dielectric film.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: August 30, 2005
    Assignee: Applied Materials Inc.
    Inventors: Farhad Moghadam, Jun Zhao, Timothy Weidman, Rick J. Roberts, Li-Qun Xia, Alexandros T. Demos
  • Patent number: 6930062
    Abstract: A method of forming an oxide layer on a semiconductor substrate includes thermally oxidizing a surface of the substrate to form an oxide layer on the substrate, and then exposing the oxide layer to an ambient including predominantly oxygen radicals to thereby thicken the oxide layer. Related methods of fabricating a recessed gate transistor are also discussed.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: August 16, 2005
    Assignee: Samsung Electronics Co., Inc.
    Inventors: Sang-Jin Hyun, Yu-Gyun Shin, Bon-Young Koo, Sug-Hun Hong, Taek-Soo Jeon, Jeong-do Ryu
  • Patent number: 6930061
    Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10 W to about 200 W or a pulsed RF power level from about 20 W to about 500 W. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: August 16, 2005
    Assignee: Applied Materials Inc.
    Inventors: David Cheung, Wai-Fan Yau, Robert P. Mandal, Shin-Puu Jeng, Kuo-Wei Liu, Yung-Cheng Lu, Michael Barnes, Ralf B. Willecke, Farhad Moghadam, Tetsuya Ishikawa, Tze Wing Poon
  • Patent number: 6927178
    Abstract: Methods are provided for depositing a dielectric material. The dielectric material may be used for an anti-reflective coating or as a hardmask. In one aspect, a method is provided for processing a substrate including introducing a processing gas comprising a silane-based compound and an oxygen and carbon containing compound to the processing chamber and reacting the processing gas to deposit a nitrogen-free dielectric material on the substrate. The dielectric material comprises silicon and oxygen. In another aspect, the dielectric material forms one or both layers in a dual layer anti-reflective coating.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: August 9, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Bok Hoen Kim, Sudha Rathi, Sang H. Ahn, Christopher D. Bencher, Yuxiang May Wang, Hichem M'Saad, Mario D. Silvetti, Miguel Fung, Keebum Jung, Lei Zhu
  • Patent number: 6919270
    Abstract: A method for forming a silicon carbide film on a semiconductor substrate by plasma CVD includes (a) introducing a raw material gas containing silicon, carbon, and hydrogen and an inert gas into a reaction chamber at a predetermined mixture ratio of the raw material gas to the inert gas; (b) applying radio-frequency power at the mixture ratio, thereby forming a curable silicon carbide film having a dielectric constant of about 4.0 or higher; and (c) continuously applying radio-frequency power at a mixture ratio which is reduced from that in step (b), thereby curing the silicon carbide film to give a dielectric constant lower than that of the curable silicon carbide film.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: July 19, 2005
    Assignee: ASM Japan K.K.
    Inventors: Kiyoshi Satoh, Kamal Kishore Goundar
  • Patent number: 6914014
    Abstract: A method for depositing a low dielectric constant film on a substrate. The method includes depositing a low dielectric constant film comprising silicon, carbon, oxygen and hydrogen on the substrate disposed in a chemical vapor deposition chamber, introducing a gas mixture comprising a hydrogen-containing gas to the chemical vapor deposition chamber, forming a plasma of the gas mixture proximate the low dielectric constant film using a radio frequency power, and applying a direct current bias to at least one of the substrate or a gas distribution plate to cure the low dielectric constant film.
    Type: Grant
    Filed: January 13, 2003
    Date of Patent: July 5, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Lihua Li, Tzu-Fang Huang, Li-Qun Xia, Juan Carlos Rocha-Alvarez, Maosheng Zhao
  • Patent number: 6905940
    Abstract: Embodiments of the present invention provide methods, apparatuses, and devices related to chemical vapor deposition of silicon oxide. In one embodiment, a single-step deposition process is used to efficiently form a silicon oxide layer exhibiting high conformality and favorable gap-filling properties. During a pre-deposition gas flow stabilization phase and an initial deposition stage, a relatively low ratio of silicon-containing gas:oxidant deposition gas is flowed, resulting in formation of highly conformal silicon oxide at relatively slow rates. Over the course of the deposition process step, the ratio of silicon-containing gas:oxidant gas is increased, resulting in formation of less-conformal oxide material at relatively rapid rates during later stages of the deposition process step.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: June 14, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Nitin K. Ingle, Xinyua Xia, Zheng Yuan
  • Patent number: 6897163
    Abstract: A method for depositing a low dielectric constant film is provided. The low dielectric constant film includes at least one silicon oxycarbide layer and at least one substantially silicon-free layer comprising carbon and hydrogen. The layers are deposited from a gas mixture including an organosilicon compound and a silicon-free hydrocarbon-based compound. The low dielectric constant film is deposited by a plasma process than includes pulses of RF power.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: May 24, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Frederic Gaillard, Srinivas D. Nemani
  • Patent number: 6881683
    Abstract: An insulation film is formed on a semiconductor substrate by vaporizing a silicon-containing hydrocarbon compound to provide a source gas, introducing a reaction gas composed of the source gas and an additive gas such as an inert gas and oxidizing gas to a reaction space of a plasma CVD apparatus. The silicon-containing hydrocarbon compound includes a cyclosiloxan compound or a linear siloxan compound, as a basal structure, with reactive groups for form oligomers using the basal structure. The residence time of the reaction gas in the reaction space is lengthened by reducing the total flow of the reaction gas in such a way as to form a siloxan polymer film with a low dielectric constant.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: April 19, 2005
    Assignee: ASM Japan K.K.
    Inventors: Nobuo Matsuki, Yasuyoshi Hyodo, Masashi Yamaguchi, Yoshinori Morisada, Atsuki Fukazawa, Manabu Kato, Shinya Kaneko, Devendra Kumar, Seijiro Umemoto
  • Patent number: 6875687
    Abstract: Specific embodiments of the invention provide a silicon-carbide-type or silicon oxycarbide (also often called carbon-doped-oxide [CDO] or organosilicate glass) capping material and method for depositing this capping material on ELK films which are used as a dielectric material in integrated circuits. The ELK film may include any ELK film including but not limited to inorganic, organic and hybrid dielectric materials and their respective porous versions. The silicon-carbide-type material may be an amorphous silicon carbide type material such as the commercially available BLOk™ material, or a carbon-doped oxide material such as the commercially available Black Diamond™ both of which are developed by Applied Materials of Santa Clara, Calif. The amorphous silicon carbide (a-SiC) material is deposited using a plasma process in a non-oxidizing environment and the CDO-type material is deposited using an oxygen-starved plasma process.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: April 5, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Timothy Weidman, Michael P Nault, Josephine J Chang
  • Patent number: 6869896
    Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas comprising carbon at a constant RF power level. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: March 22, 2005
    Assignee: Applied Materials, Inc.
    Inventors: David Cheung, Wai-Fan Yau, Robert P. Mandal, Shin-Puu Jeng, Kuo-Wei Liu, Yung-Cheng Lu, Michael Barnes, Ralf B. Willecke, Farhad Moghadam, Tetsuya Ishikawa, Tze Wing Poon
  • Patent number: 6853032
    Abstract: A process of forming a nitride film on a semiconductor substrate including exposing a surface of the substrate to a rapid thermal process to form the nitride film.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: February 8, 2005
    Assignee: International Business Machines Corporation
    Inventors: Arne W. Ballantine, Donna K. Johnson, Glen L. Miles
  • Patent number: 6852647
    Abstract: A method is provided for processing a substrate including removing amorphous carbon material disposed on a low k dielectric material with minimal or reduced defect formation and minimal dielectric constant change of the low k dielectric material. In one aspect, the invention provides a method for processing a substrate including depositing at least one dielectric layer on a substrate surface, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less, forming amorphous carbon material on the at least one dielectric layer, and removing the one or more amorphous carbon layers by exposing the one or more amorphous carbon layers to a plasma of a hydrogen-containing gas.
    Type: Grant
    Filed: March 7, 2003
    Date of Patent: February 8, 2005
    Assignee: Applied Materials, Inc.
    Inventor: Christopher Dennis Bencher
  • Patent number: 6852651
    Abstract: The present invention relates to a semiconductor device in which an interlayer insulating film having a low dielectric constant is formed by covering wiring primarily made of a copper film, and to a method of manufacturing the same. In manufacturing the semiconductor device an insulating film having a low dielectric constant is formed on a substrate by converting a film-forming gas into a plasma for reaction. The method includes forming a low-pressure insulating film on the substrate by coverting the film-forming gas at a first gas pressure into a plasma and forming a high-pressure insulating film on the low-pressure insulating film by converting the film-forming gas at second gas pressure, higher than the first gas pressure, into a plasma and reaction.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: February 8, 2005
    Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.
    Inventors: Yoshimi Shioya, Yuichiro Kotake, Tomomi Suzuki, Hiroshi Ikakura, Kazuo Maeda
  • Patent number: 6849562
    Abstract: A method for depositing a low k dielectric film comprising silicon, carbon, and nitrogen is provided. The low k dielectric film is formed by a gas mixture comprising a silicon source, a carbon source, and NR1R2R3, wherein R1, R2, and R3 are selected from the group consisting of alkyl and phenyl groups. The low k dielectric film may be used as a barrier layer, an etch stop, an anti-reflective coating, or a hard mask.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: February 1, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Chi-I Lang, Li-Qun Xia, Ping Xu, Louis Yang
  • Patent number: 6844234
    Abstract: A semiconductor device comprising a semiconductor substrate, a gate dielectrics formed on the semiconductor substrate and including a silicon oxide film containing a metallic element, the silicon oxide film containing the metallic element including a first region near a lower surface thereof, a second region near an upper surface thereof, and a third region between the first and second regions, the metallic element contained in the silicon oxide film having a density distribution in a thickness direction of the silicon oxide film, a peak of the density distribution existing in the third region, and an electrode formed on the gate dielectrics.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: January 18, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Eguchi, Seiji Inumiya, Yoshitaka Tsunashima
  • Publication number: 20040248429
    Abstract: A method for manufacturing a transistor, includes the steps of preparing a substrate, preparing a liquid material containing a silane compound, the silane compound forming a high order silane when photopolymerized, coating the liquid material on the substrate so as to form a coating film, exposing the coating film to an atmosphere comprising at least one of oxygen and ozone so as to oxidize a surface of the coating film, and performing at least one of thermal processing and photoirradiation processing on the coating film in an inert atmosphere so as to transform the coating film into a silicon layer and a silicon oxide layer disposed on the silicon layer.
    Type: Application
    Filed: March 19, 2004
    Publication date: December 9, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Takashi Aoki
  • Publication number: 20040224537
    Abstract: A spin-on glass (SOG) composition and a method of forming a silicon oxide layer utilizing the SOG composition are disclosed. The method includes coating on a semiconductor substrate having a surface discontinuity, an SOG composition containing polysilazane having a compound of the formula —(SiH2NH)n— wherein n represents a positive integer, a weight average molecular weight within the range of about 3,300 to 3,700 to form a planar SOG layer. The SOG layer is converted to a silicon oxide layer with a planar surface by curing the SOG layer. Also disclosed is a semiconductor device made by the method.
    Type: Application
    Filed: June 7, 2004
    Publication date: November 11, 2004
    Inventors: Jung-Ho Lee, Jun-Hyun Cho, Jung-Sik Choi, Dong-Jun Lee
  • Patent number: 6815373
    Abstract: A method for depositing a low dielectric constant film having a dielectric constant of about 3.5 or less is provided by blending one or more cyclic organosilicon compounds, one or more aliphatic organosilicon compounds, and one or more low molecular weight aliphatic hydrocarbon compounds. In one aspect, a gas mixture comprising one or more cyclic organosilicon compounds, one or more aliphatic organosilicon compounds, one or more aliphatic hydrocarbon compounds, one or more oxidizing gases, and a carrier gas is reacted at conditions sufficient to deposit a low dielectric constant film on a substrate surface.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: November 9, 2004
    Assignee: Applied Materials Inc.
    Inventors: Vinita Singh, Srinivas D. Nemani, Yi Zheng, Lihua Li, Tzu-Fang Huang, Li-Qun Xia, Ellie Yieh
  • Patent number: 6815374
    Abstract: A method for depositing highly conformal silicate glass layers via chemical vapor deposition through the reaction of TEOS and O3 comprises placing an in-process semiconductor wafer having multiple surface constituents in a plasma-enhanced chemical vapor deposition chamber.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: November 9, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Ravi Iyer
  • Patent number: 6812128
    Abstract: A step for forming a wiring on a semiconductor substrate, a step for forming a first silicon oxide film on the semiconductor substrate having the wiring, and a step for forming an interlayer insulating film composed of a material bearing a low specific inductive capacity on the first silicon oxide film are sequentially executed to form a multilayered wiring. The interlayer insulating film is formed to have a smaller thickness relative to a step of the first silicon oxide film, so as not to extend beyond the step of the first silicon oxide film.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: November 2, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Motoki Kobayashi
  • Patent number: 6812164
    Abstract: A method for ionization film formation to form a deposited film by ionizing vaporized particles with an ionization mechanism of the hot-cathode system and injecting the ionized particles into a substrate is provided. The method includes the step of introducing He gas inside the ionization mechanism.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: November 2, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hirohito Yamaguchi, Masahiro Kanai, Atsushi Koike, Katsunori Oya
  • Patent number: 6806207
    Abstract: A silicon oxide layer is produced by plasma enhanced decomposition of an organosilicon compound to deposit films having a carbon content of at least 1% by atomic weight. An optional carrier gas may be introduced to facilitate the deposition process at a flow rate less than or equal to the flow rate of the organosilicon compounds. An oxygen rich surface may be formed adjacent the silicon oxide layer by temporarily increasing oxidation of the organosilicon compound.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: October 19, 2004
    Assignee: Applied Materials Inc.
    Inventors: Tzu-Fang Huang, Yung-Cheng Lu, Li-Qun Xia, Ellie Yieh, Wai-Fan Yau, David W. Cheung, Ralf B. Willecke, Kuowei Liu, Ju-Hyung Lee, Farhad K. Moghadam, Yeming Jim Ma
  • Patent number: 6800571
    Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilane or organosiloxane compound and an oxidizing gas at a low RF power level from 10-250 W. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organosilane film is produced by reaction of methylsilane, CH3SiH3, or dimethylsilane, (CH3)2SiH2, and nitrous oxide, N2O, at an RF power level from about 10 to 200 W or a pulsed RF power level from about 20 to 250 W during 10-30% of the duty cycle.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: October 5, 2004
    Assignee: Applied Materials Inc.
    Inventors: David Cheung, Wai-Fan Yau, Robert R. Mandal
  • Patent number: 6797607
    Abstract: A process for forming a substantially planarized nanoporous dielectric silica coating on a substrate suitable for preparing a semiconductor device, and semiconductor devices produced by the methods of the invention. The process includes the steps of applying a composition that includes at least one silicon-based dielectric precursor to a substrate, and then, (a) gelling or aging the applied coating, (b) contacting the coating with a planarization object with sufficient pressure to transfer a planar impression to the coating without substantially impairing formation of desired nanometer-scale pore structure, (c) separating the planarized coating from the planarization object, (d) curing said planarized coating; wherein steps (a)-(d) are conducted in any one of the following sequences: (a), (b), (c) and (d); (a), (d), (b) and (c); (b), (a), (d) and (c); and (b), (c), (a) and (d).
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: September 28, 2004
    Assignee: AlliedSignal Inc.
    Inventors: Denis H. Endisch, James S. Drage
  • Patent number: RE38753
    Abstract: An interconnection structure includes an interlevel insulating film, made of organic-containing silicon di oxide, between lower- and upper-level metal interconnects. A phenyl group, bonded to a silicon atom, is introduced into silicon di oxide in the organic-containing silicon di oxide.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: July 5, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Nobuo Aoi