Abstract: According to one aspect of the invention, a method is provided of processing a substrate, including locating the substrate in a processing chamber, creating a nitrogen plasma in the chamber, the plasma having an ion density of at least 1010 cm−3, and a potential of less than 20 V, and exposing a layer on the substrate to the plasma to incorporate nitrogen of the plasma into the layer.

Abstract: An electronic device on a semiconductor substrate can include first and second field effect transistors on a substrate. In particular, the first field effect transistor includes a first gate dielectric layer having a first nitrogen concentration, and the second field effect transistor includes a second gate dielectric layer having a second nitrogen concentration lower than the first nitrogen concentration. More particularly, the first field effect transistor can be a PMOS transistor, and the second field effect transistor can be an NMOS transistor. Related methods are also discussed.

Abstract: A semiconductor device includes a low dielectric constant insulating film exhibiting an Si—H Fourier Transform Infrared (FTIR) doublet defined by a first and a second peak, wherein the first peak is located at a higher wave number than the second peak, and wherein the ratio of the first peak to the second peak is greater than unity. A method of producing such a semiconductor device includes depositing a dielectric layer over a substrate and treating the dielectric layer in a hydrogen containing plasma such that the dielectric layer exhibits an Si—H Fourier Transform Infrared (FTIR) doublet defined by a first and a second peak, wherein the first peak is located at a higher wave number than the second peak, and wherein the ratio of the first peak to the second peak is greater than unity.

Abstract: A semiconductor device including an N-type semiconductor substrate which includes arsenic as an impurity, a first electrode formed on a main surface of the N-type semiconductor substrate, a ground surface formed on another surface of the N-type semiconductor substrate, a second electrode formed on the ground surface and ohmically-contacted with the N-type semiconductor substrate, a semiconductor element formed in the N-type semiconductor substrate and flowing current between the first electrode and the second electrode during ON-state thereof. The device has a reduced ON-resistance thereof.

Abstract: The present invention relates to a manufacturing method of a semiconductor device in which a barrier insulating film and a main insulating film having low relative dielectric constant are sequentially formed while a wiring mainly consisting of copper film is coated.

Abstract: The present invention provides a plasma processing system comprising a remote plasma activation region for formation of active gas species, a transparent transfer tube coupled between the remote activation region and a semiconductor processing chamber, and a source of photo energy for maintaining activation of the active species during transfer from the remote plasma activation region to the processing chamber. The source of photo energy preferably includes an array of UV lamps. Additional UV lamps may also be used to further sustain active species and assist plasma processes by providing additional in-situ energy through a transparent window of the processing chamber. The system can be utilized for annealing.

Abstract: Provided is a manufacturing process for an annealed wafer capable of elucidating a relationship between a tilt angle from a (100) plane of a wafer to be annealed and haze to set optimal tilt angles for suppression of haze and to improve a characteristic of a device from the annealed wafer as a result of the suppression of haze. A silicon mirror wafer having a surface orientation with a tilt angle in the range of 0.1 degree<&thgr;<0.2 degree from a (100) plane or a plane equivalent thereto is heat treated in an atmosphere of hydrogen gas, an inert gas, nitrogen gas or a mixed gas thereof.

Abstract: Silicon oxide films which are good as gate insulation films are formed by subjecting a silicon oxide film which has been formed on an active layer comprising a silicon film by means of a PVD method or CVD method to a heat treatment at 300-700° C. in a dinitrogen monoxide atmosphere, or in an NH3 or N2H4 atmosphere, while irradiating with ultraviolet light, reducing the hydrogen and carbon contents in the silicon oxide film and introducing nitrogen into the boundary with the silicon film in particular. Furthermore, silicon oxide films which are good as gate insulating films have been formed by subjecting silicon oxide films which have been formed on an active layer comprising a silicon film by means of a PVD method or CVD method to a heat treatment at 300-700° C. in an N2O atmosphere (or hydrogen nitride atmosphere) while irradiating with ultraviolet light, and then carrying out a heat treatment at 300-700° C.

Abstract: The invention includes a method of treating a predominantly inorganic dielectric material on a semiconductor wafer. A laser is utilized to generate activated oxygen species. Such activated oxygen species react with a component of the dielectric material to increase an oxygen content of the dielectric material. The invention also includes a method of forming a capacitor construction. A first capacitor electrode is formed to be supported by a semiconductor substrate. A dielectric material is formed over the first capacitor electrode. A precursor is provided at a location proximate the dielectric material, and a laser beam is focused at such location. The laser beam generates an activated oxygen species from the precursor. The activated oxygen species contacts the dielectric material. Subsequently, a second capacitor electrode is formed over the dielectric material.

Abstract: A process is disclosed for forming an integrated circuit structure characterized by formation of a combined dielectric layer and antireflective coating layer. The process comprises forming a layer of dielectric material over an integrated circuit structure, and treating the surface of the layer of dielectric material to form an antireflective coating (ARC) surface therein. When a layer of photoresist is then formed over the ARC surface, and the layer of photoresist is exposed to a pattern of radiation, the ARC surface improves the accuracy of the replication, in the photoresist layer, of the pattern of radiation. Preferably, the surface of the dielectric layer is treated with a plasma comprising ions of elements and/or compounds to form the ARC surface.

Abstract: A method for passivating at least interfaces between structures formed from a conductive or semiconductive material and adjacent dielectric structures so as to reduce a concentration of dangling silicon bonds at these interfaces and to reduce or eliminate the occurrence of unwanted voltage changes across the dielectric structures. The method includes exposing at least the interfaces to at least hydrogen species and forming an encapsulant layer that substantially contains the hydrogen species in the presence of the interfaces. The encapsulant layer substantially prevents the hydrogen species from escaping therethrough as processes that require temperatures of at least about 400° C. or of at least about 600° C. are conducted. Once such high temperature processes have been completed, portions of the encapsulant layer may be removed. Methods and systems for passivating semiconductor device structures are also disclosed, as are semiconductor device structures passivated according to the disclosed methods.

Abstract: A method for attaching an integrated circuit chip to an organic substrate comprising the steps of providing an integrated circuit chip having an active and a passive surface, said active surface including a protective polymer layer; activating said polymer layer by exposing it to reactive ion etching plasma, thereby increasing the surface roughness and imparting affinity to adhesion; providing an electrically insulating substrate having first and second surfaces; and contacting said second surface of said substrate to said activated polymer layer on said chip, whereby strong adhesion is exerted at the interface between said layer and said substrate, directly attaching said substrate to said chip.

Abstract: A laser-irradiation method which comprises a process for fabricating a semiconductor device, comprising: a first step of forming a thin film amorphous semiconductor on a substrate having an insulating surface; a second step of modifying the thin film amorphous semiconductor into a crystalline thin film semiconductor by irradiating a pulse-type linear light and/or by applying a heat treatment; a third step of implanting an impurity element which imparts a one conductive type to the crystalline thin film semiconductor; and a fourth step of activating the impurity element by irradiating a pulse-type linear light and/or by applying a heat treatment; wherein the peak value, the peak width at half height, and the threshold width of the laser energy in the second and the fourth steps above are each distributed within a range of approximately ±3% of the standard value. Also claimed is a laser irradiation device which realizes the method above.

Abstract: Nitride layer formation includes a method wherein a material is electrodeposited on a substrate and converted, at least in part, to a layer comprising nitrogen and the electrodeposited material. The electrodepositing may occur substantially selective on a conductive portion of the substrate. Also, the converting may comprise exposing the electrodeposited material to a nitrogen-comprising plasma. Chromium nitride and chromium oxynitride are examples of nitrogen-comprising materials. Copper or gold wiring of an integrated circuit are examples of a substrate. The processing temperature during the electrodepositing and the converting may be selected not to exceed 500° C. The thickness and composition of the nitride layer may be effective to limit diffusion of the wiring through the nitride layer. A diffusion barrier forming method may include forming a patterned layer of integrated circuit copper wiring over a substrate.

Abstract: A process for forming a low k carbon-doped silicon oxide dielectric material (lkc-dsodm) on an integrated circuit structure is characterized by improved planarity and good gap fill in high aspect ratio regions of the integrated circuit structure, as well as improved film strength and adherence, and less byproducts trapped in the film. The process comprises: depositing a plurality of layers of lkc-dsodm on an integrated circuit structure in a reactor; and pausing after depositing each layer of lkc-dsodm and before depositing a further layer of lkc-dsodm. The process can further include first forming a base or barrier layer of a silicon-rich and nitrogen-rich dielectric material over the integrated circuit structure, plasma etching the upper surface of the barrier layer to facilitate adhesion of the subsequently deposited lkc-dsodm to the barrier layer, and then, before depositing the first layer of lkc-dsodm, cooling the etched barrier layer down to within 10° C.

Abstract: A system, method and apparatus are described for improving critical dimension uniformity in baked substrates. The system, method and apparatus provide for varying the distance between a substrate to be baked and the surface of a hot plate such that an approximately uniform temperature is obtained in the substrate during baking. In one embodiment, the substrate is positioned on a hot plate having a recess generally centered on its top side. The differences in distance between the edges of the substrates contacting the hot plate and the distance between the center region of the substrate and the bottom of the recess enable a generally uniform temperature to be obtained in the substrate.

Abstract: The present invention relates to a method and system for non-thermal abatement of effluent species generated in a semiconductor processing unit. In the method, an effluent stream is introduced into a discharge reactor wherein the components of the effluent stream are subjected to a corona discharge and maintained therein for a sufficient time to detoxify and/or dissociate the harmful components of the effluent stream. The discharge reactor, maintained at approximately atmospheric pressure, is positioned after the low-pressure semiconductor processing chamber and connecting vacuum pump system to limit interference with the semiconductor plasma processing tool.

Abstract: A MOSFET structure with high-k gate dielectric layer and silicon or metal gates, amorphizing treatment of the high-k gate dielectric layer as with a plasma or ion implantation.

Abstract: The invention includes a method of treating a predominantly inorganic dielectric material on a semiconductor wafer. A laser is utilized to generate activated oxygen species. Such activated oxygen species react with a component of the dielectric material to increase an oxygen content of the dielectric material. The invention also includes a method of forming a capacitor construction. A first capacitor electrode is formed to be supported by a semiconductor substrate. A dielectric material is formed over the first capacitor electrode. A precursor is provided at a location proximate the dielectric material, and a laser beam is focused at such location. The laser beam generates an activated oxygen species from the precursor. The activated oxygen species contacts the dielectric material. Subsequently, a second capacitor electrode is formed over the dielectric material.

Abstract: A method for forming a cell capacitor used for a high-integrated DRAM is disclosed which guarantees interfacial properties of aluminum oxide and excellent leakage current preventive properties by depositing an aluminum oxide layer and a mixed layer of TiON and TiO2 as dielectric layers on a semiconductor substrate having a predetermined lower substructure by an atomic layer deposition (ALD) method and thus forming a double layer structure, and simultaneously providing a high capacitance by using a high dielectric property of a mixed layer of TiON and TiO2.

Abstract: To shift the bandgap of a quantum well microstructure, the surface of the microstructure is selectively irradiated in a pattern with ultra violet radiation to induce alteration of a near-surface region of said microstructure. Subsequently the microstructure is annealed to induce quantum well intermixing and thereby cause a bandgap shift dependent on said ultra violet radiation.

Abstract: A laser heating apparatus for forming an electrode on one surface of an Si chip provided on an Si wafer, thereby producing a semiconductor element, comprises a high vacuum chamber having a light transmission window, an XY table contained in the high vacuum chamber for mounting the Si wafer thereon, heater contained in the high vacuum chamber for heating and evaporating an impurity in a solid state, and laser beam applying means for applying a laser beam to the Si chip placed on the XY table from the outside of the high vacuum chamber through the light transmission window, thereby implanting the impurity into the Si in chip and activating the implanted impurity.

Abstract: A method is disclosed for removal of free halogen from a semiconductor device insulating layer, in particular, a halogen-containing polymer insulating layer. The free halogen is removed by contacting the insulating material with hydrogen ions under conditions which generate gaseous hydrogen halide which is then removed. A semiconductor device containing such treated insulating materials is also disclosed. The invention is particularly useful in removing free fluorine from fluorinated polymer insulating layers.

Abstract: A high density plasma chemical vapor deposition (HDP-CVD) process is used to deposit silicon dioxide in trenches of various widths. The thickness of the silicon dioxide filling both narrow and wide trenches is made more uniform by reducing an HDP-CVD etch to deposition ratio. The lowered etch to deposition ratio is achieved by lowering a ratio of oxygen to silane gas, by lowering the power of a high frequency bias signal, and by lowering the total gas flow rate.

Abstract: A method for passivating at least interfaces between structures formed from a material including silicon and adjacent dielectric structures so as to reduce a concentration of dangling silicon bonds at these interfaces and to reduce or eliminate the occurrence of unwanted voltage changes across the dielectric structures. The method includes disassociating ammonia so as to expose at least the interfaces to at least hydrogen species derived from the ammonia and forming an encapsulant layer that is positioned so as to substantially contain the hydrogen species in the presence of the interfaces. The hydrogen-passivation reduces a concentration of dangling silicon bonds at the interfaces by as much as about two orders of magnitude or greater. The encapsulant layer, which may include a silicon nitride, substantially prevents the hydrogen species from escaping therethrough as processes that require temperatures of at least about 400° C. or of at least about 600° C. are conducted.

Abstract: A method and apparatus for heat-treating a semiconductor substrate to heat different areas of the substrate at different temperatures. The method includes using an apparatus having a chamber of a refractory material; a support plate located at a lower side in the chamber for supporting the semiconductor substrate; a heating device disposed at an upper side in the chamber; and, a heat resistance mask provided between the support plate and fabricated to have different heat transmission rates therein.

Abstract: The present invention provides a plasma processing system comprising a remote plasma activation region for formation of active gas species, a transparent transfer tube coupled between the remote activation region and a semiconductor processing chamber, and a source of photo energy for maintaining activation of the active species during transfer from the remote plasma activation region to the processing chamber. The source of photo energy preferably includes an array of UV lamps. Additional UV lamps may also be used to further sustain active species and assist plasma processes by providing additional in-situ energy through a transparent window of the processing chamber. The system can be utilized for annealing.

Abstract: The present invention is related to a method of crystallizing an amorphous silicon layer and a crystallizing apparatus thereof which crystallize an amorphous silicon layer using of electric fields and plasma. The present invention includes the steps of depositing an inducing substance for silicon crystallization on an amorphous silicon layer by plasma exposure, and carrying out annealing on the amorphous silicon layer while applying an electric field to the amorphous silicon layer. The present invention includes a chamber having an inner space, a substrate support in the chamber wherein the substrate support supports a substrate, a plasma generating means in the chamber wherein the plasma generating means produces plasma inside the chamber, an electric field generating means in the chamber wherein the electric field generating means applies electric field to the substrate, and a heater at the substrate support wherein the heater supplies the substrate with heat.

Abstract: A substrate to be processed in a high temperature processing chamber is preheated to avoid the problems associated with thermal shock when the substrate is dropped onto a heated susceptor. Preheating is effected by holding the substrate over a susceptor maintained at or near the processing temperature until the temperature of the substrate approaches the processing temperature. Thus, wafer warping and breakage are greatly reduced, and wafer throughput is improved because of time saved in maintaining the susceptor at constant temperature without cool down and reheat periods.

Abstract: Within a method for fabricating a microelectronic fabrication having formed therein a copper containing conductor layer passivated with a passivation layer, there is first: (1) pre-heated the copper containing conductor layer to a temperature of from about 300 to about 450 degrees centigrade for a time period of from about 30 to about 120 seconds to form a pre-heated copper containing conductor layer; and then (2) plasma treated the pre-heated copper containing conductor layer within a reducing plasma to form a plasma treated pre-heated copper containing conductor layer; prior to (3)forming upon the plasma treated pre-heated copper containing conductor layer the passivation layer. The foregoing process sequence provides for attenuated hillock defects within the plasma treated pre-heated copper containing conductor layer when forming the passivation layer thereupon.

Abstract: A method for selectively heating a substrate without damaging surrounding regions of the substrate. In particular, the invention provides for a method of selectively activating doped regions of a semiconductor device without damaging surrounding doped and activated regions. Specifically, the invention provides a laser anneal which activates locally doped regions, while surrounding doped and activated regions are protected using a reflective mask.

Abstract: A method for implanting a substrate face using a plasma processing apparatus (10). The method includes providing a substrate (e.g., wafer, panel) (22) on a face of a susceptor. The substrate has an exposed face, which has a substrate diameter that extends from a first edge of the substrate to a second edge of the substrate across a length of the substrate. The method also includes forming a plasma sheath (26) around the face of the substrate. The plasma sheath has a dark space distance “D” that extends in a normal manner from the exposed face to an edge of the plasma sheath. The dark space distance and the substrate diameter comprise a ratio between the dark space distance and the substrate diameter. The ratio is about one half and less, which provides a substantially uniform implant.

Abstract: A method of radiation hardening microcircuits including the steps of removing hydrogen from the microcircuit in a vacuum furnace and annealing in deuterium-containing forming gas.

Abstract: A method of forming an optical marker layer for etch endpoint determination in integrated circuit fabrication processes is disclosed. The optical marker layer is used in conjunction with organic and/or carbon-containing material layers that are used as bulk insulating materials and barrier materials. The optical marker layer is formed on the bulk insulating material layer and/or the barrier material layer by incorporating an optical marker into the surface thereof. The optical marker is incorporated into the surface of the bulk insulating material layer and/or the barrier material layer by treating such layer with an optical marker-containing gas. The optical marker layer provides an optical marker emission spectrum when it is etched during a subsequent patterning step.

Abstract: Provided is a method of manufacturing a semiconductor laser element for collectively forming semiconductor laser elements having diffraction grating partially provided at least on the side of laser light emitting end surface or laser light reflection end surface side using a semiconductor process technique. The method comprises the step of performing electron beam exposure or ion beam exposure for drawing only on a diffraction grating region on which said diffraction grating is provided in correspondence with a pattern of said diffraction grating, and masking the diffraction grating region and exposing a region other than said diffraction grating region with light or X-rays.

Abstract: Disclosed is a method for manufacturing a silicide layer of semiconductor device. The disclosed comprises the steps of: depositing a lower metal layer on the surface of semiconductor substrate and then, performing a plasma treatment; and depositing an upper metal layer on the plasma-treated lower metal layer and then, performing a thermal treatment process, thereby forming a silicide layer on the surface of semiconductor substrate.

Abstract: A method enhances selectivity between a film of a light-sensitive material and a layer to be subjected to etching in the course of fabrication processes of an electronic semiconductor device starting from a semiconductor material wafer. The method includes radiating the wafer with an ion beam subsequently to depositing the layer to be etched and defining a circuit pattern on the film of light-sensitive material. An alternative method exposes the wafer to a non-reactive gas medium under plasma rather than radiating the wafer with an ion beam.

Abstract: The effective doping profile of a finished thyristor is altered with helium ions radiated into a region provided for triggering the thyristor in such a way that the breakover voltage for overhead ignition is increased or reduced. Doping profile changes made in the cathode side half of the anode side base provide effective results, e.g. in the vicinity of the pn junction between the anode side and the cathode side base. The helium ions generate acceptor-type states that lower the effective n doping.

Abstract: An improved dopant application system and method for the manufacture of microelectronic devices accurately places dopant on and within a dielectric or semiconductor surface. Diffusing and activating p-type and n-type dopants in dielectric or semiconductor substrates is achieved by means of electron beam irradiation.

Abstract: A method of densifying a superficial layer on a low dielectric constant film. A substrate is provided. A low dielectric constant material layer is formed over the substrate. An inert gas plasma treatment of the low dielectric constant material layer is conducted so that a superficial layer of the low dielectric constant material layer is densified into a protective layer. The protective layer protects the low dielectric constant material layer against attacks by plasma and chemicals during subsequent processes and prevents any deterioration of electrical properties.

Abstract: It is possible to prevent lowering in productivity of thin-film transistors with no decrease in performance of the transistors. Provided are depositing an amorphous semiconductor film on a substrate, a first irradiating the amorphous semiconductor film with an energy-rich beam in an atmosphere of a gas containing an inert gas as a major component with a specific amount of oxygen, to change the amorphous semiconductor film into a polycrystalline semiconductor film, and a second irradiating the polycrystalline semiconductor film with an energy-rich beam in an atmosphere of a gas containing an inert gas as major component with oxygen of an amount less than the specific amount.

Abstract: A metal interconnect arrangement provides a dielectric layer that has its upper surface treated to provide an etch stop etch stop layer. The upper surface is subjected to a plasma etch that treats, such as by carbonization, the dielectric material in a manner that alters the etch characteristics of the dielectric material. After a second dielectric layer is formed over the treated surface of the first dielectric layer, an etching may be performed through the second dielectric layer that stops on the treated surface of the first dielectric layer in a damascene interconnect process.

Abstract: A method of improving adhesion of a cap oxide to nanoporous silica for integrated circuit fabrication. In one embodiment, the method comprises several steps. The first step is to receive a wafer in a deposition chamber. Then a porous layer of material is deposited on the wafer. Next, a portion of the porous layer is densified in order to make it more compatible for adhesion to a cap layer. Finally, a cap layer is deposited onto the porous layer.

Abstract: The present invention provides a method for forming low dielectric constant layer in a semiconductor device comprising providing the semiconductor device. A polymer layer is formed on the semiconductor device, which has unsaturated carbon bonds compounds left after curing step. The polymer layer is then treated with ammonia-contained gas. The purpose of treatment of ammonia gas is to form and stabilize the polymer layer by saturating the unsaturated carbon bonds compounds in the polymer layer.

Abstract: An apparatus for heat treating semiconductor wafers is disclosed. The apparatus includes a heating device which contains an assembly linear lamps for emitting light energy onto a wafer. The linear lamps can be placed in various configurations. In accordance with the present invention, tuning devices which are used to adjust the overall irradiance distribution of the light energy sources are included in the heating device. The tuning devices can be, for instance, are lamps or lasers.

Abstract: An ion generator generates ions above a semiconductor wafer and the ions are directed towards a surface of a semiconductor wafer. The ions combine with static charges on the semiconductor wafer to thereby discharge the surface of the semiconductor wafer.

Abstract: In order to fabricate a dynamic memory cell configuration with a long retention time, a hydrogen heat treatment of the wafer is carried out after the production of the interconnect system. The hydrogen heat treatment is performed in a PECVD reactor into which hydrogen is introduced and excited in the plasma. The heat treatment becomes more effective as a result and can be combined with deposition processes, in particular of passivation layers, carried out in PECVD installations.

Abstract: A laser-irradiation method which comprises a process for fabricating a semiconductor device, comprising: a first step of forming a thin film amorphous semiconductor on a substrate having an insulating surface; a second step of modifying the thin film amorphous semiconductor into a crystalline thin film semiconductor by irradiating a pulse-type linear light and/or by applying a heat treatment; a third step of implanting an impurity element which imparts a one conductive type to the crystalline thin film semiconductor; and a fourth step of activating the impurity element by irradiating a pulse-type linear light and/or by applying a heat treatment; wherein the peak value, the peak width at half height, and the threshold width of the laser energy in the second and the fourth steps above are each distributed within a range of approximately ±3% of the standard value. Also claimed is a laser irradiation device which realizes the method above.

Abstract: A method of forming tantalum nitride (TaN) compound layers for use in integrated circuit fabrication processes is disclosed. The tantalum nitride (TaN) compound layer is formed by thermally decomposing a tantalum containing metal organic precursor. After the tantalum nitride (TaN) compound layer is formed, it is plasma treated.

Abstract: A novel patterned thin film forming method is capable of realizing formation of nanometer-scale patterned thin films with high controllability by an easy and low-cost process. To form a patterned thin film on an insulating substrate in a precursor solution containing a film-forming substance, an electric charge pattern is formed on the insulating substrate, and then the insulating substrate is dipped in the precursor solution to deposit the film-forming substance on the electric charge pattern formed on the insulating substrate.