Having Selenium Or Tellurium Elemental Semiconductor Component Patents (Class 438/84)
  • Patent number: 10077187
    Abstract: A semiconductor manufacturing method includes providing a wafer. A layer is formed over a surface of the wafer where the layer is able to form a eutectic layer with a conductive element. The layer is partially removed so as to form a plurality of mesas. The wafer is bonded to a substrate through the plurality of mesas. The substrate is thinned down to a thickness so as to be less than a predetermined value.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: September 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Li-Chen Yen, Yi-Hsien Chang, Chun-Ren Cheng
  • Patent number: 10017382
    Abstract: A method embodiment includes providing a micro-electromechanical (MEMS) wafer including a polysilicon layer having a first and a second portion. A carrier wafer is bonded to a first surface of the MEMS wafer. Bonding the carrier wafer creates a first cavity. A first surface of the first portion of the polysilicon layer is exposed to a pressure level of the first cavity. A cap wafer is bonded to a second surface of the MEMS wafer opposite the first surface of the MEMS wafer. The bonding the cap wafer creates a second cavity comprising the second portion of the polysilicon layer and a third cavity. A second surface of the first portion of the polysilicon layer is exposed to a pressure level of the third cavity. The first cavity or the third cavity is exposed to an ambient environment.
    Type: Grant
    Filed: February 15, 2016
    Date of Patent: July 10, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 9786715
    Abstract: An optical sensor including a first material layer comprising at least a first material; a second material layer comprising at least a second material that is different from the first material, where a material bandgap of the first material is larger than a material bandgap of the second material; and a graded material layer arranged between the first material layer and the second material layer, the graded material layer comprising an alloy of at least the first material and the second material having compositions of the second material that vary along a direction that is from the first material to the second material.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: October 10, 2017
    Assignee: Artilux Corporation
    Inventors: Yun-Chung Na, Szu-Lin Cheng, Shu-Lu Chen, Han-Din Liu, Hui-Wen Chen
  • Patent number: 9318521
    Abstract: An image sensor includes a first sub-gate in a recessed region in a substrate; a second sub-gate on the first sub-gate in contact with an upper surface of the substrate; and an element isolation region in the substrate spaced apart from the first sub-gate. A lower surface of the second sub-gate is wider than an upper surface of the first sub-gate, and a portion of the element isolation region is spaced apart from the second sub-gate by a first distance in a first direction.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: April 19, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hisanori Ihara
  • Patent number: 9209343
    Abstract: A structure and method of making a thin-film solar cell is provided. A thin-film solar cell includes a substrate, absorber layer and a buffer layer. The absorber layer is deposited by a single-step bulk electrochemical process, or a multi-layer electrochemical process. The buffer layer is deposited by an electrochemical deposition process such as a multi-layer deposition or an atomic layer deposition. The absorber and buffer layers are non-toxic materials which can include sulfur incorporated during the deposition process or incorporated after deposition by an anneal step.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: December 8, 2015
    Assignee: International Business Machines Corporation
    Inventors: Hariklia Deligianni, Lian Guo, Raman Vaidyanathan
  • Patent number: 9159864
    Abstract: Methods for forming a back contact on a thin film photovoltaic device are provided that include applying a conductive paste onto a surface defined by a p-type absorber layer (e.g., comprising cadmium telluride) of a p-n junction and curing the conductive paste to form a conductive coating on the surface defined by a p-type absorber layer of the p-n junction. The conductive paste can include a conductive material, a solvent system, and a binder such that during curing an acid from the conductive paste reacts to enrich the surface with tellurium while copper is deposited onto the Te enriched surface. The acid is then substantially consumed during curing.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: October 13, 2015
    Assignee: First Solar, Inc.
    Inventors: Tammy Jane Lucas, Scott Daniel Feldman-Peabody, Laura Anne Clark, Michael Christoper Cole, Caroline Rae Corwine
  • Patent number: 9018032
    Abstract: A method for manufacturing a CIGS thin film photovoltaic device includes forming a back contact layer on a substrate, forming an Se-rich layer on the back contact layer, forming a precursor layer on the Se-rich layer by depositing copper, gallium and indium resulting in a first interim structure, annealing or selenizing the first interim structure, thereby forming Cu/Se, Ga/Se or CIGS compounds along the interface between the back contact layer and the precursor layer and resulting in a second interim structure, and selenizing the second interim structure, thereby converting the precursor layer into a CIGS absorber layer on the back contact layer.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: April 28, 2015
    Assignee: TSMC Solar Ltd.
    Inventors: Hsuan-Sheng Yang, Wen-Chin Lee, Li-Huan Chu
  • Patent number: 8993441
    Abstract: A method of forming a thin layer and a method of manufacturing a phase change memory device, the method of forming a thin layer including providing a first deposition source onto a substrate, the first deposition source not including tellurium; and providing a second deposition source onto the substrate, the second deposition source including a first tellurium precursor represented by the following Formula 1 and a second tellurium precursor represented by following the Formula 2: Te(CH(CH3)2)2??Formula 1 Ten(CH(CH3)2)2??Formula 2 wherein, in Formula 2, n is an integer greater than or equal to 2.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: March 31, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Do-Hyung Kim, Eun-Tae Kim, Sung-Lae Cho
  • Patent number: 8987037
    Abstract: A method of manufacturing a solar cell includes forming a buffer layer between an optical absorption layer and a window electrode layer. Forming the buffer layer includes depositing a metal material on the optical absorption layer, supplying a non-metal material on the optical absorption layer, supplying a gas material including oxygen atoms on the optical absorption layer, and reacting the metal material with the non-metal material. The gas material reacts with the metal material and the non-metal material to form a metal sulfur oxide on the optical absorption layer.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 24, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong-Duck Chung, Dae-Hyung Cho, Won Seok Han
  • Patent number: 8980682
    Abstract: Methods of forming absorber layers in a TFPV device are provided. Methods are described to provide the formation of metal oxide films and heating the metal oxide films in the presence of a chalcogen to form a metal-oxygen-chalcogen alloy. Methods are described to provide the formation of metal oxide films, forming a layer of elemental chalcogen on the metal oxide film, and heating the stack to form a metal-oxygen-chalcogen alloy. In some embodiments, the metal oxide film includes zinc oxide and the chalcogen includes selenium.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: March 17, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Haifan Liang, Jeroen Van Duren
  • Patent number: 8980679
    Abstract: Provided are apparatus and methods for forming phase change layers, and methods of manufacturing a phase change memory device. A source material is supplied to a reaction chamber, and purges from the chamber. A pressure of the chamber is varied according to the supply of the source material and the purge of the source material.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: March 17, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Hyun Im, Byoungjae Bae, Dohyung Kim, Sunglae Cho, Jinil Lee, Juhyung Seo, Hyeyoung Park, Takehiko Fujita
  • Publication number: 20150063543
    Abstract: A radiation detector may include: a first photoconductor layer including a plurality of photosensitive particles; and/or a second photoconductor layer on the first photoconductor layer, and including a plurality of crystals obtained by crystal-growing photosensitive material. At least some of the plurality of photosensitive particles of the first photoconductor layer may fill gaps between the plurality of crystals of the second photoconductor layer. A method of manufacturing a radiation detector may include: forming a first photoconductor layer by applying paste, including solvent mixed with a plurality of photosensitive particles, to a first substrate; forming a second photoconductor layer by crystal-growing photosensitive material on a second substrate; pressing the crystal-grown second photoconductor layer on the first photoconductor layer that is applied to the first substrate; and/or removing the solvent in the first photoconductor layer via a drying process.
    Type: Application
    Filed: September 1, 2014
    Publication date: March 5, 2015
    Inventors: Seung-hyup LEE, Sun-il KIM, Young KIM, Chang-jung KIM
  • Patent number: 8927324
    Abstract: A method for the production of a wafer-based, back-contacted heterojunction solar cell includes providing at least one absorber wafer. Metallic contacts are deposited as at least one of point contacts and strip contacts in a predetermined distribution on a back side of the at least one absorber wafer. The contacts have steep flanks that are higher than a cumulative layer thickness of an emitter layer and an emitter contact layer and are sheathed with an insulating sheath. The emitter layer is deposited over an entire surface of the back side of the at least one absorber wafer. The emitter contact layer is deposited over an entire surface of the emitter layer so as to form an emitter contact system. At least one of the emitter layer and the emitter contact layer is selectively removed so as to expose the steep flanks of the contacts that are covered with the insulating sheath.
    Type: Grant
    Filed: October 10, 2009
    Date of Patent: January 6, 2015
    Assignee: Helmholtz-Zentrum Berlin Fuer Materialien und Energie GmbH
    Inventor: Rolf Stangl
  • Patent number: 8927322
    Abstract: The present disclosure is directed to methods of forming different types of Cu2ZnSnS4 (CZTS) solar cells and Copper Indium Gallium DiSelenide (CIGS) solar cells that can be combinatorially varied and evaluated. These methodologies all incorporate the formation of site-isolated regions using a combinatorial processing tool and the use of these site-isolated regions to form the solar cell area. Therefore, multiple solar cells may be rapidly formed on a single substrate for use in combinatorial methodologies. Any of the individual processes of the methods described may be varied combinatorially to test varied process conditions or materials.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: January 6, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Upendra Avachat, Tony Chiang, Craig Hunter, Jian Li, Guizhen Zhang
  • Publication number: 20150000733
    Abstract: Methods and devices are described for a photovoltaic device. The photovoltaic device includes a glass substrate, a semiconductor absorber layer formed over the glass substrate, a metal back contact layer formed over the semiconductor absorber layer, and a p-type back contact buffer layer formed from one of MnTe, Cd1-xMnxTe, and SnTe, the buffer layer disposed between the semiconductor absorber layer and the metal back contact layer.
    Type: Application
    Filed: June 27, 2014
    Publication date: January 1, 2015
    Inventors: Benyamin Buller, Markus Gloeckler, Akhlesh Gupta, Rick Powell, Rui Shao, Gang Xiong, Ming Lun Yu, Zhibo Zhao
  • Patent number: 8916767
    Abstract: A solar cell and a method of fabricating the same are provided according to one or more embodiments. According to an embodiment, the solar cell includes a substrate, a back electrode layer formed on the substrate, a light absorbing layer formed on the back electrode layer, and a transparent electrode layer formed on the light absorbing layer, wherein the light absorbing layer is comprised of copper (Cu), gallium (Ga), indium (In), sulfur (S), and selenium (Se) and includes a first concentration region in which concentrations of sulfur (S) gradually decrease in the light absorbing layer going in a first direction from the back electrode layer to the transparent electrode layer.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: December 23, 2014
    Assignees: Samsung SDI Co., Ltd., Samsung Display Co., Ltd.
    Inventors: Gug-Il Jun, Woo-Su Lee, Dong-Seop Kim, Jin-Seock Kim, Byoung-Dong Kim, Kang-Hee Lee, Dong-Gi Ahn, Byung-Joo Lee, Hyoung-Jin Park, In-Ki Kim
  • Patent number: 8916411
    Abstract: A gallium-containing alloy is formed on the light-receiving surface of a CIGS absorber layer, and, in conjunction with a subsequent selenization or anneal process, is converted to a gallium-rich region at the light-receiving surface of the CIGS absorber layer. A second gallium-rich region is formed at the back contact surface of the CIGS absorber layer during selenization, so that the CIGS absorber layer has a double-graded gallium concentration that increases toward the light-receiving surface and toward the back contact surface of the CIGS absorber layer. The double-graded gallium concentration advantageously produces a double-graded bandgap profile for the CIGS absorber layer.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: December 23, 2014
    Assignee: Intermolecular, Inc.
    Inventor: Haifan Liang
  • Patent number: 8894826
    Abstract: A method and apparatus for forming a thin film of a copper indium gallium selenide (CIGS)-type material are disclosed. The method includes providing first and second targets in a common sputtering chamber. The first target includes a source of CIGS material, such as an approximately stoichiometric polycrystalline CIGS material, and the second target includes a chalcogen, such as selenium, sulfur, tellurium, or a combination of these elements. The second target provides an excess of chalcogen in the chamber. This can compensate, at least in part, for the loss of chalcogen from the CIGS-source in the first target, resulting in a thin film with a controlled stoichiometry which provides effective light absorption when used in a solar cell.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: November 25, 2014
    Inventors: Jesse A. Frantz, Jasbinder S. Sanghera, Robel Y. Bekele, Vinh Q Nguyen, Ishwar D. Aggarwal, Allan J. Bruce, Michael Cyrus, Sergey V. Frolov
  • Patent number: 8889466
    Abstract: A method for forming a photovoltaic device includes forming an absorber layer with a granular structure on a conductive layer; conformally depositing an insulating protection layer over the absorber layer to fill in between grains of the absorber layer; and planarizing the protection layer and the absorber layer. A buffer layer is formed on the absorber layer, and a top transparent conductor layer is deposited over the buffer layer.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Talia S. Gershon, Supratik Guha, Jeehwan Kim, Mahadevaiyer Krishnan, Byungha Shin
  • Patent number: 8889465
    Abstract: A method of processing a thin-film absorber material with enhanced photovoltaic efficiency. The method includes providing a soda-lime glass substrate having a surface region and forming a barrier material overlying the surface region, followed by formation of a stack structure including a first thickness of a first precursor, a second thickness of a second precursor, and a third thickness of a third precursor. The first thickness of the first precursor is sputtered with a first target device including a first mixture of copper, gallium, and a first sodium species. The method further includes subjecting the soda-lime glass substrate having the stack structure in a thermal treatment process with at least H2Se gas species at a temperature above 400° C. to cause formation of an absorber material. Moreover, the method includes transferring a second sodium species from a portion of the soda-lime glass substrate via gas-phase diffusion during the thermal treatment process.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: November 18, 2014
    Assignee: Stion Corporation
    Inventor: Robert D. Wieting
  • Patent number: 8883547
    Abstract: The invention relates to the production of a thin film having photovoltaic properties, containing a I-III-VI2-type alloy and deposited by electrolysis, including the following steps: (a) successive deposits of layers of metallic elements I and III; and (b) thermal post-treatment with the addition of element VI. In particular, step (a) comprises the following operations: (a1) depositing a multi-layer structure comprising at least two layers of element I and two layers of element III, deposited in an alternate manner, and (a2) annealing said structure before adding element VI in order to obtain a I-III alloy.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: November 11, 2014
    Assignee: NEXCIS
    Inventors: Pierre-Philippe Grand, Salvador Jaime, Cedric Broussillou
  • Patent number: 8883602
    Abstract: Memory devices having memory cells comprising variable resistance material include an electrode comprising a single nanowire. Various methods may be used to form such memory devices, and such methods may comprise establishing contact between one end of a single nanowire and a volume of variable resistance material in a memory cell. Electronic systems include such memory devices.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: November 11, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Jun Liu, Michael P. Violette
  • Patent number: 8871552
    Abstract: Although Cl (chlorine) is no longer supplied in the course of a first process in which a detecting layer formed by a polycrystalline film or a polycrystalline lamination film by vapor deposition or sublimation is formed, an additional source (e.g., HCl of Cl-containing gas) other than a source is supplied at the start or in the course of the first process. Thus, the detecting layer as the polycrystalline film or the polycrystalline lamination film of CdTe, ZnTe, or CdZnTe can be doped with Cl uniformly in a thickness direction from the start until the end of the first process in film formation. As a result, uniform crystal particles and uniform detection characteristics can be achieved.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: October 28, 2014
    Assignees: Shimadzu Corporation, Institute of National Colleges of Technology, Japan
    Inventors: Satoshi Tokuda, Koichi Tanabe, Toshinori Yoshimuta, Hiroyuki Kishihara, Masatomo Kaino, Akina Yoshimatsu, Toshiyuki Sato, Shoji Kuwabara
  • Patent number: 8865506
    Abstract: A method for fabricating a solar cell commences by bonding a first metal-coated substrate to a second metal-coated substrate to provide a bonded substrate. The bonded substrate is then coated with a first precursor solution to provide a coated bonded substrate. Finally, the procedure de-bonds the coated bonded substrate to provide a first solar cell device and a second solar cell device. A system for fabricating the solar cell comprises a first precursor solution deposition system containing a first precursor solution for deposition on a substrate, a first heating element for heating the substrate after deposition of the first precursor solution, a second precursor solution deposition system containing a second precursor solution for deposition on the substrate, and a second heating element for heating the substrate after deposition of the second precursor solution.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: October 21, 2014
    Assignee: Magnolia Solar, Inc.
    Inventors: Gopal G. Pethuraja, Roger E. Welser, Ashok K. Sood
  • Publication number: 20140299772
    Abstract: Nanoparticles, methods of manufacture, devices comprising the nanoparticles, methods of their manufacture, and methods of their use are provided herein. The nanoparticles and devices having photoabsorptions in the range of 1.7 ?m to 12 ?m and can be used as photoconductors, photodiodes, phototransistors, charge-coupled devices (CCD), luminescent probes, lasers, thermal imagers, night-vision systems, and/or photodetectors.
    Type: Application
    Filed: May 21, 2012
    Publication date: October 9, 2014
    Applicant: THE UNIVERSITY OF CHICAGO
    Inventors: Philippe Guyot-Sionnest, Sean E. Keuleyan, Emmanuel Lhuillier
  • Patent number: 8852992
    Abstract: A method of manufacturing a solar cell having increased light efficiency due to increased gallium distribution on a surface of a light absorption layer, the method including forming a first electrode on a substrate, forming a precursor that includes at least one of copper, gallium, and indium on the first electrode, forming a preliminary light absorption layer by providing selenium to the precursor, forming the preliminary light absorption layer further including performing a heat treatment, and forming a liquid state CuSe compound, forming a light absorption layer by providing a compound including at least one of gallium and indium to the preliminary light absorption layer, and forming a second electrode on the light absorption layer.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: October 7, 2014
    Assignees: Samsung SDI Co., Ltd., Samsung Display Co., Ltd.
    Inventors: Woo-Su Lee, Sang-Cheol Park, Byoung-Dong Kim, Jung-Gyu Nam, Gug-Il Jun, Dong-Gi Ahn, In-Ki Kim
  • Patent number: 8852993
    Abstract: A gallium-containing alloy is formed on the light-receiving surface of a CIGS absorber layer, and, in conjunction with a subsequent selenization or anneal process, is converted to a gallium-rich region at the light-receiving surface of the CIGS absorber layer. A second gallium-rich region is formed at the back contact surface of the CIGS absorber layer during selenization, so that the CIGS absorber layer has a double-graded gallium concentration that increases toward the light-receiving surface and toward the back contact surface of the CIGS absorber layer. The double-graded gallium concentration advantageously produces a double-graded bandgap profile for the CIGS absorber layer.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: October 7, 2014
    Assignee: Intermolecular, Inc.
    Inventor: Haifan Liang
  • Patent number: 8846438
    Abstract: A solar cell includes an absorber layer formed of a CIGAS, copper, indium, gallium, aluminum, and selenium. A method for forming the absorber layer provides for using an indium-aluminum target and depositing an aluminum-indium film as a metal precursor layer using sputter deposition. Additional metal precursor layers such as a CuGa layer are also provided and a thermal processing operation causes the selenization of the metal precursor layers. The thermal processing operation/selenization operation converts the metal precursor layers to an absorber layer. In some embodiments, the absorber layer includes a double graded chalcopyrite-based bandgap.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: September 30, 2014
    Assignee: TSMC Solar Ltd.
    Inventors: Wen-Tsai Yen, Chung-Hsien Wu, Shih-Wei Chen, Wen-Chin Lee
  • Patent number: 8847192
    Abstract: In accordance with an embodiment of the present invention, a resistive switching device comprises a bottom electrode, a switching layer disposed over the bottom electrode, and a top electrode disposed over the switching layer. The top electrode comprises an alloy of a memory metal and an alloying element. The top electrode provides a source of the memory metal. The memory metal is configured to change a state of the switching layer.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: September 30, 2014
    Assignees: Adesto Technologies France SARL, Adesto Technologies Corporation
    Inventors: Wei Ti Lee, Chakravarthy Gopalan, Yi Ma, Jeffrey Shields, Philippe Blanchard, John Ross Jameson, Foroozan Sarah Koushan, Janet Wang, Mark Kellam
  • Publication number: 20140261691
    Abstract: A method is disclosed for manufacturing an absorber layer, such as a CIS-based absorber layer, in a thin film solar cell, such as a CIS-based thin film solar cell. One method includes a selenization step, an annealing step, and a sulfuration step. Another method includes an annealing step and a sulfuration step. Additionally, a disclosed CIS-based absorber layer has a surface-to-bottom ratio of gallium which is greater than that for a conventional absorber layer and the ratio of sulfur to sulfur-plus-selenium is less than that for a conventional absorber layer. Also provided is a process for producing an absorber layer, such as a CIS-based absorber layer, over a large area where the layer is capable of achieving both a high open circuit voltage and a high fill factor by preferable depth composition profile through controllable gallium-diffusion/sulfur-incorporation and the enlarged grain size.
    Type: Application
    Filed: January 27, 2014
    Publication date: September 18, 2014
    Applicant: TSMC SOLAR LTD.
    Inventors: Chien-Yao Huang, Yung-Sheng Chiu, Wen-Chin Lee
  • Patent number: 8835212
    Abstract: Methods for developing and investigating materials and processes for various layers used in manufacturing CdTe, CIGS, and CZTS TFPV superstrate devices using high productivity combinatorial techniques is described. Typical layers subjected to the HPC techniques include the buffer layers, absorber layers, and the contact interface layers.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: September 16, 2014
    Assignee: Intermolecular, Inc.
    Inventor: Upendra Avachat
  • Patent number: 8828783
    Abstract: A reverse p-n junction solar cell device and methods for forming the reverse p-n junction solar cell device are described. A variety of n-p junction and reverse p-n junction solar cell devices and related methods of manufacturing are provided. N-intrinsic-p junction and reverse p-intrinsic-n junction solar cell devices are also described.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: September 9, 2014
    Assignee: Uriel Solar, Inc.
    Inventor: James David Garnett
  • Patent number: 8828782
    Abstract: Processes for making a solar cell by depositing various layers of components on a substrate and converting the components into a thin film photovoltaic absorber material. Processes of this disclosure can be used to control the stoichiometry of metal atoms in making a solar cell for targeting a particular concentration and providing a gradient of metal atom concentration. A selenium layer can be used in annealing a thin film photovoltaic absorber material.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: September 9, 2014
    Assignee: Precursor Energetics, Inc.
    Inventors: Kyle L. Fujdala, Zhongliang Zhu, David Padowitz, Paul R. Markoff Johnson, Wayne A. Chomitz, Matthew C. Kuchta
  • Publication number: 20140248738
    Abstract: A method of p-type doping cadmium telluride (CdTe) is disclosed. The method comprising the steps of, (a) providing a first component comprising cadmium telluride (CdTe) comprising an interfacial region, and (b) subjecting the CdTe to a functionalizing treatment to obtain p-type doped CdTe, said functionalizing treatment comprising a thermal treatment of at least a portion of the interfacial region in the presence of a first material comprising a p-type dopant, and of a second material comprising a halogen. A method of making a photovoltaic cell is also disclosed.
    Type: Application
    Filed: May 16, 2014
    Publication date: September 4, 2014
    Applicant: First Solar, Inc.
    Inventors: John Anthony DeLuca, Scott Feldman-Peabody
  • Patent number: 8822261
    Abstract: A method of making a photovoltaic device is presented. The method includes disposing an absorber layer on a window layer. The method further includes treating at least a portion of the absorber layer with a first solution including a first metal salt to form a first component, wherein the first metal salt comprises a first metal selected from the group consisting of manganese, cobalt, chromium, zinc, indium, tungsten, molybdenum, and combinations thereof. The method further includes treating at least a portion of the first component with cadmium chloride to form a second component. The method further includes treating at least a portion of the second component with a second solution including a second metal salt to form an interfacial layer on the second component, wherein the second metal salt comprises a second metal selected from the group consisting of manganese, cobalt, nickel, zinc, and combinations thereof.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: September 2, 2014
    Assignee: First Solar, Inc.
    Inventors: Donald Franklin Foust, Hongbo Cao
  • Patent number: 8815632
    Abstract: A method of manufacturing an order vacancy compound (OVC) is provided. The method includes the following steps. A trivalent ion, a hexavalent ion and one of a univalent ion and a bivalent ion for an electrodeposition process are provided to form a solar energy absorbing film. The OVC is formed by performing an electrochemical etching process on the solar energy absorbing film.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: August 26, 2014
    Assignee: National Chen-Kung University
    Inventor: Wen-Hsi Lee
  • Patent number: 8809678
    Abstract: CIGS absorber layers fabricated using coated semiconducting nanoparticles and/or quantum dots are disclosed. Core nanoparticles and/or quantum dots containing one or more elements from group 13 and/or IIIA and/or VIA may be coated with one or more layers containing elements group IB, IIIA or VIA. Using nanoparticles with a defined surface area, a layer thickness could be tuned to give the proper stoichiometric ratio, and/or crystal phase, and/or size, and/or shape. The coated nanoparticles could then be placed in a dispersant for use as an ink, paste, or paint. By appropriate coating of the core nanoparticles, the resulting coated nanoparticles can have the desired elements intermixed within the size scale of the nanoparticle, while the phase can be controlled by tuning the stoichiometry, and the stoichiometry of the coated nanoparticle may be tuned by controlling the thickness of the coating(s).
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: August 19, 2014
    Assignee: aeris CAPITAL Sustainable IP Ltd.
    Inventors: Brian M. Sager, Dong Yu, Matthew R. Robinson
  • Patent number: 8790956
    Abstract: Techniques for using electrodeposition to form absorber layers in diodes (e.g., solar cells) are provided. In one aspect, a method for fabricating a diode is provided. The method includes the following steps. A substrate is provided. A backside electrode is formed on the substrate. One or more layers are electrodeposited on the backside electrode, wherein at least one of the layers comprises copper, at least one of the layers comprises zinc and at least one of the layers comprises tin. The layers are annealed in an environment containing a sulfur source to form a p-type CZTS absorber layer on the backside electrode. An n-type semiconductor layer is formed on the CZTS absorber layer. A transparent conductive layer is formed on the n-type semiconductor layer. A diode is also provided.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: July 29, 2014
    Assignee: International Business Machines Corporation
    Inventors: Shafaat Ahmed, Hariklia Deligianni, Lubomyr T. Romankiw, Kejia Wang
  • Publication number: 20140179053
    Abstract: A method for fabricating an absorbing layer of a solar cell and a thermal treatment device thereof adapted for forming an absorbing layer on a substrate are disclosed. The method includes the following steps. First, a solid-phase vapor source in a chamber and an absorbing layer precursor on a substrate are maintained by a predetermined distance. The solid-phase vapor source contains tin. The absorbing layer precursor contains copper, zinc, tin and sulfur. The temperature inside the chamber is raised to a forming temperature, so that the absorbing layer precursor forms an absorbing layer on the substrate.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 26, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tsung-Shin Wu, Shih-Hsiung Wu, Chia-Wen Chang, Hung-Ru Hsu
  • Publication number: 20140170802
    Abstract: A gallium-containing alloy is formed on the light-receiving surface of a CIGS absorber layer, and, in conjunction with a subsequent selenization or anneal process, is converted to a gallium-rich region at the light-receiving surface of the CIGS absorber layer. A second gallium-rich region is formed at the back contact surface of the CIGS absorber layer during selenization, so that the CIGS absorber layer has a double-graded gallium concentration that increases toward the light-receiving surface and toward the back contact surface of the CIGS absorber layer. The double-graded gallium concentration advantageously produces a double-graded bandgap profile for the CIGS absorber layer.
    Type: Application
    Filed: February 21, 2014
    Publication date: June 19, 2014
    Applicant: INTERMOLECULAR, INC.
    Inventor: Haifan Liang
  • Patent number: 8748217
    Abstract: A method for manufacturing a thin film solar cell device includes forming a back contact layer on a substrate, forming an CIGS absorber layer on the back contact layer, treating the CIGS absorber layer with a metal-based alkaline solution, and forming a buffer layer on the CIGS absorber layer where the treatment of the CIGS absorber layer improves the adhesion between the CIGS absorber layer and the buffer layer and also improves the quality of the p-n junction at the CIGS absorber layer/buffer layer interface.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: June 10, 2014
    Assignee: TSMC Solar Ltd.
    Inventors: Chih-Ching Lin, Yong-Ping Chan, Kai-Yu Tung, Cheng-Tao Lee
  • Patent number: 8748214
    Abstract: A method of p-type doping cadmium telluride (CdTe) is disclosed. The method comprising the steps of, (a) providing a first component comprising cadmium telluride (CdTe) comprising an interfacial region, and (b) subjecting the CdTe to a functionalizing treatment to obtain p-type doped CdTe, said functionalizing treatment comprising a thermal treatment of at least a portion of the interfacial region in the presence of a first material comprising a p-type dopant, and of a second material comprising a halogen. A method of making a photovoltaic cell is also disclosed.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: June 10, 2014
    Assignee: First Solar, Inc.
    Inventors: John Anthony DeLuca, Scott Feldman-Peabody
  • Patent number: 8741685
    Abstract: The invention relates to a method for production of thin layers of semiconductor alloys of the I-III-VI2 type, including sulphur, for photovoltaic applications, whereby a heterostructure is firstly deposited on a substrate comprising a thin layer of precursor I-III-VI2 which is essentially amorphous and a thin layer, including at least some sulphur, the heterostructure is then annealed to promote the diffusion of the sulphur into the precursor layer and the at least partial crystallization of the I-III-VI2 alloy of the precursor layer with a stoichiometry which hence includes sulphur. A layer of selenium may also be deposited to assist the recrystallization processes or annealing.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: June 3, 2014
    Assignees: Electricite de France, Centre National de la Recherche Scientifique-CNRS
    Inventors: Stéphane Taunier, Daniel Lincot, Jean-Francois Guillemoles, Negar Naghavi, Denis Guimard
  • Patent number: 8728859
    Abstract: An example embodiment disclosed is a method for fabricating a phase change memory cell. The method includes forming a non-sublithographic via within an insulating substrate. The insulating substrate is embedded on the same layer as a first metalization layer (Metal 1) of a semiconductor wafer, and includes a bottom and a sidewall. A sublithographic aperture is formed through the bottom of the non-sublithographic via and extends to a buried conductive material. The sublithographic aperture is filled with a conductive non-phase change material. Furthermore, phase change material is deposited within the non-sublithographic via.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: May 20, 2014
    Assignee: International Business Machines Corporation
    Inventors: Matthew J. Breitwisch, Eric A. Joseph, Chung H. Lam, Hsiang-Lan Lung
  • Patent number: 8709863
    Abstract: Antimony, germanium and tellurium precursors useful for CVD/ALD of corresponding metal-containing thin films are described, along with compositions including such precursors, methods of making such precursors, and films and microelectronic device products manufactured using such precursors, as well as corresponding manufacturing methods. The precursors of the invention are useful for forming germanium-antimony-tellurium (GST) films and microelectronic device products, such as phase change memory devices, including such films.
    Type: Grant
    Filed: September 18, 2012
    Date of Patent: April 29, 2014
    Assignee: Advanced Technology Materials, Inc.
    Inventors: William Hunks, Tianniu Chen, Chongying Xu, Jeffrey F. Roeder, Thomas H. Baum, Matthias Stender, Philip S. H. Chen, Gregory T. Stauf, Bryan C. Hendrix
  • Patent number: 8709856
    Abstract: In particular embodiments, a method is described for forming photovoltaic devices that includes providing a substrate suitable for use in a photovoltaic device, depositing a conductive contact layer over the substrate, depositing a salt solution over the surface of the conductive contact layer, the solution comprising a volatile solvent and an alkali metal salt solute, and depositing a semiconducting absorber layer over the solute residue left by the evaporated solvent.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: April 29, 2014
    Assignee: Zetta Research and Development LLC—AQT Series
    Inventors: Brian Josef Bartholomeusz, Michael Bartholomeusz
  • Patent number: 8703524
    Abstract: A solar cell includes an absorber layer formed of a CIGAS, copper, indium, gallium, aluminum, and selenium. A method for forming the absorber layer provides for using an indium-aluminum target and depositing an aluminum-indium film as a metal precursor layer using sputter deposition. Additional metal precursor layers such as a CuGa layer are also provided and a thermal processing operation causes the selenization of the metal precursor layers. The thermal processing operation/selenization operation converts the metal precursor layers to an absorber layer. In some embodiments, the absorber layer includes a double graded chalcopyrite-based bandgap.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: April 22, 2014
    Assignee: TSMC Solar Ltd.
    Inventors: Wen-Tsai Yen, Chung-Hsien Wu, Shih-Wei Chen, Wen-Chin Lee
  • Patent number: 8697480
    Abstract: Methods for treating a semiconductor material, and for making devices containing a semiconducting material, are presented. One embodiment is a method for treating a semiconductor material that includes a chalcogenide. The method comprises contacting at least a portion of the semiconductor material with a chemical agent. The chemical agent comprises a solvent, and an iodophor dissolved in the solvent.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: April 15, 2014
    Assignee: First Solar, Inc.
    Inventor: Donald Franklin Foust
  • Patent number: 8691612
    Abstract: Provided is a method of enhancing thermoelectric performance by surrounding crystalline semiconductors with nanoparticles by contacting a bismuth telluride material with a silver salt under a substantially inert atmosphere and a temperature approximately near the silver salt decomposition temperature; and recovering a metallic bismuth decorated material comprising silver telluride crystal grains.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: April 8, 2014
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: Hyun-Jung Kim, Sang Hyouk Choi, Glen C. King, Yeonjoon Park, Kunik Lee
  • Patent number: 8664033
    Abstract: A gallium-containing alloy is formed on the light-receiving surface of a CIGS absorber layer, and, in conjunction with a subsequent selenization or anneal process, is converted to a gallium-rich region at the light-receiving surface of the CIGS absorber layer. A second gallium-rich region is formed at the back contact surface of the CIGS absorber layer during selenization, so that the CIGS absorber layer has a double-graded gallium concentration that increases toward the light-receiving surface and toward the back contact surface of the CIGS absorber layer. The double-graded gallium concentration advantageously produces a double-graded bandgap profile for the CIGS absorber layer.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: March 4, 2014
    Assignee: Intermolecular, Inc.
    Inventor: Haifan Liang