Cleaning Of Wafer As Interim Step Patents (Class 438/906)
  • Patent number: 7578302
    Abstract: A method and system for the megasonic cleaning of one or more substrates that reduces damage to the substrate(s) resulting from the megasonic energy. The substrates are supported in a process chamber and contacted with a cleaning solution comprising a cleaning liquid having carbon dioxide gas dissolved in the cleaning liquid in such amounts that the carbon dioxide gas is at a supersaturated concentration for the conditions within the process chamber. Megasonic energy is then transmitted to the substrate. The cleaning solution provides protection from damage resulting from the application of megasonic/acoustical energy. The invention is not limited to carbon dioxide but can be used in conjunction with any gas that, when so dissolved in a cleaning liquid, protects substrates from being damaged by the application of megasonic/acoustical energy.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: August 25, 2009
    Inventors: Cole S. Franklin, Yi Wu, Brian Fraser
  • Patent number: 7579253
    Abstract: Bottom electrodes of stacked capacitor DRAM cells are formed by depositing a metal layer on the side walls of trenches within a hard mask layer, which serves as a mold for the bottom electrode elements. Prior to depositing the hard mask layer a sacrificial first metal layer is disposed, which results in an electrically conductive surface on the semiconductor wafer. The mask layer is wet-etched to release the bottom electrode as free standing elements on the semiconductor surface. Using the conductive path provided by the first and the second metal layers, the bottom electrodes are polarized in a cleaning liquid bath during a wafer drying process. The generated repulsive electric field overcomes the attractive forces between the neighboring bottom electrode elements induced due to capillary effects of the liquids used for etching and cleaning.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: August 25, 2009
    Assignee: Infineon Technologies AG
    Inventor: Srivatsa Kundalgurki
  • Patent number: 7572342
    Abstract: A system for cleaning semiconductor lithography tools provides for cycling a polished-side down semiconductor wafer through the lithography tool using conventional automated robotics for loading and unloading the wafer from a vacuum chuck of the lithography tool. The vacuum chuck may provide a continuous clamping vacuum feature and may include a vacuum ring that surround the periphery of the vacuum chuck. The chuck and vacuum ring may advantageously be formed of a high accuracy ceramic or plastic such as ZeroDur ceramic. The polished side of the semiconductor wafer includes grooves in a polished surface and which extend inwardly from a peripheral edge of the wafer, the grooves provide gaps between the wafer and chuck allowing the wafer to be released by a slow loss of vacuum-pressure through the gaps. The pristine clean polished surface of the wafer getters contaminating particles from the chuck.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: August 11, 2009
    Assignee: Wafertech, LLC
    Inventor: Guy Jacobson
  • Patent number: 7566662
    Abstract: Provided is a method of manufacturing a semiconductor device. After a semiconductor wafer is placed over a wafer stage with which a dry cleaning chamber of a film forming apparatus is equipped, dry cleaning treatment is given over the surface of the semiconductor wafer with a reducing gas. Then, the semiconductor wafer is heat treated at a first temperature of from 100 to 150° C. by using a shower head kept at 180° C. The semiconductor wafer is then vacuum-transferred to a heat treatment chamber, wherein the semiconductor wafer is heat treated at a second temperature of from 150 to 400° C. A product remaining over the main surface of the semiconductor wafer is thus removed. The present invention makes it possible to manufacture a semiconductor device having improved reliability and production yield by reducing variations in the electrical properties of a nickel silicide layer.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: July 28, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Takuya Futase, Hideaki Tsugane, Mitsuo Kimoto, Hidenori Suzuki
  • Patent number: 7560369
    Abstract: The present invention provides a method of forming metal lines in a semiconductor device having advantages of preventing an “explosion” phenomenon during a dual damascene process so as to improve the yield of the device. An exemplary embodiment of the present invention includes removing etching residues by wet cleaning the semiconductor substrate after forming the via hole, dry cleaning the semiconductor substrate after the wet cleaning, and forming a second metal line that is electrically connected with the first metal line through the via hole.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: July 14, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jea-Hee Kim
  • Patent number: 7550090
    Abstract: A method for in-situ cleaning of a dielectric dome surface having been used in pre-clean processes is provided. Carbon containing deposits are removed by providing a plasma of one or more oxidizing gases which react with the carbon containing films to form volatile carbon containing compounds.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: June 23, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Quancheng Gu, Cheng-Hsiung Tsai, John C. Forster, Xiaoxi Guo, Larry Frazier
  • Patent number: 7546840
    Abstract: After semiconductor wafers are loaded into a reaction vessel, and ruthenium (Ru) film or ruthenium oxide film is formed, the interior of the reaction vessel is efficiently cleaned without contaminating the wafers. The interior of the reaction vessel is heated to a temperature of above 850° C. while the pressure inside the reaction vessel is reduced to, e.g., 133 pa (1 Torr)-13.3 Kpa (100 Torr), and oxygen gas is fed into the reaction vessel at a flow rate of, e.g., above 1.5 Lm, whereby the ruthenium film or the ruthenium oxide film formed inside the reaction vessel is cleaned off. In place of oxygen gas, active oxygen, such as O3, O* and OH*, etc. may be used.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: June 16, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Kazuhide Hasebe, Daisuke Nozu, Dong-Kyun Choi
  • Patent number: 7531047
    Abstract: The present disclosure provides a method of cleaning a semiconductor substrate after a DRIE etch process, wherein residue from the DRIE process is removed without damaging the substrate. The process may include contacting the micro-fluid ejection head with an aqueous solution of TMAH, stripping a photoresist etch mask from the micro-fluid ejection head, and dissolving a passivating coating from the substrate. Then the substrate may be contacted with an acidic solution. The method may further include rinsing and drying the substrate.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: May 12, 2009
    Assignee: Lexmark International, Inc.
    Inventors: Paul William Dryer, James Michael Mrvos, David Bruce Rhine
  • Patent number: 7521361
    Abstract: A method for manufacturing a wiring substrate by an electroless plating method that precipitates metal without using a plating resist is provided. The method includes the steps of: (a) providing a catalyst layer having a predetermined pattern on a substrate; (b) dipping the substrate in an electroless plating solution to thereby precipitate metal on the catalyst layer to provide a first metal layer; (c) washing a top surface of the substrate with water; and (d) dipping the substrate in an electroless plating solution to thereby precipitate metal on the first metal layer to provide a second metal layer.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: April 21, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Satoshi Kimura, Hidemichi Furihata, Takeshi Kijima
  • Patent number: 7510970
    Abstract: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: March 31, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Naofumi Ohashi, Junji Noguchi, Toshinori Imai, Hizuru Yamaguchi, Nobuo Owada, Kenji Hinode, Yoshio Homma, Seiichi Kondo
  • Patent number: 7504267
    Abstract: Contaminants from surfaces of temperature sensitive substrates, such as glass substrates are removed by exposing the surfaces to a hydrogen Surface-mixed diffusion flame for a predetermined duration of time. The predetermined duration of time being insufficient to heat up the surfaces substantially thereby causing damage to the temperature sensitive substrates.
    Type: Grant
    Filed: November 20, 2002
    Date of Patent: March 17, 2009
    Assignee: Agency For Science, Technology and Research
    Inventors: David Tee Liang, Tuti Mariana Lim, Sau Ngen Chen
  • Patent number: 7479460
    Abstract: Methods are provided for producing a pristine hydrogen-terminated silicon wafer surface with high stability against oxidation. The silicon wafer is treated with high purity, heated dilute hydrofluoric acid with anionic surfactant, rinsed in-situ with ultrapure water at room temperature, and dried. Alternatively, the silicon wafer is treated with dilute hydrofluoric acid, rinsed with hydrogen gasified water, and dried. The silicon wafer produced by the method is stable in a normal clean room environment for greater than 3 days and has been demonstrated to last without significant oxide regrowth for greater than 8 days.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: January 20, 2009
    Assignee: ASM America, Inc.
    Inventor: Robert H. Pagliaro, Jr.
  • Patent number: 7470631
    Abstract: A two-step via cleaning process that removes metal polymer and oxide polymer residues from a via with substantially no damage to the via or underlying structures on a semiconductor substrate. The via is formed through a dielectric layer and a barrier layer that are disposed over a metal-containing trace, pad, or other such circuitry, wherein the metal-containing trace, pad, or other circuitry is disposed on a semiconductor substrate. When such a via is formed, the sidewalls of the via are coated with a residue layer. The residue layer generally has a distinct oxide polymer component and a distinct metal polymer component. The two-step cleaning process comprises first subjecting the residue layer to a nitric acid dip that removes the metal polymer component to expose the oxide polymer component. The oxide polymer component is then subjected to a phosphoric acid dip that removes the oxide polymer component.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: December 30, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Li Li
  • Patent number: 7468325
    Abstract: A method of cleaning a silicon nitride layer on a substrate is provided to effectively remove negative-charged impurities such as polymer and particle from the silicon nitride layer. In the method, the zeta potential of the silicon nitride layer is changed from positive to negative, and then the silicon nitride layer is cleaned with a first solution selected from an alkali solution and an NC-2 solution. So the negatively-charged impurities can be easily removed due to a repulsion force. The substrate can be treated with spin scrubber or quick dump rinse before and/or after the changing of the zeta potential. To change the zeta potential, the substrate can be dipped into a second solution such as an SC-1 solution, an NC-2 solution, and an alkali solution.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: December 23, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Dae Heok Kwon
  • Patent number: 7465478
    Abstract: A method of processing a workpiece includes placing the workpiece on a workpiece support pedestal in a main chamber with a gas distribution showerhead, introducing a process gas into a remote plasma source chamber and generating a plasma in the remote plasma source chamber, transporting plasma-generated species from the remote plasma source chamber to the gas distribution showerhead so as to distribute the plasma-generated species into the main chamber through the gas distribution showerhead, and applying plasma RF power into the main chamber.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: December 16, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Kenneth S. Collins, Hiroji Hanawa, Kartik Ramaswamy, Andrew Nguyen, Amir Al-Bayati, Biagio Gallo
  • Patent number: 7456084
    Abstract: There is provided a method of fabricating a wafer, comprising depositing semiconductor material into a recess in a setter, moving the setter through a heating/cooling region to subject the semiconductor material to a temperature profile, and removing a wafer from the recess. The size and shape of the wafer are substantially equal to the size of the wafer when it is used. As a result, the wafer can be fabricated in any desired shape and with any of a variety of surface structural features and/or internal structural features. The temperature profile can be closely controlled, enabling production of wafers having structural features not previously obtainable. There are also provided wafers formed by such methods and setters for use in such methods.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: November 25, 2008
    Assignee: Heritage Power LLC
    Inventors: Ralf Jonczyk, Scott L. Kendall, James A. Rand
  • Patent number: 7452749
    Abstract: In a method for manufacturing a semiconductor device, either a nickel layer or a nickel-based metal layer is formed on a semiconductor substrate by using a plating process. Then, either the nickel layer or the nickel-based metal layer is washed with one of an aqueous hydrochloric acid solution and an aqueous sulfuric acid solution.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: November 18, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Hiroaki Tachibana
  • Patent number: 7432177
    Abstract: A combination of a dry oxidizing, wet etching, and wet cleaning processes are used to remove particle defects from a wafer after ion implantation, as part of a wafer bonding process to fabricate a SOI wafer. The particle defects on the topside and the backside of the wafer are oxidized, in a dry strip chamber, with an energized gas. In a wet clean chamber, the backside of the wafer is treated with an etchant solution to remove completely or partially a thermal silicon oxide layer, followed by exposure of the topside and the backside to a cleaning solution. The cleaning solution contains ammonium hydroxide, hydrogen peroxide, DI water, and optionally a chelating agent, and a surfactant. The wet clean chamber is integrated with the dry strip chamber and contained in a single wafer processing system.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: October 7, 2008
    Assignee: Applied Materials, Inc.
    Inventors: James S. Papanu, Han-Wen Chen, Brian J. Brown, Steven Verhaverbeke
  • Patent number: 7431855
    Abstract: An apparatus and method for removing photoresist from a substrate, which includes treating the photoresist with a first reactant to cause swelling, cracking or delamination of the photoresist, treating the photoresist with a second reactant to chemically alter the photoresist, and subsequently removing the chemically altered photoresist with a third reactant. In one example, the first reactant is supercritical carbon dioxide (SCCO2), the second reactant is ozone vapor, and the third reactant is deionized water.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: October 7, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Donggyun Han, Woosung Han, Changki Hong, Sangjun Choi, Hyungho Ko, Hyosan Lee
  • Patent number: 7432186
    Abstract: Affords methods of surface treating a substrate and of manufacturing Group III-V compound semiconductors, in which a substrate made of a Group III-V semiconductor compound is rendered stoichiometric, and microscopic roughness on the surface following epitaxial growth is reduced. The methods include preparing a substrate made of a Group III-V semiconductor compound (S10), and cleaning the substrate with a cleaning solution whose pH has been adjusted to an acidity of 2 to 6.3 inclusive, and to which an oxidizing agent has been added (S20).
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: October 7, 2008
    Assignee: Sumitomo Electric Industries, Ltd
    Inventors: Takayuki Nishiura, Tomoki Uemura
  • Patent number: 7412982
    Abstract: A cleaning probe capable of providing uniform cleaning to an entire wafer while not damaging the edge portion of the wafer, and a megasonic cleaning apparatus having the cleaning probe are provided. The cleaning probe comprises a front portion located near the center of the wafer, a rear portion connected to a piezoelectric transducer, and a protrusion located between the rear portion and the front portion, located on an edge portion of the wafer, and having a larger cross section width than the front portion.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: August 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sun-Jung Kim
  • Patent number: 7402258
    Abstract: Methods of removing metal contaminants from a component for a plasma processing apparatus are provided. The method includes cleaning a surface of the component with a cleaning liquid that includes at least one acid selected from oxalic acid, formic acid, acetic acid, citric acid, and mixtures thereof.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: July 22, 2008
    Assignee: Lam Research Corporation
    Inventors: Mark W. Kiehlbauch, John E. Daugherty, Harmeet Singh
  • Publication number: 20080171449
    Abstract: A method for cleaning suicide includes providing a substrate having at least an intergraded silicide and residues, sequentially performing an ammonia hydrogen peroxide (APM) mixture cleaning process and a vaporized hydrochloric acid-hydrogen peroxide mixture (HPM) cleaning process to remove the residues, and performing a sulfuric acid-hydrogen peroxide mixture (SPM) cleaning process to remove residuals of the vaporized HPM cleaning process.
    Type: Application
    Filed: January 15, 2007
    Publication date: July 17, 2008
    Inventors: Chao-Ching Hsieh, Tzung-Yu Hung, Chun-Chieh Chang, Yi-Wei Chen, Yu-Lan Chang
  • Patent number: 7368383
    Abstract: A method for treating a copper surface of a semiconductor device provides exposing the copper surface to a citric acid solution after the surface is formed using CMP (chemical mechanical polishing) or other methods. The citric acid treatment may take place during a cleaning operation that takes place in a wafer scrubber, or subsequent to such an operation. The citric acid treatment removes copper oxides that form on copper surfaces exposed to the environment and prevents hillock formation during subsequent high temperature operations. The copper surface is then annealed and the annealing followed by an NH3 plasma treatment which again removes any copper oxides that may be present. The NH3 plasma operation roughens exposed surfaces improving the adhesion of subsequently-formed films such as a dielectric film preferably formed in-situ with the NH3 plasma treatment. The subsequently-formed film is formed over an oxide-free, hillock-free copper surface.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: May 6, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chi Lin, Francis Wang, Wen-Long Lee, Sez-An Wu
  • Patent number: 7361598
    Abstract: Disclosed is a method for fabricating a semiconductor device capable of preventing scratches. The method includes the steps of: forming a substrate divided into a peripheral region and a cell region where a capacitor including a metal plate electrode on which particles with a pointed shape are generated is formed; forming an inter-layer insulation layer with a poor step coverage on the metal plate electrode, the particles with the pointed shape and a surface of the substrate in the peripheral region; etching a portion of the inter-layer insulation layer, thereby exposing predetermined portions of lateral sides of the particles with the pointed shape; selectively removing the exposed portions of the particles with the pointed shape to separate top portions of the particles with the pointed shape from the inter-layer insulation layer; and planarizing the inter-layer insulation layer through a chemical mechanical polishing (CMP) process.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: April 22, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventor: Yang-Han Yoon
  • Patent number: 7344975
    Abstract: A method of high aspect ratio contact etching a substantially vertical contact hole in an oxide layer using a hard photoresist mask is described. The oxide layer is deposited on an underlying substrate. A plasma etching gas is formed from a carbon source gas. Dopants are mixed into the gas. The doped plasma etching gas etches a substantially vertical contact hole through the oxide layer by doping carbon chain polymers formed along the sidewalls of the contact holes during the etching process into a conductive state. The conductive state of the carbon chain polymers reduces the charge buildup along sidewalls to prevent twisting of the contact holes by bleeding off the charge and ensuring proper alignment with active area landing regions. The etching stops at the underlying substrate.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: March 18, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Max F. Hineman, Daniel A. Steckert, Jingyi Bai, Shane J. Trapp, Tony Schrock
  • Publication number: 20080050879
    Abstract: A method of forming a metal-containing gate includes forming a high-k dielectric layer over a substrate. A process using an oxygen-containing solution is provided to process the high-k dielectric layer. A metal-containing layer is formed over the high-k dielectric layer. The high-k dielectric layer and metal-containing layer are patterned, thereby defining a gate structure.
    Type: Application
    Filed: August 23, 2006
    Publication date: February 28, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Lung Hung, Peng-Fu Hsu, Jin Ying, Hun-Jan Tao
  • Patent number: 7320942
    Abstract: A method for removal of metallic residue from a substrate after a plasma etch process in a semiconductor substrate processing system by cleaning the substrate in a hydrogen fluoride solution.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: January 22, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Xiaoyi Chen, Chentsau Ying, Padmapani C. Nallan, Ajay Kumar, Ralph C. Kerns, Ying Rui, Chun Yan, Guowen Ding, Wai-Fan Yau
  • Patent number: 7306681
    Abstract: A cleaning method and cleaning recipes are disclosed. The present invention relates to a method for cleaning a semiconductor substrate and cleaning recipes. The present invention utilizes a first cleaning solution including diluted hydrofluoric acid and a second cleaning solution including hydrogen chloride and hydrogen peroxide (H2O2) to clean a semiconductor substrate without using an alkaline solution including ammonium hydroxide. Accordingly, a clean surface of a semiconductor substrate is provided in selective epitaxial growth (SEG) process to grow an epitaxial layer with smooth surface.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: December 11, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Ya-Lun Cheng, Yi-Chia Lee, Yu-Ren Wang, Neng-Hui Yang
  • Patent number: 7303637
    Abstract: Devices and methods of cleaning are described. The methods, and devices formed by the methods have a number of advantages. Embodiments are shown that include cleaning using a supercritical fluid. Advantages include a combination of both chemical and mechanical removal abilities from the supercritical fluid. Mechanical energy for cleaning is transmitted in a homogenous manner throughout a carrier fluid. The mechanical energy provided in methods shown also can also be used with delicate surface features.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: December 4, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Paul A. Farrar
  • Publication number: 20070254476
    Abstract: A cleaning solution and a method for cleaning a semiconductor wafer using the cleaning solution are provided. The method includes submerging the semiconductor wafer in a cleaning solution to remove by-products generated during integrated circuit formation processes. The cleaning solution includes an organic solvent, a metal reagent, a substitutive agent, and water.
    Type: Application
    Filed: August 7, 2006
    Publication date: November 1, 2007
    Inventors: Chun-Li Chou, Jyu-Horng Shieh, Syun-Ming Jang
  • Patent number: 7284558
    Abstract: The present invention relates to the use of a C1 to C5 alcohol during the cleaning step. With the use of said alcohol, the surface tension of the solution is reduced which allows the application of reduced megasonic power with increased cleaning efficiency.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: October 23, 2007
    Assignee: Infineon Technologies AG
    Inventor: Srivatsa Kundalgurki
  • Patent number: 7282099
    Abstract: Method for processing an article by contacting the article with a dense fluid. The article is introduced into a sealable processing chamber and the processing chamber is sealed. A dense fluid is prepared by introducing a subcritical fluid into a pressurization vessel and isolating the vessel, and then heating the subcritical fluid at essentially constant volume and essentially constant density to yield a dense fluid. At least a portion of the dense fluid is transferred from the pressurization vessel to the processing chamber, wherein the transfer of the dense fluid is driven by the difference between the pressure in the pressurization vessel and the pressure in the processing chamber, thereby pressurizing the processing chamber with transferred dense fluid. The article is contacted with the transferred dense fluid to yield a spent dense fluid and a treated article, and the spent dense fluid is separated from the treated article.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: October 16, 2007
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Wayne Thomas McDermott, Richard Carl Ockovic, Alexander Schwarz
  • Patent number: 7282098
    Abstract: A method for reducing energy consumption, and amounts of cleaning liquids and rinse liquids used. A cleaning head has a plurality of cleaning units and a drying unit. The organic, and inorganic, substance cleaning portions of each cleaning head, blows a first, and a second, cleaning agent selectively over a portion to be cleaned of a substrate, and sucks reaction products etc. through a first, and second, suction mouth, respectively. A rinse portion blows pure water over the portion of the substrate from which inorganic substances have been removed, and sucks its vapor through a third suction mouth. The drying unit dries the substrate by blowing out a heated gas from a hot wind blowing-out mouth. A light guide illuminates the portion to be cleaned, of the substrate, with ultraviolet light, and thereby decomposes residual organic substances.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: October 16, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Yoshiaki Mori
  • Patent number: 7264680
    Abstract: A method for cleaning a semiconductor workpiece having a metal layer in a processing chamber includes the steps of introducing a liquid solution including dissolved carbon dioxide onto the workpiece, and introducing ozone into the processing chamber. The ozone oxidizes contaminants on the workpiece, while the carbon dioxide inhibits corrosion of the metal layer. The liquid solution is preferably heated to a temperature greater than 40° C., and preferably comprises deionized water injected with carbon dioxide gas. The workpiece is preferably rotated within the processing chamber during the cleaning process. The ozone may be entrained in the liquid solution before the liquid solution is introduced onto the workpiece, or the ozone may be introduced separately into the processing chamber.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: September 4, 2007
    Assignee: Semitool, Inc.
    Inventors: Thomas Maximilia Gebhart, Eric J. Bergman
  • Patent number: 7262141
    Abstract: A method for cleaning a semiconductor substrate forming device isolation layers in a predetermined region of a semiconductor substrate to define active regions; etching predetermined areas of the active regions to form a recess channel region and such that sidewalls of the device isolation layers are exposed; and selectively etching a surface of the recess channel region using a predetermined cleaning solution to clean the semiconductor substrate where the recess channel region has been formed.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: August 28, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-Ho Ko, Chang-Ki Hong, Sang-Jun Choi, Dong-Gyun Han
  • Patent number: 7259024
    Abstract: A method of treating a substrate in manufacturing a magnetoresistive memory cell includes performing a cleaning operation on the substrate using a mask layer as a protection layer for etching of a peripheral via. Further, an etch stop layer can used as a protection layer in a cleaning operation on the substrate.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: August 21, 2007
    Assignee: Infineon Technologies AG
    Inventors: Stefan Ottow, Kim Woosik, Rainer Leuschner
  • Patent number: 7255749
    Abstract: In a cleaning treatment of a substrate using an aqueous solution of ammonium fluoride or a mixture of an aqueous solution of ammonium fluoride and hydrofluoric acid as a cleaning liquid, the cleaning liquid is replenished by at least one liquid selected from the group consisting of water, ammonia, aqueous ammonia, and an aqueous solution of ammonium fluoride with the lapse of time during the use of the cleaning liquid, in which the required amount of the liquid to be added according to the time lapse is calculated based on the measurement date and controlled, or the component concentration of the cleaning liquid is detected and the liquid is added according to the obtained result, so that not only can the substrate be cleaned uniformly and stably, but also a resource saving and a reduction in waste can be achieved.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: August 14, 2007
    Assignee: Sony Corporation
    Inventors: Yasuhito Inagaki, Mineo Shimizu, Yoshihiro Fujitani
  • Patent number: 7235141
    Abstract: A lift-off procedure is provided which enables prevention of damage to a wiring pattern caused by contact of a metal being peeled off from a wafer with a wiring pattern at a time of lift-off procedure. A wafer having a surface on which a pattern is formed which contains a pattern portion to be removed is soaked into a chemical liquid at an angle at which the surface faces downward.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: June 26, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Masaru Suzuki, Yoshiki Nitta, Kazuhiko Ohmuro
  • Patent number: 7229863
    Abstract: A method for fabricating a thin film transistor is provided. First, a gate is formed on a substrate. A gate-insulating layer is formed to cover the gate. A patterned semiconductor layer is formed on the gate-insulating layer. A first and a second conductive layer are formed on the patterned semiconductor layer in sequence. The second conductive layer is patterned such that each side of thereof above the gate has a taper profile and the first conductive layer is exposed. A first plasma process is performed to transform the surface and the taper profile of the second conductive layer into a first protection layer. The first conductive layer not covered by the first protection layer and the second conductive layer is removed to form a source/drain. The source/drain is with fine dimensions and the diffusion of metallic ions from the second conductive layer to the patterned semiconductor layer can be avoided.
    Type: Grant
    Filed: October 25, 2005
    Date of Patent: June 12, 2007
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Chuan-Yi Wu, Yung-Chia Kuan, Chia-Chien Lu, Chin-Chuan Lai
  • Patent number: 7226513
    Abstract: This invention provides a cleaning method of silicon wafer for obtaining a silicon wafer in which micro roughness thereof under spatial frequency of 20/?m is 0.3 to 1.5 nm3 in terms of power spectrum density, by passing a process of oxidizing the silicon wafer with ozonized water and a process of cleaning said oxidized silicon wafer with hydrofluoric acid. Consequently, it is possible to remove surface adhering pollutant such as particles and metallic foreign matter with the surface structure of silicon wafer flattened up to atomic level by annealing maintained.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: June 5, 2007
    Assignee: Toshiba Ceramics Co., Ltd.
    Inventors: Hisatsugu Kurita, Manabu Hirasawa, Hiromi Nagahama, Koji Izumome, Takao Ino, Jyunsei Yamabe, Naoya Hayamizu, Naoaki Sakurai
  • Patent number: 7205231
    Abstract: The present invention is directed to a method for thermally processing a substrate in a thermal processing system. The method provides an amount of heat to the substrate and obtains information associated with the substrate when the amount of heat is provided. For example, the substrate is provided at a presoak position within the thermal processing system, wherein the presoak position, and one or more properties associated with the substrate, such as a position and temperature, are measured. An optimal process parameter value to provide an optimal thermal uniformity of the substrate is then determined, based, at least in part, on the information obtained from the substrate. For example, a soak position of the substrate is determined, wherein the determination is based, at least in part, on the one or more measured properties associated with the substrate, and a thermal uniformity associated with a reference data set.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: April 17, 2007
    Assignee: Axcelis Technologies, Inc.
    Inventors: Peter A. Frisella, Paul Lustiber, James Willis
  • Patent number: 7192878
    Abstract: A low-k dielectric film is deposited on the wafer. A metal layer is then deposited over the low-k dielectric film. A resist pattern is formed over the metal layer. The resist pattern is then transferred to the underlying metal layer to form a metal pattern. The resist pattern is stripped off. A through hole is plasma etched into the low-k dielectric film by using the metal pattern as a hard mask. The plasma etching causes residues to deposit within the through hole. A first wet treatment is then performed to soften the residues. A plasma dry treatment is carried out to crack the residues. A second wet treatment is performed to completely remove the residues.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: March 20, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Cheng-Ming Weng, Miao-Chun Lin, Chun-Jen Huang
  • Patent number: 7192489
    Abstract: A method for removing polymer containing residues from a semiconductor wafer including metal containing features including providing a semiconductor wafer having a process surface including metal containing features said process surface at least partially covered with polymer containing residues; and, subjecting the semiconductor wafer to a series of cleaning steps including sequentially exposing the process surface to at least one primary solvent and at least one intermediate solvent the at least one intermediate solvent comprising an ammonium nitrate containing solution.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: March 20, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Hsin Lo, Fei-Yun Chen
  • Patent number: 7186657
    Abstract: A wafer has a trench, a STI layer formed in the trench, an HfO2-containing gate dielectric covering the wafer and the STI layer, a gate electrode formed on the HfO2-containing gate dielectric, and at least a spacer formed beside the gate electrode. The wafer is preheated and a bromine-rich gas plasma is provided to remove portions of the HfO2-containing gate dielectric.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: March 6, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Jeng-Huey Hwang, Wei-Tsun Shiau, Chien-Ting Lin, Jiunn-Ren Hwang
  • Patent number: 7182821
    Abstract: Disclosed is a substrate processing method including a substrate rotating step for rotating a substrate with the substrate held almost horizontally within a chamber; a peripheral edge processing step for discharging a processing liquid to a lower surface of the substrate rotated in the substrate rotating step and causing the processing liquid to flow around an upper surface of the substrate at a peripheral edge thereof from the lower surface of the substrate to process the peripheral edge of the upper surface of the substrate in the chamber; and a both-surface processing step for discharging the processing liquid to both the surfaces of the substrate rotated in the substrate rotating step to process both the surfaces of the substrate in the chamber.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: February 27, 2007
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Akira Izumi, Katsuhiko Miya
  • Patent number: 7169704
    Abstract: A method of cleaning a surface of a silicon wafer includes subjecting the surface of the silicon wafer to a hydrogen (H2) gas plasma containing at least one inert gas while biasing the hydrogen plasma with a RF bias power to direct the hydrogen (H2) plasma to clean the surface of the silicon wafer.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: January 30, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyeongmo Koo, Jaihyung Won, Hyeonill Um, Sunhyuk Jung, Sangwook Park
  • Patent number: 7166505
    Abstract: A method for making a semiconductor device is described. That method includes forming on a substrate a dielectric layer that has a dielectric constant that is greater than the dielectric constant of silicon dioxide. The dielectric layer is modified so that it will be compatible with a gate electrode to be formed on the dielectric layer, and then a gate electrode is formed on the dielectric layer.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: January 23, 2007
    Assignee: Intel Corporation
    Inventors: Robert Chau, Reza Arghavani, Mark Doczy
  • Patent number: 7160396
    Abstract: A washing method has a nonaqueous washing process of washing an object to be washed using a nonaqueous solution, an intermediate washing process of washing the object to be washed using a solution having solubility relative to both an aqueous solution and the nonaqueous solution after said nonaqueous washing process; and an aqueous washing process of washing the object to be washed with the aqueous solution after said intermediate washing process. When an intermediate washing process is performed between the nonaqueous washing process and the aqueous washing process, the nonaqueous solution adhered to the object to be washed in the nonaqueous washing process is removed in the intermediate washing process, and replaced by a solution having solubility relative to both the nonaqueous solution and the aqueous solution, so as to prevent the nonaqueous solution from being introduced into the aqueous solution used in the aqueous washing process.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: January 9, 2007
    Assignee: Minolta Co., Ltd.
    Inventor: Kazuyuki Nishi
  • Patent number: 7156111
    Abstract: A method and system for the megasonic cleaning of one or more substrates that reduces damage to the substrate(s) resulting from the megasonic energy. The substrates are supported in a process chamber and contacted with a cleaning solution comprising a cleaning liquid having carbon dioxide gas dissolved in the cleaning liquid in such amounts that the carbon dioxide gas is at a supersaturated concentration for the conditions within the process chamber. Megasonic energy is then transmitted to the substrate. The cleaning solution provides protection from damage resulting from the application of megasonic/acoustical energy. In another aspect, the invention is a system for carrying out the method. The invention is not limited to carbon dioxide but can be used in conjunction with any gas that, when so dissolved in a cleaning liquid, protects substrates from being damaged by the application of megasonic/acoustical energy.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: January 2, 2007
    Assignee: Akrion Technologies, Inc
    Inventors: Cole S. Franklin, Yi Wu, Brian Fraser