Cleaning Of Wafer As Interim Step Patents (Class 438/906)
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Patent number: 6864193Abstract: A composition and method for fabricating a semiconductor wafer containing copper is disclosed, which method includes plasma etching a dielectric layer from the surface of the wafer, plasma ashing a resist from the surface of the wafer, and cleaning the wafer surface by contacting same with a cleaning formulation, which includes the following components and their percentage by weight ranges shown: (a) from about 0.01 to 80% by weight organic solvent, (b) from about 0.01 to 30% by weight copper chelating agent, (c) from about 0.01 to 10% by weight copper inhibitor, and (d) from about 0.01 to 70% by weight water.Type: GrantFiled: March 5, 2003Date of Patent: March 8, 2005Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chun-Li Chou, Hun-Jan Tao, Peng-Fu Hsu
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Patent number: 6858549Abstract: After a plurality of grooves are formed in an insulating film and in an antireflection film on the insulating film, a barrier metal film and a conductive film are deposited on the anti-reflection film such that each of the grooves is filled. Subsequently, the portions of the conductive film outside the grooves are removed by a first polishing step and then the portions of the barrier metal film outside the grooves are removed by polishing. Thereafter, foreign matter adhered to the surface of the anti-reflection film is removed and a third polishing step is conducted on the surface of the anti-reflection film using an abrasive agent of the same type as used in the first polishing step of the conductive film.Type: GrantFiled: December 26, 2002Date of Patent: February 22, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masashi Hamanaka, Takeshi Harada, Hideaki Yoshida, Tetsuya Ueda
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Patent number: 6855576Abstract: The present invention provides a method for cleaning a ceramic member for use in a system for producing semiconductors. The method has the step of cleaning the ceramic member with an organic acid or a weak acid. Preferably, the ceramic member is cleaned with a strong acid before the cleaning with an organic acid or a weak acid. The ceramic member may be subjected to a blasting treatment before the cleaning with an organic acid or a weak acid. According to the method, the amount of metal transferred from the ceramic member to a semiconductor may be considerably reduced.Type: GrantFiled: October 15, 2002Date of Patent: February 15, 2005Assignee: NGK Insulators, Ltd.Inventors: Shinji Yamaguchi, Taiji Kiku, Nobuyuki Kondou
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Patent number: 6848455Abstract: Contaminants are removed from a semiconductor wafer by the in-situ generation of oxidizing species. These active species are generated by the simultaneous application of ultra-violet radiation and chemicals containing oxidants such as hydrogen peroxide and dissolved ozone. Ultrasonic or megasonic agitation is employed to facilitate removal. Radicals are generated in-situ, thus generating them close to the semiconductor substrate. The process chamber has a means of introducing both gaseous and liquid reagents, through a gas inlet, and a liquid inlet. O2, O3, and H2O vapor gases are introduced through the gas inlet. H2O and H2O2 liquids are introduced through the liquid inlet. Other liquids such as ammonium hydroxide (NH4OH), hydrochloric acid (HCI), hydrofluoric acid (HF), and the like, may be introduced to further constitute those elements of the traditional RCA clean. The chemicals are premixed in a desired ration and to a predetermined level of dilution prior to being introduced into the chamber.Type: GrantFiled: April 22, 2002Date of Patent: February 1, 2005Assignee: Novellus Systems, Inc.Inventors: Krishnan Shrinivasan, Adrianne Tipton
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Patent number: 6843257Abstract: Embodiments of the invention include a megasonic energy cleaning apparatus that has the ability to rotate the wafer to be cleaned, as well as rotate the cleaning probe during the cleaning process. Rotating the cleaning probe while the wafer is being cleaned is effective to increase the cleaning action of the apparatus while also minimizing damage to the wafer. Curved grooves, such as a spiral groove, can be etched into the cleaning probe to minimize forming harmful waves that could potentially cause damage to the wafer surface or to structures already made on the surface. Using a cleaning probe having a curved groove while also rotating the cleaning probe effectively cleans particles from a wafer while also limiting damage to the surface of the wafer.Type: GrantFiled: April 25, 2002Date of Patent: January 18, 2005Assignee: Samsung Electronics Co., Ltd.Inventors: In-Jun Yeo, Kyung-Hyun Kim, Jeong-Lim Nam, Byoung-Moon Yoon, Hyun-Ho Cho, Sang-Rok Hah
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Patent number: 6843857Abstract: The invention encompasses methods for cleaning surfaces of wafers or other semiconductor articles. Oxidizing is performed using an oxidation solution which is wetted onto the surface. The oxidation solution can include one or more of: water, ozone, hydrogen chloride, sulfuric acid, or hydrogen peroxide. A rinsing step removes the oxidation solution and inhibits further activity. The rinsed surface is thereafter preferably subjected to a drying step. The surface is exposed to an oxide removal vapor to remove semiconductor oxide therefrom. The oxide removal vapor can include one or more of: acids, such as a hydrogen halide, for example hydrogen fluoride or hydrogen chloride; water; isopropyl alcohol; or ozone. The processes can use centrifugal processing and spraying actions.Type: GrantFiled: October 7, 2003Date of Patent: January 18, 2005Assignee: Semitool, Inc.Inventor: Eric J. Bergman
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Patent number: 6840249Abstract: In order to clean a semiconductor device having a dielectric layer deposited on a top surface of a lower metal wiring of the semiconductor device, and a contact hole or a via hole formed in the dielectric layer to expose the lower metal line therethrough, the semiconductor device is located within a radio frequency (RF) cleaning chamber. A gas mixture of HCl and H2O is introduced into the RF cleaning chamber and Ar gas plasma is generated in the RF cleaning chamber to excite HCl gas so that the HCl gas and an excited HCl gas are used to remove carbon radicals and metal particles.Type: GrantFiled: December 26, 2002Date of Patent: January 11, 2005Assignee: Dongbu Electronics Co., Ltd.Inventor: Bo Min Seo
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Patent number: 6841470Abstract: A method and an apparatus of removing a particle from a metal plug on a substrate is disclosed. The method comprises introducing a slurry onto the metal layer and polishing the metal layer. A solution comprising hydrogen peroxide is introduced onto the metal plug and at least one particle is removed from the metal plug.Type: GrantFiled: December 31, 1999Date of Patent: January 11, 2005Assignee: Intel CorporationInventors: Li-Shun Wang, John Chu
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Patent number: 6838369Abstract: A method for forming a contact hole of a semiconductor device, wherein a polymer residual on a bottom surface of the contact hole is treated with plasma of mixture gas containing oxygen to convert the polymer residual into a pure silicon oxide film free of carbon and fluorine for easy removal in a subsequent washing process is disclosed. The method comprises (a) sequentially forming a capping layer and a planarized interlayer insulating film on a semiconductor substrate having a predetermined lower structure; (b) selectively etching the interlayer insulating film to expose a predetermined region of the capping layer; (c) removing the exposed capping layer; (d) subjecting the resulting structure to a plasma treatment using a mixture gas containing oxygen; and (e) performing a cleaning process.Type: GrantFiled: June 30, 2003Date of Patent: January 4, 2005Assignee: Hynix Semiconductor Inc.Inventors: Ho Seok Lee, Dong Sauk Kim, Jin Woong Kim
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Patent number: 6837944Abstract: A method of cleaning semiconductor wafers before the epitaxial deposition comprising (A) etching silicon wafers with HF; (B) rinsing the etched wafers with ozonated ultrapure water; (C) treating the rinsed wafers with dilute SC1; (D) rinsing the treated wafers; (E) treating the wafers with dilute HF; (F) rinsing the wafers with DI water; (G) drying the wafers with nitrogen and a trace amount of IPA; wherein steps (E) through (G) are conducted in a single dryer chamber and wafers are not removed from the chamber between steps. A system comprising a single tank adapted for cleaning, etching, rinsing, and drying the wafers has means to inject HF into a DI water stream.Type: GrantFiled: March 4, 2002Date of Patent: January 4, 2005Assignee: Akrion LLCInventors: Ismail Kashkoush, Gim-Syang Chen, Richard Ciari, Richard E. Novak
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Patent number: 6830631Abstract: A method of removing first molecules adsorbed on the surfaces of a chamber and/or at least one object found in the chamber is provided. Second, polar molecules that have a desorptive effect on the first molecules are introduced into the chamber. The second molecules comprise nitrogen and hydrogen, and especially NH3 molecules.Type: GrantFiled: September 25, 2002Date of Patent: December 14, 2004Assignee: Steag RTP Systems GmbHInventors: Zsolt Nenyei, Wilfried Lerch, Jürgen Niess, Thomas Graf
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Patent number: 6828228Abstract: A two-step via cleaning process that removes metal polymer and oxide polymer residues from a via with substantially no damage to the via or underlying structures on a semiconductor substrate. The two-step cleaning process comprises first subjecting the residue layer to a nitric acid dip that removes the metal polymer component to expose the oxide polymer component. The oxide polymer component is then subjected to a phosphoric acid dip that removes the oxide polymer component. The oxide polymer and metal polymer residues may also be removed during the fabrication of the via by removing them directly after their respective formations.Type: GrantFiled: February 4, 2003Date of Patent: December 7, 2004Assignee: Micron Technology, Inc.Inventor: Li Li
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Patent number: 6815289Abstract: Provided is a method of manufacturing a semiconductor device capable of effectively removing impurity product attached to a semiconductor film while suppressing coming off of, for example, hemispherical grains formed on a semiconductor film containing an impurity. Spherical or hemispherical grains are formed on the surface of an amorphous silicon film containing phosphorus which forms a bottom electrode of a capacitor. In order to suppress depletion of the bottom electrode, annealing is performed in PH3 atmosphere so as to diffuse phosphorus to the grains. Cleaning is performed using hot water (deionized water) in order to remove the impurity product attached onto the surface of the bottom electrode by annealing. A native oxide film formed on the surface of the bottom electrode is removed by cleaning using a mixed solution of hydrofluoric acid and water. A dielectric film and a top electrode are formed in order so as to cover the surface of the bottom electrode. Thereby, a cylindrical capacitor is fabricated.Type: GrantFiled: October 19, 2001Date of Patent: November 9, 2004Assignee: Sony CorporationInventors: Tomoyuki Hirano, Kazumi Asada
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Patent number: 6814814Abstract: In a method of cleaning process residues formed on surfaces in a substrate processing chamber, a sacrificial substrate comprising a sacrificial material is placed in the chamber, a sputtering gas is introduced into the chamber, and the sputtering gas is energized to sputter the sacrificial material from the substrate. The sputtered sacrificial material reacts with residues on the chamber surfaces to clean them. In one version, the sacrificial substrate comprises a silicon-containing material that when sputtered deposits silicon on the chamber walls that reacts with and cleans fluorine-containing species that are left behind by a chamber cleaning process.Type: GrantFiled: March 29, 2002Date of Patent: November 9, 2004Assignee: Applied Materials, Inc.Inventors: Alan W. Collins, Feng Gao, Tetsuya Ishikawa, Padmanaban Krishnaraj, Yaxin Wang
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Patent number: 6812128Abstract: A step for forming a wiring on a semiconductor substrate, a step for forming a first silicon oxide film on the semiconductor substrate having the wiring, and a step for forming an interlayer insulating film composed of a material bearing a low specific inductive capacity on the first silicon oxide film are sequentially executed to form a multilayered wiring. The interlayer insulating film is formed to have a smaller thickness relative to a step of the first silicon oxide film, so as not to extend beyond the step of the first silicon oxide film.Type: GrantFiled: February 12, 2003Date of Patent: November 2, 2004Assignee: Oki Electric Industry Co., Ltd.Inventor: Motoki Kobayashi
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Patent number: 6806194Abstract: A system for processing a workpiece includes a head attached to a head lifter. A workpiece is supported in the head between an upper rotor and a lower rotor. A base has a bowl for containing a liquid. The head is movable by the head lifter from a first position vertically above the bowl, to a second position where the workpiece is at least partially positioned in the bowl. The bowl has a contour section with a sidewall having a radius of curvature which increases adjacent to a drain outlet in the bowl, to help rapid draining of liquid from the bowl. The head has a load position, where the rotors are spaced apart by a first amount, and a process position, where the rotors are engaged and sealed against each other. For rapid evacuation of fluid, the head also has a fast drain position, where the rotors are moved apart sufficiently to create an annular drain gap.Type: GrantFiled: April 14, 2003Date of Patent: October 19, 2004Assignee: Semitool. Inc.Inventors: Paul Z. Wirth, Steven L. Peace, Erik Lund
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Patent number: 6805754Abstract: A device and method for processing substrates, whereby medium consumption and processing time are reduced. According to the inventive method, liquid is conducted to a surface of the substrate that is to be treated via at least one nozzle that is arranged in a substantially centric position with respect to said substrate and via a plurality of second nozzles that are controlled separately from the first nozzle.Type: GrantFiled: September 28, 2001Date of Patent: October 19, 2004Assignee: Steag Micro Tech GmbHInventors: Joachim Pokorny, Andreas Steinrücke
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Patent number: 6805138Abstract: A semiconductor device production method that is used to uniformly and efficiently reduce metal oxides produced on metal (copper, for example) which forms electrodes or wirings on a semiconductor device. An object to be treated on which copper oxides are produced is put into a process chamber and is heated by a heater to a predetermined temperature. Then carboxylic acid stored in a storage tank is vaporized by a carburetor. The vaporized carboxylic acid, together with carrier gas, is introduced into the process chamber via a treating gas feed pipe to reduce the copper oxides produced on the object to be treated to metal copper. As a result, metal oxides can be reduced uniformly without making the surfaces of electrodes or wirings irregular. Moreover, in this case, carbon dioxide and water are both produced in a gaseous state. This prevents impurities from remaining on the surface of copper.Type: GrantFiled: August 11, 2003Date of Patent: October 19, 2004Assignee: Fujitsu LimitedInventors: Ade Asneil Akbar, Takayuki Ohba
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Patent number: 6802911Abstract: A method of cleaning damaged layers and polymer residue on semiconductor devices includes mixing HF and ozone water in a vessel to form a solution of HF and ozone water, and dipping a semiconductor device in the vessel containing the solution of HF and ozone water. Preferably, ozone water is subsequently introduced into the vessel to replace the solution of HF and ozone water in the vessel.Type: GrantFiled: September 19, 2001Date of Patent: October 12, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Keum Joo Lee, Yong Sun Ko, In Seak Hwang
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Patent number: 6800141Abstract: A semi-aqueous solvent based method using non-aromatic, halogen-free organic solvent compositions for the effective removal of flux residue from electronic component surfaces after high temperature solder interconnections in the presence of rosin based flux compositions. Rosin flux residue can be removed using hydrophobic, essentially water insoluble, propylene glycol alkylether solvents in conjunction with a surfactant, preferably an ionic and/or a mixture of a non-ionic and an ionic surfactant in the first step, then a second step involving immersion with agitation in a hydrophobic solvent with no added surfactant. This is followed by a third step of hydrophilic solvent immersion with agitation/spray, rinsing off the hydrophilic solvent with water, and then a drying step.Type: GrantFiled: December 21, 2001Date of Patent: October 5, 2004Assignee: International Business Machines CorporationInventors: Krishna G. Sachdev, Chon C. Lei, Demian M. Riccardi
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Patent number: 6800142Abstract: Methods for cleaning semiconductor wafers are presented. Contaminants, particularly photoresist and post-etch residue, are removed from semiconductor wafers. A wafer or wafers is first treated with a peroxide-containing medium, for example, to oxidatively cleave bond structures of contaminants on the wafer work surface. Excitation energy is used to activate the peroxide-containing medium toward the formation of radical species. After treatment with the peroxide-containing medium, a supercritical fluid treatment is used to remove any remaining contaminants as well as to condition the wafer for subsequent processing.Type: GrantFiled: May 30, 2002Date of Patent: October 5, 2004Assignee: Novellus Systems, Inc.Inventors: Adrianne Kay Tipton, Krishnan Shrinivasan, Souvik Banerjee, Raashina Humayun, Patrick Christopher Joyce
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Patent number: 6797618Abstract: A conductive pattern having a surface including silicon is formed on a substrate of a semiconductor device and a conduction region having a surface including silicon is formed in the substrate. A radio frequency etching process is performed ex-situ to remove impurities from a resultant structure and to improve surface characteristics of the conduction region. Residues generated during the radio frequency etching process are removed from the conductive pattern and the conduction region by a cleaning process. A metal film is formed on the conductive pattern and the conduction region. A silicide film is formed on the conductive pattern and the conduction region by reacting metal of the metal film and silicon in the conductive pattern and the conduction region. With a radio frequency sputtering process and a wet cleaning process, a metal silicide film having a uniform phase may be stably formed.Type: GrantFiled: July 29, 2003Date of Patent: September 28, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Eung-Joon Lee, In-Sun Park, Ji-Soon Park
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Patent number: 6794314Abstract: A method is disclosed for forming an ultrathin oxide layer of uniform thickness. The method is particularly advantageous for producing uniformly thin interfacial oxides beneath materials of high dielectric permitivity, or uniformly thin passivation oxides. Hydrofluoric (HF) etching of a silicon surface, for example, is followed by termination of the silicon surface with ligands larger than H or F, particularly hydroxyl, alkoxy or carboxylic tails. The substrate is oxidized with the surface termination in place. The surface termination and relatively low temperatures moderate the rate of oxidation, such that a controllable thickness of oxide is formed. In some embodiments, the ligand termination is replaced with OH prior to further deposition. The deposition preferably includes alternating, self-limiting chemistries in an atomic layer deposition process, though any other suitable deposition process can be used.Type: GrantFiled: October 25, 2002Date of Patent: September 21, 2004Assignee: ASM International N.V.Inventors: Ivo Raaijmakers, Yong-Bae Kim, Marko Tuominen, Suvi P. Haukka
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Patent number: 6793717Abstract: The present invention includes a filtered mask enclosure having an exterior portion and interior regions within the exterior portion such that the interior regions have a filtering region and a purging region connected to the filtering region. The present invention further includes a method of removing a first contaminant in a gas phase, a second contaminant in a solid phase, and a third contaminant having an electrical charge from a purge gas and flowing the purge gas through a vicinity of a mask while exposing a wafer with light through the mask.Type: GrantFiled: June 11, 2003Date of Patent: September 21, 2004Assignee: Intel CorporationInventors: Han-Ming Wu, Giang Dao
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Patent number: 6794204Abstract: A semiconductor manufacturing method whereby reactive gas processing such as selective epitaxial growth can be carried out with high precision by correctly adjusting conditions during processing is performed by a semiconductor manufacturing apparatus which can restrict increases in the moisture content, prevent heavy metal pollution and the like, and investigate the correlation between moisture content in the process chamber and outside regions. The moisture content in a reaction chamber and in a gas discharge system of the reaction chamber are measured when a substrate is provided, and the conditions for reactive gas processing are adjusted based on the moisture content.Type: GrantFiled: September 26, 2002Date of Patent: September 21, 2004Assignees: Mitsubishi Materials Silicon Corporation, Nippon Sanso CorporationInventors: Hiroyuki Hasegawa, Tomonori Yamaoka, Yoshio Ishihara, Hiroshi Masusaki
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Patent number: 6790777Abstract: The present invention relates to a method for improving an interface of a semiconductor device. The method comprises providing a first and second substrate having an oxidized region, and establishing a first loading position in a first process chamber. The first and second substrates are consecutively inserted into the first process chamber and generally simultaneously processed, wherein the oxidized region is reduced by exposure to a first plasma. The first and second substrates are then consecutively removed and the first substrate is inserted into a second process chamber and subsequently processed. The second substrate is then inserted into the second process chamber and the first and second substrates are simultaneously processed. The first substrate is the removed, and the second substrate is processed again.Type: GrantFiled: November 6, 2002Date of Patent: September 14, 2004Assignee: Texas Instruments IncorporatedInventors: Glenn J. Tessmer, Ju-Ai Ruan, Mercer Lusk Brugler, Sarah Hartwig
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Patent number: 6790778Abstract: A method for capping over a copper layer. A copper layer is deposited overlying a substrate. The copper surface is treated with hydrogen-containing plasma to remove copper oxides formed thereon, thereby suppressing copper hillock formation. The treated copper surface is treated again with nitrogen-containing plasma to improve adhesion of the copper surface. A capping layer is formed on the copper layer.Type: GrantFiled: September 10, 2003Date of Patent: September 14, 2004Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yi-Lung Cheng, Ying-Lang Wang, We-Li Chen
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Patent number: 6787473Abstract: Methods for removing residuals from the surface of an integrated circuit device. Such methods find particular application in the fabrication of a dual damascene structure following removal of excess portions of a silver-containing metal layer from a device surface. The methods facilitate removal of particulate residuals as well as unremoved portions of the metal layer in a single cleaning process. The cleaning solutions for use with the methods are dilute aqueous solutions containing hydrogen peroxide and at least one acidic component and are substantially free of particulate material. Acidic components include carboxylic acids and their salts.Type: GrantFiled: January 31, 2003Date of Patent: September 7, 2004Assignee: Micron Technology, Inc.Inventor: Michael T. Andreas
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Patent number: 6784084Abstract: The present invention is related to a method for fabricating a semiconductor device capable of preventing occurrences of void and seam phenomena caused by a negative slope of an insulation layer or a bowing profile phenomenon in a cross-sectioned etch profile of a contact hole. To achieve this effect, the attack barrier layer or the capping layer is additionally deposited on the profile containing self-aligned contact holes in order to prevent an undercut of the inter-layer insulation layer, which is a main cause of the seam generations. Also, the attack barrier layer has a function of preventing the inter-layer insulation layer from being attacked during the wet cleaning/etching process. Ultimately, it is possible to improve device characteristics with the prevention of the seam generations.Type: GrantFiled: June 27, 2003Date of Patent: August 31, 2004Assignee: Hynix Semiconductor Inc.Inventors: Hyeok Kang, Sung-Kwon Lee, Min-Suk Lee
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Patent number: 6784093Abstract: An embodiment of the invention is a method to reduce the corrosion of copper interconnects 90 by forming a thiol ligand coating 130 on the surface of the copper interconnects 90.Type: GrantFiled: June 27, 2003Date of Patent: August 31, 2004Assignee: Texas Instruments IncorporatedInventors: Jiong-Ping Lu, Changfeng Xia
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Patent number: 6776852Abstract: A process of removing excess holefill material from a surface of an electronic substrate in which the holefill residue is contacted with a swelling agent followed by planarizing of the surface in the presence of an agent no stronger than a liquid having a pH of about 6 to about 8.Type: GrantFiled: January 14, 2002Date of Patent: August 17, 2004Assignee: International Business Machines CorporationInventors: Christina M. Boyko, Brian E. Curcio, Donald S. Farquhar, Michael Wozniak
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Patent number: 6774056Abstract: A process system for processing a semiconductor wafer or other similar flat workpiece has a head including a workpiece holder. A motor in the head spins the workpiece. A head lifter lowers the head to move the workpiece into a bath of liquid in a bowl. Sonic energy is introduced into the liquid and travels through the liquid to the workpiece, to assist in processing. The head is lifted to bring the workpiece to a rinse position. The bath liquid is drained. The workpiece is rinsed via radial spray nozzles in the base. The head is lifted to a dry position. A reciprocating swing arm sprays a drying fluid onto the bottom surface of the spinning wafer, to dry the wafer.Type: GrantFiled: July 19, 2002Date of Patent: August 10, 2004Assignee: Semitool, Inc.Inventors: Jon Kuntz, Steven Peace, Ed Derks, Brian Aegerter
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Publication number: 20040152298Abstract: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.Type: ApplicationFiled: January 21, 2004Publication date: August 5, 2004Inventors: Naofumi Ohashi, Junji Noguchi, Toshinori Imai, Hizuru Yamaguchi, Nobuo Owada, Kenji Hinode, Yoshio Homma, Seiichi Kondo
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Publication number: 20040152332Abstract: The invention relates to a process for patterning dielectric layers. A photoresist layer is applied to the dielectric layer and patterned. Then, the pattern which has been predetermined by the resist mask is transferred to the dielectric layer. The incineration of the resist mask is carried out a temperature of 50° C. to 200° C., with the oxygen plasma being generated from a gas which has an oxygen content of 40 to 60% by volume. During a subsequent step of cleaning the patterned dielectric layer using dilute hydrofluoric acid, the trenches which have been introduced into the dielectric layer are widened to a significantly lesser extent than after incineration under the conditions which have previously been customary.Type: ApplicationFiled: December 1, 2003Publication date: August 5, 2004Inventors: Grit Schwalbe, Thomas Ruder
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Patent number: 6767782Abstract: Charge-up damages to a substrate are reduced in a manufacturing process using plasma, and the reliability of a semiconductor device is improved. By forming an insulating film on the back of a substrate before a step of forming a first wiring layer, even if a plasma CVD method, a sputtering method, or a dry-etching method is used in a wiring-forming step executed later, then it is possible to suppress electric charges which are generated on the substrate and which flow to the ground potential through the substrate, and to prevent damages to the substrate due to charge-up.Type: GrantFiled: February 26, 2002Date of Patent: July 27, 2004Assignees: Renesas Technology Corp., Hitachi Tokyo Electronics Co., Ltd.Inventors: Takeshi Saikawa, Ryohei Maeno, Sadayuki Okudaira, Tetsuo Saito, Tsuyoshi Tamaru, Kazutoshi Ohmori
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Patent number: 6764967Abstract: A method for forming a silicon dioxide layer over a silicon substrate including providing a substrate having exposed silicon portions; and, forming a silicon dioxide layer over the exposed silicon portions according to an oxide formation process including contacting the exposed silicon portions with an oxidizing solution comprising water and ozone.Type: GrantFiled: October 5, 2002Date of Patent: July 20, 2004Assignee: Taiwan SEmiconductor Manufacturing Co., Ltd.Inventors: Vincent Pai, Kuo-Chi Tu, Chung-Wei Chang, Chia-Shiung Tsai, Chun-Yao Chen
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Publication number: 20040131783Abstract: An apparatus and method for extracting impurities from a layer on a substrate includes decomposing the layer on the substrate to expose impurities and extracting the impurities from the substrate. During the decomposing, reacting material may be supplied to the layer as an aerosol. By detecting and monitoring the volume of discharged material from the decomposing, an end point of decomposing may be determined. Surface tension may be provided to extraction solution during extracting to prevent the extraction solution from separating from a nozzle injecting the extraction solution and from being locally saturated with impurities. A receiving module for receiving various sizes of the wafer may be included.Type: ApplicationFiled: December 22, 2003Publication date: July 8, 2004Inventor: Sung-Jae Lee
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Publication number: 20040132318Abstract: A system and method for cleaning a substrate, such as a semiconductor wafer, utilizes a rotatable wafer supporting assembly with a cylindrical body to provide stability for the substrate being cleaned, even at high rotational speeds. The rotatable wafer supporting assembly may include wafer holding mechanisms with pivotable confining members that are configured to hold the substrate using centrifugal force when the wafer supporting assembly is rotated. In an embodiment, the cleaning system may include a positioning system operatively connected to an acoustic transducer to provide meaningful control of the acoustic energy applied to a surface of the substrate by selectively changing the distance between the acoustic transducer and the substrate surface so that the substrate can be cleaned more effectively.Type: ApplicationFiled: January 4, 2003Publication date: July 8, 2004Inventors: Yong Bae Kim, Jungyup Kim, Yong Ho Lee, In Kwon Jeong
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Patent number: 6759322Abstract: After a plurality of grooves are formed in an insulating film and in an anti-reflection film on the insulating film, a barrier metal film and a conductive film are deposited on the anti-reflection film such that each of the wiring grooves is filled therewith. Subsequently, the portions of the conductive film outside the grooves are removed by polishing and then the portions of the barrier metal film outside the wiring are removed by polishing. Thereafter, a foreign matter adhered to a surface to be polished during polishing is removed and then a surface of the anti-reflection film is polished.Type: GrantFiled: December 26, 2002Date of Patent: July 6, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideaki Yoshida, Tetsuya Ueda, Masashi Hamanaka, Takeshi Harada
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Patent number: 6758223Abstract: A method for removal of post reactive ion etch by-product from a semiconductor wafer surface or microelectronic composite structure comprising: supplying a reducing gas plasma incorporating a forming gas mixture selected from the group consisting of a mixture of N2/H2 or a mixture of NH3/H2 into a vacuum chamber in which a semiconductor wafer surface or a microelectronic composite structure is supported to form a post-RIE polymer material by-product on the composite structure without significant removal of an organic, low K material which has also been exposed to the reducing gas plasma; and removing the post-RIE polymer material by-product with a wet clean.Type: GrantFiled: June 23, 2000Date of Patent: July 6, 2004Assignee: Infineon Technologies AGInventors: Andy Cowley, Peter Emmi, Timothy Dalton, Christopher Jahnes
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Patent number: 6759351Abstract: Polymer blobs that are development related defects are substantially eliminated in patterned photoresist masks by a heat treatment of the wafer performed at a development step in two different manners according to the present invention. In the first method, after the development has been performed as standard, the wafer is heated at 140° C. and before cooling takes place, it is rinsed with deionized water (DIW) at room temperature. In the second method, the wafer is either developed as standard but rinsed with 60° C. DIW instead of 22° C. DIW, or, after standard development, it is submitted to an extra rinse step with 60° C. DIW.Type: GrantFiled: January 8, 2001Date of Patent: July 6, 2004Assignee: International Business Machines CorporationInventor: Caroline Boulenger
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Patent number: 6743735Abstract: Removing photoresist from alignment marks on a semiconductor wafer using a wafer edge exposure process is disclosed. The alignment marks on the wafer are covered by photoresist used in conjunction with semiconductor processing of one or more layers deposited on the semiconductor wafer. One or more parts of the edge of the wafer are exposed to remove the photoresist from these parts and thus reveal alignment marks on the wafer. The exposure of the one or more parts of the wafer is accomplished without performing a photolithographic clear out process. Rather, a wafer edge exposure (WEE) process is inventively utilized. Once the WEE process is performed, subsequent layers may be deposited by aligning them using the revealed alignment marks.Type: GrantFiled: March 19, 2002Date of Patent: June 1, 2004Assignee: Taiwan Semiconductor Manufacturing Co., LtdInventors: Po-Tao Chu, Hsin-Yuan Chen, Chung-Jen Chen, Tai-Ming Yang, Cheng-Ming Wu
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Patent number: 6736146Abstract: A method of removing non-polar colorants of a color filter array rapidly from a bottom layer starts by performing a cracking process to decompose cross-linked polymeric molecules of non-polar R/G/B colorants to smaller fragments. A plasma cleaning process is performed to oxidize the cracked non-polar R/G/B colorants. Then, a solvent cleaning process is performed by using a non-polar solvent to remove the non-polar R/G/B colorants from the bottom layer.Type: GrantFiled: August 16, 2001Date of Patent: May 18, 2004Assignee: United Microelectronics Corp.Inventors: Jiunn-Hsiung Liao, Ching-Chung Chen
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Publication number: 20040089227Abstract: A photoresist ashing system includes two processing chambers configured for alternate operation in processing substrates. The system includes a single pump that performs both pump-down and process pumping of both of the chambers. In operation, one of the chambers is pumped down and processed while the other chamber is vented, unloaded and re-loaded.Type: ApplicationFiled: July 21, 2003Publication date: May 13, 2004Inventor: Albert Wang
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Patent number: 6734120Abstract: A method of enabling the removal of fluorine containing residue from a semiconductor substrate comprising applying a gas and/or vapor to which the residue is reactive to the residue while the temperature of the substrate is at an elevated level with respect to ambient temperature and the residue is exposed to ultraviolet radiation, for a time period which is sufficient to effect at least one of volatilizing the residue or rendering the residue hydrophilic enough to be removable with deionized water.Type: GrantFiled: February 17, 2000Date of Patent: May 11, 2004Assignee: Axcelis Technologies, Inc.Inventors: Ivan Berry, Stuart Rounds, John Hallock, Michael Owens, Mahmoud Dahimene
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Patent number: 6733594Abstract: A method and system for processing a wafer is disclosed. The method includes receiving a wafer having a process side and a backside. The method further includes removing un-wanted particles from the backside of the wafer to prevent gaps from forming between the backside of the wafer and a chucking surface. The method also includes performing a specific processing task on the process side of the wafer after cleaning the backside of the wafer.Type: GrantFiled: December 21, 2000Date of Patent: May 11, 2004Assignee: Lam Research CorporationInventor: Thomas D. Nguyen
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Patent number: 6733597Abstract: A method is provided for cleaning a dual damascene structure. A first metal layer, a cap layer, and a dielectric layer are formed on a substrate in sequence. Then a dual damascene opening is formed in the dielectric layer and the cap layer exposing the first metal layer. Next, a post-etching cleaning step is carried out to clean the dual damascene opening using a fluorine-based solvent. Then, an argon gas plasma is sputtered to clean the dual damascene opening before a second metal layer fills in the dual damascene opening.Type: GrantFiled: April 24, 2001Date of Patent: May 11, 2004Assignee: United Microelectronics Corp.Inventors: Chih-Ning Wu, Sun-Chieh Chien
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Patent number: 6734121Abstract: In one aspect, the invention includes a method of treating a surface of a substrate. A mixture which comprises at least a frozen first material and liquid second material is provided on the surface and moved relative to the substrate. In another aspect, the invention encompasses a method of treating a plurality of substrates. A treating member is provided proximate a first substrate, and an initial layer of frozen material is formed over a surface of the treating member. A surface of the first substrate is treated by moving at least one of the treating member and the first substrate relative to the other of the treating member and the first substrate. After the surface of the first substrate is treated, the initial layer of frozen material is removed from over the surface of the treating member.Type: GrantFiled: September 2, 1999Date of Patent: May 11, 2004Assignee: Micron Technology, Inc.Inventors: Scott E. Moore, Trung Tri Doan
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Patent number: 6725565Abstract: A method for vacuum drying of a substrate which can eliminate not only the moisture adhered to the substrate surface but also the moisture impregnated inside of the films which form the devices in a shot time without deforming nor deteriorating the devices formed on the substrate in the drying. The method for vacuum drying of a substrate, concerning a method for drying a substrate by processing the substrate surface in a desired condition, cleaning the processed substrate with cleaning liquid, and drying the cleaned substrate, comprises the steps of heating the substrate surface to a predetermined temperature to vaporize the moisture of the surface as vapor and thereby detach the moisture from the substrate to outside, and vacuuming the detached vapor at a predetermined vacuum pressure to eliminate the moisture from the wafer.Type: GrantFiled: December 2, 2002Date of Patent: April 27, 2004Assignee: Sprout, Co., Ltd.Inventors: Riichiro Harano, Toru Watari
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Patent number: 6727187Abstract: For providing a cleaning technique capable of removing metal contamination at a low temperature and in a short period of time, an aqueous solution containing 0.1 to 15% by weight of hydrochloric acid, 0.01 to 0.3% by weight of hydrofluoric acid and 0.1 to 15% by weight of hydrogen peroxide is used as a cleaning solution for cleaning a semiconductor substrate after forming a gate electrode of a polymetal structure on the semiconductor substrate.Type: GrantFiled: April 10, 2001Date of Patent: April 27, 2004Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.Inventors: Yutaka Takeshima, Michimasa Funabashi, Kenji Tanaka