Avalanche Diode Patents (Class 438/91)
  • Patent number: 9496332
    Abstract: According to one embodiment, a semiconductor device comprises a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the second conductivity type, a fourth semiconductor region of the second conductivity type, and an insulating unit. The fourth semiconductor region is separated from the third semiconductor region. A carrier concentration of the second conductivity type of the fourth semiconductor region is higher than a carrier concentration of the second conductivity type of the second semiconductor region. The fourth semiconductor region protrudes below more than the third semiconductor region. The insulating unit is provided on a portion of the second semiconductor region positioned between the third semiconductor region and the fourth semiconductor region and on the fourth semiconductor region.
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: November 15, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenichi Matsushita
  • Patent number: 8999770
    Abstract: A semiconductor structure includes a module with a plurality of die regions, a plurality of light-emitting devices disposed upon the substrate so that each of the die regions includes one of the light-emitting devices, and a lens board over the module and adhered to the substrate with glue. The lens board includes a plurality of microlenses each corresponding to one of the die regions, and at each one of the die regions the glue provides an air-tight encapsulation of one of the light-emitting devices by a respective one of the microlenses. Further, phosphor is included as a part of the lens board.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: April 7, 2015
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Tien-Ming Lin, Chih-Hsuan Sun, Wei-Yu Yeh
  • Patent number: 8994136
    Abstract: A silicon photomultiplier detector cell may include a photodiode region and a readout circuit region formed on a same substrate. The photodiode region may include a first semiconductor layer exposed on a surface of the silicon photomultiplier detector cell and doped with first type impurities; a second semiconductor layer doped with second type impurities; and/or a first epitaxial layer between the first semiconductor layer and the second semiconductor layer. The first epitaxial layer may contact the first semiconductor layer and the second semiconductor layer. The first epitaxial layer may be doped with the first type impurities at a concentration lower than a concentration of the first type impurities of the first semiconductor layer.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: March 31, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-chul Park, Young Kim, Chae-hun Lee, Yong-woo Jeon, Chang-jung Kim
  • Publication number: 20150076641
    Abstract: An avalanche photodiode with a defect-assisted silicon absorption region. An example includes a substrate; a layer of silicon on the substrate, the layer of silicon including a positively-doped region, a negatively-doped region, and an absorption region between the positively-doped and negatively-doped regions, the absorption region including defects in its crystal structure; and contacts in electrical communication with the positively-doped and negatively-doped regions to receive a bias potential.
    Type: Application
    Filed: July 25, 2012
    Publication date: March 19, 2015
    Inventors: Zhihong Huang, Charles M. Santori, Marco Fiorentino, Raymond G. Beausoleil
  • Publication number: 20150079722
    Abstract: Disclosed are an avalanche photodiode with a guard ring structure that relieves edge breakdown by an external voltage which is applied through a metal pad which is attached to the guard ring and a manufacturing method thereof. An avalanche photodiode with a guard ring structure includes a plurality of semiconductor layers laminated on a substrate; an active region partially formed above the semiconductor layers; a guard ring which is formed above the semiconductor layers and disposed so as to be spaced apart from the active region and have a ring shape that encloses the active region; and a connecting unit formed on the semiconductor layers to be electrically connected to the guard ring so as to apply an external voltage to the guard ring region. Therefore, the external voltage is applied to the guard ring of the avalanche diode through the connecting unit to relieve the edge breakdown.
    Type: Application
    Filed: November 25, 2014
    Publication date: March 19, 2015
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Bongki MHEEN, Myoungsook OH, Kisoo KIM, Jae-Sik SIM, Yong-Hwan KWON, Eun Soo NAM
  • Patent number: 8969990
    Abstract: A semiconductor light detection element has a plurality of channels, each of which consists of a photodiode array including a plurality of avalanche photodiodes operating in Geiger mode, quenching resistors connected in series to the respective avalanche photodiodes, and signal lines to which the quenching resistors are connected in parallel. A mounting substrate is configured so that a plurality of electrodes corresponding to the respective channels are arranged on a third principal surface side and so that a signal processing unit for processing output signals from the respective channels is arranged on a fourth principal surface side. In a semiconductor substrate, through-hole electrodes electrically connected to the signal lines are formed for the respective channels. The through-hole electrodes and the electrodes are electrically connected through bump electrodes.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: March 3, 2015
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Terumasa Nagano, Noburo Hosokawa, Tomofumi Suzuki, Takashi Baba
  • Patent number: 8969117
    Abstract: Methods for forming a buried p-n junction and avalanche photodiodes incorporating same are disclosed. The method includes forming a well in a semiconductor layer, wherein a depth of the well is selected as a function of the desired shape of the p-n junction in the edge region of the avalanche photodiode. A diffusion mask is then formed on the semiconductor layer, wherein the diffusion mask includes at least two openings per APD formed, wherein one opening is a diffusion window and the other is a diffusion sink. The depth of the p-n junction in the active region of the APD is based, in part, on an attribute of the diffusion mask relating to the diffusion sink.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: March 3, 2015
    Assignee: Princeton Lightwave, Inc.
    Inventor: Mark Allen Itzler
  • Patent number: 8969143
    Abstract: A light-emitting device package including a lead frame formed of a metal and on which a light-emitting device chip is mounted; and a mold frame coupled to the lead frame by injection molding. The lead frame includes: a mounting portion on which the light-emitting device chip is mounted; and first and second connection portions that are disposed on two sides of the mounting portion in a first direction and connected to the light-emitting device chip by wire bonding, wherein the first connection portion is stepped with respect to the mounting portion, and a stepped amount is less than a material thickness of the lead frame.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: March 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Daniel Kim, Jae-sung You, Jong-kil Park
  • Publication number: 20140312449
    Abstract: A lateral avalanche photodiode device comprises a semiconductor substrate (1) having a trench (4) with side walls (5) extending from a main surface (2) to a rear surface (3). A first doped region (11) is present at the side walls of the trench, and a second doped region (12) is arranged at a distance from the first doped region. A third doped region (13) is located adjacent to the first doped region, extends through the substrate from the main surface to the rear surface, and is arranged between the first doped region and the second doped region. The third doped region (13) is the avalanche multiplication region of the photodiode structure. The second doped region and the third doped region have a first type of conductivity, and the first doped region has a second type of conductivity which is opposite to the first type of conductivity. The region of the substrate that is between the first doped region and the second doped region is of the first type of conductivity.
    Type: Application
    Filed: October 22, 2012
    Publication date: October 23, 2014
    Applicant: AMS AG
    Inventors: Ingrid Jonak-Auer, Jordi Teva
  • Patent number: 8860166
    Abstract: The photo detector array is configured to generate pulses with short rise and fall times because each Geiger mode avalanche photodiode includes an anode contact, a cathode contact, an output contact electrically insulated from the anode and cathode contacts, a semiconductor layer, and at least one shield or metal structure in the semiconductor layer capacitively coupled to the semiconductor layer and coupled to the output contact. The output contacts of all Geiger mode avalanche photodiodes are connected in common and are configured to provide for detection of spikes correlated to avalanche events on any avalanche photodiode of the array.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: October 14, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Delfo Nunziato Sanfilippo, Giovanni Condorelli
  • Patent number: 8816466
    Abstract: A protective element for electronics has at least one Schottky diode and at least one Zener diode which are located between a power supply and the electronics, the anode of the Schottky diode being connected to the power supply and the cathode of the Schottky diode being connected to the electronics, and the cathode and the anode of the Zener diode are connected to ground. The Schottky diode is a trench MOS barrier junction diode or trench MOS barrier Schottky (TMBS) diode or a trench junction barrier Schottky (TJBS) diode and includes an integrated semiconductor arrangement, which has at least one trench MOS barrier Schottky diode and a p-doped substrate, which is used as the anode of the Zener diode.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: August 26, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Ning Qu, Alfred Goerlach
  • Patent number: 8796802
    Abstract: Semiconductor photodetectors are provided that may enable optimized usage of an active detector array. The semiconductor photodetectors may have a structure that can be produced and/or configured as simply as possible. A radiation detector system is also provided.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: August 5, 2014
    Assignee: First Sensor AG
    Inventors: Michael Pierschel, Frank Kudella
  • Publication number: 20140206130
    Abstract: Provided are an avalanche photodiode and a method of fabricating the same. The method of fabricating the avalanche photodiode includes sequentially forming a compound semiconductor absorption layer, a compound semiconductor grading layer, a charge sheet layer, a compound semiconductor amplification layer, a selective wet etch layer, and a p-type conductive layer on an n-type substrate through a metal organic chemical vapor deposition process.
    Type: Application
    Filed: March 20, 2014
    Publication date: July 24, 2014
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Mi-Ran PARK, O-Kyun KWON
  • Patent number: 8778721
    Abstract: An embodiment of array of Geiger-mode avalanche photodiodes, wherein each photodiode is formed by a body of semiconductor material, having a first conductivity type and housing an anode region, of a second conductivity type, facing a top surface of the body, a cathode-contact region, having the first conductivity type and a higher doping level than the body, facing a bottom surface of the body, an insulation region extending through the body and insulating an active area from the rest of the body, the active area housing the anode region and the cathode-contact region. The insulation region is formed by a first mirror region of polycrystalline silicon, a second mirror region of metal material, and a channel-stopper region of dielectric material, surrounding the first and second mirror regions.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: July 15, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Delfo Nunziato Sanfilippo, Piero Giorgio Fallica
  • Patent number: 8779543
    Abstract: A semiconductor device that may include an avalanche photodiode (APD), the APD may include: a first doped region of a first polarity; a buried guard ring of a second polarity, the second polarity is opposite to the first polarity, the buried guard ring is spaced apart from the first doped region and is positioned below the first doped region; a well of the second polarity, wherein the well interfaces the first doped region to form a p-n junction; and a second doped region of the second polarity, the second doped region is spaced apart from the first doped region.
    Type: Grant
    Filed: September 16, 2012
    Date of Patent: July 15, 2014
    Assignee: Technion Research and Development Foundation Ltd.
    Inventors: Yael Nemirovsky, Vitali Savuskan, Sharon Bar-Lev Shefi, Igor Brouk, Gil Visokolov, Amos Fenigstein, Tomer Leitner
  • Patent number: 8778725
    Abstract: Avalanche photodiodes having special lateral doping concentration that reduces dark current without causing any loss of optical signals and method for the fabrication thereof are described. In one aspect, an avalanche photodiode comprises: a substrate, a first contact layer coupled to at least one metal contract of a first electrical polarity, an absorption layer, a doped electric control layer having a central region and a circumferential region surrounding the central region, a multiplication layer having a partially doped central region, and a second contract layer coupled to at least one metal contract of a second electrical polarity. Doping concentration in the central section of the electric control layer is lower than that of the circumferential region. The absorption layer can be formed by selective epitaxial growth.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: July 15, 2014
    Assignee: SiFotonics Technologies Co, Ltd.
    Inventors: Mengyuan Huang, Pengfei Cai, Dong Pan
  • Publication number: 20140183683
    Abstract: Avalanche diode-type semiconductor structure (1) intended to receive electromagnetic radiation in a given wavelength. The structure (1) comprises a semiconductor multiplication zone (310) including a majority carrier concentration, and delimitation means suitable for laterally delimiting the multiplication zone (310). The delimitation means comprise a semiconductor zone (410) surrounding the multiplication zone (310) and comprising a forbidden energy gap greater than the forbidden energy gap of the major part (320) of the multiplication zone (310), said zone (410) having a type of conductivity opposite that of the multiplication zone (310) with a majority carrier concentration at least 10 times greater than that of the multiplication zone (310). The invention also relates to a process for producing an avalanche photodiode-type semiconductor structure.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 3, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventor: Johan ROTHMAN
  • Publication number: 20140186991
    Abstract: Avalanche photodiodes having special lateral doping concentration that reduces dark current without causing any loss of optical signals and method for the fabrication thereof are described. In one aspect, an avalanche photodiode comprises: a substrate, a first contact layer coupled to at least one metal contract of a first electrical polarity, an absorption layer, a doped electric control layer having a central region and a circumferential region surrounding the central region, a multiplication layer having a partially doped central region, and a second contract layer coupled to at least one metal contract of a second electrical polarity. Doping concentration in the central section of the electric control layer is lower than that of the circumferential region. The absorption layer can be formed by selective epitaxial growth.
    Type: Application
    Filed: March 4, 2014
    Publication date: July 3, 2014
    Applicant: SiFotonics Technologies Co., Ltd.
    Inventors: Mengyuan Huang, Pengfei Cai, Dong Pan
  • Patent number: 8754502
    Abstract: Each light detecting unit includes a semiconductor region that outputs a carrier, and a surface electrode. In a photodiode array, a read wire is positioned between neighboring avalanche photodiodes. When a plane including a surface of the semiconductor region is set as a reference plane, a distance tb from the reference plane to the read wire is larger than a distance to from the reference plane to the surface electrode.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: June 17, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Koei Yamamoto, Terumasa Nagano, Kazuhisa Yamamura, Kenichi Sato, Ryutaro Tsuchiya
  • Publication number: 20140131827
    Abstract: An i-type AlInAs avalanche multiplication layer is grown on an n-type InP substrate. A p-type AlInAs electric field reduction layer is grown on the i-type AlInAs avalanche multiplication layer. Transition layers are grown to cover the top surface of the electric field reduction layer. After the covering of the top surface of the electric field reduction layer by the transition layers, the temperature of the growth process is increased and an n?-type InGaAs light absorption layer is grown on the transition layer at a temperature higher than the growth temperature of the electric field reduction layer. The growth temperature of the transition layers is lower than that of the n?-type InGaAs light absorption layer. The transition layers have higher resistance to surface defects than the electric field reduction layer at temperatures higher than the growth temperature of the electric field reduction layer.
    Type: Application
    Filed: July 18, 2013
    Publication date: May 15, 2014
    Inventors: Harunaka Yamaguchi, Ryota Takemura
  • Patent number: 8723100
    Abstract: A Geiger-mode avalanche photodiode may include an anode, a cathode, an output pad electrically insulated from the anode and the cathode, a semiconductor layer having resistive anode and cathode regions, and a metal structure in the semiconductor layer and capacitively coupled to a region from the resistive anode and resistive cathode regions and connected to the output pad. The output pad is for detecting spikes correlated to avalanche events.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: May 13, 2014
    Assignee: STMicroelectronics S.R.L.
    Inventors: Delfo Nunziato Sanfilippo, Giovanni Condorelli
  • Patent number: 8673675
    Abstract: A method for processing a thin film photovoltaic module. The method includes providing a plurality of substrates, each of the substrates having a first electrode layer and an overlying absorber layer composed of copper indium gallium selenide (CIGS) or copper indium selenide (CIS) material. The absorber material comprises a plurality of sodium bearing species. The method maintains the plurality of substrates in a controlled environment after formation of at least the absorber layer through one or more processes up to a lamination process. The controlled environment has a relative humidity of less than 10% and a temperature ranging from about 10 degrees Celsius to about 40 degrees Celsius. The method subjects the plurality of substrates to a liquid comprising water at a temperature from about 10 degrees Celsius to about 80 degrees Celsius to process the plurality of substrates after formation of the absorber layer.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: March 18, 2014
    Assignee: Stion Corporation
    Inventor: Robert D. Wieting
  • Patent number: 8659053
    Abstract: A semiconductor light detecting element includes: an InP substrate; and a semiconductor stacked structure on the InP substrate and including at least a light absorbing layer, wherein the light absorbing layer includes an InGaAsBi layer lattice-matched to the InP substrate.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: February 25, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshifumi Sasahata, Eitaro Ishimura
  • Publication number: 20140042581
    Abstract: Disclosed are an avalanche photodiode with a guard ring structure that relieves edge breakdown by an external voltage which is applied through a metal pad which is attached to the guard ring and a manufacturing method thereof. An avalanche photodiode with a guard ring structure includes a plurality of semiconductor layers laminated on a substrate; an active region partially formed above the semiconductor layers; a guard ring which is formed above the semiconductor layers and disposed so as to be spaced apart from the active region and have a ring shape that encloses the active region; and a connecting unit formed on the semiconductor layers to be electrically connected to the guard ring so as to apply an external voltage to the guard ring region. Therefore, the external voltage is applied to the guard ring of the avalanche diode through the connecting unit to relieve the edge breakdown.
    Type: Application
    Filed: November 29, 2012
    Publication date: February 13, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Bongki MHEEN, MyoungSook Oh, Kisoo Kim, Jae-Sik Sim, Yong-Hwan Kwon, Eun Soo Nam
  • Publication number: 20140021330
    Abstract: A photodetector including: a photodiode having a body made of semiconductor material delimited by a first surface, the body forming a first electrode region; a dielectric region, set on top of the first surface and delimited by a second surface; at least one channel extending within the dielectric region, starting from the second surface; and a first metallization, which is set on top of the second surface and is in electrical contact with the first electrode region.
    Type: Application
    Filed: June 24, 2013
    Publication date: January 23, 2014
    Inventors: Alfio Russo, Giuseppina Valvo
  • Publication number: 20140008517
    Abstract: Embodiments of the present invention include an electron counter with a charge-coupled device (CCD) register configured to transfer electrons to a Geiger-mode avalanche diode (GM-AD) array operably coupled to the output of the CCD register. At high charge levels, a nondestructive amplifier senses the charge at the CCD register output to provide an analog indication of the charge. At low charge levels, noiseless charge splitters or meters divide the charge into single-electron packets, each of which is detected by a GM-AD that provides a digital output indicating whether an electron is present. Example electron counters are particularly well suited for counting photoelectrons generated by large-format, high-speed imaging arrays because they operate with high dynamic range and high sensitivity. As a result, they can be used to image scenes over a wide range of light levels.
    Type: Application
    Filed: December 3, 2012
    Publication date: January 9, 2014
    Applicant: Massachusetts Institute of Technology
    Inventor: Massachusetts Institute of Technology
  • Patent number: 8592247
    Abstract: A method includes: forming an epitaxy wafer by growing a light absorbing layer, a grading layer, an electric field buffer layer, and an amplifying layer on the front surface of a substrate in sequence; forming a diffusion control layer on the amplifying layer; forming a protective layer for protecting the diffusion control layer on the diffusion control layer; forming an etching part by etching from the protective layer to a predetermined depth of the amplifying layer; forming a first patterning part by patterning the protective layer; forming a junction region and a guardring region at the amplifying layer by diffusing a diffusion material to the etching part and the first patterning part; removing the diffusion control layer and the protective layer and forming a first electrode connected to the junction region on the amplifying layer; and forming a second electrode on the rear surface of the substrate.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: November 26, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae Sik Sim, Ki Soo Kim, Bong Ki Mheen, Myoung Sook Oh, Yong Hwan Kwon, Eun Soo Nam
  • Publication number: 20130299936
    Abstract: An avalanche photodiode includes a substrate; an avalanche multiplying layer, a p-type electric field controlling layer, a light-absorbing layer, and a window layer sequentially laminated on the substrate. A p-type region is present in parts of the window layer and the light-absorbing layer. Carbon is the dopant of the electric field controlling layer. Zn is the dopant of the p-type region. A bottom face of the p-type region is closer to the substrate than is an interface between the light-absorbing layer and the window layer.
    Type: Application
    Filed: January 21, 2013
    Publication date: November 14, 2013
    Applicant: Mitsubishi Electric Corporation
    Inventors: Ryota Takemura, Eitaro Ishimura
  • Patent number: 8558234
    Abstract: Highly efficient, low energy, low light level imagers and photodetectors are provided. In particular, a novel class of Della-Doped Electron Bombarded Array (DDEBA) photodetectors that will reduce the size, mass, power, complexity, and cost of conventional imaging systems while improving performance by using a thinned imager that is capable of detecting low-energy electrons, has high gain, and is of low noise.
    Type: Grant
    Filed: February 11, 2011
    Date of Patent: October 15, 2013
    Assignee: California Institute of Technology
    Inventors: Shouleh Nikzad, Chris Martin, Michael E. Hoenk
  • Patent number: 8513704
    Abstract: A photodiode capable of interacting with incident photons includes at least: a stack of three layers including an intermediate layer placed between a first semiconductor layer and a second semiconductor layer having a first conductivity type; and a region that is in contact with at least the intermediate layer and the second layer and extends transversely relative to the planes of the three layers, the region having a conductivity type that is opposite to the first conductivity type. The intermediate layer is made of a semiconductor material having a second conductivity type and is capable of having a conductivity type that is opposite to the second conductivity type so as to form a P-N junction with the region, inversion of the conductivity type of the intermediate layer being induced by dopants of the first conductivity type that are present in the first and second layers.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: August 20, 2013
    Assignee: Commissariat a l'Energie Automique et aux Energies Alternatives
    Inventor: Johan Rothman
  • Publication number: 20130193546
    Abstract: A single photon avalanche diode for use in a CMOS integrated circuit includes a deep n-well region formed above a p-type substrate and an n-well region formed above and in contact with the deep n-well region. A cathode contact is connected to the n-well region via a heavily doped n-type implant. A lightly doped region forms a guard ring around the n-well and deep n-well regions. A p-well region is adjacent to the lightly doped region. An anode contact is connected to the p-well region via a heavily doped p-type implant. The junction between the bottom of the deep n-well region and the substrate forms a multiplication region when an appropriate bias voltage is applied between the anode and cathode and the guard ring breakdown voltage is controlled with appropriate control of the lateral doping concentration gradient such that the breakdown voltage is higher than that of the multiplication region.
    Type: Application
    Filed: September 8, 2011
    Publication date: August 1, 2013
    Applicant: The University Court of the University of Edinburg
    Inventors: Eric Alexander Garner Webster, Robert Kerr Henderson
  • Publication number: 20130153962
    Abstract: The inventive concept provides avalanche photo diodes and methods of manufacturing the same. The avalanche photo diode may include a substrate, a light absorption layer formed on the substrate, a clad layer formed on the light absorption layer, an active region formed in the clad layer, a guard ring region formed around the active region, and an insulating region formed between the guard ring region and the active region.
    Type: Application
    Filed: September 6, 2012
    Publication date: June 20, 2013
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae-Sik SIM, Kisoo Kim, Bongki Mheen, MyoungSook Oh, Yong-Hwan Kwon, Eun Soo Nam
  • Patent number: 8368159
    Abstract: An avalanche photodiode (APD) has a first semiconductor substrate having a first doping type. A first semiconductor layer is on top of the first semiconductor substrate. The first semiconductor layer is doped with the first doping type. A second epitaxial layer is on top of the first semiconductor layer. The second epitaxial layer is in-situ doped with the first doping type at a concentration higher than a concentration of the first doping type in the first semiconductor layer. A third epitaxial layer is on top of the second epitaxial layer. The third epitaxial layer is in-situ doped with a second doping type. The doping of the third epitaxial region forms a first p-n junction with the doping of the second epitaxial layer, wherein a carrier multiplication region includes the first p-n junction, and wherein the third epitaxial layer forms an absorption region for photons. A first implanted region is within the third epitaxial layer. The implanted region is doped with the second doping type.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: February 5, 2013
    Assignee: Excelitas Canada, Inc.
    Inventors: Henri Dautet, Martin Couture
  • Publication number: 20130009265
    Abstract: An avalanche photodiode (APD) has a first semiconductor substrate having a first doping type. A first semiconductor layer is on top of the first semiconductor substrate. The first semiconductor layer is doped with the first doping type. A second epitaxial layer is on top of the first semiconductor layer. The second epitaxial layer is in-situ doped with the first doping type at a concentration higher than a concentration of the first doping type in the first semiconductor layer. A third epitaxial layer is on top of the second epitaxial layer. The third epitaxial layer is in-situ doped with a second doping type. The doping of the third epitaxial region forms a first p-n junction with the doping of the second epitaxial layer, wherein a carrier multiplication region includes the first p-n junction, and wherein the third epitaxial layer forms an absorption region for photons. A first implanted region is within the third epitaxial layer. The implanted region is doped with the second doping type.
    Type: Application
    Filed: July 8, 2011
    Publication date: January 10, 2013
    Applicant: Excelitas Technologies Corp.
    Inventors: Henri DAUTET, Martin COUTURE
  • Publication number: 20120326259
    Abstract: Avalanche photodiodes having special lateral doping concentration that reduces dark current without causing any loss of optical signals and method for the fabrication thereof are described. In one aspect, an avalanche photodiode comprises: a substrate, a first contact layer coupled to at least one metal contract of a first electrical polarity, an absorption layer, a doped electric control layer having a central region and a circumferential region surrounding the central region, a multiplication layer having a partially doped central region, and a second contract layer coupled to at least one metal contract of a second electrical polarity. Doping concentration in the central section is lower than that of the circumferential region. The absorption layer can be formed by selective epitaxial growth.
    Type: Application
    Filed: October 25, 2011
    Publication date: December 27, 2012
    Applicant: SIFOTONICS TECHNOLOGIES CO., LTD.
    Inventors: Mengyuan Huang, Pengfei Cai, Dong Pan
  • Patent number: 8298857
    Abstract: A single-photon avalanche detector is disclosed that is operable at wavelengths greater than 1000 nm and at operating speeds greater than 10 MHz. The single-photon avalanche detector comprises a thin-film resistor and avalanche photodiode that are monolithically integrated such that little or no additional capacitance is associated with the addition of the resistor.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: October 30, 2012
    Assignee: Princeton Lightwave, Inc.
    Inventor: Mark Allen Itzler
  • Patent number: 8294234
    Abstract: A mesa photodiode which includes a mesa, the sidewall of the mesa is a surface that is inclined in the direction in which the bottom of the mesa becomes wider. At least the sidewall of the mesa is covered with a semiconductor layer of a first conductivity type, a second conductivity type, a semi-insulating type, or an undoped type. The semiconductor layer is grown on at least the sidewall of the mesa. The inclined angle of the inclined surface of the mesa at the upper end portion is smaller than the inclined angle of the inclined surface of the mesa at the lower end portion.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: October 23, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Isao Watanabe, Tomoaki Koi
  • Patent number: 8212286
    Abstract: The semiconductor light receiving element 1 includes a semiconductor substrate 101, and a semiconductor layer having a photo-absorption layer 105 disposed on the top of the semiconductor substrate 101. The semiconductor layer of the semiconductor light receiving element 1 containing at least the photo-absorption layer 105 has a mesa structure, and a side wall of the mesa is provided with a protective film 113 covering the side wall. The protective film 113 is a silicon nitride film containing hydrogen, and a hydrogen concentration in one surface of the protective film 113 located at the side of the mesa side wall is lower than a hydrogen concentration in the other surface of the protective film 113 located at the side that is opposite to the side of the mesa side wall.
    Type: Grant
    Filed: December 25, 2008
    Date of Patent: July 3, 2012
    Assignee: NEC Corporation
    Inventor: Emiko Fujii
  • Patent number: 8212141
    Abstract: There is provided a high-sensitivity organic semiconductor radiation/light sensor and a radiation/light detector which can detect rays in real time. In the high-sensitivity organic semiconductor radiation/light sensor, a signal amplification wire 2 is embedded in an organic semiconductor 1. Carriers created by passage of radiation or light are avalanche-amplified by a high electric field generated near the signal amplification wire 2 by means of applying a high voltage to the signal amplification wire 2, thus dramatically improving detection efficiency of rays. Hence, even rays exhibiting low energy loss capability can be detected in real time with high sensitivity.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: July 3, 2012
    Assignees: Niigata University, Japan Carlit Co., Ltd.
    Inventors: Hitoshi Miyata, Yoshimasa Fujigaki, Yoji Yamaguchi, Yoshinori Muto, Masaaki Tamura
  • Publication number: 20120156826
    Abstract: A method includes: forming an epitaxy wafer by growing a light absorbing layer, a grading layer, an electric field buffer layer, and an amplifying layer on the front surface of a substrate in sequence; forming a diffusion control layer on the amplifying layer; forming a protective layer for protecting the diffusion control layer on the diffusion control layer; forming an etching part by etching from the protective layer to a predetermined depth of the amplifying layer; forming a first patterning part by patterning the protective layer; forming a junction region and a guardring region at the amplifying layer by diffusing a diffusion material to the etching part and the first patterning part; removing the diffusion control layer and the protective layer and forming a first electrode connected to the junction region on the amplifying layer; and forming a second electrode on the rear surface of the substrate.
    Type: Application
    Filed: October 14, 2011
    Publication date: June 21, 2012
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Sik SIM, Ki Soo KIM, Bong Ki MHEEN, Myoung Sook OH, Yong Hwan KWON, Eun Soo NAM
  • Patent number: 8188490
    Abstract: The present invention discloses an organic light emitting diode and a manufacturing method thereof. The OLED comprises a first electrode, a first hole-transporting layer disposed on the first electrode, a second hole-transporting layer disposed on the first hole-transporting layer, a first light-emitting layer disposed on the second hole-transporting layer, an electron-transporting layer disposed on the first light-emitting layer, an electron injection layer disposed on the electron-transporting layer and a second electrode disposed on the electron injection layer. The energy level of the first light-emitting layer in the lowest unoccupied molecular orbital is lower than that of the second hole-transporting layer, and the thickness of the first hole-transporting layer is larger than that of the second hole-transporting layer.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: May 29, 2012
    Assignee: National Tsing Hua University
    Inventors: Jwo-Huei Jou, Kuo-Yen Tsend
  • Patent number: 8148229
    Abstract: Disclosed is a method for manufacturing a semiconductor light-receiving device having high reproducibility and reliability. Specifically disclosed is a semiconductor light-receiving device 100 with a mesa structure wherein a light-absorbing layer 6, an avalanche multiplication layer 4 and an electric-field relaxation layer 5 are formed on a semiconductor substrate 2. The light-absorbing layer 6, avalanche multiplication layer 4 and electric-field relaxation layer 5 exposed in the side wall of the mesa structure are protected by an SiNx film or an SiOyNz film. The hydrogen concentration in the side wall surface of the electric-field relaxation layer 5 is set at not more than 15%, preferably not more than 10% of the carrier concentration of the electric-field relaxation layer 5.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: April 3, 2012
    Assignee: NEC Corporation
    Inventors: Kazuhiro Shiba, Kikuo Makita, Takeshi Nakata
  • Patent number: 8133755
    Abstract: Avalanche photodiodes and methods for forming them are disclosed. The breakdown voltage of an avalanche photodiode is controlled through the inclusion of a diffusion sink that is formed at the same time as the device region of the photodiode. The device region and diffusion sink are formed by diffusing a dopant into a semiconductor to form a p-n junction in the device region. The dopant is diffused through a first diffusion window to form the device region and a second diffusion window to form the diffusion sink. The depth of the p-n junction is based on an attribute of the second diffusion window.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: March 13, 2012
    Assignee: Princeton Lightwave, Inc.
    Inventor: Mark Allen Itzler
  • Patent number: 8124443
    Abstract: Diodes having p-type and n-type regions in contact, having at least one of either the p-type region or n-type region including a conjugated organic material doped with an immobile dopant, conjugated organic materials for incorporation into such diodes, and methods of manufacturing such diodes and materials are provided.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: February 28, 2012
    Inventors: Matthew L. Marrocco, Farshad J. Motamedi
  • Patent number: 8124981
    Abstract: A wide bandgap silicon carbide device has an avalanche control structure formed in an epitaxial layer of a first conductivity type above a substrate that is connected to a first electrode of the device. A first region of a second conductivity type is in the upper surface of the epitaxial layer with a connection to a second electrode of the device. A second region of the first conductivity type lies below the first region and has a dopant concentration greater than the dopant concentration in the epitaxial layer.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: February 28, 2012
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Christopher L. Rexer, Gary M. Dolny, Richard L. Woodin, Carl Anthony Witt, Joseph Shovlin
  • Publication number: 20120009727
    Abstract: Avalanche photodiodes and methods for forming them are disclosed. The breakdown voltage of an avalanche photodiode is controlled through the inclusion of a diffusion sink that is formed at the same time as the device region of the photodiode. The device region and diffusion sink are formed by diffusing a dopant into a semiconductor to form a p-n junction in the device region. The dopant is diffused through a first diffusion window to form the device region and a second diffusion window to form the diffusion sink. The depth of the p-n junction is based on an attribute of the second diffusion window.
    Type: Application
    Filed: September 20, 2011
    Publication date: January 12, 2012
    Applicant: PRINCETON LIGHTWAVE, INC.
    Inventor: Mark Allen Itzler
  • Patent number: 8076173
    Abstract: A semiconductor substrate and a method of its manufacture has a semiconductor substrate having a carbon concentration in a range of 6.0×1015 to 2.0×1017 atoms/cm3, both inclusively. One principal surface of the substrate is irradiated with protons and then heat-treated to thereby form a broad buffer structure, namely a region in a first semiconductor layer where a net impurity doping concentration is locally maximized. Due to the broad buffer structure, lifetime values are substantially equalized in a region extending from an interface between the first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer to the region where the net impurity doping concentration is locally maximized. In addition, the local minimum of lifetime values of the first semiconductor layer becomes high.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: December 13, 2011
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Michio Nemoto
  • Publication number: 20110291109
    Abstract: An avalanche photodetector comprising a multiplication layer formed of a first material having a first polarization; the multiplication layer having a first electric field upon application of a bias voltage; an absorption layer formed of a second material having a second polarization forming an interface with the multiplication layer; the absorption layer having a second electric field upon application of the bias voltage, the second electric field being less than the first electric field or substantially zero, carriers created by light absorbed in the absorption layer being multiplied in the multiplication layer due to the first electric field; the absorption layer having a second polarization which is greater or less than the first polarization to thereby create an interface charge; the interface charge being positive when the first material predominately multiplies holes, the interface charge being negative when the first material predominately multiplies electrons, the change in electric field at the inte
    Type: Application
    Filed: May 26, 2011
    Publication date: December 1, 2011
    Applicant: U.S. Government as represented by the Secretary of the Army
    Inventors: MICHAEL WRABACK, Paul H. Shen, Anand V. Sampath
  • Publication number: 20110284926
    Abstract: An avalanche photodiode structure, to a method of fabricating an avalanche photodiode structure, and to devices incorporating an avalanche photodiode structure. The avalanche photodiode structure comprises a Ge doped region having a first polarity; a GaAs doped region having a second polarity opposite to the first polarity; and an undoped region between the Ge doped region and the GaAs doped region forming a heterojunction; wherein the undoped region comprises Ge and AlxGa1-xAs.
    Type: Application
    Filed: May 18, 2011
    Publication date: November 24, 2011
    Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
    Inventor: Ching Kean Chia
  • Publication number: 20110272561
    Abstract: A Geiger-mode avalanche photodiode may include an anode, a cathode, an output pad electrically insulated from the anode and the cathode, a semiconductor layer having resistive anode and cathode regions, and a metal structure in the semiconductor layer and capacitively coupled to a region from the resistive anode and resistive cathode regions and connected to the output pad. The output pad is for detecting spikes correlated to avalanche events.
    Type: Application
    Filed: March 22, 2011
    Publication date: November 10, 2011
    Applicant: STMicroelectronics S.r.l.
    Inventors: Delfo Nunziato SANFILIPPO, Giovanni Condorelli