Overlying Second, Coextensive Micro Panel Circuit Arrangement Patents (Class 439/69)
  • Patent number: 11594571
    Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a first logic die including a first through via, an image sensor die hybrid bonded to the first logic die, and a second logic die bonded to the first logic die. A front side of the first logic die facing a front side of the image sensor die. A front side of the second logic die facing a backside of the first logic die. The second logic die comprising a first conductive pad electrically coupled to the first through via.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: February 28, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Chih Chiou, Chen-Hua Yu
  • Patent number: 10416213
    Abstract: A sensor includes a hollow enclosure, an antenna disposed external to the hollow enclosure and configured to collect emission of electromagnetic energy, a circuit disposed within the hollow enclosure and comprising a low noise amplifier (LNA) connectable to the antenna, and an analog to digital converter (ADC) in a connection with the LNA, circuit connections connecting, during use of the sensor, the circuit to each of the antenna, a source of electric energy and a signal processing component, a connection between the enclosure and an enclosure of an integrated circuit (IC), whereby the antenna id disposed between the sensor and the IC, and the sensor configured to at least measure a low-level electromagnetic energy emitted from the IC.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: September 17, 2019
    Assignee: NOKOMIS, INC.
    Inventors: Bogdan Amaru Pathak, Walter John Keller
  • Patent number: 10342153
    Abstract: Disclosed is a stack structure and its manufacturing method. The stack structure includes at least two stacked modules, wherein at least one of the modules is a power module; at least one metal connection component which is in integrated structure and comprises a first end, a second end and a connection portion with the first end being electrically connected to one of the modules and the second end being electrically connected to the other module; at least one molding compound packaging the at least one module and the end of the metal connection component which is electrically connected to the module, respectively.
    Type: Grant
    Filed: October 12, 2016
    Date of Patent: July 2, 2019
    Assignee: Delta Electronics, Inc.
    Inventors: Le Liang, Zhenqing Zhao
  • Patent number: 10270968
    Abstract: The present invention facilitates the work of setting a surveillance camera (30) with the surveillance camera (30) in a packed and stacked state. A surveillance camera packing member (1) is composed of: a cushioning material (10) that has a cylindrical shape with one end open and that holds a case side surface (31) and a circular dome section (32) of a dome-type surveillance camera (30); and a packing box (20) formed by bending a corrugated board sheet to form a rectangular parallelepiped and that accommodates the cushioning material (10) in which the dome-type surveillance camera (30) is held, a perforated line (23) for forming a open window section (22) of predetermined size for removing a connector-equipped cable (40) being provided to a side surface (21) of the packing box (20) facing the casing back surface (33) of the accommodated dome-type surveillance camera (30).
    Type: Grant
    Filed: October 3, 2016
    Date of Patent: April 23, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Masaru Shiraishi, Minoru Hirata
  • Patent number: 9678158
    Abstract: An apparatus for testing a package-on-package semiconductor device includes a top cover, a lower base, a heat dissipation module, and a plurality of probes. The lower base is disposed under the top cover so as to form an internal accommodation space for receiving an upper chip. The heat dissipation module includes a heat sink arranged in the internal accommodation space and attached to an upper surface of the upper chip. The probes are arranged in the lower base so as to electrically connect the upper chip with a lower chip. By the heat sink arranged in the internal accommodation space formed of the top cover and the lower base, heat generated from the upper chip during operation of the upper chip can be greatly dissipated so that the performance and the service life of the upper chip can be improved.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: June 13, 2017
    Assignee: CHROMA ATE INC.
    Inventor: Chien-Ming Chen
  • Patent number: 9214747
    Abstract: An electrical connector electrically connecting a chip module to a printed circuit board includes an insulative housing with a number of terminals therein and includes a substrate and a sidewall extending upwardly from the substrate, the substrate includes a top surface, a bottom surface opposite to the top surface and a number of through holes penetrated from the top surface to the bottom surface, wherein the electrical connector further includes a flex film located under the substrate, a frame located above the flex film and a number of solder balls electrically connecting the flex film to the printed circuit board, the four sides of the flex film and the frame are both insert-molded into the insulative housing.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: December 15, 2015
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Robert Gerald McHugh
  • Patent number: 8961194
    Abstract: An integrated design for an active HDMI connector is presented. The active HDMI connector comprises an active module circuit board, a connector pin assembly, connector pins, an insulation housing, and a metal connector shell. The connector shell partially encloses and partially exposes the active module. The connector pins each have a bent segment embedded in a molding assembly to fixate the pins within the molding assembly. The molding assembly defines a recessed slot for the active module. The active module has a cutout on a side of the module that is aligned with a tab on the connector shell. The tab is bent toward the inside of the connector shell to secure the active module inside the shell. The insulation housing includes pin separators that do not fully surround the connector pins.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: February 24, 2015
    Assignee: BBY Solutions, Inc.
    Inventor: Daowu Ye
  • Publication number: 20140328037
    Abstract: A carrier assembly (100) comprises an IC package (200) and a carrier (300) for positioning the IC package (200), the IC package (200) includes a body portion (22), a die portion (21) extending upwardly from the body portion (22) and a ear portion (232) extending from the die portion (21), the ear portion (232) and the body portion (22) defines a space (231), the carrier (300) includes a first side (310), a second side (312) opposite to the first side (310), a position portion (343) extending from the first side (310) and a fixing portion (331) extending from the second side (312) positioned in the space (231) of the IC package (200) to position the IC package (200) on the carrier (300).
    Type: Application
    Filed: January 22, 2014
    Publication date: November 6, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHENG-CHI YEH, CHIH-KAI YANG
  • Patent number: 8766658
    Abstract: A probe includes a contact member brought into contact with an object to be tested. Contact particles having conductivity are uniformly distributed in the contact member. A part of the contact particles protrude from a surface of the contact member on the side of the object to be tested. A conductive member having elasticity is placed on a surface of the contact member on the opposite side to the object to be tested. The probe further includes an insulating sheet including a through hole and the contact member is so positioned as to penetrate the through hole. An upper part of the contact member is formed of a conductor which does not include the contact particles. An additional conductor is placed on a surface of the conductor on the side opposite to the object to be tested.
    Type: Grant
    Filed: April 1, 2009
    Date of Patent: July 1, 2014
    Assignee: Tokyo Electron Limited
    Inventor: Shigekazu Komatsu
  • Patent number: 8681510
    Abstract: A circuit board includes a first circuit area, a first processing unit and a conductive pattern. The first circuit area includes a plurality of first electrically contacts. The first processing unit, which includes a ball grid array (BGA) substrate, is disposed on the first circuit area and is electrically connected to the first electrically contacts. The BGA substrate has a plurality of solder balls and a bypass circuit. The conductive pattern is electrically connected to the first electrically contacts.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: March 25, 2014
    Assignee: Delta Electronics, Inc.
    Inventors: Chia-Chan Hu, Yuan-Ming Hsu
  • Patent number: 8441275
    Abstract: An electronic device test fixture deploys a plurality of contact elements in a dielectric housing. The plumb arrangement of contact elements each include an armature or transversal configured to first depress and then slide laterally when urged downward by the external contacts of a device under test. The rotary movement of the transversal is optimized via the configuration of a surrounding forked regulator such that surface oxide deposition on the external device under test terminal is disrupted to reliably minimize contact resistance without damaging or unduly stressing the electrical junction of the device under test.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: May 14, 2013
    Assignee: Tapt Interconnect, LLC
    Inventor: Patrick J Alladio
  • Patent number: 8259460
    Abstract: A submount for arranging electronic components on a substrate is provided. The submount comprises a head member and at least one substrate-engaging member protruding from the head member. The head member comprises at least two, from each other isolated, electrically conductive portions, where each electrically conductive portion comprises a component contact, adapted for connection of electronic components thereto, and a substrate contact on arranged on said substrate side, adapted for bringing said electrically conductive portions in contact with a circuitry comprised in said substrate. The submount of the present invention may be used to attach electronic components, such as light-emitting diodes, to a textile substrate, without the need for soldering the electronic component directly on the substrate.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: September 4, 2012
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Rabin Bhattacharya, Pieter Jacob Snijder, Liesbeth Van Pieterson, Erich Zainzinger, Martijn Krans, Sima Asvadi, Alexander Ulrich Douglas, Jacqueline Van Driel, Martinus Jacobus Johannes Hack
  • Patent number: 7798818
    Abstract: An electrical connector (1) for interconnecting integrated circuits (ICs) to a circuit board, includes an insulative housing (2, 3) defining a plurality of passageways extending therethrough, and a plurality of contacts received respectively in each of the passageways of the insulative housing. The insulative housing has a first base (2) adapted to connecting an IC to a circuit board and a second base (3) which is capable of cooperating with said first base when the connector is used to connecting another IC having a different size to the circuit board.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: September 21, 2010
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: Cheng-Chi Yeh, Nan-Hung Lin
  • Patent number: 7791115
    Abstract: Disclosed is an organic light emitting display, which includes a large quantity of a hydroscopic layer having a good hydroscopic ability by changing a mounting structure of the hydroscopic layer. An organic light emitting display includes a first substrate. An organic emission portion is formed at one surface of the first substrate. A second substrate is formed at a surface of the first substrate on which the organic emission portion is formed for sealing the organic emission portion from external air. A first hydroscopic layer is formed between the first and second substrates. A third substrate is formed at another surface of the first substrate for sealing the first substrate. A second hydroscopic layer is formed between the first and third substrates.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: September 7, 2010
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventor: Eunah Kim
  • Patent number: 7649146
    Abstract: Stacked receptacles in a connector that each provide side-by-side differential signal contacts, are attached to a circuit board without additional width to accommodate multiple layers of differential signals by using connector wafer inserts that rotate the side-by-side positioned differential signal contacts to front-to-back contacts.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: January 19, 2010
    Assignee: Molex Incorporated
    Inventors: Hazelton P. Avery, Patrick R. Casher, Richard A. Nelson, Kent E. Regnier
  • Publication number: 20090305526
    Abstract: An IC socket (100) for receiving an IC package includes a socket body for carrying the IC package, a plurality of contacts (3) received in the socket body for electrical connection with the IC package, a driving member (5) mounted upon the socket body, and at least one latch device (19) driven by the driving member (5) to shift between a closed position and an opened position. The driving member (5) is able to be operated between an upper position and a lower position. The latch device (19) has a movable pressing member (194) engaging with a spring member (1943) and pressing the IC package toward the socket body. The position of pressing member (194) is adjusted in a vertical direction by abutting against the IC package.
    Type: Application
    Filed: June 10, 2009
    Publication date: December 10, 2009
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Shih-Wei Hsiao, Wen-Yi Hsieh
  • Publication number: 20090305525
    Abstract: An electrical connector (200) adapted for electrically connecting an electronic package with a circuit substrate, comprises an insulative housing (3), a plurality of terminals (4) and a reinforcement member (5). The housing (3) comprising an upper surface (32) for supporting the electronic package and an opposite bottom surface (31) for being mounted to the circuit substrate. The terminals (4) comprising a soldering portion (42) extending beyond the bottom surface (31) of the insulative housing (3) adapted for electrically connecting the circuit substrate, a spring arm (41) with a mating portion (411) extending beyond the upper surface (32) of the insulative housing (3) adapted for electrically connecting the electronic package at a free end thereof. The reinforcement member (5) is made of material different from that of the insulative housing (3) and attached to the bottom surface (31) of the insulative housing (3).
    Type: Application
    Filed: June 6, 2008
    Publication date: December 10, 2009
    Inventors: Chia-Wei Fan, Darrell Wertz
  • Publication number: 20090263988
    Abstract: An IC socket (1) for receiving an IC package includes an insulative housing (2) with a plurality of passageways (20) thereof and a plurality of contacts (3) mounted within the passageways (20) of the insulative housing (2) respectively. The contact (3) has a base section (30), an upward contact arm (31) and a downward contact arm (32) respectively extending from the base section (30), and a pair of retaining arms (33) extending from opposite sides of the base section (30). The retaining arm (33) includes an elastic section (330) engaging with an inner wall of the passageway (20) and an opening (332) adjacent to the elastic section (330).
    Type: Application
    Filed: April 21, 2009
    Publication date: October 22, 2009
    Inventor: Chun-Yi Chang
  • Patent number: 7604485
    Abstract: A chip socket includes first and second bottom plates attached together, four first sidewalls and second sidewalls, and a number of first and second conductive. Each of the first sidewalls vertically extends upward from a side of the first bottom plate. The first conductive metal sheets are fixed in an inner side of each of the first sidewalls. The conductive metal sheets are insulated from one another. Each of the second sidewalls vertically extends downward from a side of the second bottom plate. The second conductive metal sheets are fixed in an inner side of each of the second sidewalls. The second conductive metal sheets are insulated from one another. Each of the first conductive metal sheets are connected to a corresponding second conductive metal sheet by the first conductive metal sheet extending through the first and second bottom plates to contact with the second conductive metal sheet.
    Type: Grant
    Filed: March 29, 2009
    Date of Patent: October 20, 2009
    Assignees: Hong Fu Jin Precision Industry (Shen Zhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Hai-Li Wang
  • Publication number: 20090258511
    Abstract: A printed wiring board includes solder pads to which component leads may be soldered. L-shaped solder pads of the printed wiring board allow component leads to approach the board from any of the four major sides of the printed wiring board. Each solder pad includes two legs and two respective axes. A component lead may be selectively soldered to one of the two legs of the solder pad. Thus, a component lead may approach a solder pad from one of four orthogonal directions.
    Type: Application
    Filed: April 14, 2008
    Publication date: October 15, 2009
    Applicant: LOCKHEED MARTIN CORPORATION
    Inventors: Jeremy F. Weinstein, Robert M. Ward
  • Publication number: 20090246983
    Abstract: An integrated circuit socket set includes a package receiving unit and a package fixing unit. The package receiving unit includes an insulating housing provided with a plurality of contacts. The insulating housing includes a frame with a recess. The contacts at least partially extend into the recess. The package fixing unit includes a base plate and a load applying plate. The load applying plate is rotatable with respect to the base plate by movement of a lever. The lever has an arm arranged on one side of the base plate. The base plate is provided with an opening that receives the frame of the insulating housing. The opening in the base plate being formed such that the frame of the insulating housing is received in the base plate in an initial position and in a position wherein the base plate is rotated at least 90 degrees from the initial position.
    Type: Application
    Filed: September 12, 2006
    Publication date: October 1, 2009
    Inventors: Shinsaku Toda, Masashi Inoue, Yoshihisa Yamamoto
  • Publication number: 20090111292
    Abstract: A pad array for a surface mount technology board includes a front row ground pad as a single pad, followed by a signal pad. The ground pads internal to the array may be arranged as pairs of pads interconnected to each other, with sandwiching signal pads on the internal portion of the array. To minimize stress on connector wafers of large scale connectors, external rows of ground pads may be enlarged by a predetermined amount in a Y-direction to minimize potential formation of stress risers, while ensuring that electrical spacing requirements to adjacent signal leads may be preserved for optimal signal integrity.
    Type: Application
    Filed: October 31, 2007
    Publication date: April 30, 2009
    Inventors: William Louis Brodsky, Mark Kenneth Hoffmeyer
  • Patent number: 7521788
    Abstract: A semiconductor module and a method of manufacturing a semiconductor module including at least one chip package, at least one module board, at least one conductive element provided between the first chip package and the module board and a protector for applying pressure to the conductive element, the module board, and the first chip package and/or acting as a heat sink for the first chip package.
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: April 21, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo-Jae Bang, Byung-Man Kim, Dong-Chun Lee, Kwang-Su Yu
  • Publication number: 20090075500
    Abstract: A socket connector includes an insulative carrier having opposite first and second sides and a plurality of vias extending between the first and second sides. A plurality of polymer columns is held by the carrier. Each polymer column includes a first end extending from the first side of the carrier and a second end extending from the second side of the carrier. A contact array is disposed on each first and second side of the carrier. Each contact array comprises a flexible sheet having a plurality of conductive elements having contact tips proximate corresponding first and second ends of the polymer columns. The conductive elements on the first side of the carrier are electrically connected to corresponding conductive elements on the second side of the carrier through the vias in the carrier to establish electrical paths between corresponding contact tips on the first and second sides of the carrier.
    Type: Application
    Filed: September 19, 2007
    Publication date: March 19, 2009
    Inventors: Jeffrey George Pennypacker, Jeffrey Byron McClinton, Jason M'Cheyne Reisinger
  • Patent number: 7455532
    Abstract: An electronic component pin connector comprising a non-conductive housing with a substrate end and an electronic component connection end, the housing comprising one or more electrical contacts, the or each electrical contact extending from the substrate end to the component connection end to provide one or more electrical contact points to a substrate at the substrate and one or more electrical contact points for a electronic component at the component connection end, the housing comprising a filter aperture extending from the component connection end to the substrate end, the aperture dimensioned to house one or more filters in an electrically connected position to provide filtering of signalling between a substrate connected at the substrate end and a electronic component connected at the component connection end.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: November 25, 2008
    Assignee: Nokia Corporation
    Inventors: Timo T. Laitinen, Matti Uusimäki
  • Publication number: 20080233797
    Abstract: An electrical connector for receiving an electrical module. The electrical module has a convex on a lateral surface. The electrical connector comprises an insulated housing, a plurality of terminals and a metallic shell. The insulated housing has at least a stop wall on an edge and has an indentation corresponding to the convex. The terminals are set in the insulated housing separately. The metallic shell completely surrounds both the insulated housing and the electrical module to avoid operations of the electrical module from being affected by exterior electromagnetic waves.
    Type: Application
    Filed: March 21, 2007
    Publication date: September 25, 2008
    Applicant: SPEED TECH CORP.
    Inventors: Chien-Yu Hsu, Robert Chiang
  • Publication number: 20080132094
    Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer.
    Type: Application
    Filed: October 30, 2007
    Publication date: June 5, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
  • Patent number: 7364435
    Abstract: An electrical connector includes an insulative housing (10) adapted to engage conductive terminals, and having an IC package mating surface (101) and an opposite substrate mounting surface (103). A rigid strip (12), in a substantially wavy, is attached to and configured to surround peripheral walls of the insulative housing. The rigid strip includes a first series of spaced protrusion portions (120) extending above the IC package mating surface so as to define a receiving cavity therebetween for receiving an IC package, and a second series of spaced protrusion portions (122) extending below the substrate mounting surface with at least four spaced protrusion portions around four corners of the insulative housing disposed in a substantially coplanar manner to function as standoffs. Such a configuration and shape of the rigid strip will have the function of reinforcing the insulative housing while not taking up much more “real estate” of the substrate.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: April 29, 2008
    Assignee: Hon Hai Precision Ind. Co., Ltd
    Inventor: Igor Polnyi
  • Patent number: 7360376
    Abstract: Methods, devices and systems for coupling an HVAC controller to an HVAC system are provided. In several embodiments, a sub-base is provided allowing an HVAC controller to be coupled to a printed wire board to allow, in some cases, modification of the HVAC controller function. The sub-base may include a plurality of terminals, each terminal having a contact mating feature for receiving a pin of an HVAC controller, a terminal block location for receiving an end of a wire, and a transformation pin-out adapted to couple to a printed wire board, with the contact mating feature, the terminal block location, and the transformation pin-out being electrically coupled together. In one embodiment, an HVAC controller is modified to allow a controller adapted for use with a single fuel system to control dual fuel system.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: April 22, 2008
    Assignee: Honeywell International Inc.
    Inventors: Robert D. Juntunen, Peter E. Stolt, Guy M. Shoultz
  • Publication number: 20080057749
    Abstract: An electrical connector (100) for mounting on a board (3) includes an insulative housing (2) defining a number of passageways (20) and a number of contacts (1) received in corresponding passageways. Each contact includes a base portion (10), a tail portion (12) extending from one side of the base portion and electrically connecting to the board, a contact portion (16) projecting beyond an upper opening (21) of the passageway, and an intermediate portion (15) interconnecting the contact portion and the base portion in such a manner that the contact portion extends along a direction defining an angle with respect to both the base portion and the intermediate portion.
    Type: Application
    Filed: September 4, 2007
    Publication date: March 6, 2008
    Inventors: Chi-Nan Liao, Ke-Hao Chen, Fang-Jun Liao
  • Publication number: 20080057748
    Abstract: A connector includes a plurality of contacts. The connector includes an insulator having a plurality of through-holes for receiving the contacts. A pair of contacts are disposed in each of the through-holes. Since two contacts are disposed in the through-hole in the insulator, even if a fault occurs in one of the contacts, signal transmission in the same line can continuously be used. Moreover, since large areas of contact portions of the contacts are secured even in normal use, the capacity of electric current is increased.
    Type: Application
    Filed: September 5, 2007
    Publication date: March 6, 2008
    Inventors: Eiichi Nakata, Takashi Kobayashi, Ryo Kameoka, Hiroki Hihara
  • Patent number: 7320604
    Abstract: Provided is an electronic circuit module using a board having no cavity and a method for efficiently fabricating it. Electronic components are mounted on the front face of a module board 1, and an LSI chip 5 is die-bonded on the bottom face thereof in a bare-chip state with gold wires 8. Around the LSI chip 5, metal blocks 9 made of copper are mounted by soldering. The LSI chip 5, the gold wires 8, and the metal blocks 9 provided on the bottom face of the module board 1 are sealed with resin 10 with a motherboard-facing face 9a of each metal block 9 and a face 18 thereof flush with the corresponding side face of the module board 1 exposed from the resin 10. These exposed portions serve as electrode terminals when the module 11 is soldered to a motherboard. The module board 1 is obtained by cutting a sheet circuit board into individual unit module boards 1.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: January 22, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Terukazu Ohtsuki
  • Patent number: 7310458
    Abstract: The present invention provides methods for constructing stacked circuit modules and precursor assemblies with flexible circuitry. Using the methods of the present invention, a single set of flexible circuitry whether articulated as one or two flex circuits may be employed with CSP devices of a variety of configurations either with or without form standards.
    Type: Grant
    Filed: October 25, 2005
    Date of Patent: December 18, 2007
    Assignee: Staktek Group L.P.
    Inventor: James Douglas Wehrly, Jr.
  • Patent number: 7173803
    Abstract: An inter-digital capacitor may be used in a power socket for a microelectronic device. In one embodiment an integrated, low-resistance power and ground terminal configuration is disclosed. The capacitor plates are alternatively coupled to the power and ground terminals. Two polarity types are disclosed. A method of operation is also described.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: February 6, 2007
    Assignee: Intel Corporation
    Inventors: Dong Zhong, Jiangqi He, Yuan-Liang Li
  • Patent number: 7108559
    Abstract: A router includes WIC and Network Module slots that be reconfigured to hold cards and network modules having different form factors. A motherboard/midplane arrangement provides for a field replaceable motherboard that can be replaced without removing the router from the rack.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: September 19, 2006
    Assignee: Cisco Technology, INc.
    Inventors: Helen Shtargot, Dattatri Mattur, Shawn Bender, William J. Lewis, Lwin Tint, David Tarkington, Ming Chi Chen, Rene Duzac, James Everett Grishaw, Torence Lu, Kimberly Rae Turner, Phong Hoang Ho, Robert A. Loose, Stephen Scearce
  • Patent number: 7066741
    Abstract: The present invention provides a flexible circuit connector for electrically coupling IC devices to one another in a stacked configuration. Each IC device includes: (1) a package having top, bottom, and peripheral sides; and (2) external leads that extend out from at least one of the peripheral sides. In one embodiment, the flexible circuit connector comprises a plurality of discrete conductors that are adapted to be mounted between the upper side of a first package and the lower side of a second package. The flexible circuit connector also includes distal ends that extend from the conductors. The distal ends are adapted to be electrically connected to external leads from the first and second packages to interconnect with one another predetermined, separate groups of the external leads. In this manner, individual devices within a stack module can be individually accessed from traces on a circuit card.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: June 27, 2006
    Assignee: Staktek Group L.P.
    Inventors: Carmen D. Burns, David Roper, James W. Cady
  • Patent number: 7057270
    Abstract: Systems and methods for vertically interconnecting a plurality of chips to provide increased volume circuit density for a given surface chip footprint. One embodiment provides a chip stack where two smaller chips are interconnected to a larger third chip on both sides thereof, and further, with interconnecting structures extending beyond the extent of either of the two chips as attached to the third chip. Another embodiment provides a method for stacking chips where two smaller chips are interconnected to a larger third chip on both sides thereof, and further, with interconnecting structures extending beyond the extent of either of the two chips as attached to the third chip. Yet another embodiment is a chip stack of at least two chips interconnected to each other with a smaller third chip positioned therebetween and interconnected with at least one of the larger two chips.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: June 6, 2006
    Assignee: SimpleTech, Inc.
    Inventor: Mark Moshayedi
  • Patent number: 7057875
    Abstract: A sheet capacitor of the invention has a contact portion formed in a through-hole requiring electrical connection with an IC connection pin among the through-holes in which the IC connection pins are inserted, and a capacitor element connected to the contact portion. Another sheet capacitor of the invention includes an insulating board and a capacitor element mounted on the insulating board. The insulating board has a connection land with an IC at the upper side, and a connection land with a printed wiring board at the lower side. The capacitor element and connection lands at the upper and lower side of the insulating board are connected with each other electrically. In any one of these configurations, a capacitor element of large capacity and low ESL is connected closely to the IC, and the mounting area of the peripheral circuits of the IC can be increased.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: June 6, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Terumi Fujiyama, Kazuo Fukunaga, Morihiro Fukuda, Yoshiaki Kuwada, Hiromasa Mori, Yoshio Hashimoto
  • Patent number: 6998540
    Abstract: A multi-layer electronic circuit board design 10 having selectively formed apertures or cavities 26 which have improved solder-wetting characteristics.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: February 14, 2006
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Robert Edward Belke, Jr., Vivek A. Jairazbhoy, Thomas B. Krautheim, William F. Quitty, Jr.
  • Patent number: 6976849
    Abstract: A technique for connecting a first circuit board to a second circuit board includes aligning appropriate apertures in the circuit boards and forming a solder joint through the aligned apertures. In one application, the techniques of the present invention are used to connect circuit boards of an implantable medical device, such as a cardiac rhythm management device.
    Type: Grant
    Filed: April 12, 2004
    Date of Patent: December 20, 2005
    Assignee: Cardiac Pacemakers, Inc.
    Inventors: John O'Rourke, Peter J. Lamb, Bart A. Carey, Patrick J. Barry
  • Patent number: 6916183
    Abstract: An apparatus for receiving a microchip and having a conductor buses therein. A top surface of the apparatus receives the microchip while the bottom surface is to mount to a circuit board. A plurality of pin receptacles pass through the top surface to receive a corresponding plurality of microchip pins of the microchip. The conductor bus resides at least in part between the top surface and the bottom surface and is electrically coupled to a first plurality of the plurality of the pin receptacles.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: July 12, 2005
    Assignee: Intel Corporation
    Inventors: William O. Alger, Gary B. Long, Gary A. Brist, Carlos Mejia
  • Patent number: 6903941
    Abstract: A printed circuit board (PCB) assembly includes a PCB and an electrical connector. The PCB includes a first major surface and an opposite second major surface. The electrical connector includes a connector component electrically coupled to the PCB. The connector component has a nonconductive body that is adapted to contact and be supported by a first major surface of the PCB.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: June 7, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Jose Pietri Paola
  • Patent number: 6860742
    Abstract: A socket for electrical parts, which is mounted on a circuit board, comprises a socket body on which the electrical part is accommodated, and a plurality of contactors disposed on the socket body for establishing an electrical connection between the circuit board and the electrical part. The socket body comprises a contact unit in which the contactors are held and the contact unit is comprised of plates to be superimposed. Each plate has a plurality of through holes through each of which the contactor is inserted. A hole size of the through holes of one plate being different from that of another plate which is directly disposed on the one plate so as to form a stepped portion between the through holes of the one plate and another plate. The stepped portion is used for preventing the contactor from coming off from the contact unit.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: March 1, 2005
    Assignee: Enplas Corporation
    Inventor: Hideo Shimada
  • Patent number: 6812060
    Abstract: The present invention provides bumpless ultrasonic bonding of flexible wiring board pieces. A metal coating 26 is formed on the surface of a contact region 181 of a metal wiring 28 of each of two flexible wiring board pieces 10, 30 and ultrasonic wave is individually applied by an ultrasonic resonator 45 to the contact regions 181 in contact with each other. The metal coatings 26 are bonded to form a multilayer flexible wiring board 50. The bumpless process eliminates any plating step for forming bumps without being influenced by non-uniformity bump height. A thermoplastic resin film 33 may be formed on the surface of one flexible wiring board piece 30 to bond flexible wiring board pieces 10, 30 by the adhesion of the resin film 33.
    Type: Grant
    Filed: October 16, 2000
    Date of Patent: November 2, 2004
    Assignee: Sony Chemicals Corporation
    Inventors: Hideyuki Kurita, Hiroyuki Hishinuma
  • Patent number: 6807066
    Abstract: A power supply terminal that prevents damage to capacitors included in a noise filter circuit therein which may occur due to a BWB's warp or thermal stresses at soldering time. The noise filter circuit is formed on a noise filter circuit substrate, being a substrate separate from the BWB. The noise filter circuit substrate is connected conductively to part of each of press fit terminals.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: October 19, 2004
    Assignee: Fujitsu Limited
    Inventors: Junichi Hayama, Noburo Nakama, Tetsuya Murayama, Kenji Tsutsumi, Satoshi Tojo, Hiroshi Kadoya, Kiyonori Kusuda, Kenji Toshimitsu
  • Patent number: 6762487
    Abstract: A method and structures for vertically interconnecting a plurality of chips to provide increased volume circuit density for a given surface chip footprint. One aspect is a stack of two chips with a preformed interconnecting support connecting the two chips and with space for mounting a third chip to at least one of the other two chips in an interstitial space between the two chips and inside the support. Another aspect is a chip stack where two smaller chips are interconnected a larger third chip on both sides thereof and further with interconnecting structures extending beyond the extent of either of the two chips as attached to the third chip. Yet another aspect is a chip stack of at least two chips interconnected to each other with a smaller third chip positioned therebetween and interconnected with at least one of the larger two chips.
    Type: Grant
    Filed: April 19, 2002
    Date of Patent: July 13, 2004
    Assignee: SimpleTech, Inc.
    Inventor: Mark Moshayedi
  • Patent number: 6739879
    Abstract: A circuit board assembly is provided, comprising a first circuit board and a ball-grid array jumper. The ball-grid array jumper comprises a second circuit board smaller in size than the first printed circuit board and has at least one layer of conductive traces and at least two solder ball connectors. The ball grid array jumper is mounted to the first printed circuit board via the solder ball connectors.
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: May 25, 2004
    Assignee: Intel Corporation
    Inventors: John T. Sprietsma, Lilly Huang, Henry W. Koertzen
  • Publication number: 20040072452
    Abstract: Microelectronic contact structures are fabricated by separately forming, then joining together, various components thereof. Each contact structure has three components: a “post” component, a “beam” component, and a “tip” component. The resulting contact structure, mounted to an electronic component, is useful for making an electrical connection with another electronic component. The post component can be fabricated on a sacrificial substrate, joined to the electronic component and its sacrificial substrate removed. Alternatively, the post component can be formed on the electronic component. The beam and tip components can each be fabricated on a sacrificial substrate. The beam component is joined to the post component and its sacrificial substrate is removed, and the tip component is joined to the beam component and its sacrificial substrate is removed.
    Type: Application
    Filed: October 23, 2003
    Publication date: April 15, 2004
    Applicant: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu
  • Patent number: RE41039
    Abstract: A stackable integrated circuit chip package comprising a flex circuit. The flex circuit itself comprises a flexible substrate having opposed, generally planar top and bottom surfaces. Disposed on the top surface is a first conductive pad array, while disposed on the bottom surface is a second conductive pad array and third and fourth conductive pad arrays which are positioned on opposite sides of the second conductive pad array and electrically connected thereto. The chip package further comprises an integrated circuit chip which is electrically connected to the first and second conductive pad arrays, and hence to the third and fourth conductive pad arrays. The substrate is wrapped about at least a portion of the integrated circuit chip such that the third and fourth conductive pad arrays collectively define a fifth conductive pad array which is electrically connectable to another stackable integrated circuit chip package.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: December 15, 2009
    Assignee: Entorian Technologies, LP
    Inventor: John A. Forthun
  • Patent number: RE43330
    Abstract: Stacked receptacles in a connector that each provide side-by-side differential signal contacts, are attached to a circuit board without additional width to accommodate multiple layers of differential signals by using connector wafer inserts that rotate the side-by-side positioned differential signal contacts to front-to-back contacts, the circuit board including a substrate having a plurality of openings to make electrical contact with conductive terminal tail portion inserted therein, the openings being divided into first and second groups of openings, the first group of openings receiving differential signal terminal tails therein and the second group of openings receiving ground terminal tail therein, when a connector is mounted to said circuit board.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: May 1, 2012
    Assignee: Molex Incorporated
    Inventors: Hazelton P. Avery, Patrick R. Casher, Richard A. Nelson, Kent E. Regnier