Micro Panel Circuit Arrangement, E.g., Icm, Dip, Chip, Wafer, Etc. Patents (Class 439/68)
  • Patent number: 11916324
    Abstract: An electrical connector for connecting to an array of surface contacts includes a connector body and a plurality of cable terminators. The connector body defines an interior volume and includes an external surface defining a plurality of cable openings each configured to receive a respective multi-conductor cable therethrough and a plurality of passageways. The plurality of cable terminators are each configured to couple with a respective multi-conductor cable exiting the second section of a respective passageway. Each cable terminator includes a plurality of pins each configured to couple with a respective conductor of the multi-conductor cable and to extend to a respective contact surface. The contact surfaces of the plurality of cable terminators extend to a second plane. The first plane and the second plane are coplanar when the array is in the connection position.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: February 27, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Mark C. Nowell, D. Brice Achkir, Joel R. Goergen, Giovanni Giobbio, Mary K. Laue
  • Patent number: 11690754
    Abstract: A smart thermal patch for adaptive thermotherapy is provided. In an embodiment, the patch can be a stretchable, non-polymeric, conductive thin film flexible and non-invasive body integrated mobile thermal heater with wireless control capabilities that can be used to provide adaptive thermotherapy. The patch can be geometrically and spatially tunable on various pain locations. Adaptability allows the amount of heating to be tuned based on the temperature of the treated portion.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: July 4, 2023
    Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Muhammad Mustafa Hussain, Aftab Mustansir Hussain
  • Patent number: 11393631
    Abstract: An electronic component includes a capacitor body having first to sixth surfaces, the capacitor body including a plurality of dielectric layers stacked in a first direction connecting the fifth and sixth surfaces and first and second internal electrodes alternately disposed with the dielectric layer interposed therebetween; first and second external electrodes disposed on the first surface of the capacitor body, to be spaced apart from each other in a second direction connecting the third and fourth surfaces; and first and second metal frames connected to the first and second external electrodes, respectively. The first internal electrode includes a first lead portion exposed through the first surface of the capacitor body and connected to the first external electrode. The second internal electrode includes a second lead portion exposed through the first surface of the capacitor body and connected to the second external electrode.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: July 19, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Je Jung Kim, Su Kyoung Cha, Ji Won Lee, Seung Ryeol Lee
  • Patent number: 11373926
    Abstract: The load force bolster assembly includes a metallic stiffener. A carrier associated with a CPU (Central Processing Unit) is located upon the load force bolster assembly and positioned upon the electrical connector. A heat sink is located upon both the carrier and the load force bolster assembly wherein a torsioned wire of the bolster assembly provides a downward force upon an up-and-down movable stud which is secured to a screw of the heat sink so as to downwardly push the heat sink, thus enhancing the normal forces among the heat sink, the CPU and the contacts of the electrical connector. To efficiently hold the torsioned wire in position around a bottom corner of the stiffener, a retention groove is formed around the top portion of the restricting pole, and a pressing ring is downwardly snapped into the retention groove so as to restrain the torsioned wire in position.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: June 28, 2022
    Assignees: FOXCONN (KUNSHAN) COMPUTER CONNECTOR CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventor: Albert Harvey Terhune, IV
  • Patent number: 11094633
    Abstract: A microelectronic package bridge can comprising a plurality of ground layers, and a plurality of signal layers interwoven with the plurality of ground layers. Each of the signal layers can include a plurality of electrically conductive pathways. Each of the electrically conductive pathways can be arranged to form an electrical connection between one of a first plurality of bumps of a first die and one of a second plurality of bumps of a second die. Each of the plurality of electrically conductive pathways can have a length substantially equal to one another.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: August 17, 2021
    Assignee: Intel Corporation
    Inventors: Zhiguo Qian, Kemal Aygun, Dae-Woo Kim, Jackie C. Preciado
  • Patent number: 10984950
    Abstract: A method of manufacturing an electronic device includes preparing a chip component with a terminal electrode. A terminal plate is prepared. A connection member is placed between an end surface of the terminal electrode and an inner surface of the terminal plate. The terminal plate and the terminal electrode are joined using the connection member by bringing a press head into contact with an outer surface of the terminal plate and pressing and heating the terminal plate against the terminal electrode.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: April 20, 2021
    Assignee: TDK CORPORATION
    Inventors: Norihisa Ando, Kenichi Inoue, Sunao Masuda, Masahiro Mori, Kayou Matsunaga, Kosuke Yazawa
  • Patent number: 10790269
    Abstract: Semiconductor devices and semiconductor structures are disclosed. One of the semiconductor device includes a semiconductor package and a connector. The semiconductor package includes at least one die in a die region, an encapsulant in a periphery region aside the die region and a redistribution structure in the die region and the periphery region. The encapsulant encapsulates the at least one die. The redistribution structure is electrically connected to the die. The connector is disposed on the redistribution structure in the periphery region. The connector includes a plurality of connecting elements, wherein the connector is electrically connected to the redistribution structure through the plurality of connecting elements.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: September 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Hui Lai, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Tin-Hao Kuo
  • Patent number: 10541487
    Abstract: The electrical connector includes an insulative housing for receiving the CPU therein with a plurality of contacts retained thereto, a fastener located beside the housing, and a load plate pivotally mounted upon the fastener and covering the housing for holding the CPU in position. The load plate includes opposite first and second sides and opposite first and fourth sides to commonly form a center opening. The first and second sides form first protrusions with corresponding first pressing sections, and the third and fourth sides forms second protrusions with corresponding second pressing sections. During operation, both the first pressing sections and the second pressing sections act upon the CPU.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: January 21, 2020
    Assignees: FOXCONN (KUNSHAN) COMPUTER CONNECTOR C, FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Heng-Kang Wu, Fu-Jin Peng
  • Patent number: 10483233
    Abstract: A multi-chip module, and method of fabricating the multi-chip module. The multi-chip module includes: a substrate containing multiple wiring layers, each wiring layer having first pads on a top surface of the substrate and second pads on a bottom surface of the substrate, wherein the second pads include split pad and a conventional pad; a first solder ball in direct physical contact with a contiguous bottom surface of the conventional pad and connected to a next level of packaging under the conventional pad, wherein the first solder ball has a first height; and a second solder ball in direct physical contact with first and second sections of the split pad separated by a gap, wherein the second solder ball has a second height that is sufficiently less than the first height such that the second solder ball is not connected to the next level of packaging.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: November 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Anson J. Call, Erwin B. Cohen, Dany Minier, Wolfgang Sauter, David B. Stone, Eric W. Tremble
  • Patent number: 10424855
    Abstract: A connector lead has a lead terminal that includes a recessed solder wicking restriction area for ensuring that enough solder remains on or near the lead terminal. The lead terminal has a neck portion and a base portion extending from the neck portion. The neck portion has a width that is narrower than the width of the lead. The narrower neck portion defines a recessed solder wicking restriction area that encourages more solder to accumulate on or near the base portion instead of wicking up the lead. The width of the neck portion may also be narrower than the width of the base portion, causing the lead terminal to resemble an inverted “T” when viewed from the front. A band of solder resistive material may be applied circumferentially or laterally around the connector lead above the lead terminal to limit wicking in some embodiments.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: September 24, 2019
    Assignee: AIRBORN, INC.
    Inventors: Jason Smith, Emad Soubh
  • Patent number: 10276956
    Abstract: An electrical connector for electrically connecting a chip module includes an insulating body, a signal terminal received in the insulating body, and a first and a second shielding sheets retained in the insulating body. The insulating body sustains a chip module, and the signal terminal elastically urges against the chip module. The first shielding sheet is located on one side of the signal terminal and elastically urges the chip module. The second shielding sheet is located on the other side of the signal terminal, and adjacent to the first shielding sheet. The first and second shielding sheets are communicated through an electric conductor. The second shielding sheet does not urge the chip module.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: April 30, 2019
    Assignee: LOTES CO., LTD
    Inventor: Chang Wei Huang
  • Patent number: 10123429
    Abstract: A method for mounting components on a printed circuit board comprising the following steps: Arranging a first component on a first surface of the printed circuit board and a second component on a second surface of the printed circuit board, wherein the first component occupies a laterally overlapping position with the second component; and applying a first force to the first component for mounting it on the printed circuit board and/or applying a second force to the second component for mounting it on the printed circuit board. Further, a printed circuit board is suggested.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: November 6, 2018
    Assignee: Infineon Technologies Austria AG
    Inventors: Philip Georg Brockerhoff, Tilo Weide
  • Patent number: 10088503
    Abstract: An apparatus and a method are disclosed herein. The apparatus includes a circuit board, a housing, a spacer and a pin. The circuit board is configured to test a device-under-test (DUT). The housing includes a raised portion and a supporting portion. The spacer is mounted on the supporting portion of the housing. The pin penetrates through the raised portion and the supporting portion of the housing, and is configured to electrically connect the circuit board to the DUT.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: October 2, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Ming-Cheng Hsu
  • Patent number: 9984962
    Abstract: Systems and methods for flexible hybrid electronic (FHE) systems integrate traditional rigid integrated circuits with flexible substrates and/or interconnects. The layout and components of the system may be selected and/or optimized for a desired level of performance or flexibility. Via use of exemplary FHE system principles, improved wearable devices and other portable electronic systems may be realized.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: May 29, 2018
    Assignee: Arizona Board of Regents on behalf of Arizona State University
    Inventors: Umit Y. Ogras, Ujjwal Gupta, Md Ali Muztoba
  • Patent number: 9966327
    Abstract: A lead frame according to one embodiment includes a lead part including an inner lead and an outer lead connected to the inner lead, and a frame unit supporting the lead part. The inner lead has a terminal portion having a facing surface and a back surface in the opposite side from the facing surface. The facing surface faces a conductive pattern of a wiring board. An outer region of the terminal portion is provided with a solder thickness ensuring portion where the facing surface is depressed toward the back surface. The solder thickness ensuring portion is thinner than a center region of the facing surface. A center region of the back surface is flat without a depression.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: May 8, 2018
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Yoshihiro Kamiyama, Soichiro Umeda
  • Patent number: 9543243
    Abstract: Embodiments of the invention provide low-noise arrangements for very-large-scale integration (VLSI) differential input/output (I/O) structures (I/O pins, solder bumps, vias, etc.). Novel geometries are described for arranging differential pairs of I/O structures in perpendicular or near-perpendicular “quads.” The geometries effectively place one differential pair on or near the perpendicular bisector of its adjacent differential pair, such that field cancellation and differential reception can substantially eliminate noise without the need for added spacing or shields. By exploiting these effects, embodiments can suppress noise, independent of I/O structure spacing, and arbitrarily small spacings are permitted. Such arrangements can be extended into running chains, and even further into arrays of parallel chains. The parallel chains can be separated by supply structures (e.g.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: January 10, 2017
    Assignee: Oracle International Corporation
    Inventors: Robert P. Masleid, Donald Arthur Draper, Eben Kunz, Laura Kocubinski
  • Patent number: 9466906
    Abstract: A connection terminal has a movable contact portion that protrudes so as to be able to be pressed from an outside of a contact hole of a housing, and a first curved portion and a second curved portion that are continuously disposed and form a substantial S-shape. The movable contact portion is provided in a free end portion of the first curved portion. A position controlling projection extends from the movable contact portion. The position controlling projection abuts on an inner circumferential surface of the first curved portion or a region where the first curved portion and the second curved portion are continuously coupled to each other when the movable contact portion is pressed.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 11, 2016
    Assignee: OMRON Corporation
    Inventors: Jiro Koyama, Hirotada Teranishi, Takahiro Sakai
  • Patent number: 9426918
    Abstract: A socket package is provided to be positioned between a circuit package and a printed circuit board (PCB). The socket package includes a plurality of interconnects, to connect portions of the circuit package to portions of the PCB. Additionally, a plurality of capacitors are included with the socket package. The capacitors connect the interconnects provided to the socket package, and may be provided in lieu of capacitors in a circuit package, thus decreasing the complexity and build cost of the circuit package.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: August 23, 2016
    Assignee: Oracle America, Inc.
    Inventor: Ashur S. Bet-Shliemoun
  • Patent number: 9393919
    Abstract: An object of the present invention is to provide a relay able to reduce a receiving space in a fitting direction between a terminal and a terminal fitting. A relay includes: a relay main body of which outer shape is in a rectangular parallelepiped shape; and four plate-shaped terminals projected from the relay main body and configured to be fitted with terminal fittings 4. The relay main body includes: an upper surface and a lower surface opposite to each other; two side surfaces opposite to each other; and two side surfaces opposite to each other. Four terminals are projected from the upper surface and bent at right angle two times so that tips of these terminals are opposite to the side surfaces. The tips of the two terminals are opposite to one side surface, and the tips of the remaining two terminals are opposite to the other side surface.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: July 19, 2016
    Assignee: Yazaki Corporation
    Inventor: Koki Sato
  • Patent number: 9368893
    Abstract: A connection terminal has a movable contact which projects outside from a contact hole of a housing such that the movable contact can be pressed, and at least two curved portions connected to each other through a connecting portion. Each of the curved portions is pushed and widened by a load applied to the movable contact.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: June 14, 2016
    Assignee: OMRON Corporation
    Inventors: Jiro Koyama, Hirotada Teranishi, Takahiro Sakai
  • Patent number: 9245834
    Abstract: A semiconductor device has a semiconductor die. The semiconductor die has a contact pad. A first conductive layer is formed over the contact pad. A conductive shell having a hollow core is formed over the first conductive layer. A compliant material is deposited in the hollow core. The semiconductor die is mounted over a substrate with the conductive shell electrically connected to a conductive trace on the substrate. A second conductive layer is formed over the conductive shell. The compliant material is an insulating material. A bump material is deposited around the conductive shell. A pre-solder material is deposited over the conductive trace. The conductive shell has a cross-sectional width less than 7 micrometers. The second conductive layer is a conductive lip. Mounting the semiconductor die over the substrate further includes mounting the semiconductor die over the substrate in a bump on lead (BOL) configuration.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: January 26, 2016
    Assignee: STATS ChipPAC, Ltd.
    Inventor: Ming-Che Hsieh
  • Patent number: 9188605
    Abstract: An integrated circuit test socket includes a highly conductive compliant material that is cut and installed into the test socket. The conductive material draws electrical charge away from the test socket, leading to more accurate testing. The test socket base is grounded, and a ground current runs through the base and into conductive strips. The configuration forms an electromagnetic impulse shield, protecting the chip from electromagnetic interference. The compliance of the shield material allows the shield to be sealed when activated, ensuring that the electromagnetic impulse shield is complete around the semi-conductor chip.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: November 17, 2015
    Assignee: Xcerra Corporation
    Inventor: Victor Landa
  • Patent number: 9140721
    Abstract: An electrical test contact electrically connects a test terminal of an Integrated Circuit (IC) test assembly with an IC terminal of an IC device in an electrical interconnect assembly. The test contact is formed of electrically conductive material and includes a head portion and a foot portion. The head portion includes a first electrical contacting portion for electrically engaging an IC terminal of an IC device during use, and the foot portion includes a second electrical contacting portion for electrically engaging a test terminal of a test assembly during use. The head portion includes a head receiving portion that receives a first resiliently biasing member to retain the first resiliently biasing member in contact with the test contact. The first resiliently biasing member biases the first electrical contacting portion against the IC terminal of the IC device during use. An electrical interconnect assembly having multiple test contacts is also disclosed.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: September 22, 2015
    Assignee: JF MICROTECHNOLOGY SDN. BHD.
    Inventors: Wei Kuong Foong, Kok Sing Goh, Shamal Mundiyath, Eng Kiat Lee
  • Patent number: 9059526
    Abstract: An electrical connector electrically connecting a chip module to a printed circuit board, and includes an insulative housing, a plurality of terminals received in the insulative housing and a block assembled to the insulative housing, the electrical connector comprises a bottom wall and a plurality of side walls, between the bottom wall and the side walls forms a receiving space to receive the chip module for assembling the chip module from top to bottom in vertical direction, the block is configured with frame shape and comprises a plurality of tabs, the insulative housing comprises a plurality of slots matched with the tabs, the block can prevent the chip module coming off from the insulative housing while the chip module received in the receiving space.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: June 16, 2015
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Chun-Yi Chang
  • Publication number: 20150147896
    Abstract: An electrical connector includes a circuit board, a chip module, an isolation portion, and at least one liquid metal conductor. Multiple first conducting portions are disposed on the circuit board, and multiple second conducting portions are disposed on the chip module. The second conducting portions correspond to the first conducting portions. The isolation portion is located between the circuit board and the chip module. An upper surface and a lower surface of the isolation portion urge against the chip module and the circuit board respectively. The isolation portion surrounds, joints, and seals the first conducting portion. The at least one liquid metal conductor is correspondingly disposed between the first conducting portion and the second conducting portion, and electrically conducting the circuit board and the chip module. The liquid metal conductor is gallium or gallium alloy.
    Type: Application
    Filed: April 11, 2014
    Publication date: May 28, 2015
    Applicant: LOTES CO., LTD
    Inventor: Ted Ju
  • Patent number: 9040839
    Abstract: A wiring body connection structure includes a first wiring body and a second wiring body, the first wiring body having a first base material made of an elastomer and a first wiring containing an elastomer and a conductive material, the second wiring body having a second base material and a second wiring. In the wiring body connection structure, a laminated section is partitioned where a first end of the first wiring body and a second end of the second wiring body overlap in a front-rear direction. The wiring body connection structure further includes a cover member arranged on a front surface of the first wiring body, and a conductive adhesive layer bonding the first end and the second end in the laminated section while ensuring a conductive property. The cover member is interposed between a frontmost end of the second end and the first wiring in the laminated section.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: May 26, 2015
    Assignee: SUMITOMO RIKO COMPANY LIMITED
    Inventors: Lei Zhu, Motoyuki Furuta
  • Publication number: 20150072541
    Abstract: The present invention is premised upon a connector device and method that can more easily electrically connect a plurality of PV devices or photovoltaic system components and/or locate these devices/components upon a building structure. It also may optionally provide some additional sub-components (e.g. at least one bypass diode and/or an indicator means) and may enhance the serviceability of the device.
    Type: Application
    Filed: May 1, 2009
    Publication date: March 12, 2015
    Applicant: Dow Global Technologies LLC
    Inventors: James R. Keenihan, Joe A. Langmaid, Gerald K. Eurich, Michael J. Lesniak, Michael H. Mazor, Robert J. Cleereman, Ryan S. Gaston
  • Publication number: 20150064941
    Abstract: An IC socket includes: a socket main body having a flat plate section in which a plurality of through holes are provided; and a first connection terminal and a second connection terminal that are provided with the through holes of the socket main body, and protrude from an upper side and a lower side of the flat plate section, wherein a capacitor is provided within the first connection terminal.
    Type: Application
    Filed: July 16, 2014
    Publication date: March 5, 2015
    Inventor: Koji ISHIKAWA
  • Patent number: 8970243
    Abstract: A test carrier 10A comprises: a base board 21A which holds a die 90; and a cover board 31A which is laid over the base board 21A so as to cover the die 90. The test carrier 10A comprises a seal member 24 which is interposed between the base board 21A and the cover board 31A and which surrounds the die 90.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: March 3, 2015
    Assignee: Advantest Corporation
    Inventors: Yoshinari Kogure, Takashi Fujisaki, Kiyoto Nakamura
  • Patent number: 8961193
    Abstract: An apparatus for coupling an integrated circuit to other electronics can include a housing having an exterior and an interior, the exterior having an exterior bottom surface, the interior defined by an interior bottom surface opposite the exterior bottom surface, and at least one sidewall extending away from the interior bottom surface to define an interior shape that is sized to receive the integrated circuit, with the integrated circuit disposed against the interior bottom surface and the at least one sidewall. The example can include a plurality of exterior contacts exposed along the exterior bottom surface in an exterior contact pattern that is generally circular in shape.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: February 24, 2015
    Assignee: Intel Corporation
    Inventors: Gaurav Chawla, Vijaykumar Krithivasan, Joshua D Heppner
  • Patent number: 8957355
    Abstract: Inertial measurement unit apparatus for use with guidance systems are disclosed herein. An example guidance system includes an inertial measurement unit removably coupled in a cavity of a guidance wafer via an access port of the guidance wafer defining a port axis that is non-parallel relative to a longitudinal axis of the guidance wafer.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: February 17, 2015
    Assignee: The Boeing Company
    Inventors: Angelo Truncale, James K. Gingrich, Stephen T. Butscher, Joseph E. Justin
  • Patent number: 8932067
    Abstract: An electrical connector (100) for electrically connecting an IC package (9) with a substrate and includes an insulative housing (10) with a plurality of contacts (101) received therein, a load plate (3) pivotally covered the insulative housing (10), a carrier (8) assembled to the load plate (3) for holding the IC package (9) and a lock member (4) for positioning the load plate (3) in a closed position, the carrier (8) comprises a holding member (81) and a sliding member (83) assembled to the holding member (81), the holding member (81) and the sliding member (83) both comprises a position portion (8101, 8311) fastened with the load plate (3), and the sliding member (83) slides along the holding member (81) to make the position portion (8311) of the sliding member (83) fastened with the load plate (3).
    Type: Grant
    Filed: March 27, 2013
    Date of Patent: January 13, 2015
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Cheng-Chi Yeh
  • Patent number: 8902605
    Abstract: A surface mount component adapter, assembly and related method for attaching a surface mount component to a printed circuit board. The surface mount component adapter includes a substrate, a surface mount component holder on the substrate, and flexible leads each having a base end attached to the surface mount component holder and a free end configured to engage a plated through hole on a circuit board. The surface mount component holder is configured to engage electrical contacts of a surface mount component. The surface mount component assembly combines the surface mount adapter with the surface mount component. In the surface mount component method, the surface mount assembly is formed and the free ends of the flexible leads are attached to a corresponding number of the plated through holes on the circuit board.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: December 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Daniel J. Buschel, Wai Mon Ma, James E. Tersigni, Raymond D. Birchall
  • Patent number: 8888503
    Abstract: A socket for electric parts which is dawn sized. The socket of the present invention comprises a socket body to accommodate an electric part, plural contact pins disposed to a peripheral edge of the socket body, a latch rotatably located on the socket body so as to positioned above the contact pins, which presses an upper part of the electric part when the latch is closed and is in a state the electric part can be accommodated and taken out when the latch is opened, an operating member which is vertically movably disposed in the socket body and comprises an operating portion for opening constituted so as to press down an operation portion to be operated for opening formed to a central portion in a width direction of the latch and rotate the latch in an opening direction when the operating member moves downward.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: November 18, 2014
    Assignee: Enplas Corporation
    Inventor: Kenji Hayakawa
  • Publication number: 20140313686
    Abstract: A multi-chip socket including multiple cavities. The multiple cavities include support surfaces. The support surfaces may be disposed at different heights relative to a reference plane. A first thermal interface is to thermally contact a top surface of the first component, and a second thermal interface is to thermally contact a top surface of the second component.
    Type: Application
    Filed: July 3, 2014
    Publication date: October 23, 2014
    Inventors: Kevin B. Leigh, George D. Megason
  • Publication number: 20140253167
    Abstract: A memory chip testing system includes a computer, a rheostat, a voltmeter, and a connector. The computer includes a main board, a number of memory chip interfaces mounted on the main board. The computer runs a testing software to test the stability of a memory chip under different working voltages. The connector includes an insulating substrate and a number of conductive posts. The posts with ends fixed in the insulating substrate and arranged according to the pins of the memory chip interface. The connecter is connected to the pins of one of the number of the memory chip interfaces when testing a memory chip. The rheostat and the voltmeter are electrically connected to selected conductive posts on the insulating substrate, the rheostat adjusts the work voltage of the memory chip, and the voltmeter indicates the work voltage of the memory chip.
    Type: Application
    Filed: June 10, 2013
    Publication date: September 11, 2014
    Inventor: FA-SHENG HUANG
  • Publication number: 20140242816
    Abstract: A electrical interconnect adapted to provide an interface between contact pads on an IC device and a PCB. The electrical interconnect includes a multi-layered substrate with a first surface with a plurality of first openings having first cross-sections, a second surface with a plurality of second openings having second cross-sections, and center openings connecting the first and second openings. The center openings include at least one cross-section greater than the first and second cross-sections. A plurality of spring probe contact members are located in the center openings. The contact members include first contact tips extending through the first opening and above the first surface, second contact tips extending through the second openings and above the second surface, and center portions located in the center openings. The center portions include a shape adapted to bias the first and second contact tips toward the IC device and PCB, respectively.
    Type: Application
    Filed: May 7, 2014
    Publication date: August 28, 2014
    Applicant: HSIO TECHNOLOGIES, LLC
    Inventor: JIM RATHBURN
  • Patent number: 8801908
    Abstract: A composite insulating layer and a manufacturing method thereof. The composite insulating layer includes a socket substrate, a connection layer disposed on the socket substrate, a conductive metal layer disposed on the connection layer, an insulating metal layer disposed on the conductive metal layer, an insulating ceramic layer disposed on the insulating metal layer, and a electrodeposition layer disposed on the insulating ceramic layer. The composite insulating layer of the present invention can avoid the electromagnetic interference generated from the pins of the CPU and increase the stability of the CPU.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: August 12, 2014
    Assignee: Chenming Mold Ind. Corp.
    Inventors: Chuan-Li Cheng, Chao-Lun Liu, Chih-Feng Hsu
  • Patent number: 8777638
    Abstract: A wiring board includes a first substrate portion including a first feed-through conductor portion in a vertical direction, a second substrate portion provided on the first substrate portion and including a second feed-through conductor portion in a vertical direction of a corresponding part to the first feed-through conductor portion, and a feed-through electrode including the first feed-through conductor portion and the second feed-through conductor portion.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: July 15, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Hideaki Sakaguchi, Akinori Shiraishi, Mitsutoshi Higashi
  • Publication number: 20140162474
    Abstract: An apparatus for coupling an integrated circuit to other electronics can include a housing having an exterior and an interior, the exterior having an exterior bottom surface, the interior defined by an interior bottom surface opposite the exterior bottom surface, and at least one sidewall extending away from the interior bottom surface to define an interior shape that is sized to receive the integrated circuit, with the integrated circuit disposed against the interior bottom surface and the at least one sidewall. The example can include a plurality of exterior contacts exposed along the exterior bottom surface in an exterior contact pattern that is generally circular in shape.
    Type: Application
    Filed: December 12, 2012
    Publication date: June 12, 2014
    Inventors: Gaurav Chawla, Vijaykumar Krithivasan, Joshua D. Heppner
  • Publication number: 20140162473
    Abstract: A mobile device assembly comprising a land grid array (LGA) socket configured to couple with a board of a mobile device. The LGA socket may be configured to couple with a component of the mobile device. A mobile independent loading mechanism (ILM) may at least partially overlap the component and couple with the board of the mobile device via one or more fasteners. By coupling with the board of the mobile device, the mobile ILM may therefore apply pressure to the component, securely holding the component to the LGA socket.
    Type: Application
    Filed: December 11, 2012
    Publication date: June 12, 2014
    Inventors: Russell S. Aoki, Anthony P. Valpiani
  • Publication number: 20140134853
    Abstract: An electrical connector electrically connecting a chip module to a printed circuit board includes an insulative housing including a top insulative housing and a bottom insulative housing matched with the top insulative housing, a number of terminals received in the top insulative housing and the bottom insulative housing and at least one shielding plate fixed in the insulative housing and located beside the terminal, the electrical connector further employs a grounding plate assembled between the top insulative housing and the bottom insulative housing, the grounding plate electrically connects with the shielding plate and the shielding plate has a pair of clips fixed to the grounding plate.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 15, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: YEN-CHIH CHANG, TZU-YAO HWANG, KE-HAO CHEN
  • Patent number: 8689436
    Abstract: An align fixture for aligning an electronic component having a receptacle adapted to receive the electronic component and having a first abutting section and a second abutting section, the align fixture further having a first elastic unit and a second elastic unit, the first abutting section is flexibly mounted via the first elastic unit, and the second abutting section is flexibly mounted via the second elastic unit, and the first abutting section and the second abutting section are together adapted to floatingly engage the electronic component.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: April 8, 2014
    Assignee: Multitest Elektronische Systeme GmbH
    Inventors: Thomas Hofmann, Helmut Scheibenzuber
  • Publication number: 20140080328
    Abstract: An electrical connector for electrically connecting an IC package to a printed circuit board includes an insulating housing, a number of contacts received in the insulating housing and at least one sleeve assembled on the insulating housing. The insulating housing includes a bottom wall and a number of side walls extending upwardly from the bottom wall. The bottom wall and the side walls define a cavity for accommodating the IC package. The sleeve is assembled on the side wall and defines a supporting portion towards the cavity. The supporting portion includes a pair of abutting walls perpendicular to each other.
    Type: Application
    Filed: September 16, 2013
    Publication date: March 20, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: FANG-JWU LIAO, SHUO-HSIU HSU
  • Publication number: 20140051269
    Abstract: An exemplary electronic device with integrated circuit chips being on one circuit board and required connector circuits being on another, connectable, circuit board provides modularization and interchangeability for ease of adaptation in manufacture of electronic products utilizing the electronic device. In particular, the IC chips are mounted on a first circuit board, and the connector circuits are mounted on a second circuit board. The first circuit board is mountable to the second circuit board and is electrically connected to the second circuit board.
    Type: Application
    Filed: August 8, 2013
    Publication date: February 20, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHIH-CHUN CHANG, KUO-CHUN HUANG
  • Publication number: 20140024231
    Abstract: An electrical connector for connecting a package and a mother board includes an insulating sheet defining a top surface confronting with the package and a lower surface confronting with the mother board, and a plurality of contacts. The insulating sheet has a plurality of through holes through the top surface and the lower surface thereof and arranged in a matrix. The plurality of contacts is pressed in the corresponding through holes from the top surface of the insulating sheet. Each contact includes a main plate, a pair of first contacting arms from opposite edges of the main plates for contacting with the package and a pair of second contacting arm from another opposite edges of the main plate for contacting with the board.
    Type: Application
    Filed: July 17, 2012
    Publication date: January 23, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Alex Lon An, Darrell Lynn Wertz
  • Publication number: 20140011376
    Abstract: An electrical connector (100) for electrically connecting an IC package (9) with a substrate and includes an insulative housing (10) with a plurality of contacts (101) received therein, a load plate (3) pivotally covered the insulative housing (10), a carrier (8) assembled to the load plate (3) for holding the IC package (9) and a lock member (4) for positioning the load plate (3) in a closed position, the carrier (8) comprises a holding member (81) and a sliding member (83) assembled to the holding member (81), the holding member (81) and the sliding member (83) both comprises a position portion (8101, 8311) fastened with the load plate (3), and the sliding member (83) slides along the holding member (81) to make the position portion (8311) of the sliding member (83) fastened with the load plate (3).
    Type: Application
    Filed: March 27, 2013
    Publication date: January 9, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHENG-CHI YEH
  • Patent number: 8622754
    Abstract: A flexible power connector is presented.
    Type: Grant
    Filed: July 31, 2011
    Date of Patent: January 7, 2014
    Assignee: General Electric Company
    Inventors: Eladio Clemente Delgado, Richard Alfred Beaupre, Brian Lynn Rowden
  • Publication number: 20130344715
    Abstract: An electrical connector electrically connecting a chip module to a printed circuit board, and includes an insulative housing, a plurality of terminals received in the insulative housing and a block assembled to the insulative housing, the electrical connector comprises a bottom wall and a plurality of side walls, between the bottom wall and the side walls forms a receiving space to receive the chip module for assembling the chip module from top to bottom in vertical direction, the block is configured with frame shape and comprises a plurality of tabs, the insulative housing comprises a plurality of slots matched with the tabs, the block can prevent the chip module coming off from the insulative housing while the chip module received in the receiving space.
    Type: Application
    Filed: June 25, 2013
    Publication date: December 26, 2013
    Inventor: CHUN-YI CHANG
  • Publication number: 20130344713
    Abstract: An electrical connector for electrically connecting an IC package with a substrate and includes an insulative housing with a plurality of contacts received therein, a stiffener located outside of the insulative housing, a holding member and a load plate pivotally assembled to the stiffener, the stiffener includes a first end and a second end opposite to the first end, the holding member is pivotally assembled to the first end of the stiffener for holding and assembling the IC package to the insulative housing, the load plate is configured to frame shape and is pivotally assembled to the second end of the stiffener.
    Type: Application
    Filed: March 18, 2013
    Publication date: December 26, 2013
    Applicant: Hon Hai Precision Industry Co., Ltd.
    Inventor: Hon Hai Precision Industry Co., Ltd.