Abstract: Radio receiving apparatus includes antennas, radio units adjusting gains of received signals, and outputting the adjusted received signals, respectively, converters converting the adjusted received signals into digital signals, selector device which selects several of the digital signals, combination of the selected digital signals exhibiting good receiving characteristic, controller which determines the gains and outputs single control signal included in information of the determined gains to certain radio units, the certain radio units being included in the radio units and connected to certain converters of the converters which output digital signals included in the selected combination, weight calculator which calculates weight for each of the selected digital signals to enhance the receiving characteristic if the controller outputs the single control signal, synthesizer which synthesizes, into synthetic digital signal, digital signals obtained by multiplying each of the selected digital signals by the wei

Abstract: A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The data block is employed by a gain controller. Each nibble has at least two start bits whose states collectively represent both a function and/or destination.

Abstract: In a video IF channel the gain of the circuit is achieved ahead of the IF filter and the output of the filter, including its noise, need only be amplified a relatively small amount, thus preserving an acceptable signal to noise ratio. In one embodiment, a variable gain amplifier is used as the first stage amplifier and a fixed gain amplifier is used for the output stage.

Abstract: A gain calibration circuit comprises a generator that generates a constant overdrive voltage that biases a radio frequency (RF) mixer. A reference signal generator generates a reference signal. A comparator receives the reference signal and a second signal that is a function of a mixer bias current flowing through the RF mixer and that generates a difference signal. An adjustment circuit adjusts a transconductance gain of the RF mixer based on the difference signal.

Abstract: A method of and device for automatic gain control (AGC) incorporates digitally controlled variable gain amplifiers (VGAs). An AGC circuit comprises multiple AGC stages, where each of the stages comprises: respective I and Q VGAs; a detector for detecting respective I and Q output signals received from the respective I and Q VGAs; an analogue to digital converter for converting the detected I and Q output signals; and a digital engine for adjusting the respective I and Q VGAs for differences between the detected I and Q output signals and a reference signal. Using staggered AGCs incorporating respective I and Q VGAs splits the total dynamic range between n stages, allowing for reduced gain requirements in the VGAs. Using digital control for setting the VGA gains reduces analogue variations and I/Q gain imbalances. Using multiple update rates or magnitudes in the VGA control improves dynamic settling time.

Abstract: Methods and systems for processing a plurality of signals are disclosed herein. Aspects of the method may comprise amplifying an input signal. The amplified input signal may be bandpass filtered. Amplification of the input signal may be adjusted based on only narrowband received signal strength indication of the bandpass filtered amplified input signal. The amplified input signal may be downconverted and a blocker signal may be bandpass filtered from the amplified input signal. Signal strength of a desired signal from the amplified input signal may be measured. The amplification of the input signal may be adjusted utilizing a triple well (TW) NMOS transistor. A control signal may be generated based on the narrowband received signal strength indication of the bandpass filtered amplified input signal. The amplification of the input signal may be adjusted based on at least one of the generated control signals.

Abstract: A gain control circuit has a transmission power amplifier that amplifies a transmission signal to a predetermined level. An adjacent channel leak power ratio monitor finds a ratio of a distortion element corresponding to an adjacent channel leak power to a main element from an output signal supplied from the transmission power amplifier, and outputs the found ratio as an ACPR monitor value. A power supply control section variously controls power supply to the transmission power amplifier with use of the ACPR monitor value supplied from the adjacent channel leak power ratio monitor. A transmission signal level variable section controls a gain of a transmission signal path on the basis of a transmission level monitor value supplied from the adjacent channel leak power ratio monitor, thereby varying a level of the transmission signal.

Abstract: A system, method, and electrical circuit comprises a LNA signal line path comprising a LNA and a first signal mixer operatively connected to the LNA. The circuit further comprises an attenuator signal line path comprising an attenuator and a second signal mixer operatively connected to the attenuator; a radio frequency (RF) power detector operatively connected to an output of each of the LNA and the attenuator, wherein the RF power detector is adapted to vary a front end power gain of the electrical circuit; and logic circuitry operatively connected to the RF power detector, wherein the logic circuitry is adapted to (i) select transmission of a signal through only one of the LNA signal line path or the attenuator signal line path, and (ii) output the selected signal.

Abstract: An apparatus includes a semiconductor package, a radio receiver and a processor. The radio receiver is located in the semiconductor package and includes at least one gain stage. The processor is located in the semiconductor package to execute stored instructions to control the gain stage(s).

Abstract: A total gain candidate determining unit determines candidates suitable as a total gain Kt in an AGC feedback loop including an equalizer, an A/D converter, and an FIR filter. For each candidate for the total gain Kt, a gain setting unit sets a corresponding gain Kp in a preamplifier 10, and sequentially sets, in the A/D converter and the FIR filter, a gain Ka and a gain Kf which satisfy the total gain Kt. A written data storage unit stores known written data. An error rate calculating unit calculates an error rate of read data by comparing the read data and the written data. An second determining unit determines, as an optimal combination of gains, a combination of gains in which the error rate is the least.

Abstract: A multi-band integrated circuit radio transceiver comprising receive and transmit radio front end circuit blocks further includes a local oscillation generator for generating a local oscillation for use by the receive and transmit radio front end circuit blocks to down convert received RF signals to baseband or low intermediate frequency signals and for use by the transmit front end circuit blocks to up-convert outgoing communication signals to RF, respectively. The transceiver further includes at least one buffering element coupled disposed in the local oscillation path that produces a buffered oscillation based upon the local oscillation to at least one front end circuit block wherein the buffering element includes a differentially arranged amplifier stage having a load and a cross-coupled capacitive element coupled between input and output nodes of the amplifier stage and at least one of an inductive device or a selectable capacitive device.

Abstract: A Radio Frequency (RF) receiver includes a low noise amplifier (LNA) and a mixer coupled to the output of the LNA. The gain of the LNA is adjusted to maximize signal-to-noise ratio of the mixer and to force the mixer to operate well within its linear region when an intermodulation interference component is present. The RF receiver includes a first received signal strength indicator (RSSI_A) coupled to the output of the mixer that measures the strength of the wideband signal at that point. A second received signal strength indicator (RSSI_B) couples after the BPF and measures the strength of the narrowband signal. The LNA gain is set based upon these signal strengths. By altering the gain of the LNA by one step and measuring the difference between a prior RSSI_B reading and a subsequent RSSI_B? reading will indicate whether intermodulation interference is present.

Abstract: A method (700, 1100) and apparatus (300) are provided in a receiver for applying a variable gain to a received signal including a transmitted codeword in accordance with an Ultra Wideband (UWB) protocol. A first signal is generated and input to a selectable gain stage including a series of selectable 0 dB and 9 dB gain elements (302-305). The first signal includes the received signal mixed with a local oscillator signal modified according to a reference codeword. A gain value is selected from the selectable gain stage to amplify the first signal and form a second signal. An output signal is generated by combining the second signal and the modified local oscillator signal.

Abstract: A method of automatically switching on/off a low noise amplifier that serves to boost weak video signals in a TV tuner (2). The method involves determining whether there is a signal present in the reception, and if so, whether the signal requires boosting. Thereafter, the method determines whether the booster has caused an overall improvement in the reception and accordingly maintains the booster amplifier switched on or switches it off.

Abstract: A wireless communication system includes at least one repeater antenna assembly for providing adequate RF coverage within a building, such as a home. An example repeater antenna assembly has an automatically adjustable gain that is controlled responsive to a pathloss associated with a received signal to avoid base station transceiver desensitization and positive feedback. A disclosed assembly avoids base station desensitization and positive feedback. Another disclosed technique maintains a selected minimum link budget within the building.

Abstract: The present invention relates to an automatic gain controller in a wireless packet communication system and an automatic gain control method thereof. The automatic gain controller includes a variable gain amplifier, a signal saturation determining unit, a power calculator, and a gain controller. The gain controller includes a first gain selector and a second gain selector. In the automatic gain control method, an establishment gain of a variable gain amplifier is reduced when the number of samples greater than a predetermined reference is greater than a predetermined number. After a received power value is measured, the establishment gain is controlled by a difference between the received power value and a reference power value.

Abstract: Method and apparatus are provided for linearized balanced signal mixing. A signal mixing circuit (10) for translating a radio frequency (RF) signal is provided comprising an input amplifier (12), a mixer network (14), and an output buffer amplifier (18). The input amplifier (12) is configured to produce an amplified RF signal and cancel an input third-order intermodulation (IM3) distortion in the amplified RF signal with a cross-coupled feedback amplifier (13). The mixer network (14) is configured to produce an intermediate frequency (IF) signal based on the amplified RF signal and a local oscillator signal. The output amplifier (18) is configured to buffer the IF signal and cancel an output IM3 distortion in the IF signal with a cross-coupled feedback amplifier (19). The input amplifier (12) and cross-coupled feedback amplifier (13) also serve as a bias current source for the mixer network (14), thus lowering the supply voltage required for the mixing circuit (10).

Abstract: A hardware control loop (19) derives an AGC setting for a communication receiver based on signal strength information (16), without incurring program execution delay of a baseband processor.

Abstract: A variable gain amplifying circuit includes a gate-grounded amplifying FET and a collector-grounded amplifying transistor. A gate voltage of the FET and a base voltage of the transistor are adjusted by a supplied AGC voltage. When an input RF signal has small amplitude, the gate voltage is increased by a high AGC voltage so as to increase a main current of the FET, thereby increasing a signal gain of the FET. When the input RF signal has large or medium amplitude, the gate voltage is decreased by a low AGC voltage so as to decrease a main current of the FET, thereby decreasing the signal gain of the FET.

Abstract: A method and apparatus for recovering a data symbol from a communication signal in which the communication signal is processed to produce a baseband waveform that is then sampled to obtain a channel sequence. The channel sequence is decoded to obtain an estimate of the data symbol together with a measure of the reliability of the data symbol. The processing of the communication signal is adjusted dependent upon the measure of the reliability of the data symbol. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Abstract: An automatic gain control device includes an amplifier for a reception signal, a signal processing unit, a memory, and a control unit. The amplifier can set a gain. The signal processing unit extracts control data from an output from the amplifier and performs information processing for the data. The memory stores the gain setting value of the amplifier. The control unit controls the gain of the amplifier in accordance with a preset control algorithm. On the basis of the result obtained when the control unit computes a gain setting value stored in the memory in accordance with a preset algorithm, the control unit controls the gain of the amplifier in correspondence with operation of switching the frequency of a reception signal, which is accompanied by different frequency monitoring in the compressed mode by the signal processing unit.

Abstract: A call apparatus, a call method and a call system, are disclosed, in which the problem otherwise caused by fixed setting of the sound volume level of the BGM or the effect sound with respect to the call voice may be overcome. A decoded output of a decoder 17 (PCM data) is multiplied in a gain adjustment unit 18 with a gain coefficient k2, as the SE sound volume level as set by a user. A multiplication output of the gain adjustment unit 18 is sent to an adder 13. The decoded output of a decoder 20 is multiplied in a gain adjustment unit 21 with a gain coefficient k3, as the BGM sound volume level, as set by the user. A multiplication output of the gain adjustment unit 21 is sent to an adder 13. The adder 13 sums the multiplication outputs of the gain adjustment units 12, 18 and 21 and sends a sum output to an encoder 22.

Abstract: An improved method and apparatus for using common mode feedback to maintain a predetermined DC level for an intermediate frequency output signal. A common mode feedback capacitor-select switch module is operable to use a bandwidth control signal from a radio interface of a wireless device to selectively connect a plurality of common mode feedback capacitors to an operational amplifier, thereby generating a common mode feedback signal as an input to an active mixer conversion gain module. The predetermined combination of common mode feedback capacitors is used in combination with a plurality of bandwidth capacitors to generate an overall capacitance that maintains the bandwidth of the system at a predetermined value.

Abstract: An AGC circuit controls LNA and VGA amplifiers such that a received signal is converted at a high speed with tracking errors prevented according to each modulation scheme. The AGC circuit generates LNA and VGA control signals controlling the LNA and VGA amplifiers, respectively. A digital signal, converted from the received signal, is calculated for a power value, on which scaling is performed by a scaling section to then be provided through an adder and a register to a control signal generator for generating the LNA and VGA control signals. The scaling section compares the power value with a target value to perform scaling with a scaling coefficient according to the sign of the comparison value so that an increase of the tracking error is avoided, thus preventing phenomena where the AGC control oscillates without convergence, thereby making it possible to attain the optimum automatic gain control.

Abstract: In a receiving circuit, an antenna 11 receives a high-frequency signal at a predetermined frequency band, a level changing section 13 changes a signal level of the high-frequency signal received by the antenna, a subsequent-stage circuit 14 performs predetermined signal processing for the high-frequency signal whose signal level is changed at the level changing section 13, a detecting section 32 detects a signal level of the high-frequency signal for which the signal processing is performed by the subsequent-stage circuit 14, and a control section 33 sets a rate of change of the high-frequency signal by the level changing section 13, based on the signal level of the high-frequency signal detected by the detecting section 32, so that the signal level of the high-frequency signal detected by the detecting section 32 does not exceed a predetermined value.

Abstract: A WLAN device operating in an 802.11g mode can receive signals of different modulations. A technique is provided that quickly and accurately identifies signals of different modulation types when received by the WLAN device. This technique includes beginning demodulation of the received signal using components associated with potential types of modulation. One or more identification values can be provided to a voting block for potential types of modulation based on the received signal. The voting block can advantageously determine the most probable modulation based on such identification value(s). At this point, components associated with the determined modulation can be used to correctly decode the received signal and components not associated with the determined modulation can be deactivated, thereby saving valuable power resources in the device.

Abstract: The present invention relates to a method for adjusting the amplification of a high frequency signal, a transmitter or receiver unit and a communication system. The aim of the invention is to provide a method and device for improved use of a polar-loop concept in a transmitter, especially for a mobile radio link. According to the method for adjusting the amplification of a high frequency signal, wherein the phase angle and the amplitude of an error-free input signal are separated from each other with a defined part of an output signal and readjusted, an output voltage of a battery voltage modulator is evaluated as a measure for an error at the output of a transmitter amplifier and taken into account in order to provide a correction.

Abstract: A receiver includes a tuner and a circuit. The tuner receives an indication of a radio frequency signal from an antenna feedline in response to the radio frequency signal being provided to the antenna feedline by an amplifier. The circuit transmits a control signal to the antenna feedline to control a gain of the amplifier in response to a strength of the radio frequency signal.

Abstract: A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow.

Abstract: Interruption of a reception signal is achieved by placing a first low noise amplifier into the sleep state, and short-circuiting a shunt switch provided between differential input terminals of a second low noise amplifier during a DC offset canceling period. Further, an antenna switch is switched to a circuit system where DC offset canceling is not performed for preventing the input of the reception signal to a circuit system where DC offset canceling is performed.

Abstract: A communications system comprising a processor, a variable oscillator, a radio frequency (RF) quadrature demodulator, a variable capacitor, a continuous-time, sigma-delta analog-to-digital converter (ADC), and a frequency divider, all integrated on a single semiconductor chip. The ADC samples the RF quadrature demodulator output. The processor sets the communications system frequency by controlling the oscillator, the frequency divider and the variable capacitor.

Abstract: The present invention relates to wireless communications, and in particular although not exclusively, to networks of indoor collocated or overlapping wireless coverage areas especially those intended for operation in unlicensed spectrum such as the Industrial Scientific and Medical (ISM) bands.

Abstract: A signal relay apparatus, method, application program, and computer readable medium adapted for wireless network are capable of saving power consumption due to failure of adjusting amplifying gain dynamically and solving the difficulty of demodulation since noise is also amplified during relay. For wireless access network, the present invention decreases the transmission power of mobile devices so that the battery of the mobile devices may keep working longer and the interference inside is reduced.

Abstract: A wireless receiver receives a desired wireless signal and then detects self-sourced intermodulation products other than with respect to the desired wireless signal to provide corresponding detected results. The wireless receiver then uses these detected results to control gain as corresponds to the desired wireless signal.

Abstract: A control system for a mobile device comprises an audio input that generates an audio input signal. An audio amplifier amplifies the audio input signal using a gain. An adaptive gain control (AGC) module receives the audio input signal and adjusts the gain of the audio input signal. A comparing module generates a first signal when the gain is less than a threshold. A timing module determines a duration of the first signal. A selecting module communicates with the timing module and selects one of an active mode and an inactive mode of the mobile device when the duration is greater than a first period.

Abstract: The method is applicable to a receiver (1) of signals corresponding to packets of digital data transmitted in bursts, which comprises an analogue pickup subassembly (3) connected to a digital processing subassembly (8) by means for converting analogue signals into digital signals (7). Gain adjustment means (5) act on the amplification means (5) in order to alter the power of signals supplied to the conversion means. The method provides a preadjustment of the gain, in the absence of a burst, for detecting the arrival of signals even if they are weak, and an adjustment of the gain as a function of a power value of the signal determined from burst start symbols, as obtained after conversion. This adjustment is dependent on the recognition of symbols scheduled at the start of a burst, it is carried out during a time scheduled for a symbol otherwise left unexploited by the method.

Abstract: An automatic gain control (AGC) technique can quickly sense signal size over a large dynamic range by using a peak detector block in the analog portion of the receiver. The peak detector block can compare a received signal to predetermined thresholds (chosen to divide a potential signal range into smaller ranges). Therefore, the peak detector block can assist the automatic gain control (AGC) in quickly sizing the received signal. The AGC technique can also reduce digital filter settling time by simulating a gain change and providing this simulated value to the digital filters of the receiver. DC or spur components can be estimated prior to and after performing an analog gain change and then removed from digital signal samples. The digital signal samples sampled prior to performing the analog gain change can then be rescaled and provided to the digital filter, thereby avoiding discontinuity in a digital signal.

Abstract: A single-path enhanced-algorithm digital automatic gain control (SDAGC) integrated receiver is presented. The SDAGC has a front-end RF/IF reception/processing block and associated RF/IF AGC, which outputs to a single ADC. Output from the ADC is split into two TDM and one COFDM signal pathways, each with a respective DAGC. The TDM DAGCs are controlled according to TDM post-power signals, while the COFDM, DAGC is controlled according to COFDM post- and pre-power signals. An IF Gain Decision block determines the RF/IF gain based upon the respective gains of the TDM and COFDM DAGCs. A Gain Distributor block then distributes the total gain of the system across the RF/IF AGC and the various DAGCs. To save power, the COFDM pathways may be disabled if the COFDM pre-power signal falls below a threshold value.

Abstract: A signal gain control circuit. A gain stage receives and amplifies an analog signal by a first gain factor adjusted by a gain adjusting signal in a periodic manner with a first period, and outputs an amplified signal. An analog to digital converter converts the amplified signal to a first digital signal comprising a stream of samples. An amplifying device adjusts a second gain factor in a periodic manner with a second period in accordance with a characteristic metric of the distribution of the first digital signal and multiplying the first digital signal by the second gain factor to generate a second digital signal. A first gain adjusting device detects a strength of the second digital signal and generates the gain adjusting signal according to the signal strength of the second digital signal in a periodic manner with the first period.

Abstract: The invention relates to a receiver 1 of signals and proposes to remedy a non-linearity problem in an amplifier 70 of an integrated tuner 7.A linearity compensation circuit 8 is inserted upline from the tuner 7.The compensation circuit 8 presents a characteristic that is the inverse of the characteristic of the low-noise amplifier 708 in order to compensate for the linearity defect.

Abstract: An Ultra Wide Band (UWB) transmitting and receiving device that includes a Digital Signal Processor (DSP) for implementing a DC offset cancellation algorithm, an adder for adding a baseband transmission signal from the transmitter and a calibration signal produced by the algorithm of the DSP, a modulator for modulating the signal from the adder, a transmitter amplifier for amplifying the modulated signal, a coupler for applying the output of the transmitter to the receiver, and a switch for selectively connecting the output of the coupler to the input of the receiver.

Abstract: The present invention is to provide a dynamic power control circuit for a wireless communication device, which comprises a power detector, a comparator, a low pass filter and an adder disposed between a radio frequency auto-gain control circuit and an antenna thereof. A reference voltage is imposed on the adder to enable the power detector to detect and output signal voltage to the comparator which compares the received voltage with a specified received voltage limit and outputs a reference voltage to the low pass filter for filtering out the noise of the reference voltage and outputting it to the adder. The adder then adds the reference voltage and the specified reference voltage, and outputs the result to the radio frequency auto-gain control circuit for controlling the output power corresponding to the strength of the received signals.

Abstract: A method of compensating a direct-current offset coupled into a receiving path of a receiver, the receiving path having at least one gain factor adjustable by a gain control, which method first determines an amount of a direct-current offset present at a selected end point in the receiving path. A compensation quantity is set accordingly. In case of a forthcoming adjustment of the at least one gain factor by the gain control, the compensation quantity is then scaled with a scaling factor to prevent a direct-current step at the selected end point due to this forthcoming adjustment. The final compensation quantity is fed at a selected summing node into the receiving path. The invention is also directed to a corresponding receiver, an electronic device comprising such a receiver, a hardware component for such a receiver and to a corresponding software program product.

Abstract: Interchangeable high band low-noise-amplifiers (LNAs) and low band low-noise-amplifiers (LNAs) and related methods are disclosed that greatly enhance the efficiency of designing handsets for different combinations of frequency bands. The input signals to particular pins on a receiver or transceiver integrated circuit (IC) are swappable such that multiple frequency bands can be input to the same input pins thereby allowing for simplified system design. Efficient programmable techniques are also disclosed for controlling a swap mode within communication ICs. These interchangeable or band swappable input paths, for example, can be utilized to allow interchangeability between high band (PCS, DCS) and low band (GSM, E-GSM) inputs for cellular communications.

Abstract: A method for partitioning gain for a wireless radio frequency integrated circuit (RFIC) is provided. The method includes receiving an overall gain at the RFIC from a baseband controller that is coupled to the RFIC. The overall gain is then partitioned in the RFIC.

Abstract: A DC offset cancel circuit includes an analog adder 1 to whose one input a baseband analog signal output from a high-frequency reception section is input and to whose other input an analog correction signal output from a D/A converter 7 is input, and which corrects the reference voltage value of the baseband analog signal analogically to cancel a DC offset, an adder 3 which has the output of the A/D converter 2 as its one input and subtracts the lower bits of a sample value stored in a memory 6 to be described later as a DC offset value from the input value and outputs the resultant value, a control circuit 5 which outputs an output digital value of the A/D converter 2 as a sample value to the memory 6, and a D/A converter 7 which converts a digital value of the upper bits of a sample value stored in the memory 6 to an analog correction signal and outputs the analog correction signal to the analog adder 1.

Abstract: A receiver device 1 comprises a gain control portion 40 which regulates a received signal by controlling the opening and closing of a switch 52 which bypasses a first amplifier 12 and providing variable control over the gain of a second amplifier 16, and which also switches the gain of the second amplifier 16 to compensate for gain fluctuations due to the opening and closing of the switch 12. This gain control portion 40 also comprises a digital logic circuit which can program a time offset between the open/closing period of the switch 52 and the switching period of the gain of the second amplifier 16.

Abstract: A broadband signal amplifier includes one of more broadband amplifier circuits, each dynamically controlled in response to a total power level of signals applied thereto to reduce linearity in response to a reduction of input signal strength. A filter may couple the output of the broadband amplifier circuits to each other to form a tandem arrangement. Power detectors are connected to detect and provide outputs indicative of the total power levels of the signals applied to respective broadband amplifiers. A control unit is connected to and receives the output from the power detectors and, in response, provides a control signals to the broadband amplifier circuit so as to operate each over portions of their operating characteristic curves that provide only that degree of linearity necessary to limit distortion to a predetermined or dynamically adjustable maximum acceptable level.

Abstract: A power amplifier for a dual antenna is disclosed. The power amplifier comprises at least four controlled amplifier loops receiving a signal to be transmitted. The power amplifier also comprises a first combining structure combining at least two of the amplifier loops and a second combining structure combining at least two of the amplifier loops. The power amplifier also comprises a ninety degree hybrid receiving output from the first and second combining structures and providing output to a first antenna output and a second antenna output.

Abstract: A system and method for performing DC offset correction in a wireless communication receiver during “dead time” are provided. The receiver includes amplifier circuitry that amplifies a received radio frequency (RF) signal, downconversion circuitry that downconverts the received RF signal to provide a downconverted signal, digitization circuitry that digitizes the downconverted signal to provide a digital signal, and digital DC offset correction circuitry enabled during the dead time when there should be no DC content in the downconverted signal. In operation, the digital DC offset correction circuitry detects a DC offset of the digital signal and subtracts the DC offset from the digital signal.