Abstract: A receiver includes a Gilbert cell mixer comprising an input transconductance stage. The input transconductance stage includes first and second transistors receiving an input signal and providing a first gain characteristic that is substantially non-linear over an operating frequency range of the receiver. Third and fourth transistors receive the input signal and provide a second gain characteristic that is substantially non-linear over the operating range of the receiver. A combined gain characteristic of the input transconductance stage is based on the first and second gain characteristics and is substantially linear over the operating frequency range of the receiver.

Abstract: According to the present invention, there is provided a transmission circuit transmitting a power signal using frequency hopping system from an antenna connected to the transmission circuit through a transmission path, the transmission circuit including: a controller outputting an amplitude set value for each hopping frequency of the power signal before being transmitted according to power level of the power signal at the antenna; a pre-driver controlling the amplitude of the power signal before being transmitted for each hopping frequency according to the amplitude set value; and a power amplifier outputting the power signal to the transmission path according to the signal output from the pre-driver.

Abstract: A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow.

Abstract: A diversity receiver includes a first radio frequency (RF) receiver section receives a first inbound RF signal over a range of frequencies and generates a first amplified RF signal, wherein the first inbound RF signal includes a desired RF signal component and an undesired signal component. A second RF receiver section receives a second inbound RF signal over the range of frequencies and generates a second amplified RF signal, wherein the second inbound RF signal includes the desired signal component and the undesired signal component. A first RF cancellation module generates a desired RF signal from the desired RF signal component while attenuating the undesired signal component, based on the first amplified RF signal and the second amplified RF signal.

Abstract: The back-off of an AGC diversion section can be appropriately controlled.

Abstract: An incoming RF signal can be amplified in a RF front end of a RF receiver by conveying the signal through one of a multiple amplification paths. On each path, the gain can be controlled by RF automatic gain control (AGC) circuits. Each amplification path can be designed to handle incoming signals in a designated power range and to optimize receiver performance characteristics such as the noise figure (NF) and odd harmonic linearity in that power range. Signal power can be measured at different locations of the receiver and bypass switches can be used to convey the RF signals down one of the multiple paths based on the power measurements, according to executable logical code. An incoming signal power hysteresis can be applied to stabilize the system. Further, signal power averaging and switch delaying mechanisms can be employed to stabilize the system for rapidly fluctuating signals.

Abstract: A method for adaptive automatic gain control and an automatic gain control circuit are provided. A predetermined waveform is injected into the automatic gain control circuit. A signal is sampled at at least one point in the automatic gain control circuit in which the sampled signal includes the injected predetermined waveform. A small-signal control characteristic is calculated using the sampled at least one signal. A determination is made as to whether the calculated small-signal control characteristic is valid. In the case of a valid determination, the calculated small-signal control characteristic is used to adjust the gain of the automatic gain control circuit.

Abstract: A mobile terminal station sets a fixed gain set value that is a predetermined gain value at initial synchronization and amplifies a received signal received from a wireless base station in accordance with the set fixed gain set value. Then, the mobile terminal station detects a synchronizing signal pattern from the amplified received signal, and controls to perform an automatic gain control by using the fixed gain set value as the initial value of the automatic gain control when the synchronizing signal pattern is detected and modifies the fixed gain set value when the synchronizing signal pattern is not detected.

Abstract: A hybrid structure circuit for the cancellation of both Type-I and Type-II DC offsets. It comprises a static compensator in conjunction with a servo-loop feedback amplifier to suppress the undesired DC components present along the path of the base band after the direct conversion mixer. Two mixers are used to down convert a received RF signal directly to a base band signal with two components: in-phase and quadrature-phase. Both in-phase and quadrature-phase branches employ the same circuitry for DC offset cancellation. Miller effect is also utilized in the structure in order to implement the circuit on-chip.

Abstract: A first FET is inserted in a series position between a signal input terminal and a signal output terminal, while second and third FETs are inserted in a shunt position respectively between the signal input terminal and a ground terminal and between the signal output terminal and a ground terminal. First and second reference voltage terminals and a control terminal are provided. A first reference voltage and a control voltage are applied to the first FET, while a second reference voltage and a control voltage are applied respectively to the second and third FETs, so that the first, second, and third FETs serve as variable resistors. As such, a gain control circuit is constructed. Further, a first resistor is provided in parallel to the first FET, while second and third resistors are provided respectively in series to the second and third FETs.

Abstract: In a wireless receiver apparatus including a gain control amplifier for controlling a gain of a reception signal, a maintaining device compulsorily maintains the gain of the gain control amplifier at a predetermined fixed value only in a predetermined specified interval. The maintaining device includes a latch circuit for maintaining a gain set value immediately prior to the specified interval. A start timing of the specified interval is determined by an edge of a predetermined timer start signal, and a duration of the specified interval is determined on the basis of a count of a predetermined timer clock signal and a count of a predetermined timer count set bus signal.

Abstract: The present invention relates to a DC offset canceling circuit. In one aspect of the invention, a DC offset canceling circuit with independently configurable gain and roll-off frequency is provided. In one embodiment of the present invention, the DC offset canceling circuit is used in the receive path of a down-conversion wireless receiver. In another aspect of the invention, a method for independently varying the gain and the roll-off frequency of the DC offset canceling circuit is provided. In one embodiment, the method is used to independently operate a gain control scheme and a DC offset cancellation strategy in a DC canceling circuit.

Abstract: A radio frequency receiver (102) includes at least one amplifier (108, 114 and 122) for amplifying a signal received by the radio frequency receiver, an automatic gain control system (158) for controlling a gain of the at least one amplifier, and a direct current offset correction filter (142) for reducing any direct current component of the signal amplified by the at least one amplifier. The direct current offset correction filter has a bandwidth that is dynamically controlled by a change in the gain of the at least one amplifier. The radio frequency receiver also includes a digital automatic gain control unit (150) having a bandwidth that is dynamically controlled by the change in the gain of the at least one amplifier.

Abstract: Methods and apparatus to perform radio frequency (RF) analog-to-digital conversion are described. According to one example, a receiver includes an amplifier to amplify received analog RF signals and a mixer-free circuit for converting the received analog RF signals to digital signals.

Abstract: A reception apparatus capable of preventing saturation and sensitivity degradation of a receiver when base transceiver station transmit power control is performed and calibrating offset voltage without increasing the amount of current consumption. In this apparatus, a gain setting section (109) estimates reception field intensity of each time slot in the next frame based on information of the reception field intensity and transmit power information which is information of the transmit power of the base transceiver station and calculates a gain set value according to the estimated reception field intensity. A gain control circuit (110) extracts a maximum gain out of the gains set by the gain setting section (109), uses the maximum gain as a set gain for DC offset voltage calibration and performs gain control at the gain set value corresponding to each time slot. A voltage calibration circuit (111) performs the DC offset voltage calibration of the received signal.

Abstract: A system and method for performing digital crest factor reduction. In one embodiment, the method is devised to suppress the signal amplitude to maintain a low signal peak to average ratio (PAR), while maintaining a desirable Error Vector Magnitude (EVM). This technique may be designed to operate in highly dynamic signal conditions.

Abstract: A method and apparatus are provided for providing improved radio frequency (RF) receiver signal correction. For RF receiver circuitry (106) having receive path and a warmup period associated therewith and including at least one analog baseband gain control stage (218) having a gain associated therewith, the method includes the step of performing a DC correction calculation operation during the warmup period to derive a DC correction value having a first component and a second component for each of the at least one gain control stage (218). The DC correction calculation step includes the steps of performing a first closed loop correction (460) of a baseband path to derive the first component of the DC correction value and performing a second closed loop correction (462) of the receive path as a function of the (218) gain during the warmup period to derive the second component of the DC correction value.

Abstract: A method for processing signals includes generating a frequency response adjusted signal of an antenna, and adjusting a gain of the antenna by varying a gain of a programmable amplifier that amplifies the frequency response adjusted signal. The generating of the frequency response adjusted signal may take place prior to the gain adjusting. A frequency response of the antenna may be dynamically adjusted during the generating. A programmable filter used for the generating may be autonomously adjusted. The gain of the antenna may be dynamically adjusted. The gain of the programmable amplifier may be autonomously varied. The programmable filter and the programmable amplifier may be adjusted sequentially.

Abstract: An RF transceiver includes an RF receiver that receives a received signal from an external device, the RF receiver having an AGC module that generates an automatic gain control (AGC) signal based on a strength of the received signal, and a low noise amplifier that amplifies the received signal based on the AGC signal. A processing module generates a transmit power control signal based on the AGC signal. An RF transmitter generates a transmit signal having a selected power level, wherein the selected power level is based on the transmit power control signal.

Abstract: A wireless receiver designed to conform to the standard IEEE 802.15.4. The receiver comprises an analog front-end and a digital decoder. The analog components of the front end include one or more amplifiers and an analog-to-digital converter (ADC). The digital decoder receives the output of the ADC and demodulates it in a demodulator which is driven at an a chip frequency by an internal or external clock. The demodulator comprises a sampler operable to sample the digital signal at a sampling frequency and a correlation unit operable to process a set of bits, referred to as a chip code, in the sampled digitized signal and output therefrom a set of correlation values. The set of correlation values is an indicator of likely mapping between the chip code that has been processed and a set of possible chip codes defined according to the standard. The demodulator further comprises a symbol selection unit and a frequency correction unit.

Abstract: A radio receiver such as a frequency modulation (FM) receiver, for example, includes a radio frequency (RF) amplifier having an adjustable gain output. The RF amplifier may be configured to receive and amplify an incoming RF signal. The receiver also includes an intermediate frequency (IF) amplifier having an adjustable gain output. The IF amplifier may be configured to receive and amplify an IF signal that corresponds to the RF signal. The receiver also includes a gain control unit that is coupled to the RF amplifier and the IF amplifier. The gain control unit may be configured to independently adjust the gain of each of the RF amplifier and the IF amplifier, dependent upon a peak output level of both the RF amplifier and the IF amplifier.

Abstract: Methods and apparatus to perform radio frequency (RF) analog-to-digital conversion are described. According to one example, a receiver includes an amplifier to amplify received analog RF signals and a mixer-free circuit for converting the received analog RF signals to digital signals.

Abstract: An OFDM wireless transceiver uses a digital automatic gain control (AGC) module. The digital AGC module is configured for setting a gain to an initial gain value for mapping a received wireless signal to a first power value for an input circuit having a prescribed input range. The initial gain value is set relative to the prescribed input range and a prescribed signal to noise ratio. If the digital AGC module determines that the first power value of the received wireless signal does not exceed the prescribed input range, the digital AGC module calculates an optimum gain for the received wireless signal relative to the initial gain value and the first power value; if the first power value exceeds the prescribed input range, the AGC module determines the optimum gain based on setting the gain to a minimum gain value.

Abstract: Accordingly, a system and method are provided for adaptively controlling amplification in a wireless communications device receiver. The method comprises: receiving a signal with a variable signal strength; amplifying the received signal in response to the signal strength, to supply an amplified signal. More specifically, amplifying the received signal in response to signal strength includes selecting a gain state in response to a plurality of signal strength switch point. The method further comprises: measuring signal quality; measuring signal energy; and, modifying a relationship between receiver performance and amplified signal strength, in response to the measured signal quality and measured signal energy. Other aspects of the method comprise processing the amplified signal, so that a processed signal quality and processed signal energy can be measured.

Abstract: A system and method are provided for calibrating Amplitude Modulation to Phase Modulation (AM/PM) pre-distortion in a transmitter operating according to a polar modulation scheme. In general, phase modulation is disabled during transmission of an actual polar modulation signal. As a result, the transmitter provides a radio frequency (RF) output signal having an amplitude modulation component and ideally a constant phase. However, the AM/PM distortion of the transmitter creates a phase modulation component in the RF output signal. The phase component of the RF output signal, which is the AM/PM distortion of the transmitter, is measured by test equipment. The AM/PM pre-distortion applied by the transmitter is then calibrated based on the measured AM/PM distortion such that the AM/PM distortion of the transmitter is substantially reduced.

Abstract: Various embodiments are disclosed relating to wireless transmitters, and also relating to multi-band transformers. According to an example embodiment, an apparatus may include a multi-band transformer configured to receive as an input a signal associated with a first frequency band or a signal associated with a second frequency band. The transformer may include one or more inputs and a first output and a second output. The transformer may also include one or more switches coupled to the transformer and configured to selectively output a received input signal onto the first output and/or the second output of the transformer.

Abstract: A heterodyne receiver has a mixer with at least one transistor whose operating point can be varied dynamically. The quality of the output signal from the mixer is assessed in order to control the operating point. The operating point is set such that the collector current is increased when the intermodulation interference is high, thus improving the intermodulation resistance. The collector current is reduced when the intermodulation interference is low, thus reducing the transistor noise. Furthermore, the current drawn is reduced in this situation. The circuit and the method are particularly suitable for RF receivers without tunable input filters, and for receivers in which the power consumption must be low.

Abstract: Phase-based processing of a multichannel signal, and applications including proximity detection, are disclosed.

Abstract: In an exemplary embodiment, the communication device including an analog filter, where a digital signal processor sets the gain of the analog filter and the pole location of the filter simultaneously in order to maintain the filter pole location at a desired value or within a desired range. In further exemplary embodiments, the methodology to simultaneously set the gain and the pole location of the filters.

Abstract: The receiver comprises a first amplifier, a mixer for downconverting a wanted communications channel, a second amplifier, a demodulator and a digital controller providing a digital gain setting for the second amplifier by means a digital gain control after a selection of the wanted communications channel, and providing an analog gain setting for the first amplifier by means of an analog gain control during demodulation of the wanted communications channel. The digital gain setting is in particular freezed during demodulation of the wanted communications channel and the digital controller provides a re-calibration of the digital gain setting only, when the analog gain control is out of its control range. Applications are for example for direct conversion digital satellite receivers for reception of DVB-S, DVB-S2 or ABS-S television channels.

Abstract: Systems for delivering satellite signals to multiple dwelling units (MDUs). A system in accordance with the present invention comprises an antenna for receiving the satellite signals, a conversion unit, coupled to the antenna, for stacking the satellite signals onto a single cable, a distribution unit, coupled to the conversion unit, wherein the distribution unit distributes the stacked satellite signal to a plurality of outputs, and at least one customer device, coupled to an output of the plurality of outputs, wherein each unit in the MDU uses the customer device to destack the stacked satellite signals for delivery to a receiver.

Abstract: A fast settling AGC system includes a “fast settle” comparator that facilitates fast settling of strong radio receiver output signals from a maximum to an intermediate voltage level at the start of each transmission burst, and a “normal” AGC comparator that further settles the output signal from the intermediate voltage level to a desired target output voltage level at a slower “normal” rate. The gain control signal components generated by both the “fast settle” comparator and the “normal” AGC comparator are summed and applied to the gain control terminal of a variable gain amplifier. The gain control signal component generated by the “fast settle” comparator has a higher current level than the gain control signal component generated by the “normal” comparator, but is terminated when receiver output signal drops to the intermediate voltage level.

Abstract: A signal relay apparatus, method, application program, and computer readable medium adapted for wireless network are capable of saving power consumption due to failure of adjusting amplifying gain dynamically and solving the difficulty of demodulation since noise is also amplified during relay. For wireless access network, the present invention decreases the transmission power of mobile devices so that the battery of the mobile devices may keep working longer and the interference inside is reduced.

Abstract: A system for providing automatic gain control (AGC) comprises a signal path with an RF input, a plurality of power detectors in communication with the signal path, each of the power detectors operable to measure a total broadband power level of a signal in the signal path, each of the power detectors positioned to monitor a point in the signal path corresponding to a change in signal bandwidth, a control system operable to receive from each of the power detectors information associated with the power level and to adjust attenuation in the signal path in response to the information to achieve desired gain control.

Abstract: Systems and methods for recording audio are provided. In this regard, an representative method comprises: receiving audio information corresponding to an audio communication; receiving parameter information corresponding to a manner in which the audio communication is to be provided to a user in audible form; providing the audio information and the parameter information in the form of Internet Protocol (IP) packets; and recording the audio information and the parameter information provided by the IP packets.

Abstract: An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

Abstract: In a wireless transmitter and receiver, a background calibration type analog-to-digital converter generally occupies a large area because of the phase compensating capacity of an op-amp included in a reference analog-to-digital conversion unit. Further, the calibration type analog-to-digital converter generally requires a sample and hold circuit to exclude influence of parasitic capacitance of wirings, thereby increasing power consumption. Digital calibration is performed by using, as a signal for calibration, an input signal of a digital-to-analog converter in a transmitter circuit of the wireless transmitter and receiver and inputting an output signal from the digital-to-analog converter to the analog-to-digital converter in the receiver circuit.

Abstract: A passive amplifier structure capable of multiplying the voltage of an input signal is provided. In a first stage, a first and a second capacitance are connected between a first and a second input port of a balanced input port in response to a first oscillator signal. In a second stage, in response to a second oscillator signal having a phase different from that of the first oscillator signal, the first capacitance is connected between the first input port and a third capacitance and the second capacitance is connected between the second input port and the third capacitance. An output voltage over the third capacitance is obtained from terminals of the third capacitance. Presented embodiments also describe an automatic gain control feature.

Abstract: There is provided a method for use in a wireless communication to avoid detection of a false modulated signal in a paged device. In one embodiment, a modulated signal is received by the paged device. Then, the modulated signal is identified by the paged device as a preliminary false modulated signal. Thereafter, the gain of at least one paged device amplifier and/or a matching threshold of the paged device is reduced by the paged device to decrease a sensitivity of the paged device to avoid detection of a future false modulated signal. In one embodiment, the wireless communication is a Bluetooth wireless communication and the paged device is a Bluetooth enabled device. An exemplary system for implementing one embodiment of the disclosed method is described.

Abstract: One exemplary receiver for a wireless communication system includes a plurality of signal processing components arranged to generate a receiver output according to a radio frequency (RF) signal. The signal processing components include amplifiers having a class-AB biased amplifier included therein. The signal processing components are disposed in a chip, and the class-AB biased amplifier is an amplifier which processes a signal corresponding to the RF signal before any other amplifier included in the chip. Another exemplary receiver for a wireless communication system includes an RF signal processor and a frequency conversion interface. The RF signal processor is to generate an RF signal, and has a class-AB biased amplifier arranged to apply amplification upon the RF signal. The frequency conversion interface is coupled to the RF signal processor, and used for receiving the RF signal generated from the RF signal processor and generating a down-converted result of the RF signal.

Abstract: In a method for synchronizing a receiver to a synchronous signal, a plurality of potential symbols are detected in a signal, the signal having been processed based on automatic gain control (AGC) with a varying gain. Next frame potential symbols corresponding to potential symbols in the plurality of potential symbols are determined, the next frame potential symbols being in frames subsequent to the frames in which the corresponding potential symbols are located. A gain of the AGC is fixed for each corresponding symbol interval during which a next frame potential symbol is operated on by the AGC. In between next frame potential symbols, the AGC is allowed to vary. Next frame potential symbols are analyzed after a transform is calculated to determine if any correspond to a start of a frame.

Abstract: A received low-frequency standard radio wave, which is an amplitude modulation signal, is converted to an intermediate frequency signal Sa, and is output to a detection circuit and an AGC circuit. The detection circuit and AGC circuit generates an RF control signal Sf1 and IF control signal Sf2 from the input intermediate frequency signal Sa, and controls an RF control circuit and IF control circuit by outputting the generated RF control signal Sf1 and IF control signal Sf2 to the RF control circuit and IF control circuit. By this a radio wave reception device can speed up AGC operation.

Abstract: A dual-band transceiver is disclosed. In one embodiment, the system includes a first mixer circuit that generates a first signal having a first frequency that is within a first predefined frequency range. The system also includes a second mixer circuit that generates a second signal having one of a second frequency that is within a second predefined frequency range and a third frequency that is within a third predefined frequency range, and wherein each of the first mixer circuit and the second mixer circuit are used for at least two frequency bands.

Abstract: A radio signal receiver in which a RF-receiving unit 12 converts a radio received signal to a baseband signal, an AD-conversion unit 15a, 15b converts that baseband received signal to a digital signal, and a baseband-processing unit 16 uses the digital signal to perform specified baseband processing, and in which an average-interference-level-measurement unit (SIR measurement unit) 17 measures the average interference level of the received signal, an amp-gain-adjustment unit 18 sets the gain so that a fixed binary value becomes that measured average interference level, and a variable-gain amp 14a, 14b controls the reception level of the received signal by that set gain.

Abstract: A system including an output node and receiver front ends. The receiver front ends are configured to receive an input signal. Each of the receiver front ends is configured to receive the input signal and provide an output signal at the output node. At least one of the receiver front ends is configured to selectively consume less power.

Abstract: A current limiting circuit including a transistor is disclosed. The current limiting circuit is coupled with a voltage and includes a summing network, wherein a first voltage input of the summing network is capable of receiving a voltage that is proportional with the current flowing through the transistor. The current limiting circuit further including a differential circuit, wherein a first input of the differential circuit is coupled with an output of the summing network, a second input of the differential circuit is coupled with a voltage ramp signal, and an output of the differential circuit is coupled with a gate of the transistor. The current limiting circuit still further including a voltage divider network coupled between the drain of the transistor and the second voltage input of the summing network.

Abstract: A front end and a high frequency receiver provided therewith are described, which front end comprises a quadrature low noise amplifier as a low noise amplifier. A high isolation between local oscillators and quadrature mixers is achieved thereby, reducing a DC offset at mixer outputs. The quadrature low noise amplifier may be implemented as a differential class AB cascode arrangement of MOST or FET semiconductors. A low distortion receiver having a high linearity is the result.

Abstract: There is provided a transceiver comprising a first node for receiving a received signal and transmitting a transmitted signal; a receiver, connected between a first voltage and the first node, for processing the received signal; a transmitter, connected between a second voltage and the first node, for generating the transmitted signal; and a DC voltage controller for selecting a DC component of a voltage of the first node to at least one of: selectively activate at least one of the transmitter and the receiver; and selectively substantially deactivate at least one of the transmitter and receiver.

Abstract: An integrated circuit (IC) includes a plurality of RF receivers for receiving a corresponding one of a plurality of received signals. Each of the plurality of the RF receivers includes an AGC module that generates an automatic gain control (AGC) signal based on the strength of the corresponding one of the plurality of received signals, and a low noise amplifier that amplifies the corresponding one of the plurality of received signals based on the AGC signal. A processing module generates a power mode signal for adjusting a power consumption parameter of the IC, based on the AGC signals from each of the plurality of RF receivers.

Abstract: A broadband signal amplifier includes one of more broadband amplifier circuits, each dynamically controlled in response to a total power level of signals applied thereto to reduce linearity in response to a reduction of input signal strength. A filter may couple the output of the broadband amplifier circuits to each other to form a tandem arrangement. Power detectors are connected to detect and provide outputs indicative of the total power levels of the signals applied to respective broadband amplifiers. A control unit is connected to and receives the output from the power detectors and, in response, provides a control signals to the broadband amplifier circuit so as to operate each over portions of their operating characteristic curves that provide only that degree of linearity necessary to limit distortion to a predetermined or dynamically adjustable maximum acceptable level.