Static Information Storage System Or Device: (class 365, 365/160) Patents (Class 505/831)
  • Patent number: 8611974
    Abstract: A switching cell for a demultiplexer circuit includes a superconducting input signal path, at least two superconducting output signal paths, and transformers located between an intersection node and respective ends of the output signal paths. Flux applied via the transformers can influence which direction a signal propagates. The switching cell may also include power input nodes. Switching cells may be arranged in various configurations, for example a binary tree or H-tree. A superconducting inductor ladder circuit can perform a digital-to-analog conversion. Flux storage structures may be used with individual switching cells. Latching qubits may be employed. Buffer rows of switching cells may be used to reduce or eliminate cascade error.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: December 17, 2013
    Assignee: D-Wave Systems Inc.
    Inventors: Felix Maibaum, Paul I. Bunyk, Thomas Mahon
  • Patent number: 7903456
    Abstract: A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: March 8, 2011
    Assignee: Hypres, Inc.
    Inventors: Alexander F. Kirichenko, Timur V. Filippov, Deepnarayan Gupta
  • Patent number: 6787798
    Abstract: A method includes providing a superconducting material having pinning sites that can pin magnetic vortices within the superconducting material. The method also includes pinning one or more magnetic vortices at one or more of the pinning sites. An information storage apparatus includes a superconducting material, doped particles within the superconducting material that can pin dipole magnetic vortices, a magnetic tip that generates pinned magnetic vortices and a magnetic detector that detects pinned magnetic vortices.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: September 7, 2004
    Assignee: The Texas A&M University System
    Inventors: Malcolm J. Andrews, Joseph H. Ross, Jr., John C. Slattery, Mustafa Yavuz, Ali Beskok, Karl T. Hartwig, Jr.
  • Patent number: 5377141
    Abstract: A new type of superconducting memory is described. The composition of superconducting ceramic material used in the memory has been altered in order to expedite the formation of non-superconducting regions formed of grain boundaries. Non-superconducting regions may also be formed of lattice defects. Magnetic flux is trapped within the non-superconducting regions (grain boundaries or lattice defects). Information can be stored in terms of whether or not magnetic flux is trapped.
    Type: Grant
    Filed: June 21, 1991
    Date of Patent: December 27, 1994
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasuhiko Takemura
  • Patent number: 5332722
    Abstract: A novel nonvolatile memory element or cell comprising a memory means consisting of at least one superconducting ring (21, 22) and a detector means consisting of a MOSFET. The superconducting ring and the MOSFET are arranged in such a manner that a magnetic flux created by the superconducting ring (21, 22) passes through a channel zone of the MOSFET. Information is held in the superconducting ring in a form of permanent current and is detected electrically as variation in the conductivity of the channel zone of the MOSFET.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: July 26, 1994
    Assignee: Sumitomo Electric Industries, LTD
    Inventor: Mitsuka Fujihira
  • Patent number: 5130273
    Abstract: A read only memory device comprises a first electrode, and a second electrode arranged overlapping with the first electrode so as to be geometrically in connection at the intersection. At least one of the first and second electrodes is formed of a ceramics system high temperature superconductor. A prescribed electrode out of said electrodes which is formed of the high temperature superconductor has a high resistance region for insulating the first and second electrodes from each other at the intersection corresponding to a prescribed stored data.In the manufacturing method, the first and second electrodes are formed and, thereafter, a high resistance region is formed by irradiating focused ion beam.
    Type: Grant
    Filed: January 7, 1991
    Date of Patent: July 14, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoji Mashiko, Tadashi Nishioka
  • Patent number: 4990489
    Abstract: A read only memory device includes a first electrode and a second electrode arranged in an overlapping relation with the first electrode so as to be geometrically in connection at an intersection therewith corresponding to a storage location for one type of data. At least one of the first and second electrodes is formed of a ceramics system high temperature superconductor. A prescribed one of the two electrodes which is formed of the high temperature superconductor has a high resistance region for insulating the first and second electrodes from each other at an intersection corresponding to a storage location for another type of stored data. The high resistance region is formed by irradiating an intersection with a focused ion beam.
    Type: Grant
    Filed: July 6, 1988
    Date of Patent: February 5, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoji Mashiko, Tadashi Nishioka
  • Patent number: 4916663
    Abstract: This fast-access data storage circuit is made of a semiconductor material with a two-dimensional carrier gas between two of its layers. The material is rendered superconducting by a suitable choice of the temperature and magnetic field conditions. The circuit is formed by a plurality of memory cells, each of which is formed by two selection transistors, a semiconductor loop, ohmic contacts and a grid which is arranged on the loop and one of the contacts. The superconductivity reduces the access time. One selection controls the reading of data or the writing of a state "1" in the loop, while the other selection transistor controls the cancellation of the data and hence the writing of a state "0" by means of the grid arranged on the loop.
    Type: Grant
    Filed: February 17, 1988
    Date of Patent: April 10, 1990
    Assignee: U.S. Philips Corp.
    Inventors: Bertrand Gabillard, Jean-Noel Patillon