Abstract: A time-sliced discrete-time Phase Locked Loop which is suitable for simultaneously synchronizing multiple input signals to multiple output signals is provided by implementing a discrete-time phase detector, loop filter, and voltage controlled oscillator that together operate as a single discrete-time PLL in hardware and applying control logic to retrieve the history for each signal pair from a context memory (RAM), to enable the discrete-time PLL hardware, and to store the resulting history in the context memory for use in subsequent operations for a particular input/output signal pair.

Abstract: An interpolator testing system and method comprises an interpolator that includes a phase shift module. The phase shift module receives a reference clock signal and generates M clock signals having phase shifts in increments of 360/M degrees relative to the reference clock signal. A phase select module receives the reference clock signal and a recovered clock signal during a normal mode and generates a select signal based on a comparison of the reference clock signal and the recovered clock signal during the normal mode. A selector receives the M clock signals and outputs one of the M clock signals as the recovered clock signal based on the select signal. A recovered clock counter counts an attribute of the recovered clock signal during a test mode. The phase select module sequentially selects the M clock signals N times during the test mode.

Abstract: A phase difference between a first periodic signal, and a sample signal corresponding to a second periodic signal and having a predetermined signal resolution M is calculated in a phase comparing method. The sample signal is obtained by sampling the second periodic signal at a sampling frequency fs for one signal cycle of the second periodic signal when a frequency of the second periodic signal is not greater than an allowable sampling signal frequency fab equal to fs/M or by conducting at least one of sampling the second periodic signal at fs for more than one signal cycle of the second periodic signal, and generating interpolated values for the sample signal after sampling the second periodic signal at fs in accordance with whether or not M/N yields a remainder and whether or not N is a prime number when the frequency of the second periodic signal is greater than and is N times fab.

Abstract: An electricity metering method and apparatus is provided for determining the phase of first waveform relative to a harmonically distorted, second waveform having cycles temporally distinguished by an occurrence of an amplitude that is neither zero amplitude nor a maximum amplitude of said waveform.

Abstract: There is provided a test apparatus for testing a device-under-test, having a reference clock source for generating reference clock for controlling operations of the device-under-test, a clock regenerating circuit for generating, based on a phase adjusting signal to be inputted, regenerated clock whose frequency is equal with the reference clock and having a phase difference from the reference clock corresponding to the phase adjusting signal, a timing comparator for obtaining a value of an output signal outputted from the device-under-test based on the regenerated clock, a first phase comparing section for outputting the phase adjusting signal that converges the phase difference into a reference phase difference set in advance to the clock regenerating circuit based on the comparison result of the phases of the output signal and the regenerated clock and a storage section for sequentially storing the phase adjusting signals outputted from the first phase comparing section.

Abstract: An undersampling system can comprise an IC that has integrated, on the same physically contiguous IC, both an undersampler circuit and a receiver circuit whose input is to be monitored by undersampling. For a current phase of sample clocks relative to an input signal, the input signal is sampled until a sufficient number of samples are collected in a one dimensional histogram associated with the current phase. The phase of the sample clocks, relative to the input signal, can then be shifted. Such phase shift can be accomplished by a phase mixer. The phase shift can be small enough to provide sufficient resolution in a composite sampled image of the input signal. A mean value can be computed for each one dimensional histogram, resulting in a representation of the undersampled signal as a function of time that is suitable for further processing.

Abstract: There is provided a test apparatus for testing a device-under-test, having a reference clock source for generating reference clock for controlling operations of the device-under-test, a clock regenerating circuit for generating, based on a phase adjusting signal to be inputted, regenerated clock whose frequency is equal with the reference clock and having a phase difference from the reference clock corresponding to the phase adjusting signal, a timing comparator for obtaining a value of an output signal outputted from the device-under-test based on the regenerated clock, a first phase comparing section for outputting the phase adjusting signal that converges the phase difference into a reference phase difference set in advance to the clock regenerating circuit based on the comparison result of the phases of the output signal and the regenerated clock and a storage section for sequentially storing the phase adjusting signals outputted from the first phase comparing section.

Abstract: Systems and methods for strobe signal timing calibration and control in strobe-based memory systems are provided below. These strobe-offset control systems and methods receive a strobe signal from a memory device and in turn automatically generate separate per-bit strobe signals for use in receiving data on each data line of a memory system. The systems/methods generate the optimal per-bit strobe signals by automatically calibrating per-bit offset timing between data signals of individual data bits and corresponding strobe signals. The strobe-offset control system effectively removes the detected phase difference between the data signal and the strobe signal.

Abstract: In general, in one aspect, the disclosure describes an apparatus for calibrating signals. The apparatus includes a receiver pair to receive a differential signal and a reference signal and to generate at least one comparison signal reflecting where a first signal of the differential signal and a second signal of the differential signal cross each other with respect to the reference signal. The second signal is a negative compliment of the first signal. The apparatus further includes a phase detector to determine a phase error based on the at least one comparison signal. The apparatus also includes an edge delay control driver pair to adjust the differential signal based on the phase error.

Abstract: Good device PASS/FAIL determination is realized by measuring timings of both signals, i.e., a cross point of differential clock signals CLK and a data signal DATA output from a DUT, and obtaining a relative phase difference between both signals.

Abstract: A method of measuring phase includes receiving an analog signal; converting the analog signal into a digital signal; representing the digital signal as N sets of samples; aligning the N sets of samples to a common time frame; removing zero bias drift from the digital signal; and calculating a phase of the analog signal based on the digital signal with the zero bias drift removed. The phase can have a time resolution substantially equal to a time between adjacent samples.

Abstract: Methods and apparatus for determining the phase of a signal in a measurement device having a digital signal processor are described. The signal is digitised and the digitised signal, or a signal derived therefrom, is numerically correlated with a numerically generated reference signal. In one embodiment, the reference signal has a predetermined phase. In a further embodiment, the numerically generated reference signal has a reference phase and the phase is determined from the result of the correlation. The techniques described herein may reduce the amount of information lost in determining the signal phase.

Abstract: A time measurement circuit includes N time stamping units that each includes a dual sinusoid interpolator for achieving high timing resolution. The time measurement circuit is capable of time stamping input signals at a high re-trigger rate, and is thus well suited for quickly measuring the timing jitter of test signals in automatic test systems.

Abstract: Detection error resulting from rain, in the case of clear weather, and in the case of rainy weather are included in measurements by a measurement unit disposed in an MW sensor system. The error resulting from rain sharply increases as a preset ?f becomes larger. The error in the case of clear weather sharply decreases as the preset ?f becomes larger. Using ?f as a parameter, a range, in which the rate of variability of the detection error resulting from rain with respect to ?f is low overlaps with a range where the rate of variability of the detection error in the case of clear weather is low is set as the range of the detection error in the case of rainy weather. The detection error in the case of rainy weather becomes lower than the value of the detection error in the case of clear weather.

Abstract: A line phase identification system and method identifies the phase of a power line at a remote unknown-phase line (160) in a three-phase power distribution network (100). The instantaneous phase of a known-phase line (150) is measured and saved each GPS second using a 1-pps time mark of a GPS receiver (660). The instantaneous phase at the unknown-phase line (160) is measured at a single GPS second using the 1-pps time mark of a GPS receiver (660) and compared to the phase measurement taken from the known-phase line (150) at the same GPS second. The differential phase between these simultaneously taken known and unknown instantaneous phases will be close to either 0, +120, or ?120 degrees, thus identifying the line phase at the line under test (160).

Abstract: Methods and circuits for measuring clock phase uniformity of multi-phase clock set, including by generating at least one DC phase difference signal such that the DC phase difference signal is, or the DC phase difference signals are, indicative of the phase difference between the clocks of each of multiple pairs of clocks of the clock set, and methods and circuitry for generating such DC phase difference signals. Preferably, multiplexer circuitry asserts to DC signal generation circuitry any selected one of a number of pairs of clocks of the clock set, and the DC signal generation circuitry includes logic (for generating a binary signal in response to each clock pair) and a low pass filter for generating a DC phase difference signal in response to the binary signal. Other aspects are receivers and transmitters that include circuitry for generating at least one DC phase difference signal, and systems including at least one such transmitter (or receiver) and a link (e.g.

Abstract: Since a multiplexed signal quality display system according to the present invention is provided with a memory means which stores measurement results obtained by measuring electric powers of signals present in all of channels within a band used and a display means which specifies a channel where the presence of a signal is predicted and which reads and displays the measured value of the specified channel, it is possible to display the waveform quality of a channel which is determined by desired Walsh code and Walsh code length.

Abstract: A system and method compensate for phase noise of a spectrum analyzer based on an established model of the phase noise that accommodates a variety of operating states of the spectrum analyzer. The model is used to form an array that is applied to extract an output signal from measurement traces that are acquired by the spectrum analyzer.

Abstract: A method compensates for phase differences between sampled values of first and second AC waveforms. The method employs a phase angle compensation factor and sequentially samples a plurality of values of each of the waveforms. For a positive compensation factor, second sampled values are adjusted to correspond with first sampled values by employing, for a corresponding second sampled value, a preceding second sampled value plus the product of: (i) the compensation factor and (ii) the difference between the corresponding second sampled value and the preceding second sampled value. Alternatively, for a negative compensation factor, the second sampled values are adjusted by employing, for the corresponding second sampled value, the preceding second sampled value minus the product of: (i) the sum of one plus the compensation factor and (ii) the difference between the preceding second sampled value and the second sampled value preceding the preceding second sampled value.

Abstract: A digital protection and control device is so configured that at least parts of a digital data merging unit coupled to sensor units by a transmission medium, a protection and control unit, a communication unit for component control devices coupled to component control devices by a transmission medium, and a process bus communication unit are coupled by a parallel transmission medium, and at least a part of data exchange is based on a multimaster mode. Transmission based on the multimaster mode enables each unit to transmit/receive data independently and enables the reduction in unbalanced communication load. As a result, such a risk can be reduced that time responsiveness of operation is lowered as the entire digital protection and control device due to unbalanced concentration of data bus processing in a particular unit.

Abstract: Methods are disclosed for calculating the amount of voltage coupled to a device. In some embodiments, the method may comprise identifying a conductor that is coupled to a device, extracting information regarding the relationship between the conductor coupled to the device and adjacent conductors, extracting information regarding signals that are present in the adjacent conductors, partitioning the signal information into phases, calculating a voltage induced in the conductor coupled to the device during each phase of the partitioned signal, calculating an average voltage induced in the conductor coupled to the device and, flagging the device if the average voltage induced is above a predetermined threshold.

Abstract: An oscilloscope that is capable of displaying simultaneously multiple waveforms representing time evolution of a signal during respective acquisition intervals acquires waveform data using a first set of acquisition parameters and generates a display based on that waveform data. If the display includes a waveform that is visually distinct from other displayed waveforms, the user selects a feature that distinguishes the visually distinct waveform from other displayed waveforms. The oscilloscope automatically derives updated acquisition parameters that discriminate between the selected feature and other features of the displayed waveforms. The oscilloscope then acquires waveform data using the updated acquisition parameters and generates a display based on that waveform data.

Abstract: A ringdown canceller is provided for electronic article surveillance (EAS) tag response processing, which uses two adaptive replica signals and compares the replica signal phase to the receive signal phase to determine if there is a stationary EAS tag in the interrogation or detection zone. The adaptive replica buffers allow the system to adjust to changing ambient conditions, and adjust rapidly to an EAS tag that suddenly appears in the detection zone and becomes stationary, or to a stationary EAS tag that suddenly leaves the detection zone. The ringdown response of the transmitter circuit is constant, just like a stationary tag, and is removed from the receive signal in the same manner as a stationary tag.

Abstract: Method and apparatus for accurately determining the presence of voltage at capacitive test points and for determining the phase angle relationship between two capacitive points. The detection of the presence of the voltage at the capacitive test points is independent of the voltage range in the systems, independent of the contamination or defects that may occur in the capacitive test point systems. The phase angle relationship is determined based on the actual phase angle difference between the voltage waveforms at the capacitive test points independent of the capacitive divider ratio difference and the capacitive test point voltage accuracy.

Abstract: An electronic meter includes a sensing circuit for sensing voltage and current values of a waveform, an analog-to-digital converter for converting the sensed voltage and current values to digital voltage and current values, a digital filter for delaying one or both of the digital voltage and current values to compensate for a phase shift error in the sensing circuit, and a computation circuit for computing one or more parameters of the waveform in response to the phase compensated voltage and current values. The electronic meter may be calibrated by applying to the meter a test waveform having a known phase shift, measuring the phase shift using the electronic meter, determining a phase shift error based on the difference between the known phase shift and the measured phase shift and determining digital filter coefficients to produce a digital filter delay that corresponds to the phase shift error.

Abstract: The start up performance of an ultrasonic system under zero load conditions is improved by setting a phase set point in a frequency control loop such that, at start up under zero load conditions, the phase set point intersects a point on a phase-frequency response curve which has a low positive slope. This intersection point on the phase-frequency response curve changes as the load is increased and the system Q is decreased. The controller “seeks” a target 0° impedance phase angle. The frequency of the ultrasonic generator is set to an off-resonance frequency which is lower than the resonance of any known hand piece/blade combination. In order for the drive voltage to not exceed the physical limit of the system, the drive current is set to a low level. The drive frequency is then smoothly increased in steps until the target 0° impedance phase delta is located.

Abstract: An input signal is a complex vector whose phase is a coherent measurement of the phase rotation occurring between two separated symbols of a received CDMA signal. A processing block (30) provides a first signal showing the magnitude and the sign of the imaginary part of the input signal, and a second signal showing the magnitude and sign of the real part of the input signal to an initialisation block (31). A quadrant determination block (32) examines the signs of the signals to determine the quadrant in which the phase of the input signal exists. A comparator block (33) determines if the magnitude of the first signal is greater than or equal to the magnitude of the second signal. If a negative determination is made, the magnitude of the first signal is doubled in a multiplication block (35) to form a multiplied signal, and a counter incremented, initially from zero. The comparator block (33) then determines if the multiplied signal is greater than or equal to the magnitude of the second signal.

Abstract: Sampling is performed. A strobe signal is generated from a first signal. Multiple sampled signals are sampled using the strobe signal. Each of the multiple sampled signals is synchronous with its own clock reference and each of clock references are asynchronous with respect to each other. Analog-to-digital conversion is performed on each sampled value of each of the multiple sampled signals. For each of the clock references that is not synchronous with the first signal, a phase comparison is performed between the clock reference and the first signal to produce a difference value. The difference value indicates a phase difference between the clock reference and the first signal. Analog-to-digital conversion of the difference value is performed at a frequency determined by the strobe signal.

Abstract: A resolver phase calibration system comprises a reference pulse generation unit, a resolver-to-digital converter (RDC), and a calibration phase calculating unit. The reference pulse generation unit is configured to generate a reference pulse signal based on a back electro-motive voltage signal of a motor. The RDC is configured to convert output signals of a resolver to a pulse signal, to count pulses of the converted pulse signal, and to output a digital output signal corresponding to a number of the pulses. The calibration phase calculating unit is configured to calculate a calibration phase of the resolver based on the reference pulse signal from the reference pulse generation unit and the digital output signal from the RDC.

Abstract: An apparatus for measuring static phase error in a delay locked loop includes a first test stage and a second test stage. The first test stage receives a reference clock, a chip clock, and a control signal. In parallel with the first test stage, the second test stage receives the reference clock, the chip clock, and a complement of the control signal. Dependent on the control signal, the first test stage outputs a first test signal, and, dependent on the complement of the control signal, the second test stage outputs a second test signal. The first test signal and the second test signal are used to generate a set of static phase error measurements dependent on values of the control signal and the complement of the control signal. By averaging the set of static phase error measurements, a static phase error is measured for the delay locked loop.

Abstract: A method and system for determining and compensating for phase and time errors in an optical receiver. The method and system includes use of a measurement and reference signal; deriving phase and time errors; and providing compensation values to the optical receiver. The operating frequency and/or other operating parameters associated with phase and time errors are determined and recorded to allow for proper compensation to the optical receiver.

Abstract: Data output from a semiconductor device under test and a reference clock output therefrom in synchronization with the data are sampled by slightly phased-apart multiphase strobe pulses. The phases of points of change of the output data and the reference clock are obtained from the sampled outputs, then the phase difference between them is measured, and a check is made to determine if the phase difference falls within a predetermined range, thereby evaluating the semiconductor device under test on a pass/fail basis.

Abstract: Sampling is performed. A strobe signal is generated from a first signal. Multiple sampled signals are sampled using the strobe signal. Each of the multiple sampled signals is synchronous with its own clock reference and each of clock references are asynchronous with respect to each other. Analog-to-digital conversion is performed on each sampled value of each of the multiple sampled signals. For each of the clock references that is not synchronous with the first signal, a phase comparison is performed between the clock reference and the first signal to produce a difference value. The difference value indicates a phase difference between the clock reference and the first signal. Analog-to-digital conversion of the difference value is performed at a frequency determined by the strobe signal.

Abstract: A heading and Omni-Bearing Selector (OBS) module for converting 3-phase analog heading signals input from a heading synchronic device and analog sine and cosine bearing signals input from an OBS resolver device.

Abstract: A polarization measurement system and method that determines the polarization of a received signal within one received pulse. The polarimeter accepts series of samples representing horizontal and vertical signal components representing the polarization of a received signal. The samples are discrete time measurements, with each sample representing a magnitude separated in time by a predetermined angular resolution. The samples are combined with other samples in numerous sets of calculations operating in parallel, the various sets of calculations employing different transfer functions, so as to produce numerous series of output values. Characteristics of these series are examined to select a particular series, and thus select the transfer function which provided the series having a desired characteristic such as a best null. The parameters of the transfer function which provides the desired characteristic provide information representative of the signal polarization.

Abstract: A clock signal xc(t) that has been converted into a digital signal is transformed into a complex analytic signal zc(t), and an instantaneous phase &THgr; of the zc(t) is estimated. A linear phase is removed from the &THgr; to obtain a phase noise waveform &Dgr;&phgr;(t). The &Dgr;&phgr;(t) is sampled at a timing close to a zero crossing timing of the xc(t) to extract the &Dgr;&phgr;(t) sample. A root-mean-square value &sgr;t of the &Dgr;&phgr;(t) samples is obtained, and a differential waveform of the extracted &Dgr;&phgr;(t) samples is also obtained to obtain a period jitter Jp. Then a root-mean-square value &sgr;p of the Jp is obtained to calculate a correlation coefficient &rgr;tt=1−(&sgr;p2/(2&sgr;t2)). If necessary, an SNRt=&rgr;tt2/(1−&rgr;tt2) is obtained. The &rgr;tt and/or the SNRt is defined as a quality measure of a clock signal.

Abstract: According to the invention, a method for correcting a phase angle when scanning a code track with sensor elements is proposed that delivers a sinusoidal and a cosinusoidal signal, with which the phase difference between two signals is corrected using a specified algorithm. Since the sensor elements used, e.g., GMR, AMR, or Hall sensor elements, deliver phase-displaced sinusoidal and cosinusoidal signals due to the arrangement of the code tracks, their phases must be corrected before the arctan of the quotient can be calculated. This takes place using an algorithm derived from an arc tangent function. The method according to the invention is used preferably to measure the rotational angle or torque of a steering shaft of a motor vehicle.

Abstract: System for tracking or identifying the phase designation, and/or measuring the phase angle or the power angle of electrical conductors at a remote location relative to a reference location, by measuring a time delay between an external clock source such as GPS and a zero crossing or other specified part of the waveform, associating a ‘time tag’ with each measurement, transmitting the time tags and measurement values over a bi-directional link between a field unit and a reference unit, and calculating and displaying a relative phase angle and/or a phase designation. The system finds application, for example, in identifying the phase of conductors, and optionally comparing their phase angle and/or their power angle, before making connections between conductors in a multi-phase electrical power distribution system.

Abstract: A method for improving the performance of a micromachined device, preferably an angular rate microsensor, is provided. The method includes collecting data on rate bias over a selected operating phase demodulation angles for at least one tine of a microsensor and determining optimum settings for phase demodulation angles at which the rate bias hysteresis over temperature is at a minimum by applying dynamic programming.

Abstract: A method of measuring the PLL lock time includes deriving the PLL frequency-settling function by demodulation and envelope extraction in the time domain. The PLL lock time can then be calculated from this function. Using this PLL lock time measurement method provides for very good frequency and time accuracy. Also, since for demodulation, the settled signal is used for multiplication, ATE synchronization is not required. Furthermore, since all the processing is done in the time domain, calculation times are reduced, making the process suitable for ATE environments.

Abstract: A non-invasive online system for discrete measurements of phase levels in a converter or pyrometallurgical furnace in smelting and conversion processes, consisting in a electrical signal generator, transducers that convert said electrical signals in mechanical waves placed on the outer end of air blowing tuyeres, a coupling between said system and the shell of the converter, for air blowing tuyeres placed forming an angle less than or equal to 90° with the transducer and entrance of the airflow to the converter, while the transducer is placed in the direction of the cross axis or longitudinal axis of the phases plane for applying mechanical waves that travel in a longitudinal direction, a sensor for mechanical waves placed around the external wall of the shell of the converter that receives the reflected signal, then preamplification of the signal, an analogous/digital interface, for data acquisition, for processing the signals so as to determine the amplitude of the reflected signal which has a character

Abstract: A system uses an event based equivalent time sampling method for ascertaining a value of each bit of a data frame repeated in a digital signal of indeterminate phase. The system measures time intervals between rising edges of the digital signal and a reference time and between falling edges of the digital and that reference time in response to pulses of a periodic arming signal. The measured time intervals are then normalized to equivalent time intervals and those intervals analyzed to determine values of each bit of the data frame.

Abstract: A method and system for determining and compensating for phase and time errors in an optical receiver. The method and system includes use of a measurement and reference signal; deriving phase and time errors; and providing compensation values to the optical receiver. The operating frequency and/or other operating parameters associated with phase and time errors are determined and recorded to allow for proper compensation to the optical receiver.

Abstract: An abnormality detection apparatus for a position detection device is provided which is capable of performing abnormality detection accurately and inexpensively. The position detection device has a primary winding and a secondary winding, and at least one excitation signal each having a predetermined periodic waveform is supplied to the primary winding to thereby generate at least one output signal each in the form of a phase modulated signal corresponding to a rotational position of a rotating member from the secondary winding directly or after having been subjected to phase shifting and appropriate arithmetic operations. The apparatus is provided with an abnormality detection section for determining an abnormality of the position detection device when the phase modulated signal has a peak value which is outside a predetermined range.

Abstract: A method and system for compensating for line imbalances in line commutated converters. The controller includes a phase-locked loop (PLL) synchronizing tool which receives the line to line voltage signals and generates firing angle and frequency signals used for synchronizing the two input signals. The PLL controller, in addition to the firing angle and frequency signals, also generates signals representative of filtered values of amplitudes for each of the line to line voltage signals. A voltage imbalance compensation processor associated with the bridge firing controller receives the filtered amplitude signals and also a signal representative of the firing sector of the bridge. The voltage imbalance compensation processor generates, based upon the sector signal and the received filtered amplitude signals a amplitude signal used by a current regulator which is compensated for line imbalances present in the line voltage.

Abstract: The delay between a first signal and a second signal is evaluated by deriving from the first signal substantially aperiodic events, possibly by using a zero-crossing detector on a random signal, and using these events to define respective segments of the second signal. The segments are combined, e.g., by averaging, to derive a waveform which includes a feature representing coincidences of parts of the second signal associated with the derived events. The delay is determined from the position within the waveform of this feature.

Abstract: A method is provided to represent the calculated phase space of photons emanating from medical accelerators used in photon teletherapy. The method reproduces the energy distributions and trajectories of the photons originating in the bremsstrahlung target and of photons scattered by components within the accelerator head. The method reproduces the energy and directional information from sources up to several centimeters in radial extent, so it is expected to generalize well to accelerators made by different manufacturers. The method is computationally both fast and efficient overall sampling efficiency of 80% or higher for most field sizes. The computational cost is independent of the number of beams used in the treatment plan.

Abstract: A jitter detector obtains a phase difference between input signals as a digital value to make jitter between the signals easily detectable. The jitter detector includes comparison pulse generator, periodic signal generator, counter and arithmetic unit. The comparison pulse generator outputs one phase difference comparison pulse after another. Each phase difference comparison pulse has a width representing the phase difference between first and second input signals. The periodic signal generator outputs a periodic signal every time a value obtained by accumulating the widths of the phase difference comparison pulses exceeds a predetermined value. Receiving the periodic signal and a clock signal with a period shorter than that of the periodic signal, the counter counts the number of pulses of the clock signal during one period of the periodic signal and outputs a resultant count. And the arithmetic unit detects and outputs a variation in the count as jitter between the first and second input signals.

Abstract: The phase noise of an oscillator described by a known set of differential algebraic equations (DAEs) can be predicted by a) finding the steady state waveform of the oscillator, e.g., by using harmonic balance techniques or so-called “shooting” techniques, either of which involves developing a mathematical quantity known as the augmented Jacobian matrix; b) solving a prescribed linear system of equations that uses the augmented Jacobian matrix, the solution being called a perturbation projection vector (PPV), c) plotting a graph of the phase noise of the oscillator as a Lorentzian function of the solution of the prescribed linear system of equations. The prescribed linear system of equations which is used is the system of equations formed by setting a matrix product equal to a unit vector.

Abstract: Apparatus for determining the frequency of an ac power signal, includes sensing circuitry to sense the ac signal. In a digital implementation of the invention, a double average of the samples is generated by a processor as the sum of the most recent sample, twice the next most recent sample plus the third most recent sample. The least mean square of a running window of the most recent double average signals is generated to avoid discontinuities at the zero crossings and to reduce the effects of noise. The frequency is determined from this least mean square value of the window of double average signals. As implemented in a protective relay, a trip signal is generated if the frequency is out of limits.