Abstract: A phase comparator for calculating the phase difference between a test wave form and an output wave form in a disk drive includes a phase converter, a first multiplier, a first integrator, a second multiplier, a second integrator and a phase angle calculator. The phase converter for delaying the test wave form for a specific time based on the frequency thereof. The first multiplier electrically coupled to the phase converter for performing a first operation by multiplying the delayed test wave form with the output wave form. The first integrator electrically coupled to the first multiplier for integrating the result of the first operation for a period to generate a first weighted value. The second multiplier for performing a second operation by multiplying the test wave form with the output wave form. The second integrator electrically coupled to the second multiplier for integrating the result of the second operation for the same period to generate a second weighted value.

Abstract: A method of correcting the phase difference between first and second data signals from a Coriolis flowmeter using three parallel input stages which process the signals and a pair of phase detectors for receiving the signals by delivering the first and second signals continuously to first and second input stages, respectively, to produce processed data signals therefrom while delivering the first and second signals alternately to the third input stage to produce a processed data signal therefrom, routing the processed data signals to at least one additional phase detector to produce first and second corrective phase differences, and producing a corrected phase difference by summing the uncorrected phase difference and the difference between the first and second corrective phase differences. A circuit for carrying out the method is also disclosed.

Abstract: An engagement detection circuit for a clock recovery circuit consisting of a phase detector (3), a counter element (6) and a flip-flop (8). By employing a low-pass element (12) and a trigger element (13) connected downstream, a preliminary and a final engagement of a phase control circuit can be detected with the engagement detection circuit. This provides a clock recovery circuit for controlling a phase control loop with a phase detector (20), a loop filter (21), a voltage-controlled oscillator (22) and a controllable frequency divider (23).

Abstract: A method, a circuit arrangement and an apparatus are provided for evaluating an input data signal transmitted by load modulation. A complex data signal is derived from the input data and a mean value signal of the complex data signal is thereafter derived. A complex signal without mean value is also formed from the difference between the complex data signal and the mean value signal of the complex data signal. A first and second quadratic error signals are derived and subsequently a slope signal is derived from the first and second quadratic signals. The method also comprises deriving an information signal by comparing the imaginary part signal without mean value with a decision threshold signal. The information signal indicates whether a value of the input data signal has been generated in a loaded state or an unloaded state during the load modulation.

Abstract: A flash phase analysis circuit provides parallel phase channels for simultaneously analyzing a detected signal in each of several phase windows and providing parallel outputs indicating whether a target falls in one of the phase windows. In one implementation, the parallel outputs each drive a segment of an output device to indicate the target type to the user. The flash phase analysis circuit divides a detected signal among the phase windows and then simultaneously compares the measured signal at each phase window with a reference signal. The circuit matches measured data with pre-selected phase characteristics corresponding to known targets in parallel and provides parallel output signals indicating target type.

Abstract: There is provided a method and an apparatus for detecting a delay fault in a phase-locked loop circuit. A frequency impulse is applied to the PLL circuit under test as a reference clock, and a waveform of a signal outputted from the PLL circuit under test is transformed to an analytic signal to estimate its instantaneous phase. A linear phase is estimated from the estimated instantaneous phase, and the estimated linear phase is removed from the estimated instantaneous phase to obtain a fluctuation term of the instantaneous phase. A delay fault is detected by comparing a time duration during which the PLL circuit stays in a state of oscillating a certain frequency with the time duration during which a fault-free PLL circuit stays in a state of oscillating a certain frequency.

Abstract: Phacoemulsification apparatus includes a phacoemulsification handpiece having a needle and an electrical system for ultrasonically vibrating said needle along with a power source for providing electrical power to the handpiece electrical system. Irrigation fluid is provided to the handpiece needle and aspirating fluid is removed from the handpiece needle. A determination of a voltage current phase relationship of the provided electrical power is made and in response thereto a control system varies a power level duty cycle provided to the handpiece electrical system from the power source and/or modify the aspiration flow rate.

Abstract: A gate comparator control panel, in accordance with the subject invention, allows a user to define up to four different gate regions that may exist on any of the live waveforms, maths waveforms, or REF waveforms. A menu for each gate controls the position of each gate and selects the source for the signal that is to be gated. All gates must be the same width. A high level application copies the gated region of a waveform into a REF memory. For example, Gate 1 would go into REF 1, gate 2 into REF2 and so on. A user-settable tolerance value is used to determine if difference between the waveforms of the gates reaches a point at which a violation is indicated. A master gate position control causes all gates to move by the same amount, thus maintaining a constant distance between them. A master gate width control causes all gates to change width.

Abstract: A high integrity process is provided to apply pilot phase rates to call processing decisions. An estimate or measurement of the rate of change of a pilot's PN phase offset is used to assist in making CDMA call processing decisions. The phase rate is a measure of the rate of change of a pilot's PN phase offset relative to a mobile time reference and is directly related to the multipath environment and movement of the mobile. Both an integrity algorithm to compute an integrity indicator and a technique to apply the integrity indicator to predict future pilot strengths are included.

Abstract: The type of blade installed in a hand piece of an ultrasonic system is determined and the information used to adjust the fault detection threshold of the generator by using an impedance diagram to determine the type of blade which is connected to the hand piece. A check is performed to determine the magnitude of the blade impedance at resonance. If the hand piece is bare (i.e. no blade is attached), the magnitude of the impedance at resonance is typically less than 125 ohms. If on the other hand, a blade is connected, the impedance will be greater that 125 ohms. This value is used to indicated the presence or absence of a blade.

Abstract: Synchronous programs give increased sampling rates of AC signals and provide AC phasors yielding fast response to undesired conditions.

Abstract: A phase delay correction system for use in a shape measurement is capable of removing the distortion of a restored shape and the mechanical positional deviation caused by a phase delay occurring during signal processing, and enables a Fourier series processing procedure to be adopted as is. A detector performs a relative scan of an object to be measured at a constant speed. A signal processing unit converts a shape detection signal obtained by the scan to digital data, and processes the digital data.

Abstract: There is provided a method of and an apparatus for detecting delay faults in phase-locked loop circuits. A frequency impulse is applied to a phase-locked loop circuit under test as the reference clock, and a waveform of a signal outputted from the phase-locked loop circuit under test is transformed to an analytic signal to estimate an instantaneous phase of the analytic signal. A linear phase is estimated from the estimated instantaneous phase, and the estimated linear phase is removed from the estimated instantaneous phase to obtain a fluctuation term of the instantaneous phase. A delay time is measured from this fluctuation term of the instantaneous phase, and further, a delay fault is detected by comparing a time duration during which the phase-locked loop circuit remains in a state of oscillating a certain frequency with a time duration during which a fault-free phase-locked loop circuit remains in a state of oscillating that certain frequency.

Abstract: An apparatus and method for generating an accumulated phase measurement of a communications signal over a predetermined time interval. A frequency estimate of the signal is generated; the frequency estimate is then converted to a coarse phase measurement. A phase error is generated based on the frequency estimate; the phase error is then converted to a fine phase measurement. The coarse and fine phase measurements are summed to yield an accumulated phase measurement.

Abstract: The present invention is a method of measuring a gonio-spectral reflectance factor to establish a gonio-spectral reflectance factor database available for a personal computer by which a highly-fine realistic 3D computer graphics image can be formed. The method enables colorimetry in a reduced hours in fewer viewing directions compared to the conventional method by executing colorimetry in a plurality of viewing directions selected at random from all the directions that can be viewed by a goniospectrophotometer, said plurality of viewing directions being less than all the directions that can be viewed by the goniospectrophotometer.

Abstract: Apparatus for measuring the phase of a predetermined incoming data sequence comprising, sampling means operable under control of a sampling clock to sample the incoming sequence at a frequency not equal to an integer multiple or divisor of the data rate of the sequence, test means operable to record a plurality of the samples in a time-ordered sequence, reference means operable to store a copy of at least a portion of the predetermined digital data sequence, comparison means operable to compare the recorded and stored sequences over a predetermined sequence length and to locate the position of an additional or omitted sample in the recorded sequence, calculation means operable to calculate the time of sampling of the additional sample or the time of sampling of the omitted sample relative to the sampling clock, and output means operable in response to the calculated time of sampling, to output a phase value indicative of the phase relative to the sampling clock, of the incoming sequence.

Abstract: A method for generating a signal identifying a three-pole short-circuit occurring in a three-phase power transmission line in which the phase currents and phase voltages are sampled forming phase current and phase voltage sampling values and the signal is formed from the phase current and phase voltage sampling values. In order to reliably detect three-phase short-circuits with such a method, even during oscillations, a positive phase-sequence system effective power parameter that is proportional to the instantaneous value of the positive phase-sequence system effective power of the power transmission line is formed, from which a grid frequency component parameter and a swing component parameter are then determined. The signal is generated from the grid frequency component parameter and the swing component parameter.

Abstract: As a variation of the non-orthogonal filter, a phasor estimate is computed by using an N-point window. An aspect of the sub-window cosine filter is to repeat the basic cosine filter for only selected points of the window. In the end, a least-squares fit is used to obtain an estimate for the phasors components. Previous cosine techniques use a data window whose length is greater than 1 cycle while the present invention requires only 1 cycle.

Abstract: In low-power AC networks, it is desirable when a load is connected, for example an arc furnace or a vehicle, to know the load capacity of the AC network in order to avoid undesirable drops in the network voltage U.sub.N. To this end, load voltage signals which are proportional to the amplitude of a load voltage U.sub.L are detected at the point of the load L at a 1st measurement time which can be predetermined and at a 2nd measurement time which can be predetermined and is later. At the same time, load current signals are detected which are proportional to the amplitude of a load current I.sub.L. Furthermore, a phase difference .DELTA..phi. is determined, which is obtained with reference to the phase angle of the network voltage U.sub.N at the 1st measurement time. These measurements are used as the bases to calculate a magnitude of the network impedance of the AC network and the network phase angle .phi..sub.N between the network voltage U.sub.N and the network current. A maximum possible power P.sub.

Abstract: The present invention pertains to a device and method for determining the sign of a phase angle of a first and second, essentially identical, periodic electric signals on corresponding first and second electrical conductors L1, L2, in particular, to determine the phase sequence in a three-phase power system. The device according to the present invention has a sensing device for sensing of the first signal from the first conductor L1 and of the second signal from the second conductor L2; a trigger device 25 for receiving the sensed first signal and specifying a time reference point and/or a time reference window within the signal period of the first signal and outputting a corresponding trigger signal; and a determination device 31, 32, 33 for receiving the trigger signal and the sensed second signal and determining the sign of the phase angle under consideration of at least the value of the second signal at the time reference point and/or the waveform of the second signal within the time reference window.

Abstract: The method and apparatus for determining the phase angle in position transmitters with sinusoidal output signals utilizes a sensor that generates a sinusoidal signal U.sub.0 (.alpha.)=A sin .alpha. and a cosinusoidal signal U.sub.1 (.alpha.)=A cos .alpha.. Linear combinations U.sub.2 =U.sub.0 +U.sub.1 and U.sub.3 =U.sub.1 -U.sub.0 are formed, and the quadrant is determined in a cyclic binary code q.sub.1 q.sub.0 by examining the preceding signs of these signals. Depending on the quadrant, a division U.sub.2 /U.sub.1 or U.sub.2 /U.sub.0 is carried out. The result of this division serves as the address for inquiring a stored angle table. Initially, the analog track signals U.sub.0, U.sub.1 are converted into digital signals, and all additional calculations are carried out in purely digital fashion. During the integral division, the dividend is one of the linear combinations (U.sub.2), and the divisor is, depending on the determined quadrant, either the sinusoidal or the cosinusoidal track signal.

Abstract: A system for measuring a phase difference between two input signals, including a computer performing computations in the complex domain and operating on two complex signals indicative of the two input signals respectively to compute the phase difference. Alternately, the system for measuring the phase difference includes a computer operating on two input buses indicative of the two input signals respectively to generate a signal indicative of the phase difference, and wherein: A. each input bus includes at least two digital bits; B. the two input buses are indicative of the phase of each of the two input signals; C. the two input buses each has a different range of possible values and wherein the computer further includes a device for normalizing at least one of the buses so as to bring the two buses to the same range. A phase-lock loop includes the system for measuring the phase difference, a VCO and digital devices.

Abstract: A method for determining an optimal transchest external defibrillation waveform which, when applied through a plurality of electrodes positioned on a patient's torso will produce a desired response in the patient's cardiac cell membranes. The method includes the steps of providing a quantitative model of a defibrillator circuit for producing external defibrillation waveforms, the quantitative model of a patient includes a chest component, a heart component, a cell membrane component and a quantitative description of the desired cardiac membrane response function. Finally, a quantitative description of a transchest external defibrillation waveform that will produce the desired cardiac membrane response function is computed. The computation is made as a function of the desired cardiac membrane response function, the patient model and the defibrillator circuit model.

Abstract: Line voltage and line current signals are sensed on a power line having at least one conducting path. The sensed line voltages and line currents are converted into a digital signal. A phase-to-neutral voltage signal and phase current signal are computed from the digital signal to thereby define a phase of the power line. An interval of orthogonality is determined from the sensed voltage and current signals, coinciding with passage of an integral number of cycles of a fundamental frequency reference signal which is computed from the computed phase-to-neutral voltage signal. A vector metering quantity is computed for the determined interval of orthogonality from the computed phase-to-neutral voltage signal and the computed phase current signal. The vector metering quantities to be computed may be identified and computed based upon an associated detent. The vector metering quantity is also computed based on an identified circuit topology.

Abstract: A method for determining the voltage current phase relationship of a piezoelectric phacoemulsification handpiece includes the steps of obtaining an AC voltage signal corresponding to the operating AC voltage of a piezoelectric handpiece and obtaining an AC current signal corresponding to the operating AC current of the piezoelectric handpiece. From said AC current signal, onset of a current cycle is determined and after onset of the current cycle, a voltage (V.sub.I) corresponding to a time necessary for the AC current signal to reach a maximum value is produced. Also, after onset of the current cycles, a voltage (V.sub.v) corresponding to a time necessary for the AC voltage signal to reach a maximum value is produced. Using an A/D converter, a digital output (D.sub.v) corresponding to (V.sub.v) is produced and a digital output (D.sub.I) corresponding to (V.sub.I) is produced. Comparing (D.sub.v) and (D.sub.