Abstract: Systems and methods of managing communications in a virtual area are described. Examples of the systems and methods provide services for creating highly customizable virtual area applications that support realtime virtual area communications. In some examples, these services manage communications between network nodes that are linked to a virtual area according to rules embodied in a virtual area application defining the virtual area. Examples of the systems and methods provide a generic framework for transforming a designer's specification of a virtual area into instructions that dynamically configure service functionality for acting on messages that are received from network nodes in connection with the virtual area.

Abstract: Computerized methods, systems, and computer-storage media for throttling requests from virtual machines (VMs) to a hard-disk drive (HDD) are provided. When a request for disk I/O is received from a VM, a disk-drive model that simulates performance characteristics of the HDD is accessed. During access, the disk-drive model's estimation of HDD parameters and the disk-drive model's estimation of a current state of a disk head of the HDD are gathered. A projected execution time to carry out the request is computed as a function of the estimated HDD parameters and the estimated current state of the disk head. Also, an actual execution time to carry out the request is measured upon allowing the request to pass to the HDD. Using a comparison of the projected execution time and the actual execution time, the traffic of the requests from the VMs is throttled.

Abstract: Embodiments include storing values of a first plurality of nodes in memory based on tracking the position of a plurality of points of a physical object and maintaining a second plurality of nodes in memory, each node of the second plurality of nodes corresponding to a node of the first plurality. The values of the second plurality of nodes can be used to model interactions with other objects and to render a view of a simulated object. The simulation can access data identifying a simulation boundary and selectively update values of the second plurality of nodes using the first plurality of nodes while ensuring that the simulation boundary is not violated. A value of the second plurality of nodes can be set to be different from the value of the corresponding one of the first plurality of nodes if using the first node's value would violate the boundary.

Abstract: Systems and methods for constructing a model to test the functionality of a target system are provided. When a first test methodology is used to test the target system, a model is proposed to test the target system based on a second test methodology. A subset of the target system's properties covered by the model is selected according to the second test methodology. It is determined whether the selected subset of the target system's properties, as covered by the second test methodology, is covered by the first test methodology.

Abstract: A system is described for assembling a behavior model of a technology component. The system may include a memory, and a processor. The memory may store a behavior model of a technology component. The processor may to monitor the technology component over a period of time to determine a plurality of parameter values associated with each state of a plurality of states of the technology component. The processor may process the plurality of parameter values associated with each state to determine a baseline parameter value for each state. The processor may assemble the behavior model for the technology component. The behavior model may include each state, the baseline parameter value for each state, and an association between each state and the baseline parameter value for each state. The processor may store the behavior model of the technology component in the memory.

Abstract: A simulation environment verifies processor-sparing functions in a simulated processor core. The simulation environment executes a first simulation for a simulated processor core. During the simulation, the simulation environment creates a simulation model dump file. At a later point in time, the simulation environment executes a second simulation for the simulated processor core. The simulation environment saves the state of the simulated processor core. The simulation environment then replaces the state of the simulated processor core by loading the previously created simulation model dump file. The simulation environment then sets the state of the simulated processor core to execute processor-sparing code and resumes the second simulation.

Abstract: A method for modeling a test space comprising defining a coverage model including: one or more variables, wherein respective values for the variables are assigned, and restrictions based on which valid variable value combinations are determined for the purpose of testing the model, wherein at least two values that are assignable to the one or more variables are merged to reduce number of variable values in the coverage model.

Abstract: An approach for predicting performance and capacity of an information technology (IT) system before the IT system is built is described, where the predicting uses a database of performance statistics measured for reusable software modules. A performance simulation modeling tool receives a set of performance statistics of a test computer. The set of performance statistics is associated with a set of software modules included in a library of reusable software modules. The set of software modules is required to build a target IT system. The set of performance statistics is received from a database of performance statistics resulting from individual executions on the test computer of each reusable software module in the library. The performance simulation modeling tool predicts computing resources required by the target IT system. The computing resources prediction follows the receipt of the set of performance statistics and precedes the target IT system being built.

Abstract: The present invention concerns a mainframe data stream proxy (MDSP) (1) for caching communication of at least one emulator (2) directed to at least one mainframe (3), wherein the MDSP (1) comprises: a. a runtime application server (10), adapted for receiving (101, 201) at least one emulator action from the at least one emulator (2) and for sending (105, 209) at least one corresponding mainframe action to the at least one emulator (2); b. wherein the runtime application server (10) is further adapted for retrieving (102, 103) the at least one corresponding mainframe action to be sent to the at least one emulator (2) from a cache (20) of the MDSP (1).

Abstract: Techniques for calculating quality of user experience (QoE) scores for video streams as played on receiving devices are described herein. Prior to calculating a QoE score, a device receives a video of a display screen of a receiving device captured while the receiving device plays a video stream. The device also receives transmission metrics from at least one device engaged in the transmission of the video stream to the receiving device. The device then calculates the QoE score for that received video based at least in part on a reference video, the transmission metrics, and one or more QoE models. Additionally, prior to receiving the video or the transmission metrics, the device may automate the transmission of the reference video as the video stream from a sending device to the receiving device over at least one network emulator, including providing network impairment settings to the network emulator.

Abstract: Method, system and computer program product for estimating the overall energy efficiency of a data center over a period of time. In one embodiment, a computer processor coupled to computer readable memory is configured to receive time parameters indicating the period of time over which the overall energy efficiency of the data center is to be estimated, receive component parameters indicating the performance characteristics of data center components and the operational interactions between the data center components, simulate the operation and interaction of the data center components based, at least in part, on the component parameters for the period of time over which the energy efficiency is estimated, and output results of the simulation to estimate the overall energy efficiency of the data center.

Abstract: The present invention provides at least a method and system for forecasting usage costs and computer capacity. With respect to the present invention, performance data and information related to transactions collected from computing devices are used to calculate correlations. A cost-allocation factor is calculated to determine the computer's usage costs without a long manual analysis of large volumes of data and extensive testing. Performance data and transaction data are used to forecast computer capacity.

Abstract: A test generator and methods for generating tests from a hybrid diagram are provided. A hybrid diagram is a diagram that primarily uses one higher-level semantic notation with portions utilizing one or more secondary higher-level semantic notations. Example higher-level semantic notations are statechart notation and data-flow notation. A test generator processes the hybrid diagram without reducing the higher-level semantic constructs to lower-level semantic constructs. The test generator generates test-generation templates as needed based on the higher-level semantic model used in the diagram. The test generator uses the test-generation templates to generate tests for a system-performing device specified by the diagram. The generated tests may be executed automatically by a test driver or manually by a human tester.

Abstract: The present invention discloses a high-parallelism synchronization method for multi-core instruction-set simulation. The proposed method utilizes a new distributed scheduling mechanism for a parallel compiled MCISS. The proposed method can enhance the parallelism of the MCISS so that the computing power of a multi-core host machine can be effectively utilized. The distributed scheduling with the present invention's prediction method significantly shortens the waiting time which an ISS spends on synchronization.

Abstract: A method for modeling test space for verifying system behavior is provided. The method comprises defining a coverage model based on one or more variables, wherein respective value combinations for the variables are assigned to define a test space for a system under test, and zero or more constraints define restrictions on value combinations assigned to the variables, wherein the restrictions define whether said value combinations are valid; and designating, as interchangeable, relevant variables values in the coverage model.

Abstract: In a method of simulating a multi-processor system by running code that simulates the system on a host processor, a SPECULATE and a COMMIT instruction is used to mark an area of memory, shared across several simulated processors, and the code is translated at run time to a form required by the host processor. All instructions are mapped to a native instruction set of the host using two different code dictionaries: all instructions outside a SPECULATE/COMMIT region are mapped to the first of the two code dictionaries. If a SPECULATE instruction is encountered during runtime by a simulator running the code, the instructions are mapped to a native instruction set of the host using the second code dictionary.

Abstract: A method for refining a test plan is provided. The method comprises defining a coverage model including: one or more variables, wherein respective values for the variables are assigned, and one or more definitions for value combinations for said variables with assigned values, wherein zero or more of said value combinations are defined according to one or more restrictions for the purpose of generating a test plan to test a system for which the coverage model is constructed; determining zero or more uncovered value combinations in the test plan; and providing means to update the test plan.

Abstract: A computing device may be configured to receive a design. The computing device may further receive a requirement object that represents a requirement for the design. The requirement object may include a first functionality and a second functionality. The computing device may interact with the design using the requirement object. When interacting with the design, the computing device may invoke the first functionality to determine whether the design satisfies the requirement and invoke the second functionality to provide a result of invoking the first functionality.

Abstract: The current disclosure discloses a power aware simulation system comprising an embedded multi-core simulation module, a power abstract interpretation module and a C power estimation (CPE) power profiling module. The embedded multi-core simulation module comprises a plurality of digital signal processors (DSP), an external memory and a direct memory access. Each of the plurality of DSPs comprises a DSP core, an instruction cache and a local memory. The power abstract interpretation module is coupled to the plurality of DSPs, the external memory, the DMA and the CPE profiling module, respectively.

Abstract: A method for simulating a telecommunications network through objects that model respective network devices provides for simulating through the objects, the supply of network services according to respective quality of service profiles, by selectively identifying at least one quality of service profile, and dynamically configuring the objects to simulate the supply of the service corresponding to the selectively identified quality of service profile. In the simulation of networks having mobile terminals, the quality of service profile preferably has parameters chosen from traffic class, maximum transfer time of a data unit, guaranteed transfer speed for data transmitted by mobile terminal toward the network, maximum transfer speed for data transmitted from mobile terminal toward the network, guaranteed transfer speed for data transmitted by the network toward mobile terminal, and maximum transfer speed for data transmitted by the network toward mobile terminal.

Abstract: A method and system is provided in which new types of devices (such as sensors) can be integrated into a network in an automated manner. The system includes a repository for device information. When a new device is detected in a network, a management system for the network obtains device information from the repository and uses that information to integrate the device into the network.

Abstract: Methods and apparatus for controlling at least two processing cores in a multi-processor device or system include accessing an operating system run queue to generate virtual pulse trains for each core and correlating the virtual pulse trains to identify patterns of interdependence. The correlated information may be used to determine dynamic frequency/voltage control settings for the first and second processing cores to provide a performance level that accommodates interdependent processes, threads and processing cores.

Abstract: Distributed hardware device simulation, including: identifying a plurality of hardware components of the hardware device; providing software components simulating the functionality of each hardware component, wherein the software components are installed on compute nodes of a distributed processing system; receiving, in at least one of the software components, one or more messages representing an input to the hardware component; simulating the operation of the hardware component with the software component, thereby generating an output of the software component representing the output of the hardware component; and sending, from the software component to at least one other software component, one or more messages representing the output of the hardware component.

Abstract: A chip-level multiprocessing system may be designed for accelerated implementation of a specified user computing application. The application may be converted to a parallel program representation with explicit runtime functions denoted. One or more of the explicit runtime functions may be identified for implementation in the form of a specialized intellectual property core (IP-core). The remaining portions of the application may then be implemented in a further IP-core, and the IP-cores may be interconnected to implement the user computing application.

Abstract: A method and system for metric information processing is disclosed in one embodiment. Metric information is gathered with a plurality of points of presence (POPs) geographically distributed across the Internet. The metric information is processed in a hub-and-spoke fashion with a metric reduction occurring in the POPs and another metric reduction in a kernel application server according to predetermined schemes. The two-stage metric reduction generates a result set including a data structure. The result set can be processed according to a query to generate a report. The data structure and reports have metric information that is recent and updated regularly without use of a database.

Abstract: Provided is a microcomputer simulator capable of quickly dealing with change of a target microcomputer to thereby enable a speedy development of software. The microcomputer simulator is a microcomputer simulator for simulating a microcomputer including therein a CPU and a peripheral circuit of the CPU, and includes a mother board including a CPU for executing application software to be processed by the CPU provided in the microcomputer, and an IO board for executing, at an FPGA thereof, processing of the peripheral circuit provided in the microcomputer and IO processing executed by the CPU provided in the microcomputer. The FPGA includes a common memory portion so that the microcomputer simulator updates data stored in the common memory portion through a communication bus provided between the mother board 10 and the IO board, and causes data to be exchanged between the CPU provided in the mother board and the FPGA.

Abstract: A system and method is described for connecting a logic circuit simulation to a hardware peripheral that includes a computer running software for communicating data to and from the hardware peripheral. The software transmits the data received from the hardware peripheral to the device being simulated by the logic circuit simulation. The computer also transmits the data received from the device being simulated by the electronic circuit simulation to the hardware peripheral. This allows the user to test the device being simulated using real hardware for input and output instead of simulated hardware.

Abstract: An X display may be dynamically rerouted to a different graphics terminal, or to several graphics terminals, without disrupting X clients. The corresponding X server architecture includes a static, protocol router part which acts as an endpoint for client connections and which routes X protocol to one or more X server displays, and a dynamic X display part which maintains the state and contents of the display. An X display may maintain its state and display contents entirely in memory without any need for physical display or input devices, in which case it is termed a “headless X display” and provides a virtual X server display that appears to the host as if it were a user-interactive display. The architecture allows for any number of X displays to be attached to the protocol router for multi-user, fault tolerant or suspend/resume functionality.

Abstract: Computer resource utilization modeling for multiple workloads includes a computer obtaining resource utilization data, the resource utilization data having groups of computer resource utilization measurements made during time intervals for a plurality of workloads. The computer determines parameters representing a distribution of the computer resource utilization measurements for each of the groups to generate a baseline of distributions across the time intervals for each of the plurality of workloads. The computer sums the baselines of distributions for the plurality of workloads to generate a combined baseline of distributions across the time intervals for a combination of the plurality of workloads.

Abstract: A system including a microarchitecture model, a memory model, and a plurality of snapshots. The microarchitecture model is of a microarchitecture design capable of executing a sequence of program instructions. The memory model is generally accessible by the microarchitecture model for storing and retrieving the program instructions capable of being executed on the microarchitecture model and any associated data. The plurality of snapshots are generally available for initializing a number of instances of the microarchitecture model, at least some of which may contain values assigned to one or more registers or memory regions in response to interaction with one or more external entities during a first pass of a simulation of the microarchitecture. The number of instances is generally greater than one and generally perform high-detail simulation. The number of instances, when launched and executed during a second pass of the simulation of the microarchitecture, have run time periods that overlap.

Abstract: A method includes instantiating a cloned network that includes a second set of virtual service nodes. The second set of virtual service nodes includes at least one cloned virtual service node that is a clone of a corresponding virtual service node in a first set of virtual service nodes. The at least one cloned virtual service node has access to a history of events that occurred at the corresponding virtual service node in the first set of virtual service nodes. The method includes initiating an interactive debugging session that includes step by step processing of the events of the history of events.

Abstract: A generating method is executed by a processor. The method includes executing simulation using a simulation model expressing a processor model, a memory model to which the processor model is accessible, and a load source that accesses the memory model according to an access contention rate, to obtain an index value for performance of the processor model, for each access contention rate; and saving to a memory area and as contention characteristics information, the index value for each access contention rate.

Abstract: A method of assisting failure mode and effects analysis of a system having a plurality of components includes obtaining data associated with a component, or a group of components, of the system. The component or the group is associated with component type data or group type data, respectively, that includes data relating to at least one failure feature common to all components or groups, respectively, of that type. The component/group data and the component/group type data can then be stored and/or transferred for use in a failure mode and effects analysis of the system.

Abstract: Embodiments of the invention provide a method and apparatus for generating programmable logic for a hardware accelerator, the method comprising: generating a graph of nodes representing the programmable logic to be implemented in hardware; identifying nodes within the graph that affect external flow control of the programmable logic; retaining the identified nodes and removing or replacing all nodes which do not affect external flow control of the programmable logic in a modified graph; and simulating the modified graph or building a corresponding circuit of the retained nodes.

Abstract: Methods, devices, and systems are disclosed for simulating a large, realistic computer network. Virtual actors statistically emulate the behaviors of humans using networked devices or responses and automatic functions of networked equipment, and their stochastic actions are queued in buffer pools by a behavioral engine. An abstract machine engine creates the minimal interfaces needed for each actor, and the interfaces then communicate persistently over a network with each other and real and virtual network resources to form realistic network traffic. The network can respond to outside stimuli, such as a network mapping application, by responding with false views of the network in order to spoof hackers, and the actors can respond by altering a software defined network upon which they operate.

Abstract: A computer-readable medium encoded with an instruction check program for making a computer to check a status of execution of an instruction by an I/O simulator that performs an operation simulation according to a structure of an I/O area of a microcomputer, the instruction check program when executed by a computer causes the computer to perform a method including obtaining specification information of the microcomputer describing an input and an output condition of a hardware resource in the I/O area, detecting a simulation of a reference instruction to the hardware resource executed by the I/O simulator, determining correctness of the reference instruction by comparing a content of the simulation of the reference instruction detected by the detecting with the input and output condition of the hardware resource included in the obtained specification information, and outputting an error signal when it is determined that the reference instruction is incorrect.

Abstract: A system on a chip comprises a plurality of circuit blocks, a programmable processor and a communication circuit. Design information includes connection data including an identification of the direct mutual connection and first and second circuit blocks coupled by the direct mutual connection. An additional register is added to the system on a chip coupled to the direct mutual connection. Verification programs are used includescomprising instructions for the processor to access registers in the second one of the circuit blocks, to use the connection data, or information derived therefrom to select the first one of the circuit blocks, and to issue the standardized call to the interface program of the selected further one of the circuit blocks.

Abstract: A system for controlling signals coming from or going to an aircraft simulator has a first slave circuit and a second slave circuit. The second slave circuit is used to monitor signals coming from the aircraft simulator. A multiplexer circuit is coupled to the first slave circuit. The first slave circuit sends control signals to the multiplexer circuit for controlling digital output signals being sent to the aircraft simulator. A master controller is coupled to the first slave circuit and the second slave circuit. The master controller is used for controlling operation of the first and second slave circuit. A computer system is coupled to the master controller. The computer system will display a listing of the aircraft simulator signals to be controlled. Selection of a desired aircraft simulator signal by an input device of the computer system will allow one to control the selected aircraft simulator signal.

Abstract: An objective function can be mathematically approximated using a prescribed number of sample sets of design parameters and sets of a plurality of objective functions computed corresponding to them. A logical expression indicating a relation between or among arbitrary two or three objective functions of the plurality of mathematically approximated objective functions is computed as an inter-objective-function logical expression and a region that the arbitrary objective function values can take is displayed as a feasible region in an objective space corresponding to the arbitrary objective functions. Furthermore, a point or area in a design space corresponding to arbitrary design parameters corresponding to a point or area specified by a user in the displayed feasible region is displayed.

Abstract: Apparatus, systems, and methods may operate to acquire an original data set comprising a series of data points having an independent portion and a dependent portion, the dependent portion representing a measure of device performance that depends on at least one device characteristic represented by the independent portion. Additional activity may include identifying outlier data points in the series by determining, in comparison with all other members of the series, whether the outlier data points conform to a known trend of the series; transforming the original data set into a transformed data set by removing the outlier data points from the series; and publishing the transformed data set. Other apparatus, systems, and methods are disclosed.

Abstract: The present invention is directed towards systems and method for creating a network topology model. The method comprises identifying a network element on a network. The method then creates a network object model and a network link model for the network element, wherein the network object model and network link model comprise a multi-layer representation of the network element. The method further stores the network object model and network link model in one or more databases.

Abstract: Provided is a PLC simulator including a component configuration unit receiving a command from a user to controllably perform a simulation, and a simulation unit receiving a command from the component configuration unit to perform a simulation of a connected external PLC, whereby a user is provided with a convenient environment capable of simulating a variety of systems through reconfigurable component, and a user is capable of reducing a TCO (Total Cost of Ownership) by being provided with a testing environment maximally similar to that of an actual apparatus through application of external input conditions.

Abstract: A computer-implemented method for determining a power cycle of a power source of a mobile device is described. An execution of one or more components on the mobile device is simulated. An amount of power drawn by the one or more components from the power source is estimated during the simulated execution of each of the one or more components. The estimated amounts of power drawn from the power source by each of the one or more components are aggregated to obtain a total estimate of power drawn from the power source. The power cycle of the power source is determined according to the total estimate of power drawn from the power source by each of the one or more components.

Abstract: An application can be run in an environment on a host machine. The environment can simulate a machine of a different type from the host machine. A series of events can be received from user input. The series of events can simulate a series of input from a target type of physical peripheral device that is different from a type of physical device used to provide the input. The series of events can be provided to the application for processing, and results of the application processing the series of events can be displayed.

Abstract: A method and system for testing a software application. A description of a test suite for testing the software application being tested (ABT) is inserted into a test database. The ABT is invokes multiple external software applications during execution of a test script of the test suite. Each external application invoked by the ABT is replaced by a corresponding simulator during execution of the test script. Output data to be returned to the ABT by each invoked simulator is inserted into the test database, after which each test script of the test suite is executed. The executing includes: sending a request, by the ABT to each simulator invoked in each test script, for requested data; and receiving, by the ABT, the requested data from each simulator invoked in each test script. The received requested data includes the output data that had been inserted into the test database.

Abstract: Synchronizing resources shared among a plurality of devices includes determining access information about each of the resources, determining activity for each of the resources on at least a subset of the devices based on the access information, estimating future use of the devices, providing an estimate of a desire to have particular resources on particular devices according to the activity and future use, and synchronizing resources according to the estimate of a desire to have particular resources on particular devices. The resources may be data files. Access information may include information about when the resources were read and/or may include information about when the resources were renamed, created, and modified. Estimating a desire to have particular resources on particular devices may take into account a user's desire to maintain backup files and/or maintain certain types of files on certain devices.

Abstract: The method comprises the following steps: establishing a low-level computation platform model (10) from sets of sizing parameters (4) representative of the material and/or software resources necessary to carry out requests generated during the implementation of the or each application (2), the low-level model (10) comprising at least one computation node (60) modeling at least one application (2), material components, one or more operating systems, and services; defining at least one stimulation scenario (6), corresponding to a sequence of generated requests; stimulating the low-level model (10) of the computation platform using the or each scenario and using an event-driven simulation kernel of the stimulation scenario determined as a function of process planning, and, noting the traces of the operation of the low-level model (10) to evaluate the performance thereof.

Abstract: A detachable audio device structured to be coupled to an interface port of a computer system simulates the coupling and uncoupling of an audio controller to trigger an operating system being executed by a processing device of the computer system to select between an audio driver for that same audio controller and another audio driver for a different audio controller to which the processing device of the computer system has access, thus triggering a selection between causing audio played by the computer system to be acoustically output through either an acoustic driver to which the detachable audio device relays the audio or another acoustic driver associated with the other audio controller to which the processing device of the computer system has access.

Abstract: A method, and apparatus for software and resource management with a model-based architecture.

Abstract: Methods, devices, and systems are disclosed for simulating a large, realistic computer network. Virtual actors statistically emulate the behaviors of humans using networked devices or responses and automatic functions of networked equipment, and their stochastic actions are queued in buffer pools by a behavioral engine. An abstract machine engine creates the minimal interfaces needed for each actor, and the interfaces then communicate persistently over a network with each other and real and virtual network resources to form realistic network traffic. The network can respond to outside stimuli, such as a network mapping application, by responding with false views of the network in order to spoof hackers, and the actors can respond by altering a software defined network upon which they operate.