Compression/decompression Patents (Class 708/203)
  • Patent number: 12056420
    Abstract: A model (e.g., mechanical computer-aided design (MCAD) model) representing an assembly is displayed in a graphical user interface (GUI). The assembly contains at least a first body and a second body. The physics type of the model is determined in response to an assignment of a physics condition to the first body and/or the second body. Contact-pairs are detected in the model according to the determined physics type. The GUI is updated to indicate where the contact-pairs are located in the model for revision of the contact-pairs. Markers are shown in the GUI to represent corresponding contact-pairs. Markers are logically separated from bodies and faces in the model. The revision of the contact-pairs can be managed with a filtering mechanism either by bodies/faces or by markers.
    Type: Grant
    Filed: February 16, 2021
    Date of Patent: August 6, 2024
    Assignee: ANSYS, INC.
    Inventors: Frank Edward DeSimone, Glyn Russell Jarvis, Andrey Illich Sarkanich, Sanjaykumar Ranganayakulu, Christopher Michael Maslin
  • Patent number: 12056465
    Abstract: Verifying the correctness of a leading zero counter, including: generating, based on an input value comprising a plurality of digits, a first bit vector, wherein each entry of the first bit vector indicates whether a corresponding digit of the input value is equal to zero; calculating, based on the first bit vector, a leading zero count for the input value; generating a bit mask comprising a number of leading ones equal to the leading zero count; generating a second bit vector comprising a one at a same index as a first occurring zero in the bit mask; and verifying the leading zero count based on the first bit vector and one or more of the bit mask and the second bit vector.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: August 6, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael Klein, Petra Leber, Cedric Lichtenau, Stefan Payer, Kerstin Claudia Schelm
  • Patent number: 12034946
    Abstract: In one embodiment, a method determines an encoded plurality of layers for a scalable video stream for a video where each of the plurality of layers includes a respective layer parameter setting. An additional layer for the plurality of layers is determined where the additional layer enhances a base layer in the plurality of layers and the respective layer parameter settings for the encoded plurality of layers do not take into account the additional layer. The method then determines an additional layer parameter setting for the additional layer. The additional layer parameter setting specifies a relationship between the additional layer and at least a portion of the plurality of layers where the additional layer parameter setting is used to decode the additional layer and the at least a portion of the plurality of layers.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: July 9, 2024
    Assignee: ARRIS Enterprises LLC
    Inventors: Mandayam A. Narasimhan, Ajay K. Luthra
  • Patent number: 12022090
    Abstract: A method includes receiving transform coefficients corresponding to a scaled video input signal, the scaled video input signal including a plurality of spatial layers that include a base layer. The method also includes determining a spatial rate factor based on a sample of frames from the scaled video input signal. The spatial rate factor defines a factor for bit rate allocation at each spatial layer of an encoded bit stream formed from the scaled video input signal. The spatial rate factor is represented by a difference between a rate of bits per transform coefficient of the base layer and an average rate of bits per transform coefficient. The method also includes reducing a distortion for the plurality of spatial layers by allocating a bit rate to each spatial layer based on the spatial rate factor and the sample of frames.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: June 25, 2024
    Assignee: Google LLC
    Inventors: Michael Horowitz, Rasmus Brandt
  • Patent number: 12013874
    Abstract: A processor may identify one or more data fields of interest. The processor may receive data for each of the data fields of interest. The processor may compute one or more bias scores for the data fields of interest based on the data. The processor may develop a bias matrix with the bias scores. The processor may display the bias matrix to a user.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: June 18, 2024
    Assignee: International Business Machines Corporation
    Inventors: Brianne Boldrin, Eliza Salkeld, Rebecca Rose James
  • Patent number: 12009843
    Abstract: A matrix compression/decompression accelerator (MCA) system/method that coordinates lossless data compression (LDC) and lossless data decompression (LDD) transfers between an external data memory (EDM) and a local data memory (LDM) is disclosed. The system implements LDC using a 2D-to-1D transformation of 2D uncompressed data blocks (2DU) within LDM to generate 1D uncompressed data blocks (1DU). The 1DU is then compressed to generate a 1D compressed superblock (CSB) in LDM. This LDM CSB may then be written to EDM with a reduced number of EDM bus cycles. The system implements LDD using decompression of CSB data retrieved from EDM to generate a 1D decompressed data block (1DD) in LDM. A 1D-to-2D transformation is then applied to the LDM 1DD to generate a 2D decompressed data block (2DD) in LDM. This 2DD may then be operated on by a matrix compute engine (MCE) using a variety of function operators.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: June 11, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Arthur John Redfern, Dan Wang
  • Patent number: 12007885
    Abstract: Embodiments of the present disclosure include techniques storing and retrieving data. In one embodiment, sub-matrices of data are stored as row slices and column slices. A fetch circuit determines if particular slices of one sub-matrix, when combined with corresponding slices of another sub-matrix, produce a zero result and need not be retrieved. In another embodiment, the present disclosure includes a memory circuit comprising memory banks and sub-banks. The sub-banks store slices of sub-matrices. A request moves between serially configured memory banks and slices in different sub-banks may be retrieved at the same time.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: June 11, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Karthikeyan Avudaiyappan, Jeffrey A Andrews
  • Patent number: 11960449
    Abstract: A recording medium stores an information processing program for managing a plurality of storage devices and a plurality of servers. The program causes a computer to execute a process including: while changing a compression ratio setting, obtaining an actual compression ratio by using some of data pieces to be used by the plurality of servers and a decompression rate at which the servers decompress a compressed dataset in which the some data pieces are compressed; and determining the compression ratio setting to be used based on a maximum total bandwidth of the plurality of storage devices and a number of the plurality of servers by using the obtained actual compression ratio and the decompression rate for each of the compression ratio settings.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: April 16, 2024
    Assignee: FUJITSU LIMITED
    Inventors: Hiroki Ohtsuji, Eiji Yoshida
  • Patent number: 11948339
    Abstract: According to an example method, a system receives first data representing a polygon mesh. The polygon mesh includes a plurality of interconnected vertices forming a plurality of triangles. The system generates second data representing the polygon mesh. Generating the second data includes traversing the vertices of the polygon mesh according to a traversal order, partitioning the plurality of triangles into a set of ordered triangle groups in accordance with the traversal order, and encoding, in the second data, the set of ordered triangle groups. The system outputs the second data. A position each of the vertices in the transversal order is determined based on (i) a number of previously encoded triangles that are incident to that vertex, and/or (ii) a sum of one or more angles formed by the previously encoded triangles that are incident to that vertex.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: April 2, 2024
    Assignee: Apple Inc.
    Inventor: Khaled Mammou
  • Patent number: 11936404
    Abstract: A method for storage system data aware compression, the method may include pre-compressing data units received by the storage system, by different pre-compression units to provide different pre-compressed versions of the data units; wherein the different pre-compression schemes are associated with different compression schemes, wherein at least some of the different compression schemes are data type specific compression schemes; calculating entropies of the different pre-compressed versions; and selecting a compression scheme out of the different compression schemes based on the entropies of the different pre-compressed versions.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: March 19, 2024
    Assignee: VAST DATA LTD.
    Inventors: Yogev Vaknin, Alon Berger, Itay Khazon, Or Yahalom
  • Patent number: 11893388
    Abstract: An integrated circuit including a plurality of processing components to process image data of a plurality of image frames, wherein each image frame includes a plurality of stages. Each processing component includes a plurality of execution pipelines, wherein each pipeline includes a plurality of multiplier-accumulator circuits configurable to perform multiply and accumulate operations using image data and filter weights, wherein: (i) a first processing component is configured to process all of the data associated with a first plurality of stages of each image frame, and (ii) a second processing component of the plurality of processing components is configured to process all of the data associated with a second plurality of stages of each image frame. The first and second processing component processes data associated with the first and second plurality of stages, respectively, of a first image frame concurrently.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: February 6, 2024
    Assignee: Flex Logix Technologies, Inc.
    Inventors: Frederick A. Ware, Cheng C. Wang, Valentin Ossman
  • Patent number: 11836492
    Abstract: A microprocessor system includes a processing circuit and a memory operably coupled to the processing circuit and configured to receive input data according to a pack and store operation and output the data according to a load and unpack operation. The processing circuit comprises a hardware extension configured to: configure a variable number of bits per data element during a pack and store operation; store a concatenation of a plurality of data elements with a reduced number of bits; extract a plurality of data elements with a reduced number of bits during a load and unpacking operation; and recreate a plurality of data elements with an increased number of bits per data element representative of the data elements prior to the pack and store operation.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: December 5, 2023
    Assignee: NXP B.V.
    Inventor: Stefan Quitzk
  • Patent number: 11748202
    Abstract: One example includes an integrated circuit (IC). The IC includes non-volatile memory and logic. The logic is configured to receive repair code associated with a memory instance and assign a compression parameter to the repair code based on a configuration of the memory instance. The logic is also configured to compress the repair code based on the compression parameter to produce compressed repair code and to provide compressed repair data that includes the compressed repair code and compression control data that identifies the compression parameter. A non-volatile memory controller is coupled between the non-volatile memory and the logic. The non-volatile memory controller is configured to transfer the compressed repair data to and/or from the non-volatile memory.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: September 5, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Devanathan Varadarajan, Ramakrishnan Venkatasubramanian, Varun Singh
  • Patent number: 11669496
    Abstract: There is provided a method and apparatus for remote differential compression (RDC) and data deduplication. According to embodiments, when a sending device acquires a new target file, the following steps are performed. Initially, Jaccard segmentation is performed, followed by performing identity-based segment deduplication and similarity-based segment deduplication. The transmission of the target file in the deduplicated form to the recipient device is subsequently performed. The recipient device can then rebuild the original target file from the deduplicated form thus replicating the target file at the recipient device with the target file originally present at the sending device.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: June 6, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Dmitry Borzov, Mikhail Ignatovich, David Ramón Prados
  • Patent number: 11645585
    Abstract: In one embodiment, a processor of a computing device receives a query. The computing device may compare a centroid of each of a plurality of clusters to the query such that a subset of the plurality of clusters is selected, each of the plurality of clusters having a set of data points. An assignment of the subset of the plurality of clusters may be communicated to a hardware accelerator of the computing device. A plurality of threads of the hardware accelerator of the computing device may generate one or more distance tables that store results of intermediate computations corresponding to the query and the subset of the plurality of clusters. The distance tables may be stored in shared memory of the hardware accelerator. A plurality of threads of the hardware accelerator may determine a plurality of data points using the distance tables. The processor may provide query results pertaining to at least a portion of the plurality of data points.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: May 9, 2023
    Assignee: Verizon Patent and Licensing Inc.
    Inventors: Edward Bortnikov, Alexander Libov, Ohad Shacham
  • Patent number: 11632555
    Abstract: A method includes receiving transform coefficients corresponding to a scaled video input signal, the scaled video input signal including a plurality of spatial layers that include a base layer. The method also includes determining a spatial rate factor based on a sample of frames from the scaled video input signal. The spatial rate factor defines a factor for bit rate allocation at each spatial layer of an encoded bit stream formed from the scaled video input signal. The spatial rate factor is represented by a difference between a rate of bits per transform coefficient of the base layer and an average rate of bits per transform coefficient. The method also includes reducing a distortion for the plurality of spatial layers by allocating a bit rate to each spatial layer based on the spatial rate factor and the sample of frames.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: April 18, 2023
    Assignee: Google LLC
    Inventors: Michael Horowitz, Rasmus Brandt
  • Patent number: 11604522
    Abstract: A dynamic data transmission format adjustment method is provided. Firstly, a peripheral device raw input data is acquired from a device main body of a wireless peripheral device. Then, the peripheral device raw input data is converted into a variable-bit-length peripheral device transmission data according to a dynamic data transmission format conversion rule. Then, a network transmission packet containing the variable-bit-length peripheral device transmission data is generated, and the network transmission packet is transmitted to a wireless receiver of the wireless peripheral device. Then, the variable-bit-length peripheral device transmission data in the network transmission packet is converted and restored into a fixed-bit-length peripheral device transmission data according to the dynamic data transmission format conversion rule. Then, the fixed-bit-length peripheral device transmission data is transmitted from the wireless receiver to a computer host.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: March 14, 2023
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventors: Chun-Nan Su, Chih-Feng Chien, Yun-Jung Lin, Chin-An Lin
  • Patent number: 11550509
    Abstract: Accordingly the embodiments herein provide a method for adaptive data transfer in a memory system (140), the method comprising: receiving at least one of a data copy request and a data transfer request to perform at least one of a data copy and a data transfer form a first memory subsystem (142) to a second memory subsystem (144). Configuring the memory system (140) in one of a first memory mode and a second memory mode based on a time required to perform at least on of data transfer and data transfer from the first memory subsystem (142) to the second memory subsystem (144) using an enhanced system model and performing at least one of data transferring and data copying from the first memory subsystem (142) to the second memory subsystem (144) in one of the first configured memory mode and the second configured memory mode.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: January 10, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Abhishek Kumar Singh, Ekansh Gupta, Manjunath Jayram, Yunas Rashid, Mahantesh Mallikarjun Kothiwale
  • Patent number: 11528033
    Abstract: A deep neural network (“DNN”) module compresses and decompresses neuron-generated activation data to reduce the utilization of memory bus bandwidth. The compression unit receives an uncompressed chunk of data generated by a neuron in the DNN module. The compression unit generates a mask portion and a data portion of a compressed output chunk. The mask portion encodes the presence and location of the zero and non-zero bytes in the uncompressed chunk of data. The data portion stores truncated non-zero bytes from the uncompressed chunk of data. A decompression unit receives a compressed chunk of data from memory in the DNN processor or memory of an application host. The decompression unit decompresses the compressed chunk of data using the mask portion and the data portion.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: December 13, 2022
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Joseph Leon Corkery, Benjamin Eliot Lundell, Larry Marvin Wall, Chad Balling McBride, Amol Ashok Ambardekar, George Petre, Kent D. Cedola, Boris Bobrov
  • Patent number: 11509899
    Abstract: Methods and apparatuses for encoding and decoding an intra prediction mode of a prediction unit of a chrominance component based on an intra prediction mode of a prediction unit of a luminance component are provided. When an intra prediction mode of a prediction unit of a luminance component is the same as an intra prediction mode in an intra prediction mode candidate group of a prediction unit of a chrominance component, reconstructing the intra prediction mode candidate group of the prediction unit of the chrominance component by excluding or replacing an intra prediction mode of the prediction unit of the chrominance component which is same as an intra prediction mode of the prediction unit of the luminance component from the intra prediction mode candidate group, and encoding the intra prediction mode of the prediction unit of the chrominance component by using the reconstructed intra prediction mode candidate group.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: November 22, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Vadim Seregin, Jianle Chen, Sun-il Lee, Tammy Lee
  • Patent number: 11487681
    Abstract: Enhanced techniques for communicating with an integrated circuit chip card are disclosed. An integrated circuit chip card may include a processor, a memory storing a plurality applications executable by the processor, an input/output (I/O) interface, and a network interface coupled to the (I/O) interface. The network interface may implement a plurality of logical ports, and the network interface can be configurable to select between multiple communication protocols to communicate with an external device in a socket communication mode. The network interface can be configured to establish a plurality of communication channels between the external device the integrated circuit chip card using the plurality of logical ports, and each of the communication channels may support communication with one of the plurality of applications.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: November 1, 2022
    Assignee: VISA INTERNATIONAL SERVICE ASSOCIATION
    Inventor: Kiushan Pirzadeh
  • Patent number: 11490101
    Abstract: It is configured to include a video signal compression unit that compresses a video signal for displaying, on an image inspection monitor, an image inspection screen including a first area for displaying a medical image and a second area for displaying information other than the medical image, and a transmitting unit that transmits, via a communication network, the video signal having been compressed, and the video signal compression unit compresses, in each frame of the video signal, the second area of the image inspection screen at a compression rate higher than a compression rate of the first area.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: November 1, 2022
    Assignee: Shimadzu Corporation
    Inventor: Hidekazu Minami
  • Patent number: 11449495
    Abstract: Data encoded in multiple languages, such as single byte languages and multi-byte languages, may be generated and stored in a single indexable information/data profile in a database. The information/data profile may comprise indexable information/data fields configured for storing information/data in a standardized language encoding and non-indexable information/data fields configured for storing information/data in a language different from the standardized language. The standardized language may be generated by translating the information/data stored in the non-indexable information/data fields to enable indexing of the entire information/data profile. The information/data profile may be utilized to generate various information/data outputs, such as shipping labels including at least one of the standardized language or the other language while enabling the information/data profile to be indexed based at least in part on the standardized language.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: September 20, 2022
    Assignee: UNITED PARCEL SERVICE OF AMERICA, INC.
    Inventors: Murali Krishna Utla, Cindy Chong, Randy Lee, Mohd Saiful Saniff, Kent Koh, Kyaw Thu Win, Jeffrey Cooper
  • Patent number: 11392829
    Abstract: Approaches in accordance with various embodiments provide for the processing of sparse matrices for mathematical and programmatic operations. In particular, various embodiments enforce sparsity constraints for performing sparse matrix multiply-add instruction (MMA) operations. Deep neural networks can exhibit significant sparsity in the data used in operations, both in the activations and weights. The computational load can be reduced by excluding zero-valued data elements. A sparsity constraint is applied across all submatrices of a sparse matrix, providing fine-grained structured sparsity that is evenly distributed across the matrix. The matrix may then be compressed since a minimum number of elements of the matrix are known to have zero value. Matrix operations are then performed using these matrices.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: July 19, 2022
    Assignee: NVIDIA Corporation
    Inventors: Jeff Pool, Ganesh Venkatesh, Jorge Albericio Latorre, Jack Choquette, Ronny Krashinsky, John Tran, Feng Xie, Ming Y. Siu, Manan Patel
  • Patent number: 11362674
    Abstract: The disclosure is directed at a method of data compression using inferred data. By determining the number of leading zeroes for each data structure, a general header presenting all leading zeros can be generated and use to compress the data.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: June 14, 2022
    Assignee: KinematicSoup Technologies Inc.
    Inventor: Justin McMichael
  • Patent number: 11258456
    Abstract: A method for compressing a quantum state vector includes: aggregating a group of several neighboring states of the vector into a cluster of states of the vector, a parameter representative of the probability of this cluster being associated with it and corresponding to the sum of the probabilities of the aggregated neighboring states in this cluster, the probability of each aggregated neighboring state being below a given aggregation threshold, and/or the sum of the probabilities of the aggregated neighboring states in a cluster being below another given aggregation threshold; and preserving a state of the vector not aggregated in a cluster, the parameter representative of its probability remaining unchanged. The method includes several steps of aggregating several distinct groups of several neighboring states of the vector, respectively into several clusters of states of the vector, and/or an aggregation step and a preservation step.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: February 22, 2022
    Assignee: BULL SAS
    Inventor: Jean Noël Quintin
  • Patent number: 11010202
    Abstract: A specification of an operation to perform one or more element-wise sums of specified portions of a matrix is received. The specification of the operation is analyzed to select a type of processing load partitioning to be applied. Based on the selected type of processing load partitioning to be applied, processing required to perform the operation is partitioned across a plurality of physical processing elements in parallel. The partitioned processing is distributed to the physical hardware processing elements to perform in parallel the element-wise sums of the specified portions of the matrix.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: May 18, 2021
    Assignee: Facebook, Inc.
    Inventors: Martin Schatz, Amin Firoozshahian
  • Patent number: 10979070
    Abstract: A matrix compression/decompression accelerator (MCA) system/method that coordinates lossless data compression (LDC) and lossless data decompression (LDD) transfers between an external data memory (EDM) and a local data memory (LDM) is disclosed. The system implements LDC using a 2D-to-1D transformation of 2D uncompressed data blocks (2DU) within LDM to generate 1D uncompressed data blocks (1DU). The 1DU is then compressed to generate a 1D compressed superblock (CSB) in LDM. This LDM CSB may then be written to EDM with a reduced number of EDM bus cycles. The system implements LDD using decompression of CSB data retrieved from EDM to generate a 1D decompressed data block (1DD) in LDM. A 1D-to-2D transformation is then applied to the LDM 1DD to generate a 2D decompressed data block (2DD) in LDM. This 2DD may then be operated on by a matrix compute engine (MCE) using a variety of function operators.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: April 13, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Arthur John Redfern, Dan Wang
  • Patent number: 10963177
    Abstract: A fingerprint trie is used to store fingerprints for data portions stored on a storage system for use in implementing data deduplication on a storage system. The fingerprint trie may be used to compare fingerprint values to determine duplicate data portions, for example, in response to I/O operations. Leaf nodes of the fingerprint trie may be keyed by fingerprints, and a value of each leaf node may be a reference to the physical storage location of the data portion from which the fingerprint was generated. When an I/O operation is received, a fingerprint may be generated for each of one or more data portions included in the I/O operation. A fingerprint trie may be searched, for example by traversing multiple nodes of the trie according to pointers provided by the nodes, to determine whether there is any matching fingerprint specified in the fingerprint trie.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: March 30, 2021
    Assignee: EMC IP Holding Company LLC
    Inventor: Sweetesh Singh
  • Patent number: 10877754
    Abstract: In an embodiment, a matrix computation engine is configured to perform matrix computations (e.g. matrix multiplications). The matrix computation engine may perform numerous matrix computations in parallel, in an embodiment. More particularly, the matrix computation engine may be configured to perform numerous multiplication operations in parallel on input matrix elements, generating resulting matrix elements. In an embodiment, the matrix computation engine may be configured to accumulate results in a result memory, performing multiply-accumulate operations for each matrix element of each matrix.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: December 29, 2020
    Assignee: Apple Inc.
    Inventors: Eric Bainville, Tal Uliel, Erik Norden, Jeffry E. Gonion, Ali Sazegari
  • Patent number: 10880551
    Abstract: Video quality analysis may be used in many multimedia transmission and communication applications, such as encoder optimization, stream selection, and/or video reconstruction. An objective VQA metric that accurately reflects the quality of processed video relative to a source unprocessed video may take into account both spatial measures and temporal, motion-based measures when evaluating the processed video. Temporal measures may include differential motion metrics indicating a difference between a frame difference of a plurality of frames of the processed video relative to that of a corresponding plurality of frames of the source video. In addition, neural networks and deep learning techniques can be used to develop additional improved VQA metrics that take into account both spatial and temporal aspects of the processed and unprocessed videos.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: December 29, 2020
    Assignee: FastVDO LLC
    Inventors: Pankaj N. Topiwala, Madhu Peringassery Krishnan, Wei Dai
  • Patent number: 10810281
    Abstract: An outer product multiplier (GPM) system/method that integrates compute gating and input/output circular column rotation functions to balance time spent in compute and data transfer operations while limiting overall dynamic power dissipation is disclosed. Matrix compute gating (MCG) based on a computation decision matrix (CDM) limits the number of computations required on a per cycle basis to reduce overall matrix compute cycle power dissipation. A circular column rotation vector (CRV) automates input/output data formatting to reduce the number of data transfer operations required to achieve a given matrix computation result. Matrix function operators (MFO) utilizing these features are disclosed and include: matrix-matrix multiplication; matrix-matrix and vector-vector point-wise multiplication, addition, and assignment; matrix-vector multiplication; vector-vector inner product; matrix transpose; matrix row permute; and vector-column permute.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: October 20, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Arthur John Redfern, Donald Edward Steiss, Mihir Narendra Mody, Tarek Aziz Lahlou
  • Patent number: 10761756
    Abstract: A technique for performing in-line compression includes receiving data into a data log that temporarily holds the data and aggregating the data into batches, where each batch includes multiple blocks of received data. For each batch of data, a storage system performs a compression operation, which proceeds block-by-block, compressing each block and comparing a total compressed size of all blocks compressed so far against a budget. The storage system increments the budget for successive blocks, such that a per-block budget is greater for a first block in the batch than it is for a last block in the batch, thus allowing earlier blocks to meet budget even if they are relatively incompressible.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: September 1, 2020
    Assignee: EMC IP Holding Company LLC
    Inventors: Ivan Bassov, Philippe Armangau, Yining Si
  • Patent number: 10764588
    Abstract: Techniques are disclosed for coding image data adaptively at different levels of downscaling. Such techniques may involve partitioning input data into pixel blocks for coding and performing content analysis on the pixel blocks. The pixel blocks may be input to block coders that operate at different pixel block sizes, which may code the pixel blocks input to them at their respective sizes. Except when a block coder operates at the partitioning size, block coders that operate at different pixel block sizes may perform downscaling of the pixel blocks to match their size with the block coders' respective coding size. A block decoder may invert the coding operations performed by the block coders, decoding coded image data at respective pixel block sizes, then upscaling decoded image data obtained therefrom to a common pixel block size. Image reconstruction may synthesize a resultant image from the decode pixel block data output by the decoders.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: September 1, 2020
    Assignee: APPLE INC.
    Inventors: Xiang Fu, Linfeng Guo, Haiyan He, Wei Li, Xu Gang Zhao, Hao Pan, Xiaohua Yang, Krishnakanth Rapaka, Munehiro Nakazato, Haitao Guo
  • Patent number: 10763893
    Abstract: A data compression system includes: (a) a data compression module that receives a sequence of input vectors and that provides a sequence of compressed vectors; (b) a data decompression module that receives the compressed vectors to provide a sequence of output vectors; and (c) a parameter update module that receives the sequence of input vectors and the sequence of output vectors, and which learns the data compression module and data decompression module based on evaluating a loss function of the input vectors, the output vectors, and the parameters controlling the compression module and the decompression module. Each input vector and its corresponding output vector may represent digitized time-domain signals (e.g., speech, audio or video signals) over a predetermined time period. The loss function may be evaluated for each of a sequence of predetermined time periods.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: September 1, 2020
    Inventor: Georges Harik
  • Patent number: 10638482
    Abstract: The choice of a transmit (Tx)-Receive (Rx) beam pair out of many available beam pairs between a base station and a millimeter wave (mmW)-capable UE is directly related to the performance of transmission between the base station and the UE. A method, apparatus, and computer-readable medium at a transmitting user equipment (UE) capable of (mmW) communication are disclosed to determine a new serving Tx-Rx beam pair using an artificial neural network. The UE may predict a set of good Tx-Rx beam pairs using the artificial neural network, wherein the artificial neural network comprises an input layer, a middle layer, and an output layer. The UE may then determine the new serving Tx-Rx beam pair based on the set of good Tx-Rx beam pairs.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: April 28, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Jun Zhu, Raghu Narayan Challa, Assaf Touboul, Junyi Li
  • Patent number: 10567458
    Abstract: A system and method are provided for use with streaming blocks of data, each of the streaming blocks of data including a number bits of data. The system includes a first compressor and a second compressor. The first compressor can receive and store a number n blocks of the streaming blocks of data, can receive and store a block of data to be compressed of the streaming blocks of data, can compress consecutive bits within the block of data to be compressed based on the n blocks of the streaming blocks of data, can output a match descriptor and a literal segment. The match descriptor is based on the compressed consecutive bits. The literal segment is based on a remainder of the number of bits of the data to be compressed not including the consecutive bits. The second compressor can compress the literal segment and can output a compressed data block including the match descriptor and a compressed string of data based on the compressed literal segment.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: February 18, 2020
    Assignee: Hughes Network Systems, LLC
    Inventors: Udaya Bhaskar, Chi-Jiun Su
  • Patent number: 10553413
    Abstract: A hardware module which operatively carries out a method of compressing mass spectral data, the method comprising: receiving a first signal output from an ion detector of a mass spectrometer; processing the first signal to a digital signal at an output being data frame types representative of the first signal output; temporarily storing the data frame types in a memory block and reading a data frame from the memory block and determining its data frame type and according to its data frame type compressing the data frame according to one or more compression algorithms to generate a compressed data output stream.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: February 4, 2020
    Assignee: MICROMASS UK LIMITED
    Inventors: Stephen John Platt, Keith George Richardson, David Darrell Williams, Richard Denny
  • Patent number: 10528641
    Abstract: A method for efficient transmission of coefficients examines a coefficient list, presents the coefficients as binary floating point representation, and transmits the list of coefficients as a header having an exponent prefix, a fractional suffix, and each coefficient value as an exponent suffix and fractional prefix. A method for reception of coefficients receives a header including an exponent prefix, a fractional suffix, thereafter receiving each value as a sign bit, an exponent suffix and a fractional prefix, reconstituting an approximation of the original value, in sequence, as a sign bit, exponent prefix exponent suffix, fraction prefix, and fraction suffix, thereby greatly reducing the amount of information to be transmitted or received.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: January 7, 2020
    Assignee: Redpine Signals, Inc.
    Inventor: Jay A. Chesavage
  • Patent number: 10516415
    Abstract: A method for compressing multiple original convolution parameters into a convolution operation chip includes steps of: determining a range of the original convolution parameters; setting an effective bit number for the range; setting a representative value, wherein the representative value is within the range; calculating differential values between the original convolution parameters and the representative value; quantifying the differential values to a minimum effective bit to obtain a plurality of compressed convolution parameters; and transmitting the effective bit number, the representative value and the compressed convolution parameters to the convolution operation chip.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: December 24, 2019
    Assignee: KNERON, INC.
    Inventors: Li Du, Yuan Du, Jun-Jie Su, Ming-Zhe Jiang
  • Patent number: 10419769
    Abstract: An image processing apparatus which compares a first frame rate of a first moving image and a second frame rate of a second moving image each moving image having temporal scalability, converts a temporal hierarchical structure of the second moving image, when the first frame rate is higher than the second frame rate, by copying and inserting a picture included in a first temporal layer of the second moving image into a second temporal layer of the second moving image, and when the first frame rate is lower than the second frame rate, by discarding a picture, of pictures belonging to temporal layers of the second moving image, which belongs to a temporal layer with a frame rate higher than the first frame rate, and combines the first moving image with the converted second moving image.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: September 17, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventor: Ryota Suzuki
  • Patent number: 10296556
    Abstract: A system and method for efficient sparse matrix processing are provided in one embodiment. A compressed representation of a sparse matrix, the sparse matrix including one or more non-zero entries in one or more of a plurality of portions of the matrix, is obtained by at least one server including one or more streaming multiprocessors, each of the streaming multiprocessors including one or more graphics processing unit (GPU) processor cores. Each of the portions are assigned into one of a plurality of partitions based on a number of the non-zero entries in that portion. For each of the partitions, a predefined number of the GPU processor cores are assigned for processing each of the portions assigned to that partition based on the numbers of the non-zero entries in the portions assigned to that partition. For each of the partitions, each of the portions associated with that partition are processed.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: May 21, 2019
    Assignee: Palo Alto Research Center Incorporated
    Inventor: Rong Zhou
  • Patent number: 10218764
    Abstract: Generating non-compressible data streams is disclosed, including: receiving an initialization parameter; determining a constrained prime number, wherein the constrained prime number comprises a plurality of component values, wherein each of the plurality of component values comprises a prime number, wherein each of the plurality of component values is different; and generating a non-compressible sequence based at least in part on the initialization parameter and the constrained prime number.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: February 26, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Salil Dangi, James Zarbock, Ernest Daza, Scott H. Ogata
  • Patent number: 10218381
    Abstract: A method for compressing flow data, including: generating multiple line segments according to flow data and a predefined maximum error that are acquired; obtaining a target piecewise linear function according to the multiple line segments, where the target piecewise linear function includes multiple linear functions, and an intersection set of value ranges of independent variables of every two linear functions among the multiple linear functions includes a maximum of one value; and outputting a reference data point according to the target piecewise linear function, where the reference data point includes a point of continuity and a point of discontinuity of the target piecewise linear function. In this way, a maximum error, a target piecewise linear function is further determined according to the multiple line segments, and a point of continuity and a point of discontinuity of the target piecewise linear function are used to represent compressed flow data.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: February 26, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Zhenguo Li, Ge Luo, Ke Yi, Wei Fan, Cheng He
  • Patent number: 10200060
    Abstract: Lossless content-aware compression and decompression techniques are provided for floating point data, such as seismic data. A minimum-length compression technique exploits an association between an exponent and a length of the significand, which corresponds to the position of the least significant bit of the significand. A reduced number of bits from the significand can then be stored. A prediction method is also optionally previously applied, so that residual values with shorter lengths are compressed instead of the original values. An alignment compression technique exploits repetition patterns in the floating point numbers when they are aligned to the same exponent. Floating point numbers are then split into integral and fractional parts. The fractional part is separately encoded using a dictionary-based compression method, while the integral part is compressed using a delta-encoding method.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: February 5, 2019
    Assignee: EMC IP Holding Company LLC
    Inventors: Angelo E. M. Ciarlini, Alex L. Bordignon, Rômulo Teixeira de Abreu Pinho, Edward José Pacheco Condori
  • Patent number: 10176976
    Abstract: The invention relates to an ion source (50) for generating elemental ions and/or ionized metal oxides from aerosol particles, comprising: a reduced pressure chamber (61) having an inside; an inlet (56) and a flow restricting device (60) for inserting the aerosol particles in a dispersion comprising the aerosol particles dispersed in a gas, in particular in air, into the inside of the reduced pressure chamber (61), the inlet (60) fluidly coupling an outside of the reduced pressure chamber (61) via the flow restricting device (60) with the inside of the reduced pressure chamber (60); a laser (62) for inducing in a plasma region (63) in the inside of the reduced pressure chamber (61) a plasma in the dispersion for atomizing and ionizing the aerosol particles to elemental ions and/or ionized metal oxides; wherein the reduced pressure chamber (61) is adapted for achieving and maintaining in the inside of the reduced pressure chamber (61) a pressure in a range from 0.01 mbar to 100 mbar.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: January 8, 2019
    Assignee: TOFWERK AG
    Inventor: Urs Rohner
  • Patent number: 10171835
    Abstract: A method of encoding a video data including a plurality of pictures includes storing data of at least one picture in the video data that is already encoded, and referring to the stored data and using intra-prediction to encode blocks in a current picture.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: January 1, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventor: Kazushi Sato
  • Patent number: 10122379
    Abstract: Methods and apparatus are provided for content-aware compression of data. An exemplary method comprises obtaining a plurality of floating point numbers each comprising a sign, an exponent at a given base and a significand; grouping a plurality of exponents of the plurality of floating point numbers using a transformation that provides a transformed exponent to reduce a number of distinct exponents in the plurality of floating point numbers to be encoded; and encoding the given floating point number by encoding the transformed exponent and the length of the given floating point number as a single class code. A substantially optimal number of output class codes that need to be encoded is optionally automatically selected. A linear prediction algorithm, such as a first derivative or a second derivative, is optionally applied to the floating point numbers to generate a prediction, wherein the first or second derivative is selected based on an analysis of the data to be compressed.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: November 6, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Angelo E. M. Ciarlini, Rômulo Teixeira de Abreu Pinho, Alex Laier Bordignon
  • Patent number: 10080028
    Abstract: A method of compensating for image compression errors is presented. The method comprises: receiving an image frame Fn during a frame period n, where n is a natural number; adding a compensation frame Cn to the image frame Fn to generate a compensated frame En; compressing the compensated frame En to generate a compressed frame CEn; decompressing the compressed frame CEn to generate a decompressed frame Dn; and subtracting the decompressed frame Dn from the compensated frame En to generate a next compensation frame Cn+1.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: September 18, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ning Lu, Dihong Tian
  • Patent number: 10037872
    Abstract: Systems for the generation of discovery ion currents. One of the systems includes a mass spectrometer providing ion current measurement. The system includes a controller coupled to the mass spectrometer. The system also includes a liquid handler coupled to the controller and the mass spectrometer. The controller is configured to identify a base average ion current of each mass to charge interval, the mass to charge interval comprising at least one mass to charge channel. The controller is configured to calculate a relative change between a current ion current measurement for a charge interval to the base average for the charge interval. The controller is configured to compare the relative change to a threshold. The controller is also configured to, in response to determining that the relative change exceeds the threshold, start fraction collection using the liquid handler.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: July 31, 2018
    Assignee: Advion Inc.
    Inventor: Lawrence Klecha