Abstract: An encoding scheme is provided for arithmetically encoding a sequence of information values into an arithmetic coded bitstream by providing the bitstream with entry point information, allowing for resuming arithmetic decoding of the bitstream from a predetermined entry point onward. A respective decoding scheme is also provided. These encoding and decoding schemes provide more efficient encoding in view of the decoding speed.

Abstract: Described techniques enable compression and decompression of sort keys during sort/merge operations. A winning offset code value may be received from a merge bracket used to merge a plurality of sorted sequences of sort keys by comparing pairs of the sort keys until a winning sort key is determined. The sort keys may be represented by corresponding offset code values determined from relative values of pairs of sort keys, and the winning offset code value represents the winning sort key of the merge bracket. A removed portion of the winning sort key may be determined from the winning offset code value. A reduction value characterizing a size of the removed portion may be determined, and, from the winning offset code value, a retained portion of the winning sort key to retain may be determined. The reduction value and the retained portion of the winning sort key may then be stored.

Abstract: A method for managing metadata blocks of file system entities (FSEs), the method includes (i) determining, by a processing circuit of a storage system, a stress level that is non-linearly dependent upon a fullness of static FSE metadata blocks and a fullness of dynamic FSE metadata blocks, wherein the static FSE metadata blocks store FSE metadata items of a first type and the dynamic FSE metadata blocks store FSE metadata items of a second type and additional FSE metadata items of a first type; (ii) determining, based on the stress level and a fullness parameter, a probability of applying a conditional compression process on a new FSE metadata block; and (iii) applying the conditional compression process, based on the probability, on the new FSE metadata block.

Abstract: A tree data structure that includes an exponential root node and a plurality of regular child nodes arranged in hierarchical levels is generated. A number of the hierarchical levels corresponds to a specified precision value. A numerical data value is received. The numerical data value is truncated according to the specified precision value to generate a truncated value. Portions of the truncated value are stored in the tree data structure by storing an exponent of the truncated value in the exponential root node, and storing each significant digit of the truncated value in a respective regular child node based on significance level. Statistical information is computed for each node storing a portion of the truncated value. The statistical information is provided in response to a query.

Abstract: A method includes receiving transform coefficients corresponding to a scaled video input signal, the scaled video input signal including a plurality of spatial layers that include a base layer. The method also includes determining a spatial rate factor based on a sample of frames from the scaled video input signal. The spatial rate factor defines a factor for bit rate allocation at each spatial layer of an encoded bit stream formed from the scaled video input signal. The spatial rate factor is represented by a difference between a rate of bits per transform coefficient of the base layer and an average rate of bits per transform coefficient. The method also includes reducing a distortion for the plurality of spatial layers by allocating a bit rate to each spatial layer based on the spatial rate factor and the sample of frames.

Abstract: An integrated circuit (IC) device includes processor circuitry configured to output a first memory command having a first memory address, and in-line error correction control (ILECC) circuitry configured to receive the first memory command and output the first memory command to a memory device. The ILECC circuitry includes an error correction code (ECC) cache configured to store a first local ECC associated with the first memory command in a first cache line.

Abstract: An electronic device is provided. The electronic device includes a storage, and a processor configured to execute a storage device manager function, when the storage device manager function is executed, check a free space on a file system, as a result of the checking of the free space, determine whether the free space of the storage is less than or equal to a first reference ratio, when the free space of the storage is less than or equal to the first reference ratio, select and compress data having a use frequency less than or equal to a predetermined use frequency, manage the compressed data by using a list, and reserve and process a block secured by the compression on the file system.

Abstract: A system and method for extracting data from a received fax from a medical provider and matching it with a corresponding preauthorization record using modeling techniques. A received fax is converted into text via OCR, relevant keys are extracted from the text using modeling techniques and differential probabilities are calculated for each key that are then compared to the candidate preauthorization records using logistic regression models to find the most probable matching candidate records. Candidate record matches are ranked by matching probability and the highest ranked candidate record is considered the matching record to the received fax.

Abstract: The quality of decompressed data that was compressed in a lossy manner to generate lossy compressed data, is improved. Lossy compressed data may be generated at a device and transmitted to a gateway. The gateway includes a reconstruction engine that is trained to reduce the compression loss by generating a learned residue. The residue is added to the lossy decompressed data to generated corrected decompressed data that has a smaller loss than the lossy decompressed data.

Abstract: A method performed by at least one processor in a decoder includes receiving a coded video bitstream that includes a compressed two dimensional (2D) mesh corresponding to a surface of three dimensional (3D) volumetric object. The method further includes predicting a current vertex included in the compressed 2D mesh based on an interpolation-based hierarchical prediction scheme that uses at least one sampled vertex included in the compressed 2D mesh. The method further includes deriving a prediction residual associated with the predicted current vertex. The method further includes reconstructing a boundary vertex associated with the 3D volumetric object based on the predicted current vertex and the derived prediction residual.

Abstract: An integrated circuit includes a compression accelerator to process a request from software to compress source data into an output file. The compression accelerator includes early-abort circuitry to provide for early abort of compression operations. In particular, the compression accelerator uses a predetermined sample size to compute an estimated size for a portion of the output file. The sample size specifies how much of the source data is to be analyzed before computing the estimated size. The compression accelerator also determines whether the estimated size reflects an acceptable amount of compression, based on a predetermined early-abort threshold. The compression accelerator aborts the request if the estimated size does not reflect the acceptable amount of compression. The compression accelerator may complete the request if the estimated size reflects the acceptable amount of compression. Other embodiments are described and claimed.

Abstract: The present disclosure relates to methods, apparatus, systems, and non-transitory computer-readable storage media for video coding using an implicit video frame output process. According to some examples, a computer-implemented method includes receiving a video at a content delivery service; encoding, by the content delivery service, the video into an encoded video; generating, by the content delivery service, at least one open bitstream unit from the encoded video according to a video coding format that does not utilize a show existing frame syntax element set to one to indicate a frame in a reference picture buffer of a decoder is to be displayed; and transmitting the at least one open bitstream unit from the content delivery service to the decoder.

Abstract: In accordance with an embodiment, a video flow transmission method includes: the generating, by an image sensor, a video flow comprising first and second images; hashing, by the image sensor, a portion of the first image based on a first hashing configuration to generate a first hash value, the first hashing configuration defining first positions of pixels to be hashed; hashing, by the image sensor, a portion of the second image based on a second hashing configuration to generate a second hash value, the second hashing configuration being different from the first configuration and defining second positions of pixels to be hashed; and transmitting, by the image sensor, the first and second images, and the first and second hash values, to a second device.

Abstract: A system and method provide extractions of regions of interest from images hand annotated by reviewers by lifting annotations from images, filtering out text labels, reconstructing continuous closed boundaries, and marking the contained region.

Abstract: Innovations in syntax and semantics of coded picture buffer removal delay (“CPBRD”) values potentially simplify splicing operations. For example, a video encoder sets a CPBRD value for a current picture that indicates an increment value relative to a nominal coded picture buffer removal time of a preceding picture in decoding order, regardless of whether the preceding picture has a buffering period SEI message. The encoder can signal the CPBRD value according to a single-value approach in which a flag indicates how to interpret the CPBRD value, according to a two-value approach in which another CPBRD value (having a different interpretation) is also signaled, or according to a two-value approach that uses a flag and a delta value. A corresponding video decoder receives and parses the CPBRD value for the current picture. A splicing tool can perform simple concatenation operations to splice bitstreams using CPBRD value for the current picture.

Abstract: One example includes an integrated circuit (IC). The IC includes non-volatile memory and logic. The logic is configured to receive repair code associated with a memory instance and assign a compression parameter to the repair code based on a configuration of the memory instance. The logic is also configured to compress the repair code based on the compression parameter to produce compressed repair code and to provide compressed repair data that includes the compressed repair code and compression control data that identifies the compression parameter. A non-volatile memory controller is coupled between the non-volatile memory and the logic. The non-volatile memory controller is configured to transfer the compressed repair data to and/or from the non-volatile memory.

Abstract: Increasing index search efficiency and availability in a database is provided. An index space matrix corresponding to a plurality of mini-indices of the database is built using ordered boundary values that correspond to key value ranges of each respective mini-index to increase index search efficiency by removing redundant mini-index accesses. Mini-indices of the plurality of mini-indices are consolidated asynchronously without suspending access to the mini-indices using a particular consolidation policy of a plurality of consolidation policies that corresponds to an amount of key value overlap identified between the mini-indices. Data operations corresponding to transactions are performed using the index space matrix during consolidation of the mini-indices without suspending access to the mini-indices.

Abstract: An operating method of a storage controller includes receiving a permanent write protection command; checking a distribution of first data included in a target namespace corresponding to the permanent write protection command; setting at least one memory region as a protected memory region, based on at least one metric corresponding to each of a plurality of non-volatile memory devices; and migrating at least a portion of the first data, which is stored in a remaining memory region different from the protected memory region, to the protected memory region.

Abstract: Provided is an apparatus comprising: an image acquisition unit configured to acquire a captured image; a compression unit configured to compress a captured image to generate compressed data; a reproduction unit configured to generate, from the compressed data, a reproduced image that reproduces the captured image; an evaluation acquisition unit configured to acquire an evaluation corresponding to a degree of approximation between the reproduced image and the captured image; and a learning processing unit configured to perform learning processing of a model configured to output, in response to an input of a new captured image, a compression parameter value to be applied in compression of the captured image, by using learning data including the evaluation, a captured image corresponding to the evaluation, and a compression parameter value applied in compression of the captured image.

Abstract: A model (e.g., mechanical computer-aided design (MCAD) model) representing an assembly is displayed in a graphical user interface (GUI). The assembly contains at least a first body and a second body. The physics type of the model is determined in response to an assignment of a physics condition to the first body and/or the second body. Contact-pairs are detected in the model according to the determined physics type. The GUI is updated to indicate where the contact-pairs are located in the model for revision of the contact-pairs. Markers are shown in the GUI to represent corresponding contact-pairs. Markers are logically separated from bodies and faces in the model. The revision of the contact-pairs can be managed with a filtering mechanism either by bodies/faces or by markers.

Abstract: Verifying the correctness of a leading zero counter, including: generating, based on an input value comprising a plurality of digits, a first bit vector, wherein each entry of the first bit vector indicates whether a corresponding digit of the input value is equal to zero; calculating, based on the first bit vector, a leading zero count for the input value; generating a bit mask comprising a number of leading ones equal to the leading zero count; generating a second bit vector comprising a one at a same index as a first occurring zero in the bit mask; and verifying the leading zero count based on the first bit vector and one or more of the bit mask and the second bit vector.

Abstract: In one embodiment, a method determines an encoded plurality of layers for a scalable video stream for a video where each of the plurality of layers includes a respective layer parameter setting. An additional layer for the plurality of layers is determined where the additional layer enhances a base layer in the plurality of layers and the respective layer parameter settings for the encoded plurality of layers do not take into account the additional layer. The method then determines an additional layer parameter setting for the additional layer. The additional layer parameter setting specifies a relationship between the additional layer and at least a portion of the plurality of layers where the additional layer parameter setting is used to decode the additional layer and the at least a portion of the plurality of layers.

Abstract: A method includes receiving transform coefficients corresponding to a scaled video input signal, the scaled video input signal including a plurality of spatial layers that include a base layer. The method also includes determining a spatial rate factor based on a sample of frames from the scaled video input signal. The spatial rate factor defines a factor for bit rate allocation at each spatial layer of an encoded bit stream formed from the scaled video input signal. The spatial rate factor is represented by a difference between a rate of bits per transform coefficient of the base layer and an average rate of bits per transform coefficient. The method also includes reducing a distortion for the plurality of spatial layers by allocating a bit rate to each spatial layer based on the spatial rate factor and the sample of frames.

Abstract: A processor may identify one or more data fields of interest. The processor may receive data for each of the data fields of interest. The processor may compute one or more bias scores for the data fields of interest based on the data. The processor may develop a bias matrix with the bias scores. The processor may display the bias matrix to a user.

Abstract: A matrix compression/decompression accelerator (MCA) system/method that coordinates lossless data compression (LDC) and lossless data decompression (LDD) transfers between an external data memory (EDM) and a local data memory (LDM) is disclosed. The system implements LDC using a 2D-to-1D transformation of 2D uncompressed data blocks (2DU) within LDM to generate 1D uncompressed data blocks (1DU). The 1DU is then compressed to generate a 1D compressed superblock (CSB) in LDM. This LDM CSB may then be written to EDM with a reduced number of EDM bus cycles. The system implements LDD using decompression of CSB data retrieved from EDM to generate a 1D decompressed data block (1DD) in LDM. A 1D-to-2D transformation is then applied to the LDM 1DD to generate a 2D decompressed data block (2DD) in LDM. This 2DD may then be operated on by a matrix compute engine (MCE) using a variety of function operators.

Abstract: Embodiments of the present disclosure include techniques storing and retrieving data. In one embodiment, sub-matrices of data are stored as row slices and column slices. A fetch circuit determines if particular slices of one sub-matrix, when combined with corresponding slices of another sub-matrix, produce a zero result and need not be retrieved. In another embodiment, the present disclosure includes a memory circuit comprising memory banks and sub-banks. The sub-banks store slices of sub-matrices. A request moves between serially configured memory banks and slices in different sub-banks may be retrieved at the same time.

Abstract: A recording medium stores an information processing program for managing a plurality of storage devices and a plurality of servers. The program causes a computer to execute a process including: while changing a compression ratio setting, obtaining an actual compression ratio by using some of data pieces to be used by the plurality of servers and a decompression rate at which the servers decompress a compressed dataset in which the some data pieces are compressed; and determining the compression ratio setting to be used based on a maximum total bandwidth of the plurality of storage devices and a number of the plurality of servers by using the obtained actual compression ratio and the decompression rate for each of the compression ratio settings.

Abstract: According to an example method, a system receives first data representing a polygon mesh. The polygon mesh includes a plurality of interconnected vertices forming a plurality of triangles. The system generates second data representing the polygon mesh. Generating the second data includes traversing the vertices of the polygon mesh according to a traversal order, partitioning the plurality of triangles into a set of ordered triangle groups in accordance with the traversal order, and encoding, in the second data, the set of ordered triangle groups. The system outputs the second data. A position each of the vertices in the transversal order is determined based on (i) a number of previously encoded triangles that are incident to that vertex, and/or (ii) a sum of one or more angles formed by the previously encoded triangles that are incident to that vertex.

Abstract: A method for storage system data aware compression, the method may include pre-compressing data units received by the storage system, by different pre-compression units to provide different pre-compressed versions of the data units; wherein the different pre-compression schemes are associated with different compression schemes, wherein at least some of the different compression schemes are data type specific compression schemes; calculating entropies of the different pre-compressed versions; and selecting a compression scheme out of the different compression schemes based on the entropies of the different pre-compressed versions.

Abstract: An integrated circuit including a plurality of processing components to process image data of a plurality of image frames, wherein each image frame includes a plurality of stages. Each processing component includes a plurality of execution pipelines, wherein each pipeline includes a plurality of multiplier-accumulator circuits configurable to perform multiply and accumulate operations using image data and filter weights, wherein: (i) a first processing component is configured to process all of the data associated with a first plurality of stages of each image frame, and (ii) a second processing component of the plurality of processing components is configured to process all of the data associated with a second plurality of stages of each image frame. The first and second processing component processes data associated with the first and second plurality of stages, respectively, of a first image frame concurrently.

Abstract: A microprocessor system includes a processing circuit and a memory operably coupled to the processing circuit and configured to receive input data according to a pack and store operation and output the data according to a load and unpack operation. The processing circuit comprises a hardware extension configured to: configure a variable number of bits per data element during a pack and store operation; store a concatenation of a plurality of data elements with a reduced number of bits; extract a plurality of data elements with a reduced number of bits during a load and unpacking operation; and recreate a plurality of data elements with an increased number of bits per data element representative of the data elements prior to the pack and store operation.

Abstract: One example includes an integrated circuit (IC). The IC includes non-volatile memory and logic. The logic is configured to receive repair code associated with a memory instance and assign a compression parameter to the repair code based on a configuration of the memory instance. The logic is also configured to compress the repair code based on the compression parameter to produce compressed repair code and to provide compressed repair data that includes the compressed repair code and compression control data that identifies the compression parameter. A non-volatile memory controller is coupled between the non-volatile memory and the logic. The non-volatile memory controller is configured to transfer the compressed repair data to and/or from the non-volatile memory.

Abstract: There is provided a method and apparatus for remote differential compression (RDC) and data deduplication. According to embodiments, when a sending device acquires a new target file, the following steps are performed. Initially, Jaccard segmentation is performed, followed by performing identity-based segment deduplication and similarity-based segment deduplication. The transmission of the target file in the deduplicated form to the recipient device is subsequently performed. The recipient device can then rebuild the original target file from the deduplicated form thus replicating the target file at the recipient device with the target file originally present at the sending device.

Abstract: In one embodiment, a processor of a computing device receives a query. The computing device may compare a centroid of each of a plurality of clusters to the query such that a subset of the plurality of clusters is selected, each of the plurality of clusters having a set of data points. An assignment of the subset of the plurality of clusters may be communicated to a hardware accelerator of the computing device. A plurality of threads of the hardware accelerator of the computing device may generate one or more distance tables that store results of intermediate computations corresponding to the query and the subset of the plurality of clusters. The distance tables may be stored in shared memory of the hardware accelerator. A plurality of threads of the hardware accelerator may determine a plurality of data points using the distance tables. The processor may provide query results pertaining to at least a portion of the plurality of data points.

Abstract: A method includes receiving transform coefficients corresponding to a scaled video input signal, the scaled video input signal including a plurality of spatial layers that include a base layer. The method also includes determining a spatial rate factor based on a sample of frames from the scaled video input signal. The spatial rate factor defines a factor for bit rate allocation at each spatial layer of an encoded bit stream formed from the scaled video input signal. The spatial rate factor is represented by a difference between a rate of bits per transform coefficient of the base layer and an average rate of bits per transform coefficient. The method also includes reducing a distortion for the plurality of spatial layers by allocating a bit rate to each spatial layer based on the spatial rate factor and the sample of frames.

Abstract: A dynamic data transmission format adjustment method is provided. Firstly, a peripheral device raw input data is acquired from a device main body of a wireless peripheral device. Then, the peripheral device raw input data is converted into a variable-bit-length peripheral device transmission data according to a dynamic data transmission format conversion rule. Then, a network transmission packet containing the variable-bit-length peripheral device transmission data is generated, and the network transmission packet is transmitted to a wireless receiver of the wireless peripheral device. Then, the variable-bit-length peripheral device transmission data in the network transmission packet is converted and restored into a fixed-bit-length peripheral device transmission data according to the dynamic data transmission format conversion rule. Then, the fixed-bit-length peripheral device transmission data is transmitted from the wireless receiver to a computer host.

Abstract: Accordingly the embodiments herein provide a method for adaptive data transfer in a memory system (140), the method comprising: receiving at least one of a data copy request and a data transfer request to perform at least one of a data copy and a data transfer form a first memory subsystem (142) to a second memory subsystem (144). Configuring the memory system (140) in one of a first memory mode and a second memory mode based on a time required to perform at least on of data transfer and data transfer from the first memory subsystem (142) to the second memory subsystem (144) using an enhanced system model and performing at least one of data transferring and data copying from the first memory subsystem (142) to the second memory subsystem (144) in one of the first configured memory mode and the second configured memory mode.

Abstract: A deep neural network (“DNN”) module compresses and decompresses neuron-generated activation data to reduce the utilization of memory bus bandwidth. The compression unit receives an uncompressed chunk of data generated by a neuron in the DNN module. The compression unit generates a mask portion and a data portion of a compressed output chunk. The mask portion encodes the presence and location of the zero and non-zero bytes in the uncompressed chunk of data. The data portion stores truncated non-zero bytes from the uncompressed chunk of data. A decompression unit receives a compressed chunk of data from memory in the DNN processor or memory of an application host. The decompression unit decompresses the compressed chunk of data using the mask portion and the data portion.

Abstract: Methods and apparatuses for encoding and decoding an intra prediction mode of a prediction unit of a chrominance component based on an intra prediction mode of a prediction unit of a luminance component are provided. When an intra prediction mode of a prediction unit of a luminance component is the same as an intra prediction mode in an intra prediction mode candidate group of a prediction unit of a chrominance component, reconstructing the intra prediction mode candidate group of the prediction unit of the chrominance component by excluding or replacing an intra prediction mode of the prediction unit of the chrominance component which is same as an intra prediction mode of the prediction unit of the luminance component from the intra prediction mode candidate group, and encoding the intra prediction mode of the prediction unit of the chrominance component by using the reconstructed intra prediction mode candidate group.

Abstract: It is configured to include a video signal compression unit that compresses a video signal for displaying, on an image inspection monitor, an image inspection screen including a first area for displaying a medical image and a second area for displaying information other than the medical image, and a transmitting unit that transmits, via a communication network, the video signal having been compressed, and the video signal compression unit compresses, in each frame of the video signal, the second area of the image inspection screen at a compression rate higher than a compression rate of the first area.

Abstract: Enhanced techniques for communicating with an integrated circuit chip card are disclosed. An integrated circuit chip card may include a processor, a memory storing a plurality applications executable by the processor, an input/output (I/O) interface, and a network interface coupled to the (I/O) interface. The network interface may implement a plurality of logical ports, and the network interface can be configurable to select between multiple communication protocols to communicate with an external device in a socket communication mode. The network interface can be configured to establish a plurality of communication channels between the external device the integrated circuit chip card using the plurality of logical ports, and each of the communication channels may support communication with one of the plurality of applications.

Abstract: Data encoded in multiple languages, such as single byte languages and multi-byte languages, may be generated and stored in a single indexable information/data profile in a database. The information/data profile may comprise indexable information/data fields configured for storing information/data in a standardized language encoding and non-indexable information/data fields configured for storing information/data in a language different from the standardized language. The standardized language may be generated by translating the information/data stored in the non-indexable information/data fields to enable indexing of the entire information/data profile. The information/data profile may be utilized to generate various information/data outputs, such as shipping labels including at least one of the standardized language or the other language while enabling the information/data profile to be indexed based at least in part on the standardized language.

Abstract: Approaches in accordance with various embodiments provide for the processing of sparse matrices for mathematical and programmatic operations. In particular, various embodiments enforce sparsity constraints for performing sparse matrix multiply-add instruction (MMA) operations. Deep neural networks can exhibit significant sparsity in the data used in operations, both in the activations and weights. The computational load can be reduced by excluding zero-valued data elements. A sparsity constraint is applied across all submatrices of a sparse matrix, providing fine-grained structured sparsity that is evenly distributed across the matrix. The matrix may then be compressed since a minimum number of elements of the matrix are known to have zero value. Matrix operations are then performed using these matrices.

Abstract: The disclosure is directed at a method of data compression using inferred data. By determining the number of leading zeroes for each data structure, a general header presenting all leading zeros can be generated and use to compress the data.

Abstract: A method for compressing a quantum state vector includes: aggregating a group of several neighboring states of the vector into a cluster of states of the vector, a parameter representative of the probability of this cluster being associated with it and corresponding to the sum of the probabilities of the aggregated neighboring states in this cluster, the probability of each aggregated neighboring state being below a given aggregation threshold, and/or the sum of the probabilities of the aggregated neighboring states in a cluster being below another given aggregation threshold; and preserving a state of the vector not aggregated in a cluster, the parameter representative of its probability remaining unchanged. The method includes several steps of aggregating several distinct groups of several neighboring states of the vector, respectively into several clusters of states of the vector, and/or an aggregation step and a preservation step.

Abstract: A specification of an operation to perform one or more element-wise sums of specified portions of a matrix is received. The specification of the operation is analyzed to select a type of processing load partitioning to be applied. Based on the selected type of processing load partitioning to be applied, processing required to perform the operation is partitioned across a plurality of physical processing elements in parallel. The partitioned processing is distributed to the physical hardware processing elements to perform in parallel the element-wise sums of the specified portions of the matrix.

Abstract: A matrix compression/decompression accelerator (MCA) system/method that coordinates lossless data compression (LDC) and lossless data decompression (LDD) transfers between an external data memory (EDM) and a local data memory (LDM) is disclosed. The system implements LDC using a 2D-to-1D transformation of 2D uncompressed data blocks (2DU) within LDM to generate 1D uncompressed data blocks (1DU). The 1DU is then compressed to generate a 1D compressed superblock (CSB) in LDM. This LDM CSB may then be written to EDM with a reduced number of EDM bus cycles. The system implements LDD using decompression of CSB data retrieved from EDM to generate a 1D decompressed data block (1DD) in LDM. A 1D-to-2D transformation is then applied to the LDM 1DD to generate a 2D decompressed data block (2DD) in LDM. This 2DD may then be operated on by a matrix compute engine (MCE) using a variety of function operators.

Abstract: A fingerprint trie is used to store fingerprints for data portions stored on a storage system for use in implementing data deduplication on a storage system. The fingerprint trie may be used to compare fingerprint values to determine duplicate data portions, for example, in response to I/O operations. Leaf nodes of the fingerprint trie may be keyed by fingerprints, and a value of each leaf node may be a reference to the physical storage location of the data portion from which the fingerprint was generated. When an I/O operation is received, a fingerprint may be generated for each of one or more data portions included in the I/O operation. A fingerprint trie may be searched, for example by traversing multiple nodes of the trie according to pointers provided by the nodes, to determine whether there is any matching fingerprint specified in the fingerprint trie.

Abstract: Video quality analysis may be used in many multimedia transmission and communication applications, such as encoder optimization, stream selection, and/or video reconstruction. An objective VQA metric that accurately reflects the quality of processed video relative to a source unprocessed video may take into account both spatial measures and temporal, motion-based measures when evaluating the processed video. Temporal measures may include differential motion metrics indicating a difference between a frame difference of a plurality of frames of the processed video relative to that of a corresponding plurality of frames of the source video. In addition, neural networks and deep learning techniques can be used to develop additional improved VQA metrics that take into account both spatial and temporal aspects of the processed and unprocessed videos.

Abstract: In an embodiment, a matrix computation engine is configured to perform matrix computations (e.g. matrix multiplications). The matrix computation engine may perform numerous matrix computations in parallel, in an embodiment. More particularly, the matrix computation engine may be configured to perform numerous multiplication operations in parallel on input matrix elements, generating resulting matrix elements. In an embodiment, the matrix computation engine may be configured to accumulate results in a result memory, performing multiply-accumulate operations for each matrix element of each matrix.