Abstract: An apparatus includes a tensor compute cluster having a plurality of tensor compute units to process a plurality of sub-feature maps in a machine learning application and a tensor memory cluster having a plurality of tensor feature map memory units to store the plurality of sub-feature maps. The apparatus also includes circuitry to partition an input feature map into the plurality of sub-feature maps such that sparsity in each of the plurality of sub-feature maps satisfies a predetermined threshold, and assign each of the plurality of sub-feature maps to one of the plurality of tensor compute units and one of the plurality of tensor feature map memory units for processing in parallel.

Abstract: Systems, methods, and computer program products are provided for reducing the size of image level backups. An example method receives backup parameters identifying a physical or Virtual Machine (VM) to backup and at least one file system object to include in the backup. The method connects to production storage corresponding to the selected physical or virtual machine and obtains access to data stored in disk corresponding to the selected file system object(s). The method fetches file allocation table (FAT) blocks from the disk and parses contents of the FAT blocks to determine if the disk blocks correspond to the selected file system object(s). The method creates a backup disk image FAT comprising blocks corresponding to the selected file system object(s). The method creates a reconstructed disk image FAT blocks corresponding to the backup FAT and disk image data blocks belonging to the selected file system object(s) and all other disk image data blocks are saved as zero blocks.

Abstract: Methods to strengthen the cyber-security and privacy in a proposed deterministic Internet of Things (IoT) network are described. The proposed deterministic IoT consists of a network of simple deterministic packet switches under the control of a low-complexity ‘Software Defined Networking’ (SDN) control-plane. The network can transport ‘Deterministic Traffic Flows’ (DTFs), where each DTF has a source node, a destination node, a fixed path through the network, and a deterministic or guaranteed rate of transmission. The SDN control-plane can configure millions of distinct interference-free ‘Deterministic Virtual Networks’ DVNs) into the IoT, where each DVN is a collection of interference-free DTFs. The SDN control-plane can configure each deterministic packet switch to store several deterministic periodic schedules, defined for a scheduling-frame which comprises F time-slots. The schedules of a network determine which DTFs are authorized to transmit data over each fiber-optic link of the network.

Abstract: A technique for managing access to a micro engine, the method comprising: determining that a virtual function “VF”) is to be given access to direct communication with a micro engine; in response to the determining, configuring the micro engine to accept direct communication from the VF; monitoring for unpermitted communication; and after a time period has expired, configuring the micro engine to no longer accept direct communication from the VF.

Abstract: A method for execution by a computing device of a storage network for transferring data includes detecting a shutdown associated with a local flash memory of the storage network. The method further includes determining whether to transfer encoded data slices stored in the local flash memory, wherein a plurality of data segments are dispersed storage error encoded in accordance with distributed data storage parameters to produce pluralities of sets of encoded data slices that include the encoded data slices. When determining to transfer, the method includes determining a group of encoded data slices stored in the local flash memory to transfer, determining at least one storage location for storage of the group of encoded data slices, transferring the group of encoded data slices to the at least one storage location and outputting a transfer message indicating that the group of encoded data slices has been transferred.

Abstract: Methods, apparatus, and processor-readable storage media for automated code checking are provided herein. An example method includes identifying at least one test related to code of a repository that is affected by a commit operation; in response to determining that an existing job in a first database includes the at least one test: updating a configuration of the existing job based on the affected code, and executing the existing job with the updated configuration; and in response to determining that an existing job in the first database does not include the at least one test: determining that a previously executed job from a second database includes the at least one test, updating the configuration of the previously executed job based on the affected code to create a new job, adding the new job to the first database, and executing the new job.

Abstract: Certain tasks related to processing layer 7 (L7) data streams, such as HTTP data streams, can be performed by an L7 assist circuit instead of by general-purpose CPUs. The L7 assist circuit can normalize URLs, Huffman decode, Huffman encode, and generate hashes of normalized URLs. A L7 data stream, which is reassembled from received network packets, includes an L7 header. L7 assist produces an augmented L7 header that is added to the L7 data stream. The CPUs can use the augmented L7 header, thereby speeding up processing. On the outbound path, L7 assist can remove the augmented L7 header and perform Huffman encoding such that the CPUs can perform other tasks.

Abstract: Technologies are disclosed for migrating large amounts of data objects, e.g., billions of data objects, from a distributed data store to another data store or computing device. A method includes generating an inventory of the data objects in the distributed data store and dividing the inventory into multiple listings of data objects. Each data object is identified in only one corresponding listing. Manifests are generated based upon the listings. Each manifest is assigned to a corresponding portable storage device of a plurality of portable storage devices, and the data objects and listings are transferred, based at least in part, upon the manifests to the plurality of portable storage devices. The inventory of the data objects and the plurality of portable storage devices are provided to an entity associated with the another data store or computing device. The data objects are transferred from the plurality of portable storage devices to the another data store or computing device using the inventory.

Abstract: Each server stores metadata for managing a volume having a logical block mapped to physical blocks of storage devices, and provides a compute host with the volume according to the metadata. A computer system calculates the metadata amount, which is the data amount of the metadata of the volume, for each volume, determines a migration target volume from the volumes based on each metadata amount, and performs volume migration that transfers the computer node that provides the compute host with the migration target volume to a migration destination computer node.

Abstract: The transmission of data on computer networks according to one or more policies is disclosed. A policy may specify, among other things, various parameters which are to be followed when transmitting initiating network traffic. Multiple network interfaces may be installed on a server to enable transmission of data from the single server according a number of discrete configuration settings implicated by the various policies. The multiple network interfaces may correspond to separate physical components, with each component configured independently to implement a feature of a policy. The multiple network interfaces may also correspond to a single physical component that exposes multiple network interfaces, both to the network and to the server on which it is installed.

Abstract: Systems, methods, and computer program products are provided for reducing the size of image level backups. An example method receives backup parameters identifying a physical or Virtual Machine (VM) to backup and at least one file system object to include in the backup. The method connects to production storage corresponding to the selected physical or virtual machine and obtains access to data stored in disk corresponding to the selected file system object(s). The method fetches file allocation table (FAT) blocks from the disk and parses contents of the FAT blocks to determine if the disk blocks correspond to the selected file system object(s). The method creates a backup disk image FAT comprising blocks corresponding to the selected file system object(s), The method creates a reconstructed disk image FAT blocks corresponding to the backup FAT and disk image data blocks belonging to the selected file system object(s) and all other disk image data blocks are saved as zero blocks.

Abstract: Methods to strengthen the cyber-security and privacy in a proposed deterministic Internet of Things (IoT) network are described. The proposed deterministic IoT consists of a network of simple deterministic packet switches under the control of a low-complexity ‘Software Defined Networking’ (SDN) control-plane. The network can transport ‘Deterministic Traffic Flows’ (DTFs), where each DTF has a source node, a destination node, a fixed path through the network, and a deterministic or guaranteed rate of transmission. The SDN control-plane can configure millions of distinct interference-free ‘Deterministic Virtual Networks’ (DVNs) into the IoT, where each DVN is a collection of interference-free DTFs. The SDN control-plane can configure each deterministic packet switch to store several deterministic periodic schedules, defined for a scheduling-frame which comprises F time-slots. The schedules of a network determine which DTFs are authorized to transmit data over each fiber-optic link of the network.

Abstract: Methods, systems, and apparatuses for remote well logging. Methods include conducting, with a plurality of remote well operation control hosts operating on corresponding remote well logging data acquisition management systems, a well logging operation using a well logging system at a logging site, wherein the well logging system includes a conveyance device having disposed thereon a first logging instrument and a second logging instrument; operating the first logging instrument responsive to at least one well-logging command from a first remote well operation control host of the plurality; and operating the second logging instrument responsive to at least one well-logging command from a second remote well operation control host of the plurality different than the first. Methods include transmitting a virtual presence feed associated with a logging site supervisor from the logging site to at least one of the corresponding remote well logging data acquisition management systems.

Abstract: Systems and methods for operating a vehicle that may be driven to or sold in different geographical locations that may have different engine emissions and fuel economy standards are described. The systems and methods may adjust vehicle operation to comply with standards that may be enforced where the vehicle is geographically located. The standards may apply to countries, treaty zones, race track areas, off-road areas, and other geographically related standards.

Abstract: The disclosure relate to detecting performance regressions in software used to control autonomous vehicles. For instance, a simulation may be run using a first version of the software. While the simulation is running, CPU and memory usage by one or more functions of the first version of the software may be sampled. The sampled CPU and memory usage may be compared to CPU or memory usage by each of the one or more functions in a plurality of simulations each running a corresponding second version of the software. Based on the comparisons, an anomaly corresponding to a performance regression in the first version of the software relating to one of the one or more functions may be identified. In response to detecting the anomaly, the first version of the software and the one of the one or more functions may be flagged for review.

Abstract: Devices, computer-readable media, and methods for selecting a type of transmission for an immersive visual stream based upon a latency estimate. For instance, a processing system including at least one processor may obtain a latency estimate for an immersive visual stream, determine whether the latency estimate exceeds a latency threshold for selecting a type of transmission for the immersive visual stream, and select the type of transmission for the immersive visual stream from among a field of view restricted type of transmission and a field of view plus out of scene type of transmission based upon the determining. When the latency estimate is determined to not exceed the latency threshold, the field of view restricted type of transmission is selected. When the latency estimate is determined to exceed the latency threshold, the field of view plus out of scene type of transmission is selected.

Abstract: Systems and methods disclosed herein provide a mechanism for synchronizing comments to an electronic document across platforms. In some embodiments, a cloud storage server may receive an electronic document uploaded from a user device, and save the electronic document in its native format at the server without converting the document to a different format. When the user device attempts to access the document remotely, the cloud storage server may present the document in its native format to the user device so that a user may edit the document in the native format without downloading the document to the local drive. For example, the user can add a comment in a structure that is specific to the native application format without locally installing the native application on the user device. The cloud storage server may in turn incorporate the comment into the document for display in real time.

Abstract: Apparatuses for performing combination logic operations with an combination logic circuit are disclosed. According to one embodiment, the apparatus comprises a first-in-first-out stage comprising an combination logic circuit, a input ring counter circuit coupled to the first-in-first-out stage and configured to selectively provide a push signal to the first-in-first-out stage, and a output ring counter circuit coupled to the first-in-first-out stage and configured to selectively provide a pop signal to the first-in-first-out stage, wherein the first-in-first-out stage is configured to perform calculations on input data with the combination logic circuit to generate output data responsive to receiving the push signal and to provide the output data based on the calculations responsive to receiving the pop signal.

Abstract: A method of accessing data in a non-volatile memory device is disclosed. The method includes serially receiving a command having an address in a virtual address space. When the address maps to the buffer in memory, the address may be matched to the address to one of a plurality of segments in buffer memory. Data may be moved from internal EEPROM/Flash memory to a segment of the plurality of segments of the buffer memory for an address range in the virtual address space that is likely to be read. A physical address may be generated within the buffer memory based on the address. Data may be fetched in the buffer memory based on the generated address and then a response for the command may be transmitted that includes the fetched data.

Abstract: A transmission device includes a converter and a transmitter. The converter converts a plurality of link symbols in DisplayPort (DP) into a data block in Gen 2 in Universal Serial Bus (USB). The transmitter transmits the data block.

Abstract: Various examples of the present technology provide systems and methods for monitoring an AC power to a computing system, generating a power failure signal when the AC power is determined abnormal, and cause one or more components of the computing system to be switched to a low power mode or shut down to reduce power consumption of the computing system. In particular, the various embodiments of the present technology provide a method to extend hold time of a power supply unit (PSU), thus extend power-on time of a server system during an input power interruption.

Abstract: A method for reading a first data bit from a non-volatile memory of a memory system is disclosed. The N most-significant bits are stored for each of M words in a rotated storage section. Address bits are serially received according to the clock signals. Before receiving a final address bit, a rotated word made up of the most significant bit of the M words is fetched from the rotated storage section. Address bits are serially received and rotated words are fetched until the N most-significant bits of the M words have been fetched. Then, un-rotated words are serially fetched from the non-volatile memory. Within one clock signal of the final address bit receipt, a bit is selected out of the fetched rotated words based on the received address bits. The first data bit is returned based on the selected bit and un-rotated words are returned based on the address.

Abstract: A combination of a host system and data storage system that enables accurate performance testing of the storage subsystem is disclosed. In one embodiment, a driver of a host system receives a command message from a host system application. The command message enables the driver to generate and communicate one or more storage access commands to the data storage system. The driver then receives one or more execution results from the data storage system and determines and communicates the total execution time of the one or more storage access commands to the host system application. When the host system application determines performance of the data storage system the undesirable impact of the communication overhead between the host system application and the driver is minimized. Accordingly, accurate performance measurements of data storage systems are obtained.

Abstract: Apparatuses for performing combination logic operations with an combination logic circuit are disclosed. According to one embodiment, the apparatus comprises a first-in-first-out stage comprising an combination logic circuit, a input ring counter circuit coupled to the first-in-first-out stage and configured to selectively provide a push signal to the first-in-first-out stage, and a output ring counter circuit coupled to the first-in-first-out stage and configured to selectively provide a pop signal to the first-in-first-out stage, wherein the first-in-first-out stage is configured to perform calculations on input data with the combination logic circuit to generate output data responsive to receiving the push signal and to provide the output data based on the calculations responsive to receiving the pop signal.

Abstract: Systems and methods for decoupling host commands in a non-volatile memory system are disclosed. In one implementation, a non-volatile memory system includes a non-volatile memory and a controller in communication with the non-volatile memory. The controller is configured to translate a first command that is formatted according to a communication protocol to a second command that is formatted generically, store the first command in an expected queue, and store the second command in the expected queue with a command priority. The controller is further configured to execute the second command based on the command priority, translate a result of the executed second command into a format according to the communication protocol, and transmit the result of the executed second command in the format according to the communication protocol to a host system dependent upon a position of the first command in the expected queue.

Abstract: Two channels of a main CPU channel and a sub CPU channel each including a reception channel and a transmission channel, and performing a data transfer by a DMA in accordance with a descriptor are provided, a channel switching part selects the main CPU channel or the sub CPU channel in accordance with information set at a mode setting register, and performs a switching of channels at a boundary of a packet to be transferred to thereby enable the switching of channels without interrupting a DMA operation.

Abstract: A controlling method, a connector, and a memory storage device are provided. The controlling method includes following steps. A connection between the memory storage device and a host system is established. A first command is received from the host system and stored into a command queue. The command queue includes at least one second command after the first command is stored into the command queue. Whether a command number of the second commands is greater than a threshold is determined. The threshold is greater than 1. If the command number is greater than the threshold, a using right of the connection is obtained and a second command is executed by the memory storage device. If the command number is not greater than the threshold, a command from the host system is waited for. The using right of the connection belongs to the host system. Thereby, the system efficiency is improved.

Abstract: Apparatuses for performing combination logic operations with an combination logic circuit are disclosed. According to one embodiment, the apparatus comprises a first-in-first-out stage comprising an combination logic circuit, a input ring counter circuit coupled to the first-in-first-out stage and configured to selectively provide a push signal to the first-in-first-out stage, and a output ring counter circuit coupled to the first-in-first-out stage and configured to selectively provide a pop signal to the first-in-first-out stage, wherein the first-in-first-out stage is configured to perform calculations on input data with the combination logic circuit to generate output data responsive to receiving the push signal and to provide the output data based on the calculations responsive to receiving the pop signal.

Abstract: Systems and methods for implementing certain load instructions, such as vector load instructions by cooperation of a main processor and a coprocessor. The load instructions which are identified by the main processor for offloading to the coprocessor are committed in the main processor without receiving corresponding load data. Post-commit, the load instructions are processed in the coprocessor, such that latencies incurred in fetching the load data are hidden from the main processor. By implementing an out-of-order load data buffer associated with an in-order instruction buffer, the coprocessor is also configured to avoid stalls due to long latencies which may be involved in fetching the load data from levels of memory hierarchy, such as L2, L3, L4 caches, main memory, etc.

Abstract: A memory controller and method for scheduling commands in a memory controller are disclosed. A programmable solid state drive (SSD) controller and a non-volatile memory apparatus are provided. Data structures, termed “Superbufs” are utilized for organizing internal activities in the SSD controller. Each data structure can comprise a host command area, a command area, and a notes or scratch pad area. A memory controller can be configured to, upon receiving a host command, copy the original received host command into the host command area of a first data structure, generate a first command group, copy the first command group into the command area, and execute commands of the first command group. A data structure can be initialized to an idle state, and can transition to other states such as a new command received state, a read for execution state, a command group complete state and an error state.

Abstract: A microprocessor controls at least one of a first communication circuit and a second communication circuit such that a first input/output process and a second input/output process are executed in parallel. The first input/output process includes a process outputting output data from a first transfer buffer, through the first communication circuit, to a first instrument in a PLC system bus, and a process inputting input data from the first instrument, through the first communication circuit, to the first transfer buffer. The second input/output process includes a process outputting output data from a second transfer buffer, through the second communication circuit, to a second instrument in a field network, and a process inputting input data from the second instrument, through the second communication circuit, to the second transfer buffer.

Abstract: A scheduler controls execution in a memory of operation requests received in an input request set (IRS) by providing a corresponding output request set (ORS). The scheduler includes zone standby units having a one-to-one relationship with corresponding zones such that each zone standby unit stores an operation request. The scheduler also includes an output processing unit that determines a processing sequence for the operation requests stored in the zone standby units to provide the ORS.

Abstract: The present disclosure relates to cloud based mobile device management (MDM) systems and methods to use the “cloud” to pervasively manage mobile devices. The cloud based MDM systems and methods provide an ability to manage mobile devices with or without MDM clients while no requiring an MDM appliance or service at the enterprise. This provides a “no hardware, no software” deployment. In an exemplary embodiment, a client-less implementation leverages the ActiveSync protocol proxied through distributed cloud nodes to enforce mobile policies. In another exemplary embodiment, a client-based implementation uses a platform specific application and associated application programming interfaces (API) to connect managed mobile devices and provide MDM features through the cloud. Advantageously, the cloud based MDM systems and methods provide reliability and resiliency, elasticity, lower cost, mobility, integration of management and security, and agility over conventional MDM based solutions.

Abstract: A process controller includes a central processing unit (CPU) and a multi-channel serial communication interface including a plurality of serial communication engines in parallel to one another coupled to the CPU. The multi-channel serial communication interface provides a plurality of independent serial communication channels between the CPU and a plurality of IO modules. The plurality of independent communication channels enable the CPU to simultaneously receive signals at any time from any combination of the plurality of IO modules.

Abstract: An approach is provided in which a request is received from a software module to retrieve a value stored in a pre-defined location. Prior to retrieving the value, an override tank is checked for a corresponding override value. When the override tank includes an override value, the override value in the override tank is provided to the software module. When the override tank fails to include a corresponding override value, an actual value is retrieved from a pre-defined storage location and provided to the software module. In one embodiment, the override value is an override system attribute value. In another embodiment, the override value is an override function return value.

Abstract: A connection switching device for an aircraft network includes a switching network and a second identification device. The switching network connects input/output devices, such that applications may be interconnected or such that an application may be connected to a peripheral device. The second identification device detects an input/output device that is connected to the connection switching device.

Abstract: An apparatus includes an input/output (I/O) interface circuit that includes a memory and a controller. The memory stores a plurality of commands to regulate an input/output (I/O) interface. The commands indicate at least one I/O state of at least one I/O terminal of the I/O interface circuit and a time duration that is associated with the I/O state. The controller executes the commands to place the I/O interface in the the I/O state(s) in a predetermined sequence.

Abstract: The disclosed packet scheduler implements the deficit round robin (DRR) approximation of weighted fair queuing (WFQ), and is capable of achieving complete fairness across several hundred source flows, for example, each of which can be mapped to one of several destination ports. In addition to achieving fairness, the packet scheduler allows the user to map one or more optional strict-priority flows to each port. The packet scheduler keeps these strict-priority flows “outside” of the group of flows for which fairness is enforced. Each destination port can be optionally configured to chop its data packets into sub-packet pieces. The packet scheduler works in two mutually orthogonal dimensions: (1.) it selects destination ports based on a round-robin scheme, or using another method, such as guaranteed rate port scheduling (GRPS), and (2.) it implements optional strict-priority scheduling, and DRR scheduling.

Abstract: A host I/F unit has a management table for managing an MPPK which is in-charge of the control of input/output processing for a storage area of an LDEV, and if a host computer transmits an input/output request for the LDEV, the host I/F unit transfers the input/output request to the MPPK which is in-charge of the input/output processing for the LDEV based on the management table, an MP of the MPPK performs the input/output processing based on the input/output request, and the MP of the MPPK also judges whether the MPPK that is in-charge of the input/output processing for the LDEV is to be changed, and sets the management table so that an MPPK which is different from the MPPK that is in-charge is to be in-charge of the input/output processing for the LDEV.

Abstract: Partitioning of a variable length scatter gather list including a processor for performing a method that includes requesting data from an I/O device comprising an I/O buffer. The requesting includes initiating a subchannel. The method further includes determining whether the subchannel supports data divisions by requesting SSQD data from the I/O device and inspecting at least one bit in the SSQD data. A determination is made whether the requested data includes a metadata block in response to determining that the subchannel support data divisions. Also, the subchannel is notified that the requested data includes the metadata block in response to determining that the requested data includes the metadata block. A location of storage is identified in an SBAL in response to notifying the subchannel.

Abstract: A disk drive including a disk configured to spin at a target spin speed, a servo core configured to access the disk, a first non-volatile memory configured to store a first initialization firmware, a second non-volatile memory configured to store a second initialization firmware, a first volatile memory, a second volatile memory, a non-volatile memory core configured to access the first non-volatile memory, and a main core. The main core is configured to load the second initialization firmware from the second non-volatile memory to the second volatile memory concurrently with the loading of the first initialization firmware from the first non-volatile memory to the first volatile memory by the non-volatile memory core, control the servo core to initiate spinning of the disk, and communicate with the non-volatile memory core to service host commands from the first non-volatile memory when the disk is not spinning at the target spin speed.

Abstract: Provided are devices and methods for transmitting two or more data streams through the same cable. An exemplary cable includes at least two sets of conductive points, each set capable of independently transmitting a separate data stream. The cable may be a USB 2.0 type cable, with two contacts assigned for transmitting one data stream, and two other contacts assigned for transmitting another data stream. In some embodiments, one data stream is an audio-video signal transmitted to an audio-video receiver.

Abstract: Data is managed in a Host Wireless Adapater (HWA)-Device Wireless Adapater (DWA) system by receiving at the HWA a wireless packet from the DWA which contains a DWA Transfer Result message. At the HWA, the DWA Transfer Result message is parsed. In the event parsing the DWA Transfer Result message indicates there is data ready to be sent over a wireless channel between the HWA to the DWA a Micro-scheduled Management Command (MMC) is generating at the HWA and the MMC is transmitted from the HWA to the DWA. The MMC is transmitted prior to receiving a Transfer Request message at the HWA from an HWA driver and the data is transmitted from the DWA to the HWA in response to receiving the MMC.

Abstract: A computer program product, apparatus, and a method for facilitating input/output (I/O) processing for an I/O operation at a host computer system configured for communication with a control unit. The method includes receiving a command block from the channel subsystem, the command block including at least one input command and at least one output command specified by a transport command word (TCW) and associated with the I/O operation, the I/O operation having both input and output data, the TCW specifying a location in the memory of the output data and a location in the memory for storing the input data; receiving the output data specified by the TCW and executing the at least one output command; and forwarding the input data specified by the TCW to the channel subsystem for storage at a location specified by the TCW.

Abstract: Described are embodiments of methods, apparatuses, and systems for link power management in an I/O interconnect. An apparatus for link power management in an I/O interconnect of a computer apparatus may include a switching fabric having a first switch and a second switch, configured to simultaneously transport first data packets over a first path of a link between a port of the first switch and a port of the second switch and second data packets over a second path of the link. The apparatus may include a power management unit configured to modify a power state of the port of the first switch based at least in part on relative power states of the first path and the second path. Other embodiments may be described and claimed.

Abstract: Migrating data from a source storage device to a target storage device includes creating new paths to the target storage device, setting the target storage device to a state where I/O operations are initially accepted, where accepted I/O operations are rejected some time after acceptance, setting the source storage device to a state where at least some I/O operations are rejected, transferring metadata corresponding to the source storage device to the target storage device, where state information is transferred from the source storage device to the target storage device and setting the target storage device to a state where I/O operations are accepted and performed. Migrating data from a source storage device to a target storage device may also include creating new volumes on the target storage device and transferring data from the source storage device to the target storage device.

Abstract: A Network Interface (NI) includes a host interface, which is configured to receive from a host processor of a node one or more cross-channel work requests that are derived from an operation to be executed by the node. The NI includes a plurality of work queues for carrying out transport channels to one or more peer nodes over a network. The NI further includes control circuitry, which is configured to accept the cross-channel work requests via the host interface, and to execute the cross-channel work requests using the work queues by controlling an advance of at least a given work queue according to an advancing condition, which depends on a completion status of one or more other work queues, so as to carry out the operation.

Abstract: In one example, multimedia content is requested from a plurality of storage modules. Each storage module retrieves the requested parts, which are typically stored on a plurality of storage devices at each storage module. Each storage module determines independently when to retrieve the requested parts of the data file from storage and transmits those parts from storage to a data queue. Based on a capacity of a delivery module and/or the data rate associated with the request, each storage module transmits the parts of the data file to the delivery module. The delivery module generates a sequenced data segment from the parts of the data file received from the plurality of storage modules and transmits the sequenced data segment to the requester.

Abstract: A switching frame buffer is described in which data units within a sequence of time slots, of a frame, may be simultaneously input and output at ports of the switching frame buffer. In one implementation, a write port may receive data units within a single cycle of the switch. A number of memories may be provided, where first selected ones of the memories constitute memory groups and second selected ones of the memories constitute a memory subsets, each of the memory groups including a corresponding one of the memory subsets. The write port may supply each of a number of copies of the data units to a corresponding one of the memory subsets. Multiplexers may be associated with the groups of the memories and a read port may receive one of the copies of a number of the data units from different ones of the multiplexers.

Abstract: Migrating a logical partition (LPAR) from a first physical port to a first target physical port, includes determining a configuration of an LPAR having allocated resources residing on a computer and assigned to the first physical port of the computer. The configuration includes a label that specifies a network topology that is provided by the first physical port and the first target physical port has a port label that matches the label included in the configuration of the LPAR. The first target physical port with available capacity to service the LPAR is identified and the LPAR is migrated from the first physical port to the target physical port by reassigning the LPAR to the first target physical port.