Input/output Command Process Patents (Class 710/5)
  • Patent number: 11907530
    Abstract: Centralized quality-of-service (QoS) policies administration in a storage area network (SAN) is a problem without meaningful solutions. Current implementations require explicit administration of end points, which is error-prone and not scalable. Zoning for NVMe-oF is defined as a method to specify connectivity access control information on the Discovery Controller (DC) of an NVMe-oF fabric, not as a way to specify QoS policies. Embodiments comprise centrally specifying one or more QoS parameters as part of NVMe-oF zoning definitions maintained at an NVMe-oF DC to centrally controlled QoS parameters. Accordingly, embodiments provide mechanisms to specify QoS parameters in a centralized manner to eliminate requiring a system administrator having to perform per-connection QoS provisioning.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: February 20, 2024
    Assignee: DELL PRODUCTS L.P.
    Inventors: Claudio Desanti, Erik Smith
  • Patent number: 11902652
    Abstract: Features to be enabled for an image capture device may be determined based on user subscription to a feature plan and/or user usage of the image capture device. The features for the image capture device may be enabled through firmware update or code unlock.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: February 13, 2024
    Assignee: GoPro, Inc.
    Inventors: Clark Weber, Fong Tran, Ian Klassen, Vadim Polonichko
  • Patent number: 11899986
    Abstract: An apparatus, method, and computer-readable storage medium for allowing a block-addressable storage device to provide a sparse address space to a host computer. The storage device exports an address space to a host computing device which is larger than the storage capacity of the storage device. The storage device translates received file system object addresses in the larger address space to physical locations in the smaller address space of the storage device. This allows the host computing device more flexibility in selecting addresses for file system objects which are stored on the storage device.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: February 13, 2024
    Assignee: PURE STORAGE, INC.
    Inventors: Ethan Miller, John Colgrove, John Hayes
  • Patent number: 11895215
    Abstract: The present disclosure relates to application server access methods and terminals. One example method includes in response to a terminal failing to connect to an application server by using an IPv6 address, setting an accessed domain name to a restricted domain name, and, when the accessed domain name is re-accessed later, connecting to the application server by directly using an IPv4 address.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: February 6, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Binjun Liu, Yuwei Fan, Fusheng Shen, Weichen Zhu, Lixin Lin, Ying Zhu
  • Patent number: 11868282
    Abstract: A network controller for coupling a host device to a data network, in accordance with network command blocks initiated in a request queue in the host device, includes a channel interface configured to couple to the data network, where the channel interface includes memory configured to store the network command blocks and processing circuitry configured to execute the network command blocks to move data between the host device and the data network, and a host interface configured to couple the network controller to the host device, and to move the network command blocks from the request queue in the host device to the memory using cache operations, including fetching one of the network command blocks from the request queue upon receipt from the host device of a message advising that a request queue location has changed.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: January 9, 2024
    Assignee: Marvell Asia Pte Ltd
    Inventors: Bradley Sonksen, Paul Nitza
  • Patent number: 11870712
    Abstract: Technologies are provided for distributed network management. An access-point computing device is configured to receive commands that target network devices in different computer networks. When a command is received, the access-point device determines which network is targeted by the command and stores the command in a queue associated with that network. Other computing devices are configured to access the multiple computer networks and to execute commands that target devices in the multiple networks. These other computing devices can be configured to transmit requests for commands to the access-point device. When such a request is received, the access-point device determines which network the request is for, retrieves a command from the queue associated with the computer network, and transmits the command to the requestor. The requestor, upon receipt of the command, executes the command against network device(s) in the computer network and transmits any result back to the first computing device.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: January 9, 2024
    Assignee: Amazon Technologies, Inc.
    Inventor: Surendra Kumar
  • Patent number: 11860672
    Abstract: A topology is disclosed. The topology may include at least one Non-Volatile Memory Express (NVMe) Solid State Drive (SSD), a Field Programmable Gate Array (FPGA) to implement one or more functions supporting the NVMe SSD, such as data acceleration, data deduplication, data integrity, data encryption, and data compression, and a Peripheral Component Interconnect Express (PCIe) switch. The PCIe switch may communicate with both the FPGA and the NVMe SSD.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: January 2, 2024
    Inventors: Sompong Paul Olarig, Fred Worley, Oscar P. Pinto
  • Patent number: 11860788
    Abstract: Data can be prefetched in a distributed storage system. For example, a computing device can receive a message with metadata associated with at least one request for an input/output operation from a message queue. The computing device can determine, based on the message from the message queue, an additional IO operation predicted to be requested by a client subsequent to the at least one request for the IO operation. The computing device can send a notification to a storage node of a plurality of storage nodes associated with the additional IO operation for prefetching data of the additional IO operation prior to the client requesting the additional IO operation.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: January 2, 2024
    Assignee: Red Hat, Inc.
    Inventors: Gabriel Zvi BenHanokh, Yehoshua Salomon
  • Patent number: 11853604
    Abstract: According to one embodiment, a computational storage device comprises a nonvolatile memory and a controller configured to control a data process including a first process and a second process. The first process writes data, designated by a first command received from an external device, to the nonvolatile memory. The second process reads data, designated by a second command received from the external device, from the nonvolatile memory and transmits read data to the external device. The controller comprises a processor configured to determine whether to perform the data process in accordance with information included in the first or second command.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: December 26, 2023
    Assignee: Kioxia Corporation
    Inventors: Ayako Tsuji, Kazunari Sumiyoshi
  • Patent number: 11853565
    Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to allocate two or more zones to a first superblock of a plurality of superblocks. The controller is further configured to allocate a zone to a second superblock, where the second superblock only stores data of the zone. The first superblock has a first priority and the second superblock has a second priority, where the second priority is greater than the first priority. Data is moved from the first superblock to another superblock dedicated for a single zone after the first superblock is closed.
    Type: Grant
    Filed: October 1, 2021
    Date of Patent: December 26, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventor: Ravishankar Surianarayanan
  • Patent number: 11847338
    Abstract: Systems, methods, and apparatus related to data storage devices. In one approach, a string of storage devices are chained together and coupled to a host device for storing data. Each storage device may, for example, execute read, write, or erase commands received from the host device. Each storage device in the chain is a master to the next storage device in the chain, and each storage device is a slave to the previous storage device in the chain. In one example, the host device is a system-on-chip. The chain can manage itself and is seen as a single large storage space to the host device. The host device does not require knowledge about each individual storage device, and each storage device does not require knowledge about the other storage devices in the chain (other than whether the storage device is attached to another storage device on its master port).
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: December 19, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Gil Golov
  • Patent number: 11842074
    Abstract: A method for striping, the method may include performing, for each period of time out of multiple periods of time, the steps of: (i) determining striping rules; wherein the determining of the striping rules may include selecting one or more selected stripe size values out of multiple stripe size value candidates; wherein the selecting is based on values of storage system parameters that are obtained when applying the multiple stripe size value candidates; wherein the storage system parameters comprise storage space utilization and storage system throughput; and (ii) applying the striping rules by the storage system, during the period of time; wherein the applying comprises obtaining data chunks; converting the data chunks to stripes having at least one of the one or more selected stripe size values; and storing the stripes in the storage system.
    Type: Grant
    Filed: March 21, 2021
    Date of Patent: December 12, 2023
    Assignee: VAST DATA LTD.
    Inventors: Yogev Vaknin, Eli Malul, Lior Klipper, Renen Hallak
  • Patent number: 11836446
    Abstract: A method of dynamically creating a change template based on a change request received from a user. A change request is assigned a category based on the specifics of the request. If at least one existing template for the category the change request is assigned does not exist, historical change requests are analyzed to identify similar changes in historical change requests to the change request and data is copied from a template used for a historical change that was similar to the change requested to create a draft template. The draft template is altered to remove information which is not relevant to the change request and is stored in a repository. The altered draft template is sent to a reviewer as a proposed template; and approved proposed templates from the reviewer are stored in the repository by category.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: December 5, 2023
    Assignee: KYNDRYL, INC.
    Inventors: Randy S. Johnson, Tedrick N. Northway
  • Patent number: 11816503
    Abstract: A resource management system in a data center one or more data storage resource providers and a transaction server. The transaction server is configured to receive, from a client, a request for read and/or write access for a data storage resource, the request comprising one or more specifications, to provide, to the one or more data storage resource providers, at least a portion of the request, and to receive, from the one or more data storage resource providers, respective responses to the request, the responses respectively comprising one or more allocation options. The transaction server is further configured to select one of the one or more allocation options for registration, and register the selected allocation option with a data manager. At least one of the one or more data storage providers is configured to provide the data storage resource in accordance with the registered allocation option.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: November 14, 2023
    Assignee: KIOXIA CORPORATION
    Inventor: Yaron Klein
  • Patent number: 11809747
    Abstract: A storage system analyzes a logical block address range of data in a resolution of a defragmentation unit. The storage system determines whether a given defragmentation unit is fragmented above a threshold and performs a defragmentation operation accordingly. Additionally or alternatively, the storage system can receive a suggested logical block address read order from a host to improve performance.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: November 7, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Einav Zilberstein, Hadas Oshinsky, Oren Ben Hayun, Rotem Sela, Alex Lemberg
  • Patent number: 11789891
    Abstract: Systems, apparatuses, methods, and computer-readable media are provided for managing operations associated with multi-device serial read for communication buses. Embodiments include a protocol controller coupled to a transmitter and receiver assembly of a device to control the transmitter and receiver assembly to perform a multi-device read protocol to read from a plurality of devices coupled to the serial bus using a single device group read command. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: October 17, 2023
    Assignee: Intel Corporation
    Inventor: Wayne Ballantyne
  • Patent number: 11782634
    Abstract: Non-volatile Random Access Memory (NVR) on a storage system may be dynamically converted between use as temporary memory in a memory context and use as persistent memory in a storage context. NVR (e.g., embodied as DIMM) may be utilized in a hybrid capacity, where some of the NVR is used as memory and some of the NVR is used as storage, and where NVR memory is converted to memory as needed, dynamically as I/O is being processed using the NVR. A host system may be directly connected to an internal switching fabric of the data storage system without an intervening component of the storage system (e.g., a director) controlling access of the host system to the internal fabric or to the memory. The host system may provision and use the NVR as storage by directly communicating with the NVR over the internal fabric, for example, using RDMA.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: October 10, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Owen Martin, Earl Medeiros, Parmeshwr Prasad, Rahul Deo Vishwakarma
  • Patent number: 11775371
    Abstract: Systems and methods are directed to remote validation and preview. An example system receives an indication of a portion of the data pipeline to be processed, generates a data pipeline configuration file describing operations in the portion of the data pipeline, causes a software framework to perform operations corresponding to the portion of the data pipeline, receives results of the operations corresponding to the portion of the data pipeline, and causes presentation of the results on a graphical user interface of a computing device.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: October 3, 2023
    Assignee: StreamSets, Inc.
    Inventor: Madhukar Devaraju
  • Patent number: 11775222
    Abstract: Aspects of a storage device including a master chip controller and a slave chip processor and memory including a plurality of memory locations are provided which allow for simplified processing of descriptors associated with host commands in the slave chip based on an adaptive context metadata message from the master chip. When the controller receives a host command, the controller in the master chip provides to the processor in the slave chip a descriptor associated with a host command, an instruction to store the descriptor in the one of the memory locations, and the adaptive context metadata message mapping a type of the descriptor to the one of the memory locations. The processor may then process the descriptor stored in the one of the memory locations based on the message, for example, by refraining from identifying certain information indicated in the descriptor. Reduced latency in command execution may thereby result.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: October 3, 2023
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Todd Lindberg, Robert Ellis, Kevin O'Toole, Vivek Shivhare
  • Patent number: 11770432
    Abstract: A block-request streaming system provides for low-latency streaming of a media presentation. A plurality of media segments are generated according to an encoding protocol. Each media segment includes a random access point. A plurality of media fragments are encoded according to the same protocol. The media segments are aggregated from a plurality of media fragments.
    Type: Grant
    Filed: February 21, 2022
    Date of Patent: September 26, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Michael G. Luby, Mark Watson, Lorenzo Vicisano, Payam Pakzad, Bin Wang, Thomas Stockhammer, Ying Chen
  • Patent number: 11768686
    Abstract: In a streaming cache, multiple, dynamically sized tracking queues are employed. Request tracking information is distributed among the plural tracking queues to selectively enable out-of-order memory request returns. A dynamically controlled policy assigns pending requests to tracking queues, providing for example in-order memory returns in some contexts and/or for some traffic and out of order memory returns in other contexts and/or for other traffic.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: September 26, 2023
    Assignee: NVIDIA Corporation
    Inventors: Michael A Fetterman, Mark Gebhart, Shirish Gadre, Mitchell Hayenga, Steven Heinrich, Ramesh Jandhyala, Raghavan Madhavan, Omkar Paranjape, James Robertson, Jeff Schottmiller
  • Patent number: 11758028
    Abstract: A port of a computing device is to communicate with another device over a link, the port including physical layer logic of a first protocol, link layer logic of each of a plurality of different protocols, and protocol negotiation logic to determine which of the plurality of different protocols to apply on the link. The protocol negotiation logic is to send and receive ordered sets in a configuration state of a link training state machine of the first protocol, where the ordered sets include an identifier of a particular one of the plurality of different protocols. The protocol negotiation logic is to determine from the ordered sets that a link layer of the particular protocol is to be applied on the link.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: September 12, 2023
    Assignee: Intel Corporation
    Inventor: Debendra Das Sharma
  • Patent number: 11745344
    Abstract: A computer system that generates a universal resource locator (URL). The URL is associated with resuming at least one automated process of a running workflow process that includes a plurality of automated processes. The URL is provided to an external system/application. An input of the URL is received from the external system/application, in response to a trigger event at the external system/application. Based on the input of the URL, the at least one automated process is resumed by at least one headless robot.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: September 5, 2023
    Assignee: UIPATH, INC.
    Inventors: Remus Rusanu, Liji Kunnath
  • Patent number: 11747997
    Abstract: A Software Defined Network Attached Storage (SDNAS) executes on a storage system to provide access to shared file systems, referred to as “shares”, on the storage system. Users access the shares using protocol clients. To enable the SDNAS to provide differentiated prioritization between the various shares, a share priority table is maintained by the SDNAS. As shares are created, or optionally after the shares have been created, each share is assigned a share priority which is stored in the share priority table. When an IO operation is received from a protocol client on a share, the SDNAS process determines a share priority value of the share from the share priority table. The share priority value is used to specify an IO priority which used by the operating system scheduling mechanism to schedule the IO operation and to establish a CPU priority for the IO operation.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: September 5, 2023
    Assignee: Dell Products, L.P.
    Inventors: Jai Gahlot, Shiv Kumar, Amit Chauhan
  • Patent number: 11740601
    Abstract: A building system of a building, the building system including an embedded computer, the embedded computer including one or more circuits configured to implement a universal serial bus (USB) host and communicate with peripheral USB building devices via the USB host, receive building data from at least one of the peripheral USB building devices, generate one or more control decisions for one or more of the peripheral USB building devices, and communicate the one or more control decisions to the one or more of the peripheral USB building devices via one or more USB connections. The building system includes the peripheral USB building devices, wherein each of the peripheral USB building devices are connected to the USB host via at least one of a direct USB connection to the embedded computer or an indirect USB connection through another one of the peripheral USB building devices.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: August 29, 2023
    Assignee: Johnson Controls Tyco IP Holdings LLP
    Inventors: Christopher Brophy, Justin J. Seifi, Alan J. Bronikowski
  • Patent number: 11720392
    Abstract: Dynamic relocation of virtual machines among hypervisors in a relocation domain is provided. A hypervisor is initialized in a subdomain of the relocation domain. A record of architecture characteristics is retrieved for each hypervisor in the relocation domain. A new canonical architectural description (ARD) is created for each subdomain in the relocation domain. An effective adapter characteristic representation is created for each virtual machine defined to the hypervisor. The record of architecture characteristics for each hypervisor in the relocation domain is updated.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: August 8, 2023
    Assignee: International Business Machines Corporation
    Inventors: Richard John Moore, Damian Osisek, Tracy Ann Krein
  • Patent number: 11720304
    Abstract: A method for configuring, via a website, printer settings for a printer is described. The method includes determining a printer driver for the printer. The method also includes determining at least one printing profile scope of a set of printing profile scopes that includes the printer driver. The at least one printing profile scope includes a plurality of printer drivers. The method further includes determining at least one printing profile for the printer based on the at least one printing profile scope. The at least one printing profile is applicable to a plurality of printer drivers. The method additionally includes presenting the at least one printing profile.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: August 8, 2023
    Assignee: PrinterLogic, Inc.
    Inventors: Wayne Wilfred Conway, Corey Clint Ercanbrack
  • Patent number: 11695641
    Abstract: A mock server implementation for discovery applications is provided. A computing system includes a mock server, which receives a client request from a mock client on a discovery server. The client request corresponds to a user query associated with a discovery of resources on a remote computing system. The mock server determines a first response from a mock response dataset. The first response to the client request is determined based on the received client request. The mock response dataset includes a set of responses associated with a sequence of operations executed in the past for the discovery of resources on the remote computing system. The mock server transmits the determined first response to the mock client on the discovery server. The mock client receives the transmitted first response and sends the received first response to a discovery application interface on a user device.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: July 4, 2023
    Assignee: ServiceNow, Inc.
    Inventors: Tom Bar Oz, Robert Bitterfeld, Venkatesh Ainalli, Aviya Aron, Naveen Kumar HR
  • Patent number: 11689915
    Abstract: Systems and methods for 5G telecommunication call event timestamping to assist in debugging the flow of call events, such as during roaming, handover operations, or when user equipment (UE) accesses a different network slice. Specifically, a system for the provision of wireless telecommunication services can include a core network having a first UDR and a first UDM. The first UDM, upon receiving communication from one or more network functions, can communicate a first message to the first UDR. The first message can include a first timestamp indicating to the first UDR a first time that the first message was transmitted.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: June 27, 2023
    Assignee: T-Mobile Innovations LLC
    Inventors: Anil Kumar Mariyani, Rajil Malhotra, Anuj Sharma
  • Patent number: 11681550
    Abstract: Systems and methods for threaded computing systems using allocated command identifier pools for command management are described. Command requests for different processing threads are received. Based on the thread assigned to process the command request, command identifiers are assigned from different pools of command identifiers for each thread, where each pool contains non-overlapping sets of command identifiers. The command identifiers are returned to the same pool that the command identifier came from upon completion of each command.
    Type: Grant
    Filed: February 16, 2021
    Date of Patent: June 20, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Albert Vainer, Itay Presiado, Ido Naveh
  • Patent number: 11678017
    Abstract: Disclosed is an electronic device capable of increasing a recognition rate of an external device. The electronic device includes an interface circuitry configured to be connected to an external device; and a processor configured to: identify a characteristic of the connected external device; obtain identification information of the connected external device based on the identified characteristic of the connected external device and a recognition model learning a relation between characteristics of a plurality of external devices and identification information of the plurality of external devices; and perform an operation based on the identification information of the connected external device.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: June 13, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Byuksun Kim
  • Patent number: 11675541
    Abstract: A memory device includes a command interface configured to receive a command from a host device via multiple command address bits. The memory device also includes a centralized command decoder configured to receive the command and to determine whether the command matches a bit pattern corresponding to multiple command types, such as a write command and a read command. The centralized command decoder is also configured to, in response to the command matching the bit pattern, asserting a latch signal. The memory device also includes a latch configured to capture the multiple command address bits based at least in part on assertion of the latch signal.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: June 13, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Liang Chen
  • Patent number: 11669470
    Abstract: The present disclosure provides a storage system including a first storage device (e.g., a main storage device) and one or more additional storage devices (e.g., sub storage devices). The first storage device includes a host interface for communicating with a host device and is directly connected to the host device. The additional storage devices may be directly connected to the first storage device and may communicate with the host device through the host interface included in the first storage device. The storage system thus has a total combined capacity of both the capacity of the first storage device and the capacity of the one or more additional storage devices. Further, the one or more additional storage devices may be added or removed to increase or decrease the total capacity of the storage system, and the one or more additional storage devices may not necessarily themselves include a host interface.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: June 6, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungwon Jeong, Jinhyuk Lee, Younghoi Heo, Jaeshin Lee
  • Patent number: 11651677
    Abstract: In response to a detected presence of an intended target appliance within a logical topography of controllable appliances identity information associated with the intended target appliance is used to automatically add to a graphical user interface of a controlling device an icon representative of the intended target appliance and to create at a Universal Control Engine a listing of communication methods for use in controlling corresponding functional operations of the intended target appliance. When the icon is later activated, the controlling device is placed into an operating state appropriate for controlling functional operations of the intended target appliance while the Universal Control Engine uses at least one of the communication methods to transmit at least one command to place the intended target appliance into a predetermined operating state.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: May 16, 2023
    Assignee: Universal Electronics Inc.
    Inventors: Paul D. Arling, Brian Barnett
  • Patent number: 11644981
    Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which security locks are implemented to control access to secure functions of the memory devices. In one embodiment, the memory device detects a predetermined signal directed to the memory device. The predetermined signals may include one or more commands directed to the memory device, an operating parameter of the memory device, or both. The memory device may track instances of the predetermined signals to compare with a threshold stored in the memory device. If the memory device determines that the predetermined signals satisfy the threshold, the memory device prohibits access to the secure functions.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: May 9, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Nathaniel J. Meier, Brenton P. Van Leeuwen
  • Patent number: 11645062
    Abstract: A software update device includes a reception unit that receives update data from the server; an update unit that updates software using the update data; a communication interface that communicates with the other software update devices; an update timing reception unit that receives from the server an update timing in which conditions for updating the software including a reception of an update trigger are described; a notification information reception unit that receives notification information including conditions for transmitting the update trigger to another software update device; an update trigger notification unit that transmits the update trigger to the other software update devices; an update trigger reception unit that receives the update trigger from the other software update devices; and an update start determination unit that causes the update unit to update the software when it is determined that all the conditions described in the update timing are satisfied.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: May 9, 2023
    Assignee: Clarion Co., Ltd.
    Inventors: Kyouichi Nakaguma, Hidetoshi Teraoka, Tomochika Ozaki, Hiroshi Kodaka, Tsuneo Sobue
  • Patent number: 11614986
    Abstract: A NVM switch has been designed that allows multiple hosts to simultaneously and independently access a single port NVM device. While this active-active multi-host usage configuration allows for a variety of uses of lower cost single port NVM device, an issue with one of the hosts can delay or block transactions between the other host and the NVM device. The NVM switch includes logic that isolates activity of the multiple hosts despite logic of the switch being shared across the hosts. When the switch detects an issue with one host (“error host”), the switch clears the in-flight commands of the error host and flushes data of the error host. Likewise, the NVM switch ensure proper communication of error reporting from attached NVM devices to the multiple hosts.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: March 28, 2023
    Assignee: Marvell Asia Pte Ltd
    Inventors: Liping Guo, Yingdong Li, Scott Furey, Salil Suri
  • Patent number: 11599305
    Abstract: A data storage device configured to access a magnetic tape comprising a plurality of data tracks is disclosed, wherein the data storage device comprises at least one head configured to access the magnetic tape. A mapping table is generated having a predetermined number of segment entries per data track, wherein each segment entry corresponds to a data segment of the data track, each segment entry comprises a first logical address corresponding to a first logical data block stored in the corresponding data segment, and at least one of the data segments stores multiple logical data blocks. A target segment entry in the mapping table corresponding to a logical address of a read command is located, and the head is positioned at a beginning of a target data segment of a target data track corresponding to the target segment entry in order to execute the read command.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: March 7, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventor: Robert L. Horn
  • Patent number: 11599391
    Abstract: A method of requesting data items from storage. The method comprising allocating each of a plurality of memory controllers a unique identifier and assigning memory transaction requests for accessing data items to a memory controller according to the unique identifiers. The data items are spatially local to one another in storage. The data items are requested from the storage via the memory controllers according to the memory transaction requests and then buffered if the data items are received out of order relative to an order in which the data items are requested.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: March 7, 2023
    Assignee: Arm Limited
    Inventor: Graeme Leslie Ingram
  • Patent number: 11586569
    Abstract: A method, computer program product, and computing system for assigning a first set of interrupts for exclusive processing by a first set of central processing units (CPU) cores. A second set of interrupts may be assigned for processing by a second set of CPU cores. The first set of interrupts may be processed using the first set of CPU cores. The second set of interrupts may be converted to a set of polling operations, thus defining a set of converted polling operations. The set of converted polling operations may be processed using the second set of CPU cores.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: February 21, 2023
    Assignee: EMC IP Holding Company, LLC
    Inventors: Leonid Ravich, Eldad Zinger, Amit Engel
  • Patent number: 11550270
    Abstract: A method for creating a redundant automation system, a computer program and a computer-readable medium, wherein the redundant automation system includes at least one automation installation to be controlled that is installed at an installation location and two control applications that are communicatively interconnected via a synchronization path, and includes a plurality of communication hubs and communication paths connecting these to one another, where one of the control applications operates as the master and the other control application operates as a reserve, such that when the control application operating as the master fails, the control application operating as the reserve function as the master, and where the locations of the computing resources for the control applications are selected such that the control applications are connected to the at least one automation installation via two different communication paths preferably having no or a minimal number of common communication hubs.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: January 10, 2023
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventor: Thomas Grosch
  • Patent number: 11550589
    Abstract: A calculation processing apparatus includes a decoder that decodes memory access instructions including a store instruction and a load instruction; a first queue that stores the decoded memory access instructions; a second queue that stores store data related to the store instruction; a storage circuit that stores target address information of the store instruction for which the first queue is reserved but the second queue is not reserved; and an inhibitor that inhibits execution of the load instruction when address information matching target address information of the load instruction is stored in the storage circuit when the load instruction is being processed. This configuration inhibits switching of the order of a store instruction and a load instruction.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: January 10, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Takekazu Tabata, Yasunobu Akizuki, Sota Sakashita
  • Patent number: 11544187
    Abstract: A distributed storage system node is disclosed. The distributed storage system node may include at least one storage device, which may act as the primary replica for data subject to an Input/Output (I/O) request. A cost analyzer may calculate a local estimated time required to complete the I/O request at the primary replica, and a remote estimated time required to complete the I/O request at a secondary replica of the data. An I/O redirector may direct the I/O request to either the primary replica or the secondary replica based on the local estimated time required and the one remote estimated time required.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: January 3, 2023
    Inventors: Vikas K. Sinha, Gunneswara Rao Marripudi, Jianjian Huo, Ajit Yagaty
  • Patent number: 11544012
    Abstract: A distributed storage system and a data synchronization method are used with a network. The system includes a first network host and a second network host. A first file system directly writes data generated by the first network host into a first software-simulated persistent memory. The data in the first software-simulated persistent memory is stored into a first remote block device and cached, respectively. The cached data is stored into a first persistent storage by asynchronous writeback mechanisms. The first remote block device transmits the received data to the second software-simulated persistent memory through the network. The data transmitted to the second software-simulated persistent memory is cached, and the cached data is stored into a second persistent storage by asynchronous writeback mechanisms. The second network host replaces the first network host to provide services when the first network host is out of service.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: January 3, 2023
    Assignee: QNAP SYSTEMS, INC.
    Inventor: Chin-Hsing Hsu
  • Patent number: 11545199
    Abstract: Methods, systems, and apparatuses related to memory operation with on-die termination (ODT) are provided. A memory device may be configured to provide ODT at a first portion (e.g., rank) during multiple communications at a second portion (e.g., rank). For example, a memory device may receive a first command instructing a first portion to perform a first communication and instructing a second portion to enter an ODT mode. The device may perform, with the first portion, the first communication with a host while the second portion is in the ODT mode. The device may receive a second command instructing the first portion to perform a second communication, and the device may perform, with the first portion, the second communication while the second portion remains in the ODT mode. The second portion may persist in the ODT mode for an indicated number of communications, or until instructed to exit the ODT mode.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: January 3, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Gary Howe, Eric J. Stave, Thomas H. Kinsley, Matthew A. Prather
  • Patent number: 11537472
    Abstract: A method for striping based on evaluated rules, the method may include determining a compatibility, with a storage system utilization policy, of storing stripes under evaluated rules; wherein the evaluated rules define a stripe size, a number of parity chunks per stripe, and maximal numbers of chunks within a stripe per different failure domains of different size ranges; checking whether the storing of the stripes is compatible with the storage system utilization policy; when finding that the storing of the stripes is not compatible then searching for one or more changes of one or more of the maximal numbers that yields compliant one or more maximal numbers that once applied results in a compliance with the storage system utilization policy; applying the compliant one or more maximal numbers when finding the compliant one or more maximal numbers; and determining that the evaluated failure domain rules are non-compliant when failing to find the compliant one or more maximal numbers.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: December 27, 2022
    Assignee: VAST DATA LTD.
    Inventors: Yogev Vaknin, Renen Hallak, Lior Klipper, Eli Malul
  • Patent number: 11531618
    Abstract: A memory module includes a first memory device, a second memory device, and a processing buffer circuit that is connected to the first memory device and the second memory device (independently of each other) and a host. A processing buffer circuit is provided, which includes a processing circuit and a buffer. The processing circuit processes at least one of data received from the host, data stored in the first memory device, or data stored in the second memory device based on a processing command received from the host. The buffer is configured to store data processed by the processing circuit. The processing buffer circuit is configured to communicate with the host in compliance with a DDR SDRAM standard.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: December 20, 2022
    Inventors: Kyungsoo Kim, Jinin So, Jong-Geon Lee, Yongsuk Kwon, Jin Jung, Jeonghyeon Cho
  • Patent number: 11533349
    Abstract: Disclosed is a computing system capable of performing a method that involves receiving, from a first device, a first indication that a peripheral device associated with the first device is available for sharing; sending, to a second device, a second indication that the peripheral device is available for sharing; receiving, from the second device, a request to access the peripheral device; and based at least in part on receipt of the request, causing a peer-to-peer connection to be established between the second device and the first device, the peer-to-peer connection enabling communication between the second device and the peripheral device. The peer-to-peer connection may, for example, enable direction of the peripheral device to the second device so that the peripheral device is a virtual device of the second device.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: December 20, 2022
    Assignee: Citrix Systems, Inc.
    Inventors: Yedong Yu, Jiandong Hong, Yajun Yao, Mingming Ren, Yuan Zhang, Juanjuan Chen, Qiaofei Zhu
  • Patent number: RE49366
    Abstract: Systems are provided for logging transactions in heterogeneous networks that include a combination of one or more instrumented components and one or more non-instrumented components. The instrumented components are configured to generate impersonated log records for the non-instrumented components involved in the transaction processing hand-offs with the instrumented components. The impersonated log records are persisted with other log records that are generated by the instrumented components in a transaction log that is maintained by a central logging system to reflect a complete flow of the transaction processing performed on the object, including the flow through the non-instrumented component(s).
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: January 10, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: David Christopher Wright, Arijit Chatterjee, Qingqing Yuan, Praveen Kumar Barli, Basaveshwar S. Hiremath, Nosheen M. Syed, Autumn Lee Johnson
  • Patent number: RE49496
    Abstract: A semiconductor device includes: various types of memories; an interface configured to transmit memory characteristic information of the memories to a host, receive information needed to control operations of the memories from the host, and perform interfacing between the host and the memories; and a controller configured to control operations of the memories in response to information received from the host, and control an operation of the interface.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: April 18, 2023
    Assignee: SK hynix Inc.
    Inventor: Hyuk Choong Kang