Abstract: A cluster receives a request to store an object using replication or erasure coding. The cluster writes the object using erasure coding. A manifest is written that includes an indication of erasure coding and a unique identifier for each segment. The cluster returns a unique identifier of the manifest. The cluster receives a request from a client that includes a unique identifier. The cluster determines whether the object has been stored using replication or erasure coding. If using erasure coding, the method reads a manifest. The method identifies segments within the cluster using unique segment identifiers of the manifest. Using these unique segment identifiers, the method reconstructs the object. A persistent storage area of another disk is scanned to find a unique identifier of a failed disk. If using erasure coding, a missing segment previously stored on the disk is identified. The method locates other segments. Missing segments are regenerated.

Abstract: According to the conventional art disk array system, when a drive box of a first chassis is blocked, all the drive boxes of a second chassis connected subsequently therefrom will be blocked, and the data in the drive boxes arranged subsequently therefrom cannot be recovered based on the RAID configuration. Even if the data could be recovered based on RAID configuration, it is necessary to perform the recovery process based on RAID in all the subsequently arranged drive boxes, according to which the performance is deteriorated. The present system stores a first drive box in a first chassis out of a plurality of chassis, and a second drive box and a third drive box are stored in a second chassis. One of a plurality of expander controllers within the first drive box is connected to an expander controller in the second drive box, and the other expander controller is connected to an expander controller in the third drive box.

Abstract: Embodiments of the systems, devices, and methods described herein generally facilitate transmission and reception of activation data for use in activating a mobile device to operate with a server. In accordance with one example embodiment, an activation barcode is received from a server by reading an image comprising the activation barcode via a computing device, wherein the image is displayed on a display associated with the computing device, and wherein the activation barcode encodes activation data comprising an activation password. The activation barcode is decoded at the mobile device to obtain the activation password, and an authentication is performed using the activation password after a device activation request is transmitted to the server, wherein the mobile device is activated to operate with the server if the authentication is successful.

Abstract: A technique shares smart television data among subscribing organizations to provide security. The technique involves collecting, by an electronic server apparatus, data elements from multiple smart television devices. The technique further involves performing, by the electronic server apparatus, a set of risk analysis operations to generate risk scores corresponding to the multiple smart television devices. Each risk score (e.g., a numerical value) indicates an amount of risk (e.g., a probability) that a respective smart television device is malicious. The technique further involves providing, by the electronic server apparatus, an ordered list of the multiple smart television devices, the ordered list ranking the multiple television devices based on the risk scores. Information from the ordered list is well suited for use by an anti-fraud service in which subscriber organizations are informed of the information and use the information to identify and stop fraudulent activity in the future.

Abstract: A mechanism is provided for sharing a communication used by a parser (parser path) in a network adapter of a network processor for sending requests for a process to be executed by an external coprocessor. The parser path is shared by processors of the network processor (software path) to send requests to the external processor. The mechanism uses for the software path a request mailbox comprising a control address and a data field accessed by MMIO for sending two types of messages, one message type to read or write resources and one message type to trigger an external process in the coprocessor and a response mailbox for receiving response from the external coprocessor comprising a data field and a flag field. The other processors of the network poll the flag until set and get the coprocessor result in the data field.

Abstract: A method for facilitating forensic analysis of operational data for an IT infrastructure includes deriving performance data from a plurality of physical systems, network elements and storage devices in an IT infrastructure via a toolset comprising a plurality of IT monitoring and metrics tools, importing the performance data into an integrated forensics platform, aggregating the imported data, and analyzing the aggregated data to determine resources consumed. Each tool is communicatively interfaced with one or more of the physical systems, network elements and storage devices.

Abstract: A restricted transmogrifying driver platform is described herein. In one or more implementations, a platform is provided that enables a restricted execution environment for virtual private network (VPN) drivers and other transmogrifying drivers. The platform may be implemented as an operating system component that exposes an interface through which drivers may register with the platform and be invoked to perform functions supported by the platform. The restricted execution environment places one or more restrictions upon transmogrifying drivers that operate via the platform. For instance, execution may occur in user mode on a per-user basis and within a sandbox. Further, the platform causes associated drivers to run as background processes with relatively low privileges. Further, the platform may suspend the drivers and control operations of the driver by scheduling of background tasks. Accordingly, exposure of the transmogrifying drivers to the system is controlled and limited through the platform.

Abstract: A Network-on-Chip (NoC) is provided that performs reordering of transaction responses such as those with requests that cross address mapping boundaries. Ordering is ensured by filtering logic in reorder buffers, some of which include storage to allow multiple simultaneously pending transactions. Transactions are transported by a packet-based transport protocol. The reorder buffering is done at packet level, within the transport topology. Reorder buffers are distributed physically throughout the floorplan of the chip, they have localized connectivity to initiators, and they operate in separate power and clock domains.

Abstract: A data transmission control method for a storage device is provided. The storage device is in communication with a host through a SATA bus. The data transmission control method includes the following steps. Firstly, a X_RDY primitive is issued from the storage device to the host. After a R_RDY primitive from the host is received by the from the storage device, a first frame is transmitted to the host. After the first frame is completely transmitted and in a specified time period before a second frame is transmitted, plural SYNC primitives are issued from the storage device to the host. If the host does not issue the X_RDY primitive in the specified time period, the second frame is transmitted to the host.

Abstract: A storage system comprises a storage medium including a plurality of physical storage areas. The storage system controls a host computer to recognize a logical volume having a plurality of virtual storage areas, reads the data from the physical storage area assigned to the virtual storage area of the logical volume, determines whether or not the read data includes only the specific pattern data, and cancels the assignment of the physical storage area to the virtual storage area if the read data includes only the specific pattern data.

Abstract: Data is transferred between a requesting application and a storage device by passing the application IO buffer to the disk driver. Techniques are provided to avoid data copying to an intermediate sector aligned buffer and passing the intermediate buffer to the disk driver. The techniques allow the use of layered block device drivers such as a Logical Volume Manager (LVM), Distributed Replicated Block Device (DRBD), or both. A look-ahead can determine the IO constraints imposed by the layered block device drivers. Based on the constraints, an entire portion of the buffer may be added to an IO request, or the buffer may be split into a first portion and a second portion. The first portion may be added to a first IO request. The second portion may be added to a second IO request, different from the first IO request.

Abstract: A bridge circuit of an embodiment includes: a command transfer portion which is configured by wired logic into which a host controller capable of sending a command that corresponds to each of a plurality of devices inputs the command, and which is configured to transfer the inputted command to the plurality of devices; a command analysis portion which is configured by wired logic, and which is configured to analyze the command from the host controller; and a response reply portion which is configured by wired logic, and which is capable of reading out a response based on an analysis result of the command analysis portion from a register that holds a response corresponding to the command and sending the response to the host controller.

Abstract: A virtual machine (VM) migration from a source virtual machine monitor (VMM) to a destination VMM on a computer system. Each of the VMMs includes virtualization software, and one or more VMs are executed in each of the VMMs. The virtualization software allocates hardware resources in a form of virtual resources for the concurrent execution of one or more VMs and the virtualization software. A portion of a memory of the hardware resources includes hardware memory segments. A first portion of the memory segments is assigned to a source logical partition and a second portion is assigned to a destination logical partition. The source VMM operates in the source logical partition and the destination VMM operates in the destination logical partition. The first portion of the memory segments is mapped into a source VMM memory, and the second portion of the memory segments is mapped into a destination VMM memory.

Abstract: A processor having a streaming unit is disclosed. In one embodiment, a processor includes one or more execution units configured to execute instructions of a processor instruction set. The processor further includes a streaming unit configured to execute a first instruction of the processor instruction set, wherein executing the first instruction comprises the streaming unit loading a first data stream from a memory of a computer system responsive to execution of a first instruction. The first data stream comprises a plurality of data elements. The first instruction includes a first argument indicating a starting address of the first stream, a second argument indicating a stride between the data elements, and a third argument indicative of an ending address of the stream. The streaming unit is configured to output a second data stream corresponding to the first data stream.

Abstract: A dispersed storage network memory includes a pool of storage nodes, where the pool of storage nodes stores a multitude of encoded data files. A storage node obtains and analyzes data access response performance data for each of the storage nodes to produce a modified data access response plan that includes identity of an undesired performing storage node and an alternative data access response for the undesired performing storage node. The storage nodes receive corresponding portions of a data access request for at least a portion of one of the multitude of encoded data files. The undesired performing storage node or another storage node processes one of the corresponding portions of the data access request in accordance with the alternative data access response.

Abstract: A data storage device includes a first memory device configured to store data having a first property, a second memory device configured to store data having a second property, and a controller. The controller selects data stored in the first memory device, and transfers the selected data to the second memory device or stores the selected data in another physical location of the first memory device selectively depending on an update count (UC) of an address at which the selected data is stored.

Abstract: A system and method is disclosed for communicating with sensors/loggers in integrated radio frequency identification (RFID) tags. An RFID reader uses a Communicate With Data Logger Command to communicate with a data logger in an RFID tag. The RFID reader performs data access processes using an Index Register and a Data Register of the RFID tag. The RFID reader selects one of (1) Index Read access (2) Index Write access (3) Data Write access (4) Data Read access with parity and (5) Data Read access with cyclic redundancy check (CRC). The RFID tag performs the requested data access and then performs an error detection process.

Abstract: Embodiments relate to tagging in a MCU. An aspect includes assigning a command tag to a command by a tag allocation logic of the MCU. Another aspect includes sending the command and the command tag on a plurality of channels that are in communication with the MCU. Another aspect includes receiving a response tag comprising one of a data tag and a done tag corresponding to the command tag from each of the plurality of channels. Another aspect includes, based on receiving a data tag from each of the plurality of channels, determining that read data corresponding to the command is available.

Abstract: An electronic device includes a semiconductor memory unit that includes a vertical electrode formed over a substrate and receiving a voltage through one end of the vertical electrode, a resistance variable layer formed along a side of the vertical electrode to be thinner going from one end to the other end, and a plurality of horizontal electrodes formed adjacent to the vertical electrode with the resistance variable layer disposed between the horizontal electrodes and the vertical electrode, and stacked over the substrate with a space from each other.

Abstract: A system and method for I/O optimization in a multi-queued environment are provided. In one embodiment, a host is provided that sorts commands into a plurality of queues, wherein a command is sorted based on its data characteristic. The host receives a read request from a storage module for commands in the plurality of queues and provides the storage module with the requested commands. In another embodiment, a storage module is provided that processes commands from a host based on the data characteristic of the queue that stored the command on the host. In another embodiment, a storage module sorts command completions into a plurality of queues, wherein a command completion is sorted based on its resulting status code.

Abstract: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

Abstract: Atomic operations within an I/O device are supported by processor architectures that are not required to include specific atomic instructions, by issuing the atomic operations from an I/O hub. A descriptor that specifies the atomic operation and a target address is retrieved by, or sent to, the hub. A trigger event, which may be a programmed I/O write to the hub with an address of the descriptor, or the contents of the descriptor itself, causes the I/O hub to issue the atomic operation. When the atomic operation is complete on the I/O device interconnect, the result is returned to the hub and a host is notified. The host then retrieves the results of the atomic operation from the hub. The host notification can be performed by interrupt or by polling the hub until a status change is detected.

Abstract: A direct memory access (DMA) engine schedules data transfer requests of a data processing system according to both an assigned transfer priority and the deadline for completing a transfer.

Abstract: Multi-level memory architecture technologies are described. One processor includes a requesting unit, a first memory interface to couple to a far memory (FM), a second memory interface to couple to a near memory (NM) and a multi-level memory controller (MLMC) coupled to the requesting unit, the first memory interface and the second memory interface. The MLMC is to write data into a memory page of NM in response to a request from the requesting unit to retrieve the memory page from FM. The MLMC receives a hint from the requesting unit and clears a writeback bit for the memory page indicated in the hint. The hint indicates that the data contained in the memory page of the NM is not to be subsequently requested by the requesting unit. The MLMC starts a writeback operation of a memory sector including the memory page and one or more additional memory pages.

Abstract: One or more storage systems are connected to one or more storage boxes comprising multiple storage devices. Multiple storage areas provided by one or more storage boxes include an allocated area, which is a storage area that is allocated to a virtual volume, and an empty area, which is a storage area that is not allocated to any logical volume. Multiple owner rights corresponding to multiple storage areas are set in one or more storage systems. A storage system having an empty area owner right changes an empty area to the allocated area by allocating the empty area. In a case where a configuration change (a relative change in the number of storage boxes with respect to the number of storage systems) is performed, a first storage system that exists after the configuration change sets, in the first storage system, either more or fewer owner rights than the owner rights, which have been allocated to the first storage system before the configuration change.

Abstract: Data is placed in tiered storage with a suitable granularity according to application characteristics. The storage apparatus comprises a controller for managing storage areas, provided by storage media of a plurality of types of varying performance, as pools, and for assigning the storage areas in page units to a virtual volume from any tiered storage among a plurality of types of tiered storage which the pool comprises in response to a data write request from the host computer, wherein, for specific data which is managed by the host computer, the controller specifies an area with a high referencing frequency among the specific data on the basis of organization information of the specific data, and moves this area to another of the tiered storage with a higher performance than an already assigned tiered storage.

Abstract: A command portal enables a host system to send non-standard or “vendor-specific” storage subsystem commands to a storage subsystem using an operating system (OS) device driver that does not support or recognize such non-standard commands. The architecture thereby reduces or eliminates the need to develop custom device drivers that support the storage subsystem's non-standard commands. To execute non-standard commands using the command portal, the host system embeds the non-standard commands in blocks of write data, and writes these data blocks to the storage subsystem using standard write commands supported by standard OS device drivers. The storage subsystem extracts and executes the non-standard commands. The non-standard commands may alternatively be implied by the particular target addresses used. The host system may retrieve execution results of the non-standard commands using standard read commands.

Abstract: An approach for supervision of I2S bus audio paths employing a signal derived from a word clock signal of the I2S bus.

Abstract: A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses.

Abstract: A computer program product is provided for performing a method that includes receiving a command message at a control unit from a channel subsystem in a host computer system, the command message including a command for data to be transferred from the host computer system to an I/O device. The method also includes receiving a data transfer message at the control unit, the data transfer message having an amount of the data to be transferred that is less than or equal to a maximum amount of data, the maximum amount of data corresponding to a number of buffers associated with the control unit and a size of each of the number of buffers, the number of buffers indicated by a buffer credit value maintained in the host computer system, and the size indicated by a buffer size value sent from the control unit and maintained in the host computer system.

Abstract: The invention provides a method of managing SDIO commands at a host device and a peripheral device. The host device connected to the peripheral device by a bus comprising a command transmission line and a data transmission line, both of which are arranged to transmit single end signal. The host device converts operation requests into converted commands and combines a first SDIO complied data packet with the converted commands to generate a first combined data packet. Then, the host device transmits the first combined data packet through the data transmission line, wherein the first combined data packet comprises a first header for indicating whether the first combined data packet comprises the converted commands. After receiving the first combined data packet, the peripheral device parses the first combined data packet to obtain the converted commands, and then performs processing procedures according to the converted commands.

Abstract: A data acquisition system includes a receptacle and a data acquisition device. The receptacle has a housing, sensor inputs to receive data signals from sensors coupled to an object, and a rib to block insertion of a standard Universal Serial Bus (USB) plug and facilitate insertion of a modified USB plug having a slot that mates with the rib. The data acquisition device includes circuitry to receive, store and process data, a USB plug having pins operatively coupled to the circuitry, a first subset of pins configured to receive data signals from the receptacle and a second subset of pins configured to support standard USB communication with USB-compliant devices, and a slot formed in the USB plug such that the slot facilitates interconnection of the USB plug both with standard USB-compliant devices and with the receptacle, the slot mating with the rib to facilitate interconnection.

Abstract: Provided are a device and computer readable storage medium for programming a memory module to initiate a training mode in which the memory module transmits continuous bit patterns on a side band lane of the bus interface; receiving the bit patterns over the bus interface; determining from the received bit patterns a transition of values in the bit pattern to determine a data eye between the determined transitions of the values; and determining a setting to control a phase interpolator to generate interpolated signals used to sample data within the determined data eye.

Abstract: A memory device includes a memory array with a plurality of memory elements. Each memory element is configured to store data. The device includes an input/output (I/O) buffer coupled to the memory array. The I/O buffer is configured to receive data from an I/O interface of a memory device controller and write the data to the memory array. The device includes a memory control manager coupled to the memory array. The memory control manager is configured to pause a program operation to the memory array in response to receiving a pause command. The memory control manager is also configured to resume the program operation in response to receiving a resume command.

Abstract: Mechanisms are provided for providing an early warning of an error state of a remote direct memory access (RDMA) resource to a userspace application. The mechanisms detect, using kernelspace logic, an error event having occurred, and perform a write operation to write an error state value to a userspace shared memory state data structure indicating the RDMA resource to be in an error state. The mechanisms detect, using userspace logic, the RDMA resource being in an error state by reading the error state value from the userspace shared memory state data structure in response to a userspace application attempting to perform a RDMA operation using the RDMA resource. In addition, the mechanisms initiate, by the userspace application, an operation to tear down the RDMA resource in response to detecting the RDMA resource being in the error state.

Abstract: A disclosed data processing system includes a processor and an operating system kernel that includes communication drivers to support sideband interrupt deferring of polling associated with I/O requests. The communication drivers may implement a driver stack that includes a sideband miniport driver to detect an application program read request for device data from an input/output (I/O) device. The I/O device may be a sensor or another type of human interface device. The sideband miniport driver may pend the read request and maintain an interrupt pipe of a communication transport between the host system and the I/O device in a disabled state. With the interrupt pipe disabled, the host system drivers are unable to poll the I/O device. The sideband miniport driver may pend the read request and keep the interrupt pipe disabled until a sideband interrupt is communicated to the sideband miniport driver.

Abstract: A function executing apparatus includes: a communication device which communicates with an external device; a function executing device which executes at least one preset function; and a controller. The controller determines whether the communication device can communicate with the external device. When the communication device can communicate with the external device, the controller executes a running-state determination processing for determining whether an application program corresponding to a certain function to be executed by the function executing device is running on the external device. When the application program corresponding to the certain function is running, the controller controls the function executing device to execute the certain function.

Abstract: Systems and methodologies are described that facilitate utilizing timers in conjunction with transmitting buffer status reports (BSR). A prohibit timer can be utilized to determine when BSRs can be transmitted to an eNB. The prohibit timer can be initialized or restarted upon transmitting a BSR to an eNB. A BSR retransmit timer can be used to determine when to retransmit a BSR. The BSR retransmit timer can be initialized upon transmitting a BSR to an eNB and restarted each time an uplink resource allocation is received from the eNB. Once the timer expires, if an uplink transmission buffer contains data (e.g., size>0), the BSR can be retransmitted to the eNB. Control data feedback can additionally be used to determine when to retransmit the BSR. In addition, in either case, the timer duration values can be provided by the eNB.

Abstract: An adapter device is provided that is configured to interface with a host device according to a first communication standard via a first connector and with a transceiver module according to a second communication standard via a second connector. The adapter device detects that the transceiver module has connected to the adapter device. The adapter device retrieves transceiver module identifier information from the transceiver module and converts the transceiver module identifier information to the first communication standard. The converted transceiver module identifier information and adapter device identifier information are sent to the host device.

Abstract: A fieldbus gateway using a virtual serial fieldbus port and a data transmission method thereof are provided. By receiving a fieldbus frame containing target data through a virtual serial fieldbus port connected to a source device or a target device via a fieldbus gateway and sending another fieldbus frame containing the target data via other fieldbus port to target devices or source devices, the system and the method can provide two or more remote devices to control one controlled device at the same time. The invention also achieves the effect of using one virtual serial fieldbus port to transmit data between multiple source devices and target devices concurrently.

Abstract: The present disclosure includes methods and devices for a memory controller. In one or more embodiments, a memory controller includes a plurality of back end channels, and a command queue communicatively coupled to the plurality of back end channels. The command queue is configured to hold host commands received from a host. Circuitry is configured to generate a number of back end commands at least in response to a number of the host commands in the command queue, and distribute the number of back end commands to a number of the plurality of back end channels.

Abstract: An integrated circuit active memory device receives task commands from a component in a host computer system that may include the active memory device. The host system includes a memory controller coupling the active memory device to a host CPU and a mass storage device. The active memory device includes a command engine issuing instructions responsive to the task commands to either an array control unit or a DRAM control unit. The instructions provided to the DRAM control unit cause data to be written to or read from a DRAM and coupled to or from either the processing elements or a host/memory interface. The processing elements execute instructions provided by the array control unit to decompress data written to the DRAM through the host/memory interface and compress data read from the DRAM through the host/memory interface.

Abstract: An operating method of a semiconductor device includes selecting a block requiring storage space recycling from a memory device, checking costs required for performing the respective recycling techniques, selecting one of the recycling techniques based on the costs, and recycling a storage space by applying the selected recycling technique to the selected block.

Abstract: In an embodiment, a computing device may include a control unit. The control unit may acquire a request from a central processing unit (CPU), contained in the computing device, that may be executing a basic input/output system (BIOS) associated with the computing device. The request may include a request for a value that may represent a maximum authorized storage size for a storage contained in the computing device. The control unit may generate the value and send the value to the CPU. The CPU may generate a system address map based on the value. The CPU may send the system address map to the control unit which may acquire the system address map and configure an address decoder, contained in the computing device, based on the acquired system address map.

Abstract: A method including intercepting a OFR for a file issued by an application to a FS, forwarding the OFR to the FS, receiving from the FS a FD for the file, issuing a SR for the file to the FS. The further method includes receiving from the FS status information for a target device on which the file is located, where the status information includes an OID for the file, storing a mapping of FD to the OID, intercepting a first FOR for the file, making a determination the that the first FOR is one of a read request and a write request, based on the determination, making another determination that the target device supports the direct I/O protocol, and issuing a DI request to the target device using the OID for the file, where the DI request is not processed by the FS.

Abstract: A data storage architecture extension (DAX) system and method that daisy-chains multiple SATA disk drive storage elements to allow a single host bus adapter (HBA) to view the daisy-chain as one logical SATA disk drive is disclosed. The system/method may be broadly described as comprising a pass-thru disk drive controller (PTDDC) further comprising a pass-thru input (PTI) port, disk drive interface (DDI) port, and pass-thru output (PTO) port. The PTDDC intercepts and translates PTI port input to the requirements of a SATA disk drive connected to the DDI. Each PTDDC may be daisy-chained to other PTDDCs to permit a plethora of SATA drives to be associated with a given HBA, with the first PTDDC providing a presentation interface to the HBA integrating all SATA disk drive storage connected to the PTDDCs. Rack mounting of PTDDC-enabled SATA disk drives enables creation of inexpensive dynamically expandable petabyte-class storage arrays.

Abstract: Efficient computation of complex multiplication results and very efficient fast Fourier transforms (FFTs) are provided. A parallel array VLIW digital signal processor is employed along with specialized complex multiplication instructions and communication operations between the processing elements which are overlapped with computation to provide very high performance operation. Successive iterations of a loop of tightly packed VLIWs are used allowing the complex multiplication pipeline hardware to be efficiently used. In addition, efficient techniques for supporting combined multiply accumulate operations are described.

Abstract: There is provided an information processing apparatus including a device detection part configured to detect a second execution device that is identical or similar to a first execution device which executes a command, and an execution control part configured to perform control in a manner that the command is executed by the second execution device detected by the device detection part.

Abstract: A circular queue implementing a scheme for prioritized reads is disclosed. In one embodiment, a circular queue (or buffer) includes a number of storage locations each configured to store a data value. A multiplexer tree is coupled between the storage locations and a read port. A priority circuit is configured to generate and provide selection signals to each multiplexer of the multiplexer tree, based on a priority scheme. Based on the states of the selection signals, one of the storage locations is coupled to the read port via the multiplexers of the multiplexer tree.

Abstract: A data output method and apparatus according to the present invention, which are applicable in a data processing device comprising an output unit, a computer system and an embedded system, generate a control command for enabling an establishment of a channel for outputting data when it is determined that the computer system stays in a non-operating state, establish a data transmission channel between the embedded system and the output unit based on the control command, determine data to be outputted, and transfer the data to be outputted from the embedded system to the output unit through the data transmission channel. In this way, the method and apparatus according to the present invention can ensure that a user need not wait a long time for the computer's start-up, and can carry out an operation on local data for the computer in time, which improves the user satisfaction.