Direct Access Storage Device (dasd) Patents (Class 711/112)
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Patent number: 11588680Abstract: Particular embodiments may receive a request to perform a task to a core network by a user device via an access point. The user device may be authenticated by the core network which comprises one or more network functionality components, and each of the one or more network functionality components may be decomposed into multiple service types. The core network may identify service instances for deployment based on the task. Each of the service instances may belong to one of the multiple decomposed service types. The service instances may be deployed to one or more server machines to accomplish the task by the core network based on resource requirements of the service instances and current resource availability of the one or more server machines.Type: GrantFiled: February 16, 2021Date of Patent: February 21, 2023Assignee: Meta Platforms, Inc.Inventors: Amar Padmanabhan, Praveen Kumar Ramakrishnan, Shaddi Husein Hasan, Anoop Singh Tomar, Evgeniy Makeev, Omar Ramadan, Jiannan Ouyang, Xiaochen Tian, Thomas Romano, Ting Xia, Jagannath Rallapalli, Kuan-Yu Li, Shruti Sanadhya
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Patent number: 11579804Abstract: The present disclosure generally relates to optimizing device interrupt coalescing based upon host device behavior. The data storage device maintains three functional states: a training state, a holding state, and a retraining state. The data storage device switches between states based upon host device behavior as well as the behavior of the data storage device. Once the data storage device finds the optimum conditions for coalescing, the data storage device will periodically test the conditions to adapt to changing host device behavior as well as data storage device behavior. In so doing, the data storage device can dynamically adjust interrupt coalescing to ensure optimum operation of the storage device.Type: GrantFiled: February 24, 2021Date of Patent: February 14, 2023Assignee: Western Digital Technologies, Inc.Inventors: Nathaniel Deneui, Daniel Edward Tuers, Vijay Motagi, Akshay Naik
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Patent number: 11568044Abstract: Example embodiments provide methods, apparatuses, systems, computing devices, and/or the like for vetting USB device firmware via a USB-specific firmware analysis framework. In one example, a method is provided for analyzing firmware of a Universal Serial Bus (USB) device. The example method includes steps of receiving a firmware image extracted from the USB device, identifying signatures from the firmware image relating to USB operation, and building an expected model of operation of the USB device using the identified signatures and a database of operational information regarding USB devices. The example method further includes the steps of generating a recovered model of operation of the USB device based on the firmware image and the identified signatures, and comparing the recovered model of operation with the expected model of operation to identify unexpected or unknown behaviors. The example method may further include generating a report comprising the identified unexpected or unknown behaviors.Type: GrantFiled: March 19, 2019Date of Patent: January 31, 2023Assignee: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INCORPORATEDInventors: Kevin Butler, Tuba Yavuz, Jing Tian, Grant Hernandez, Farhaan Fowze
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Patent number: 11556259Abstract: A system and method for updating a configuration of a host system so that the memory sub-system of the host system emulates performance characteristics of a target memory sub-system. An example system determining a configuration of the host system, the host system comprising a memory sub-system; receiving, by a processing device, a request to emulate a characteristic of a target memory sub-system; analyzing a plurality of candidate configurations for the host system, wherein the plurality of candidate configurations comprises a candidate configuration that generates a load on the memory sub-system to decrease characteristics of the memory sub-system; and updating the configuration of the host system based on the plurality of candidate configurations, wherein the updated configuration changes the memory sub-system to emulate the characteristic of the target memory sub-system.Type: GrantFiled: September 2, 2021Date of Patent: January 17, 2023Assignee: Micron Technology, Inc.Inventors: Jacob Mulamootil Jacob, John M. Groves, Steven Moyer
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Patent number: 11520703Abstract: Techniques are provided for adaptive look-ahead configuration for data prefetching. One method comprises, in response to a request for a data item in a storage system: obtaining a size of a look-ahead window for the request based on one of multiple available caching policies; and moving the requested data item and additional data items within the look-ahead window to the cache memory when the requested data item and/or the additional data items within the look-ahead window are not in the cache memory. The multiple available caching policies comprise a caching policy based on characteristics of an input/output workload of the storage system, or a portion thereof; and/or a caching policy based on an input/output workload of at least a portion of the storage system within a prior predefined time window. The look-ahead window size may be varied over time.Type: GrantFiled: January 31, 2019Date of Patent: December 6, 2022Assignee: EMC IP Holding Company LLCInventors: Jonas F. Dias, Rômulo Teixeira de Abreu Pinho, Diego Salomone Bruno, Owen Martin
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Patent number: 11513701Abstract: A method, computer program product, and computing system for during a high IOPs period, receiving content to be written to a storage system; storing the content to a specific location within a storage device associated with the storage system; updating a temporary map to include an entry that defines the specific location of the content; and during a subsequent period, binding the content with respect to the storage device.Type: GrantFiled: May 3, 2019Date of Patent: November 29, 2022Assignee: EMC IP Holding Company LLCInventors: Vladimir Shveidel, Ronen Gazit
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Patent number: 11513956Abstract: A technique maintains availability of a non-volatile cache. The technique involves arranging a plurality of non-volatile random-access memory (NVRAM) drives into initial drive sets that form the non-volatile cache. The technique further involves detecting a failed initial drive set among the initial drive sets. The plurality of NVRAM drives now includes failed NVRAM drives that belong to the failed initial drive set and remaining non-failed NVRAM drives. The technique further involves, in response to detecting the failed initial drive set, re arranging the remaining non-failed NVRAM drives of the plurality of NVRAM drives into new drive sets that form the non-volatile cache.Type: GrantFiled: April 1, 2021Date of Patent: November 29, 2022Assignee: EMC IP Holding Company LLCInventors: Vamsi K. Vankamamidi, Geng Han, Chun Ma, Jianbin Kang
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Patent number: 11494338Abstract: Provided is a method, computer program product, and system for enumerating files on a tape medium and a cache storage device. The method includes receiving a command to enumerate a directory stored on a tape medium. The directory includes a plurality of files. The method further includes determining that the directory has been at least partially cached to a cache storage device. The method further includes determining, for each file of the directory that is stored in the cache storage device, whether the file has been enumerated. In response to determining that the file has not been enumerated, the method includes returning information of the file as a response to the command. The method further includes mounting the tape medium in parallel to retrieving data from the cache storage device.Type: GrantFiled: April 26, 2019Date of Patent: November 8, 2022Assignee: International Business Machines CorporationInventors: Tohru Hasegawa, Hiroshi Itagaki, Tsuyoshi Miyamura, Noriko Yamamoto, Shinsuke Mitsuma
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Patent number: 11487763Abstract: A table organized into a set of batch units is accessed. A set of N-grams are generated for a data value in the source table. The set of N-grams include a first N-gram of a first length and a second N-gram of a second length where the first N-gram corresponds to a prefix of the second N-gram. A set of fingerprints are generated for the data value based on the set of N-grams. The set of fingerprints include a first fingerprint generated based on the first N-gram and a second fingerprint generated based on the second N-gram and the first fingerprint. A pruning index that indexes distinct values in each column of the source table is generated based on the set of fingerprints and stored in a database with an association with the source table.Type: GrantFiled: February 1, 2022Date of Patent: November 1, 2022Assignee: Snowflake Inc.Inventors: Ismail Oukid, Stefan Richter
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Patent number: 11481125Abstract: A storage device includes a first interface, an operation circuit, and a nonvolatile memory. The first interface receives a first data chunk from a host device. The operation circuit generates first processed data by processing the first data chunk and generates a first signal indicating a size of the first processed data. The nonvolatile memory stores the first processed data in a storage location, when the storage location at which the first processed data are to be stored is designated to the storage device based on the first signal. The first interface outputs the first signal to the host device.Type: GrantFiled: September 14, 2020Date of Patent: October 25, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yohan Ko, Dong-Uk Kim, Insoon Jo, Jooyoung Hwang
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Patent number: 11474751Abstract: A storage apparatus configures a second transfer unit of data based on a zHL read request from a transfer unit of data based on a fiber connect read request, calculates a warranty code for the data of the second transfer unit, stores the data and the warranty code in a memory; after receiving a read request based on zHL, transfers the data together with the warranty code to a host computer if it is determined that the data of the second transfer unit, which is a target of the read request, exists in the memory; and sends a notice of an error of the read request to the host computer when the data of the second transfer unit, which is the target of the read request based on zHL, does not exist in the memory, wherein the host computer which has received the notice outputs a read request.Type: GrantFiled: September 10, 2021Date of Patent: October 18, 2022Assignee: HITACHI, LTD.Inventors: Kosuke Sasaki, Shinichi Kasahara
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Patent number: 11468094Abstract: A computer system and a fault tolerance processing method thereof of image file are provided. In the method, whether to segment the image file is determined. The image file is segmented into multiple image segmented files sequentially, and a segmenting process is recorded in response to determining to segment the image file. The segmenting process relates to a number of a last segmented file. Each time the image file is segmented once, the number of the last segmented file is accumulated. Segmenting the image file is continued according to the segmenting process in response to a segmenting exception situation. On the other hand, the deployment for the image file is performed in conjunction with a record of the current progress during the deployment, so that the deployment also can be continued in response to an interruption of the deployment. Accordingly, efficiency and successful rate can be improved.Type: GrantFiled: January 21, 2019Date of Patent: October 11, 2022Assignee: Acer IncorporatedInventor: Kuan-Ju Chen
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Patent number: 11455247Abstract: Disclosed is a controller for providing applications seamless access to local and remote memory so that data of a particular application that is moved out of the Random Access Memory (“RAM”) of a local device may be stored and accessed in RAM of a remote device rather than on higher latency and slower performing storage mediums. The controller provides an application with a first allocation of RAM from the local device running the application, and a second allocation of RAM from the remote device. The controller registers to receive a page fault notification for a particular page that the application attempts to access and that is not stored in the first allocation of RAM. The controller retrieves the particular page from the second allocation of RAM, and loads it into the first allocation of RAM where it becomes accessible by the application.Type: GrantFiled: March 14, 2022Date of Patent: September 27, 2022Assignee: TORmem Inc.Inventors: Scott Burns, Steven White, Thao An Nguyen, Carl Perry, Andrew Hodges
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Patent number: 11451569Abstract: A method is provided of extracting file content from a live stream of network data streaming multiple files.Type: GrantFiled: June 22, 2021Date of Patent: September 20, 2022Assignee: Arbor Networks, Inc.Inventors: Bhargav M. Pendse, Neil Richard Terry
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Patent number: 11449394Abstract: Indexing preferences generally associate each data source with a type of indexing technology and/or with an index/catalog and/or with a computing device that hosts the index/catalog for tracking backup data generated from the source data. Indexing preferences govern which index/catalog receives transaction logs for a given storage operation. Thus, indexing destinations are defined granularly and flexibly in reference to the source data. Load balancing without user intervention assures that the various index/catalogs are fairly distributed in the illustrative backup systems by autonomously initiating migration jobs. Criteria for initiating migration jobs are based on past usage and going-forward trends. An illustrative migration job re-associates data sources with a different destination media agent and/or index/catalog, including transferring some or all relevant transaction logs and/or indexing information from the old host to the new host.Type: GrantFiled: November 15, 2019Date of Patent: September 20, 2022Assignee: Commvault Systems, Inc.Inventors: Pavan Kumar Reddy Bedadala, Parag Gokhale, Pavlo Mazur, Prakash Varadharajan, Ankur Varsheny, Gopikannan Venugopalsamy, Marcelo Dos Reis Mansano
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Patent number: 11442667Abstract: Systems for managing thermal dissipation in multi-stacked memory dies, and methods and computer-readable storage media related thereto, are provided. The system includes memory dies including memory blocks to store data. A processing component is configured to maintain memory block states for the memory blocks. The memory block states include: an open memory block state allowing write operations, and a closed memory block state preventing write operations. The processing component is further configured to: receive a first write command to store first data, and compute first relative distances between open memory blocks in the open memory block state. The processing component is further configured to: select a set of open memory blocks for a first write operation based on the first relative distances so as to manage thermal dissipation, and initiate the first write operation on the first set of open memory blocks.Type: GrantFiled: February 24, 2021Date of Patent: September 13, 2022Assignee: SMART IOPS, INC.Inventors: Ashutosh K. Das, Manuel A. d'Abreu
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Patent number: 11436085Abstract: Write operations are performed to write data to user blocks of the memory device and to write, to a first set of purposed blocks, purposed data related to the first data written at the memory device. Whether the first set of purposed blocks satisfy a condition indicating an endurance state of the first set of purposed blocks is determined. Responsive to the first set of purposed blocks satisfies the condition, one or more blocks from a pool of storage area blocks of the memory device are allocated to a second set of purposed blocks.Type: GrantFiled: December 4, 2020Date of Patent: September 6, 2022Assignee: Micron Technology, Inc.Inventors: Kishore Kumar Muchherla, Harish R. Singidi, Ashutosh Malshe, Vamsi Pavan Rayaprolu, Sampath K. Ratnam
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Patent number: 11435939Abstract: In an example, a method of allocating storage objects of a virtual machine across storage devices in a computing system includes: collecting capabilities of the storage devices in the computing system; assigning a tier of a plurality of tiers to each of the storage devices in the computing system; collecting performance data for the storage devices across a period of time; analyzing the performance data and the capabilities to determine a placement of storage objects of the virtual machine across the plurality of tiers; and moving the storage objects to respective ones of the storage devices based on the assigned tiers.Type: GrantFiled: January 14, 2020Date of Patent: September 6, 2022Assignee: VMWARE, INC.Inventors: Ronald Gerard Singler, Jr., Cormac Hogan, Duncan Epping
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Patent number: 11429497Abstract: Embodiments of the present disclosure provide a computer-implemented method, an electronic device and a computer program product. The method comprises: obtaining historical data of recoverable errors that occurred in a storage disk during a first period in the past. The method also comprises: determining, based on the historical data, a predicted number of recoverable errors to occur in the storage disk during a second period. The first period has a same duration as that of the second period. The method further comprises: in response to the predicted number exceeding a threshold for identifying a slow disk, performing an operation for handling a slow disk on the storage disk.Type: GrantFiled: November 27, 2019Date of Patent: August 30, 2022Assignee: EMC IP Holding Company LLCInventors: Bing Liu, Lingdong Weng
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Patent number: 11429313Abstract: A data processing method and device, and a distributed storage system are described. The method and device are applied in a dual-control storage server. The dual-control storage server comprises two controllers. If one controller fails due to abnormalities, the other controller determines the storage device managed by the failed controller, and the other controller scans the data in the determined storage device to obtain the metadata of the storage device, and uses the metadata to read the data stored in the determined storage device. It can be seen that in this solution, if one controller is abnormal, the other controller will take the place of the failed controller to provide external services. This improves the stability of the data storage by the dual-control storage server.Type: GrantFiled: August 3, 2018Date of Patent: August 30, 2022Assignee: HANGZHOU HIKVISION SYSTEM TECHNOLOGY CO., LTD.Inventors: Weichun Wang, Min Ye, Peng Lin, Qiqian Lin
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Patent number: 11431794Abstract: In a service deployment method performed by a function management platform that includes a function scheduler and a function executor manager, the function scheduler receives a function call request that carries a function identifier, selects an available host based on resource pool information of a tenant, and sends a function instance creation request to the function executor manager. The function executor manager receives the function instance creation request, selects the host corresponding to the host identifier from the resource pool of the tenant, and creates a function executor corresponding to the function identifier on the host.Type: GrantFiled: March 19, 2020Date of Patent: August 30, 2022Assignee: HUAWEI CLOUD COMPUTING TECHNOLOGIES CO., LTD.Inventors: Lei Yang, Haijuan Zhang, Shaohui Liu
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Patent number: 11429445Abstract: Enhancement or reduction of page migration can include operations that include scoring, in a computing device, each executable of at least a first group and a second group of executables in the computing device. The executables can be related to user interface elements of applications and associated with pages of memory in the computing device. For each executable, the scoring can be based at least partly on an amount of user interface elements using the executable. The first group can be located at first pages of the memory, and the second group can be located at second pages. When the scoring of the executables in the first group is higher than the scoring of the executables in the second group, the operations can include allocating or migrating the first pages to a first type of memory, and allocating or migrating the second pages to a second type of memory.Type: GrantFiled: November 25, 2019Date of Patent: August 30, 2022Assignee: Micron Technology, Inc.Inventors: Dmitri Yudanov, Samuel E. Bradshaw
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Patent number: 11418505Abstract: According to one embodiment, an information processing apparatus is applied to an embedded system in an electric device and includes a first circuit. The first circuit is configured to request a server different from the information processing apparatus to determine whether a debug or software change is possible in response to external access.Type: GrantFiled: February 7, 2019Date of Patent: August 16, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Ryuiti Koike, Mikio Hashimoto, Atsushi Shimbo
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Patent number: 11416279Abstract: A hybrid cloud storage solution provides a private cloud storage system that is backed by a public cloud storage system. The private cloud storage system caches data files that are accessed from the public cloud storage system by virtual machines or containers in a virtualized computing environment. Subsequent accesses are directed towards the cached data files in the private cloud storage system, rather than being directed towards the public cloud storage system, thereby reducing costs and performance overhead associated with accessing the public cloud storage systems. The cached data files are contained in virtual machine disks (VMDKs) that are portable between virtualized computing instances that run in the virtualized computing environment.Type: GrantFiled: July 21, 2020Date of Patent: August 16, 2022Assignee: VMWARE, INC.Inventors: Puneet Birender Katyal, Mark Johnson
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Patent number: 11397814Abstract: The present disclosure includes apparatuses, methods, and systems for using a local ledger block chain for secure electronic control unit updates. An embodiment includes a memory, and circuitry configured to receive a global block to be added to a local ledger block chain for validating an electronic control unit update for electronic control unit data stored in the memory, where the global block to be added to the local ledger block chain includes a cryptographic hash of a current local block in the local ledger block chain, a cryptographic hash of the electronic control unit data stored in the memory to be updated, where the current local block in the local ledger block chain has a digital signature associated therewith that indicates the global block is from an authorized entity.Type: GrantFiled: March 25, 2019Date of Patent: July 26, 2022Assignee: Micron Technology, Inc.Inventors: Antonino Mondello, Alberto Troia
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Patent number: 11397640Abstract: Devices and techniques for extended error correction in a storage device are described herein. A first set of data, that has a corresponding logical address and physical address, is received. A second set of data can be selected based on the logical address. Secondary error correction data can be computed from the first set of data and the second set of data. Primary error correction data can be differentiated from the secondary error correction data by being computed from the first set of data and a third set of data. The third set of data can be selected based on the physical address of the first set of data. The secondary error correction data can be written to the storage device based on the logical address.Type: GrantFiled: September 14, 2020Date of Patent: July 26, 2022Assignee: Micron Technology, Inc.Inventor: David Aaron Palmer
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Patent number: 11386082Abstract: Disclosed herein are system, method, and computer program product embodiments for providing paged and compressed storage for column data, while maintaining existing access mechanisms for the data. In order to reduce an in-memory footprint for column data, columns may be stored in pageable format using page chains, and only those pages of the column data needed to resolve a query will be placed in memory, and evicted from memory when no longer needed. In order to further reduce the footprint for these columns, compression can be applied, and the compressed column data stored in the same pageable format using page chains. The compressed data includes a plurality of vectors, each of which is converted into pages and stored on the page chain with the others so that they can be efficiently retrieved during database retrieval operations.Type: GrantFiled: June 5, 2020Date of Patent: July 12, 2022Assignee: SAP SEInventors: Mehul Wagle, Colin Florendo, Pushkar Khadilkar, Robert Schulze, Reza Sherkat, Amit Pathak
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Patent number: 11379354Abstract: A storage management system monitors an indicator of whether data storage is or will exceed a threshold of storage utilization as stored on a current implementation resource, such as a storage server. The indicator may be used to determine whether none, some or all of the data storage should be moved from the current implementation resource to an available implementation resource.Type: GrantFiled: May 7, 2012Date of Patent: July 5, 2022Assignee: Amazon Technologies, Inc.Inventors: Marc J. Brooker, David R. Richardson, Tate Andrew Certain, Tobias L. Holgers, Madhuvanesh Parthasarathy
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Patent number: 11372571Abstract: A data storage and retrieval system for a computer memory including a memory slice formed of segments and adapted to contain one or more documents and a checkpoint adapted to persist the memory slice. The checkpoint includes a document vector containing a document pointer corresponding to a document. The document pointer including a segment identifier identifying a logical segment of the memory slice and an offset value defining a relative memory location of the first document within the identified segment. There are checkpoint memory blocks, each storing a copy of a corresponding segment of the memory slice. The segment identifier of the document pointer identifies a checkpoint memory block and the offset value of the document pointer defines a relative location of the document within the checkpoint memory block.Type: GrantFiled: May 7, 2018Date of Patent: June 28, 2022Assignee: SAP SEInventors: Christian Bensberg, Steffen Geissinger
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Patent number: 11366764Abstract: A method for managing a data cache, comprising: storing a cache management list comprising a plurality of entries and having: a tail part stored in a first storage and documenting recently accessed data items stored in the data cache, a body part stored in a second storage and documenting less recently accessed data items stored in the data cache, and a head part stored in the first storage and documenting least recently accessed data items stored in the data cache; and in each of a plurality of iterations: receiving at least one data access request; documenting the data access request in the tail; identifying a plurality of duplicated entries present in the body and the tail; and removing each of the plurality of duplicated entries from the body in the second storage according to a physical organization in the second storage of the plurality of duplicated entries.Type: GrantFiled: September 29, 2020Date of Patent: June 21, 2022Assignee: International Business Machines CorporationInventors: Effi Ofer, Ety Khaitzin, Ohad Eytan
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Patent number: 11354206Abstract: A distributed processing method for executing partial order delivery of data on a plurality of computers connected via a network, the distributed processing method includes receiving the data by the plurality of computers. An output order in which the data is output by the partial order delivery is determined by the plurality of computers. The data to be output by dividing the data into a plurality of subsets equivalent among the plurality of computers and then stored in the output set.Type: GrantFiled: March 9, 2020Date of Patent: June 7, 2022Assignee: HITACHI, LTD.Inventors: Yosuke Wada, Nobuyuki Yamamoto
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Patent number: 11355169Abstract: Methods, systems, and devices for a latency indication in a memory system or sub-system are described. An interface controller of a memory system may transmit an indication of a time delay (e.g., a wait signal) to a host in response to receiving an access command from the host. The interface controller may transmit such an indication when a latency associated with performing the access command is likely to be greater than a latency anticipated by the host. The interface controller may determine a time delay based on a status of buffer or a status of memory device, or both. The interface controller may use a pin designated and configured to transmit a command or control information to the host when transmitting a signal including an indication of a time delay. The interface controller may use a quantity, duration, or pattern of pulses to indicate a duration of a time delay.Type: GrantFiled: May 28, 2020Date of Patent: June 7, 2022Assignee: Micron Technology, Inc.Inventors: Robert Nasry Hasbun, Dean D. Gans, Sharookh Daruwalla
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Patent number: 11347604Abstract: Withdrawal of a point-in-time snap copy relationship or a portion of such a relationship, is managed in a manner which can obviate disruption of consistency groups due to the withdrawal. If the withdrawal request is directed to a subrange of the original snap copy relationship, the snap copy relationship is split by creating one or more point-in-time snap copy relationships over one or more subranges of tracks of the snap copy source. A determination is made as to whether to delay execution of the withdrawal request to temporarily preserve data of the withdrawal range. Disruptions to completion of consistency groups may be avoided by selectively delaying the withdrawal of a snap copy relationship corresponding to the withdrawal subrange. In so far as the host is involved, a host may treat the withdrawal request as immediately granted without delay. Other aspects may be realized, depending upon the particular application.Type: GrantFiled: July 26, 2019Date of Patent: May 31, 2022Assignee: International Business Machines CorporationInventors: Theresa M. Brown, Nicolas M. Clayton, Joshua J. Crawford, Nedlaya Y. Francisco, Theodore T. Harris, Jr., Gregory E. McBride, Carol S. Mellgren, Edgar X. Somoza, Damian Trujillo
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Patent number: 11334668Abstract: A method and a device for securing a cache against side channel attacks are provided. An allocator identifier ALLOCATOR field is added to each cache entry in the present disclosure. Whenever an entry is allocated in the cache, the identifier of the software domain currently running on the processor is filled into the ALLOCATOR field of the allocation entry. When accessing the cache, the cache entry can be hit only if the identifier of the software domain currently running on the processor is identical to the ALLOCATOR field in the cache entry. If the cache entry to be replaced is invalid or its ALLOCATOR field is identical to the identifier of the software domain currently running on the processor, then the existing entry in the cache is replaced directly; otherwise, the entire cache is emptied.Type: GrantFiled: December 30, 2018Date of Patent: May 17, 2022Assignee: PHYTIUM TECHNOLOGY CO., LTD.Inventors: Qiang Dou, Tianlei Zhao, Chengyi Zhang, Jun Gao, Hongbo Xue, Xiaoyan Liu, Wenzhe Li, Yujiao Wang, Jiahong Yuan, Longpeng Sun, Shuijingtao Li, Zhe Ding, Xiaofeng Wang, Xiaodao Wang, Wenhui Cao, Shuaike Zheng, Boqing You, Yuan Yuan, Xiaoli Zou
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Patent number: 11327679Abstract: A method is used for bitmap-based synchronous replication in a data protection system. The method includes, upon re-establishing communication with a first storage node, requesting, by a second storage node, a first bitmap from the first storage node. The method includes determining, by the second storage node, a set of data blocks to change on the first storage node based on the first bitmap and a second bitmap on the second storage node. The method also includes sending, by the second storage node to the first storage node, the set of data blocks.Type: GrantFiled: January 31, 2020Date of Patent: May 10, 2022Assignee: EMC IP Holding Company LLCInventors: Tianfang Xiong, Wai Yim, Yifeng Lu, Yue Yang
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Patent number: 11301327Abstract: In general, the invention relates to a method for managing data. The method includes detecting a failure of a persistent storage device in a data node of a plurality of data nodes, and in response to the detecting, initiating a rebuilding of data in a spare location using proactive copy metadata and slice metadata, wherein the data is a copy of data that was stored in the persistent storage device.Type: GrantFiled: March 6, 2020Date of Patent: April 12, 2022Assignee: Dell Products L.P.Inventors: Dharmesh M. Patel, Rizwan Ali, Ravikanth Chaganti
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Patent number: 11294807Abstract: The present disclosure generally relates to a method and device for reduce the amount of energy used to revert data within a storage device to a consistent state after a power loss event. Once power is lost from a host device, and prior to complete shutdown, a log is created within non-volatile memory (NVM) of the storage device. The log contains logical block addresses (LBAs) corresponding to data that experienced a write failure. At the next power-on event, the log is checked to see if any LBAs are present. If LBAs are present in the log, then the data that experienced a write failure can be properly written to the storage device.Type: GrantFiled: June 25, 2019Date of Patent: April 5, 2022Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Rajeev Nagabhirava, Avichay Haim Hodes, Judah Gamliel Hahn
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Patent number: 11288353Abstract: Systems and methods are disclosed for providing secure access to a data storage device. A user may move the data storage device (e.g., wave, twist, etc.). The data storage device may determine whether the motions valid and may allow access to the data storage device (e.g., to non-volatile memory of the data storage device) when the motions are valid.Type: GrantFiled: July 13, 2017Date of Patent: March 29, 2022Assignee: Western Digital Technologies, Inc.Inventors: Jun Xu, Lei Zhang, Wei Xi, Dean Mitcham Jenkins, David W. Chew, Jianguo Zhou
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Patent number: 11281535Abstract: In general, the invention relates to a method for managing data. The method includes detecting a persistent storage device failure in a persistent storage device of a plurality of persistent storage devices, and in response to the detecting, initiating a rebuilding of data in a spare persistent storage device using checkpoint metadata and slice metadata, wherein the data is a copy of data that was stored in the persistent storage device and wherein the spare persistent storage device is not one of the plurality of persistent storage device.Type: GrantFiled: March 6, 2020Date of Patent: March 22, 2022Assignee: Dell Products L.P.Inventors: Dharmesh M. Patel, Rizwan Ali, Ravikanth Chaganti
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Patent number: 11269781Abstract: This disclosure provides techniques hierarchical address virtualization within a memory controller and configurable block device allocation. By performing address translation only at select hierarchical levels, a memory controller can be designed to have predictable I/O latency, with brief or otherwise negligible logical-to-physical address translation time. In one embodiment, address transition may be implemented entirely with logical gates and look-up tables of a memory controller integrated circuit, without requiring processor cycles. The disclosed virtualization scheme also provides for flexibility in customizing the configuration of virtual storage devices, to present nearly any desired configuration to a host or client.Type: GrantFiled: February 19, 2020Date of Patent: March 8, 2022Assignee: Radian Memory Systems, Inc.Inventors: Robert Lercari, Alan Chen, Mike Jadon, Craig Robertson, Andrey V. Kuzmin
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Patent number: 11256614Abstract: Provided herein may be a memory controller and a method of operating the same. The memory controller for controlling a plurality of memory devices in which data is stored may include a host interface configured to receive a request and a logical address corresponding to the request from a host, a processor including multiple cores, each configured to receive the logical address from the host interface and generate mapping information indicating a mapping relationship between the logical address and a physical address and a bitmap storage configured to store a bitmap indicating which core of the multiple cores each of previously-received logical addresses is assigned, wherein the host interface assigns the logical address to one of the multiple cores based on the bitmap.Type: GrantFiled: October 3, 2019Date of Patent: February 22, 2022Assignee: SK hynix Inc.Inventors: Seung Ok Han, Seung Wan Jung
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Patent number: 11237890Abstract: An aspect includes receiving a drive log page including data from a plurality of disk devices, in which the drive log page includes a plurality of attribute fields including a reassignment field that tracks data movement from a failing sector of a disk device to a new sector of the disk device. Performing, by the system, a failure prediction based on attribute data of the drive log page to identify one or more disk devices of the plurality of disk devices that are predicted to fail. Disabling, by the system, the one or more disk devices in response to the failure prediction.Type: GrantFiled: August 21, 2019Date of Patent: February 1, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David Verburg, Timothy O'Callaghan, M. Dean Sciacca
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Patent number: 11237738Abstract: A method of managing operation of a data storage system (DSS) is provided. The method includes (a) reserving space within a dedicated metadata storage region (DMSR); (b) in response to determining that accommodating a storage request requires use of the reserved space, entering a restricted write mode; (c) while operating in the restricted write mode, using the reserved space in a process that frees space within the DMSR outside the reserved space; and (d) exiting the restricted mode in response to freeing space within the DMSR outside the reserved space. An apparatus, system, and computer program product for performing a similar method are also provided.Type: GrantFiled: March 16, 2020Date of Patent: February 1, 2022Assignee: EMC IP Holding Company, LLCInventors: Xiongcheng Li, Vamsi K. Vankamamidi, Xinlei Xu, Jian Gao, Geng Han
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Patent number: 11233874Abstract: A method for performing a write operation in a distributed storage system is disclosed. The method comprises receiving a first time-stamped write request from a proxy server. Further, the method comprises determining if the first time-stamped write request is within a time window of a reorder buffer and if the first time-stamped write request overlaps with a second time-stamped write request in the reorder buffer. Responsive to a determination that the first time-stamped write request is outside the time window or that the first time-stamped write request is within the time window but has an older time-stamp than the second time-stamped write request, the method comprises rejecting the first time-stamped write request. Otherwise, the method comprises inserting the first time-stamped write request in the reorder buffer in timestamp order and transmitting an accept to the proxy server.Type: GrantFiled: August 6, 2018Date of Patent: January 25, 2022Assignee: VMware, Inc.Inventor: Guillermo J. Rozas
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Patent number: 11232036Abstract: Writes to one or more physical storage devices may be blocked after a certain storage consumption threshold (WBT) for each physical storage device. A WBT for certain designated physical storage devices may be applied in addition to, or as an alternative to, determining and applying a user-defined background task mode threshold (UBTT) for certain designated physical storage devices. In some embodiments, the WBT and UBTT for a physical storage device designated for spontaneous de-staging may be a same threshold value. Write blocking management may include, for each designated physical storage device, blocking any writes to the designated physical storage device after a WBT for the designated physical storage device has been reached, and restoring (e.g., unblocking) writes to the designated physical storage device after storage consumption on the physical storage device has been reduced to a storage consumption threshold (WRT) lower than the WBT.Type: GrantFiled: August 2, 2019Date of Patent: January 25, 2022Assignee: EMC IP Holding Company LLCInventors: Gabriel Benhanokh, Andrew L. Chanler, Arieh Don
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Patent number: 11226870Abstract: The disclosed computer-implemented method for marking application-consistent points-in-time may include intercepting, by an I/O filter, a write request from a guest virtual machine to a virtual machine disk and queueing the write request in an I/O filter queue. The method may include sending the write request to the virtual machine disk and receiving a write completion message from the virtual machine disk. The method may also include sending, in response to the write completion message, the write request to an I/O daemon, and queueing the write request in an I/O daemon queue. The method may further include sending the write completion message to the guest virtual machine, and sending the write request to a backup gateway such that the backup gateway mimics writes to the virtual machine disk. Various other methods, systems, and computer-readable media are also disclosed.Type: GrantFiled: September 6, 2019Date of Patent: January 18, 2022Assignee: Veritas Technologies LLCInventors: Chirag Dalal, Vaijayanti Bharadwaj, Pradip Kulkarni
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Patent number: 11226942Abstract: A method and a system are provided for controlling deduplication in a storage pool. The method includes creating one or more deduplication domains within a storage pool, wherein storage volumes that are within a deduplication domain are deduplicated only with other volumes within the same deduplication domain and assigning storage volumes to a deduplication domain in order to control deduplication between storage volumes. The method may include, within a deduplication domain, blocklisting a volume from deduplication with a specified volume whilst allowing deduplication with other volumes in the deduplication domain.Type: GrantFiled: October 16, 2019Date of Patent: January 18, 2022Assignee: International Business Machines CorporationInventors: Lee Jason Sanders, Ben Sasson, Gordon Douglas Hutchison
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Patent number: 11222664Abstract: A server box embodiment is disclosed that generally comprises an array of dummy HDDs that share a common set of universal disk drive components in a master components module, or power module. Each dummy HDDs is constructed without expensive onboard chipsets that control the normal functionality of a standard HDD. By sharing expensive chipsets in a master components module (power module) money can be saved in building and selling the dummy HDD server. Embodiments envision a power module possessing the needed chipset functionality that is missing in a dummy HDD. The power module can be made to move from dummy HDD to dummy HDD supplying the necessary chipset in a shared manner when data is being stored or retrieved for client or end-user.Type: GrantFiled: March 21, 2020Date of Patent: January 11, 2022Assignee: Spectra Logic CorporationInventors: Nicholas Aldo Nespeca, Jon Benson, Stephen P. Neisen, Matt John Ninesling
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Patent number: 11216269Abstract: An information handling system may include a processor, one or more storage resources communicatively coupled to the processor, including at least one of the one or more storage resources communicatively coupled to the processor via a storage interface, and a basic input/output system (BIOS) comprising a program of instructions executable by the processor and configured to cause the processor to initialize one or more information handling resources of the information handling system. The BIOS may be further configured to, in response to a request to perform a firmware update to the one or more storage resources, scan for storage resources communicatively coupled to the processor via the storage interface, register unique identifiers associated with the storage resources communicatively coupled to the processor via the storage interface, and perform a firmware update of the storage resources communicatively coupled to the processor via the storage interface based on the unique identifiers.Type: GrantFiled: January 9, 2020Date of Patent: January 4, 2022Assignee: Dell Products L.P.Inventors: Ajay Shenoy, Aniruddha Suresh Herekar, Manjunath Vishwanath, James Peter Giannoules, Ankit Singh, Naveen Karthick Chandrasekaran
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Patent number: 11199995Abstract: A memory sub-system configured to be responsive to a time to live requirement for load commands from a processor. For example, a load command issued by the processor (e.g., SoC) can include, or be associated with, an optional time to live parameter. The parameter requires that the data at the memory address be available within the time specified by the time to live parameter. When the requested data is currently in the lower speed memory (e.g., NAND flash) and not available in the higher speed memory (e.g., DRAM, NVRAM), the memory subsystem can determine that the data cannot be made available with the specified time and optionally skip the operations and return an error response immediately.Type: GrantFiled: November 19, 2019Date of Patent: December 14, 2021Assignee: Micron Technology, Inc.Inventors: Shivasankar Gunasekaran, Samuel E. Bradshaw, Justin M. Eno, Ameen D. Akel