Abstract: A process can be scheduled between first and second hosts that using a virtual file system that is shared between the hosts can be used. The process, running on a first hypervisor of the first host, can be scheduled to run on a second hypervisor of the second host. A file can be created that includes the data content of the process address space for the file. The file can be mapped address space of the virtual file system. Data from the physical memory of the first host can be transferred to physical memory of the second host using page fault routines.

Abstract: A packet processing device has a plurality of processing stages, including a first processing stage and a second processing stage arranged as a packet processing pipeline. The first processing stage and the second processing stage each have a respective processor configured to process a packet of a packet stream and a respective resource manager having a respective local resource lock corresponding to a remote resource. The respective processor requests the respective resource manager to allocate the remote resource. The respective resource manager responds to the request to allocate the remote resource by locking the remote resource with the respective local resource lock and allocating the remote resource. The respective processor implements a packet processing operation associated with the allocated remote resource.

Abstract: Apparatuses, systems, methods, and computer program products are disclosed for conditional iteration. A method includes receiving a request comprising a condition. A method includes checking an address mapping structure for entries satisfying a condition for a request. A method includes providing a result for a request based on one or more entries satisfying a condition for a request.

Abstract: Systems and methods for Virtual Machine (VM) attribution with hardware information. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include a Central Processing Unit (CPU) and a memory coupled to the CPU, the memory having program instructions stored thereon that, upon execution by the CPU, cause the IHS to: provide a management console configured to manage a plurality of hypervisors, each hypervisor configured to be executed in a different one of a plurality of physical servers distinct from the IHS, each hypervisor further configured to create and run at least one Virtual Machine (VM); identify, via the management console, a hardware capability of a given one of the plurality of physical servers; and assign the VM, by the management console, to the given physical server in response to the identification of the hardware capability.

Abstract: A memory system implements a plurality of cache eviction policies, a plurality of virtual address modification policies, or both. One or more application programming interfaces provide access to memory allocation and parameters thereof relating to zero or more cache eviction policies and/or zero or more virtual address modification policies associated with memory received via a memory allocation request. The provided application programming interfaces are usable by various software elements, such as any one or more of basic input/output system, driver, operating system, hypervisor, and application software elements. Memory allocated via the application programming interfaces is optionally managed via one or more heaps, such as one heap per unique combination of values for each of any one or more parameters including eviction policy, virtual address modification policy, structure-size, and element-size parameters.

Abstract: A method is provided for storing data from an external device in a dynamoelectric machine assembly (i.e., an electric motor or generator). The dynamoelectric machine assembly includes a memory device and a processor for controlling operation of the dynamoelectric machine assembly in response to commands from an external device. The method includes receiving a command from the external device to store data in the memory device of the dynamoelectric machine assembly, and storing the data in the memory device in response to the command. Dynamoelectric machine assemblies, external devices and systems suitable for use in the provided method are also disclosed.

Abstract: A method, apparatus and program product utilize an empirical approach to determine the locations of one or more IO adapters in an HPC environment. Performance tests may be run using a plurality of candidate mappings that map IO adapters to various locations in the HPC environment, and based upon the results of such testing, speculative adapter affinity information may be generated that assigns one or more IO adapters to one or more locations to optimize adapter affinity performance for subsequently-executed tasks.

Abstract: A system and computer program product for seismic imaging implements a seismic imaging algorithm utilizing Reverse Time Migration technique requiring large communication bandwidth and low latency to convert a parallel problem into one solved using massive domain partitioning. Since in RTM, both the forward and reverse wave propagation is iteratively calculated on time step increments, the method implements methods that includes partitioning memory between computation and intermediate results to optimize an RTM computation. The methods make maximum use of the memory to either eliminate storing the snapshot wavefield data to disk, or hide all or a significant portion of the disk I/O time. Furthermore, the schemes can provide the flexibility to vary a number of iterations (step size) for each snapshot to be kept in the memory. If any of the given conditions changes during the process, maximum usage of the available memory is ensured.

Abstract: A screen output control method and system and a mobile terminal supporting the same are provided. The screen output control system includes a screen output device and a mobile terminal. The screen output device is connected with the mobile terminal so as to output screen data rendered by the mobile terminal. When the screen output device is connected, the mobile terminal renders screen data for the screen output device, writes the rendered screen data to a buffer assigned to the screen output device, and outputs screen data written in the buffer to the screen output device.

Abstract: A method and system for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read. A size of the IO read is evaluated. If the IO does not entirely cover a page, then the page is paged in. If the IO entirely covers one or more pages, those pages are not paged in. Page attributes may be different during the IO read. Pages that are paged in are marked readable and writable but pages that are waiting for the IO to populate them are only marked writeable. Once the IO read has completed, the pages are marked readable and writable and all outstanding faults due to reads during this window are completed.

Abstract: The present invention is directed to a method and corresponding apparatus for verifying connectivity in a storage area network. An embodiment begins by communicating with one or more storage devices, through at least one of one or more host machines connected to one or more network switches. Based on the communication, the method may activate a test procedure at the one or more storage devices. The method may determine, through the test procedure, each state of connectivity from the one or more storage devices to each member computing device of a connectivity set. The connectivity set may include at least one of the following: at least one other storage device, at least one of the one or more network switches, and at least one of the one or more host machines. The method may provide a report to one or more users, the report including each state of connectivity.

Abstract: Embodiments of the present invention provide hints for page stealing by prioritizing pages based on the number of residences. Receiving a plurality of pages to be hinted to a hypervisor for page stealing. Determining at least two page types of the plurality of pages. Determining whether any of the at least two page types has a total number of residences less than a total number of potential residences in the virtual environment for all page types and have a total number of residences less than a threshold. Responsive to determining a first page type of the at least two page types has a total number of residences less than a total number of potential residences for all page types and has a total number of residences less than a threshold, notifying the hypervisor of at least one page from the plurality of pages that is the determined first page type.

Abstract: A method and system for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read. A size of the IO read is evaluated. If the IO does not entirely cover a page, then the page is paged in. If the IO entirely covers one or more pages, those pages are not paged in. Page attributes may be different during the IO read. Pages that are paged in are marked readable and writable but pages that are waiting for the IO to populate them are only marked writeable. Once the IO read has completed, the pages are marked readable and writable and all outstanding faults due to reads during this window are completed.

Abstract: Embodiments of the present invention provide hints for page stealing by prioritizing pages based on the number of residences. Receiving a plurality of pages to be hinted to a hypervisor for page stealing. Determining at least two page types of the plurality of pages. Determining whether any of the at least two page types has a total number of residences less than a total number of potential residences in the virtual environment for all page types and have a total number of residences less than a threshold. Responsive to determining a first page type of the at least two page types has a total number of residences less than a total number of potential residences for all page types and has a total number of residences less than a threshold, notifying the hypervisor of at least one page from the plurality of pages that is the determined first page type.

Abstract: A protection unit of a subroutine stack accessible by a CPU controlled by one main software program, for storing and removing stack frame(s), the stack protection unit being coupleable to the stack and the CPU, comprising: a processor coupled to a first and a second address register; wherein, when a first stack frame is stored onto the stack and the execution of the main software program is suspended by the CPU due to the execution of a subroutine; the processing unit is adapted to set one access rule based on the first and second address registers, preventing: the ongoing subroutine, from accessing a hardware-protected region of the stack, comprising at least one stack frame associated with a return address from which the main software program resumes execution after termination of the execution of the subroutine. A processor, a method and a computer program are also claimed.

Abstract: A method for reducing virtual machine preemption in a virtualized environment is provided. The method includes dispatching a virtual central processing unit (CPU) to run in an emulation mode on a real CPU until the real CPU exits the emulation mode, determining whether the virtual CPU has loaded a wait state, determining whether a remaining time slice of the virtual CPU as a result of the dispatching is below a predefined threshold in an event that the virtual CPU has loaded the wait state and rescheduling the virtual CPU with a full time slice in an event the remaining time slice of the virtual CPU is below the predefined threshold.

Abstract: A method is provided managing physical memory of a data storage, for example, a heap. The method includes requesting a memory portion having a memory portion size and identifying a pool. The pool is provided for storing at least one access information indicative of an address of a memory block of the data storage. The memory block has a memory block size equal to or larger than the memory portion size. The method further includes determining whether the access information is stored in the pool. If the access information is stored in the pool, address data of the memory block is returned, wherein the address data are based on the access information, and access information is removed from the pool. If the access information is not stored in the pool, the access information is created, and address data of the memory block is returned.

Abstract: A generic microprocessor architecture is provided with a set (e.g., one or more) of controlling/main processing elements (e.g., MPEs) and a set of groups of sub-processing elements (e.g., SPEs). Under this arrangement, MPEs and SPEs are organized in a way that a smaller number MPEs control the behavior of a group of SPEs using program code embodied as a set of virtualized control threads. The apparatus includes a MCP coupled to a power supply coupled with cores to provide a supply voltage to each core (or core group) and controlling-digital elements and multiple instances of sub-processing elements. In accordance with these features, virtualized control threads can traverse the physical boundaries of the MCP to control SPE(s) (e.g., logical partitions having one or more SPEs) in a different physical partition (e.g., different from the physical partition from which the virtualized control threads originated.

Abstract: A system for frequent pattern mining uses two layers of processing: a plurality of computing nodes, and a plurality of processors within each computing node. Within each computing node, the data set against which the frequent pattern mining is to be performed is stored in shared memory, accessible concurrently by each of the processors. The search space is partitioned among the computing nodes, and sub-partitioned among the processors of each computing node. If a processor completes its sub-partition, it requests another sub-partition. The partitioning and sub-partitioning may be performed dynamically, and adjusted in real time.

Abstract: Embodiments of a method for operating an event-driven processor and an event-driven processor are described. In one embodiment, a method for operating an event-driven processor involves configuring a heartbeat timer of the event-driven processor and handling an event using the event-driven processor based on the heartbeat timer. Using a heartbeat timer built into the event-driven processor, the task execution determinism of the event-driven processor is improved and the power consumption of the event-driven processor is reduced. Other embodiments are also described.

Abstract: An open systems based media storage library system (10) for use by one or more hosts (5) includes a first hosted partition (12A) and a pool partition (14). The first hosted partition (12A) can be accessed by one of the hosts (5). Additionally, the first hosted partition (12A) includes a plurality of first hosted resources (16, 18). The plurality of first hosted resources (16, 18) can include a plurality of first hosted storage slots (16) and a plurality of first hosted storage media (18). The plurality of first hosted storage slots (16) includes one or more first physical storage slots (16P) and one or more first logical storage slots (16L). The plurality of first hosted storage media (18) are positioned within the first physical storage slots (16P). The pool partition (14) is inaccessible by any of the hosts (5). The pool partition (14) includes a plurality of pool resources (20, 22). One of the plurality of pool resources (20, 22) is selectively assigning to the first hosted partition (12A).

Abstract: Techniques and mechanisms are provided to allow for selective optimization, including deduplication and/or compression, of portions of files and data blocks. Data access is monitored to generate a heat index for identifying sections of files and volumes that are frequently and infrequently accessed. These frequently used portions may be left non-optimized to reduce or eliminate optimization I/O overhead. Infrequently accessed portions can be more aggressively optimized.

Abstract: The present invention concerns one of the plurality of first storage apparatuses, prior to a file migration to the second storage apparatus, notifies to the second storage apparatus of file migration information being information relating to the file migration, the second storage apparatus calculates an increment of a load on the second storage apparatus that is generated by the file migration based on information written in the file migration information, the second storage apparatus determines whether the file migration is allowable based on a current load on the second storage apparatus itself and the increment, the second storage apparatus notifies the determination result to the one of the plurality of first storage apparatuses that has notified the file migration information, and the one of the plurality of first storage apparatuses determines whether to migrate the file to the second storage apparatus based on the determination result.

Abstract: Embodiments of apparatuses and methods including virtual address memory range registers are disclosed. In one embodiment, a processor includes a memory interface, address translation hardware, and virtual memory address comparison hardware. The memory interface is to access a system memory using a physical memory address. The address translation hardware is to support translation of a virtual memory address to the physical memory address. The virtual memory address is used by software to access a virtual memory location in the virtual memory address space of the processor. The virtual memory address comparison hardware is to determine whether the virtual memory address is within a virtual memory address range.

Abstract: A mechanism is provided in a data processing system for performing a logical partition migration utilizing multiple paths. Responsive to a virtual machine monitor initiating a logical partition migration operation to move a logical partition from a source system to a destination system, the mechanism allocates a plurality of memory pools and a plurality of threads from a mover service partition to the virtual machine monitor. The virtual machine monitor performs the logical partition migration operation utilizing each of the plurality of threads to transfer a corresponding one of the plurality of memory pools from the source system to the destination system to effect the logical partition migration operation.

Abstract: Techniques related to personal computers and devices sharing similar architectures are disclosed. Particularly shown is a system and method for enabling improved performance and security in hypervisor programs and related applications programs achieved through the use of multiple non-volatile memories.

Abstract: A mechanism is provided in a data processing system for performing a logical partition migration utilizing multiple paths. Responsive to a virtual machine monitor initiating a logical partition migration operation to move a logical partition from a source system to a destination system, the mechanism allocates a plurality of memory pools and a plurality of threads from a mover service partition to the virtual machine monitor. The virtual machine monitor performs the logical partition migration operation utilizing each of the plurality of threads to transfer a corresponding one of the plurality of memory pools from the source system to the destination system to effect the logical partition migration operation.

Abstract: In accordance with some embodiments, spatial and temporal locality between threads executing on graphics processing units may be analyzed and tracked in order to improve performance. In some applications where a large number of threads are executed and those threads use common resources such as common data, affinity tracking may be used to improve performance by reducing the cache miss rate and to more effectively use relatively small-sized caches.

Abstract: Embodiments of computer-implemented methods, apparatus and computer-readable media associated with memory management are disclosed herein. A computer-implemented method to coalesce free intervals of a memory may include ascertaining that a first interval of the memory is free (302, 304). A determination may be made, e.g., from a header associated with the first interval of the memory, whether a second interval of the memory, immediately preceding or following the first interval of the memory, is free (306). After a determination is made that the second interval of the memory is free, the first interval of the memory and the second interval of the memory may be coalesced (310). Other embodiments may be described and/or claimed.

Abstract: In accordance with the embodiments of the present invention, the biometric information created for biometric authentication is available for a predetermined time after it was acquired. In addition, the authentication processing is performed on the biometric information useful for a predetermined time after the biometric information was acquired when authenticating it. Therefore, the authentication processing can be normally performed on only the biometric information that is acquired immediately when it is necessary for the user to do the financial transaction or individual authentication.

Abstract: Methods, systems, and apparatus for implementing raw memory transactions. An SoC is configured with a plurality of nodes coupled together forming a ring interconnect. Processing cores and memory cache components are operatively coupled to and co-located at respective nodes. The memory cache components include a plurality of last level caches (LLC's) operating as a distributed LLC and a plurality of home agents and caching agents employed for supporting coherent memory transactions. Route-back tables are used to encode memory transactions requests with embedded routing data that is implemented by agents that facilitate data transfers between link interface nodes and memory controllers. Accordingly, memory request data corresponding to raw memory transactions may be routed back to requesting entities using headerless packets.

Abstract: Machine-readable media, methods, apparatus and system are described. In some embodiments, a virtual machine monitor of a computer platform may comprise a service virtual machine created by the virtual machine monitor partitioning an underlying hardware machine to support execution of a plurality of overlying guest operating systems, wherein the plurality of guest operating systems comprise a guest operating system complying with a non-native guest system architecture different from a host system architecture with which the hardware machine complies. The service virtual machine may further comprise a translation layer to translate instructions from the guest operating system complying with the non-native guest system architecture into instructions complying with the host system architecture.

Abstract: Techniques for retrieving data blocks are provided. In one aspect, a storage fabric address of a controller associated with a data block is retrieved by a node. If the node is on the same storage fabric as the retrieved address, the data block may be retrieved over the storage fabric. In another aspect, a directory server maintains mappings of data blocks to storage fabric addresses of controllers associated with the data blocks. A request for the location of the data block includes the storage fabric address of the associated controller.

Abstract: In a multi processing system, packet routing units are arranged in respective middleware layers in first nodes corresponding to memory spaces connected to plural processor cores and perform routing of a packet among parent nodes and child nodes in a tree. The child nodes are user nodes that are objects of respective application layers in the memory spaces. The first nodes are the parent nodes. The user nodes, the first nodes, and a second node in the tree are assigned addresses that identify parent-child relationship of nodes in the tree. The second node is a parent node of the first nodes. The packet routing unit (a1) stores the packet if the source address is identical to an own node address, (a2) transfers the packet to a child node if the source address indicates the child node, and (a3) transfers the packet to a parent node in the other cases.

Abstract: A method begins by a processing module decoding a set of encoded data slices to produce a decoded data segment and determining whether the decoded data segment includes an error. When the decoded data segments includes the error, the processing module identifies one or more errant encoded data slices by decoding another set of encoded data slices to produce another decoded data segment. The method continues with the processing module determining whether the other decoded data segment includes the error. When the other decoded data segment does not include the error, the processing module identifies the one or more errant encoded data slices and corrects the one or more errant encoded data slices. When the other decoded data segment includes the error, the processing module repeats, for yet another set of encoded data slices, the decoding step, the determining step, and the identifying and correcting step or the repeating steps.

Abstract: Methods and systems are provided for tracking object instances stored on a plurality of network nodes, which tracking enables a global determination of when an object has no references across the networked nodes and can be safely de-allocated. According to one aspect of the invention, each node has a local object store for tracking and optionally storing objects on the node, and the local object stores collectively share the locally stored instances of the objects across the network. One or more applications, e.g., a file system and/or a storage system, use the local object stores for storing all persistent data of the application as objects.

Abstract: A single operating system image is shared among multiple running virtualized containers such that each running container interacts with underlying shared files and resources in system storage. Each container running on a server are provided the same image, which remains consistent among the containers. Each image is named and versioned and each container is configured in a manner that defines which underlying image is used when the container is started. When updates to the image are made, a new image is be generated, and the containers are be switched to the new image by changing configuration properties associated with the container and restarting the container.

Abstract: The disclosure discloses a method for hierarchically managing storage resources, which comprises: planning a storage space, establishing an address management index, and storing or reading data according to the index and a type of the data. The disclosure further discloses a system for hierarchically managing storage resources. Through the method and system of the disclosure, space can be better saved, storage requirements of data of different sizes can be met, and the storage space can be flexibly recorded and released.

Abstract: A partition manager relocates a logical partition from a primary shared processor pool to a secondary shared processor pool in response to a predetermined condition, such as a hardware failure. The relocated logical partition is allocated a smaller quantity of processing units from the secondary pool than it was allocated from the primary pool. A quantity of processing units reserved for a second logical partition is identified in the secondary shared processor pool, and a portion of those reserved processing units are allocated to the relocated logical partition. The reserved processing units may be redistributed among multiple relocated logical partitions.

Abstract: In a computer system that includes multiple nodes and multiple logical partitions, a dynamic partition manager computes current memory affinity and potential memory affinity to help determine whether a reallocation of resources between nodes may improve memory affinity for a logical partition or for the computer system. If so, the reallocation of resources is performed so memory affinity for the logical partition or computer system is improved. Memory affinity is computed relative to the physical layout of the resources according to a hardware domain hierarchy that includes a plurality of primary domains and a plurality of secondary domains.

Abstract: A computing system includes a parent partition, child partitions, a hypervisor, shared memories each associated with one of the child partitions, and trigger pages each associated with one of the child partitions. The hypervisor receives a system event signal from one of the child partitions and, in response to receiving the system event signal, accesses the trigger page associated with that child partition. The hypervisor determines whether the trigger page indicates whether data is available to be read from the shared memory associated with the child partition. The hypervisor can send an indication to either the parent partition or the child partitions that data is available to be read from the shared memory associated with the child partition if the hypervisor determines that the trigger page indicates that data is available to be read from the shared memory associated with the child partition.

Abstract: A method begins by a router receiving data for storage and interpreting the data to determine whether the data is to be forwarded or error encoded. The method continues with the router obtaining a routing table when the data is to be error encoded. Next, the method continues with the router selecting a routing option from the plurality of routing options and determining error coding dispersal storage function parameters based on the routing option. Next, the method continues with the router encoding the data based on the error coding dispersal storage function parameters to produce a plurality of sets of encoded data slices. Next, the method continues with the router outputting at least some of the encoded data slices of a set of the plurality of sets of encoded data slices to an entry point of the routing option.

Abstract: A memory heap is allocated to a contiguous range of memory. One end of the heap is designated as a small object area. The other end of the heap is designated as a large object area. When the two object areas grow, the small object area grows inward within the heap toward the large object area, and the large object area grows inward within the heap toward the small object area.

Abstract: Methods and systems for statistically eliding fences in a work stealing algorithm are disclosed. A data structure comprising a head pointer, tail pointer, barrier pointer and an advertising flag allows for dynamic load-balancing across processing resources in computer applications.

Abstract: A primary processing unit entitlement is determined for a logical partition. A smaller secondary processing unit entitlement is also determined. A partition manager allocates primary processing units to the logical partition from a primary shared processor pool, and the logical partition is activated. The secondary processing units are reserved for the logical partition from a secondary shared processor pool, and the logical partition can be relocated to the secondary shared processor pool in response to a condition such as a hardware failure. The logical partition can continue to process its workload with the fewer processor resources, and can be restored to the primary processing unit entitlement.

Abstract: A method includes calling a function of a memory class object to cause access to a value in a memory table of the memory class object so as to dynamically allocate a memory for access by an operating system. The memory class object represents the memory. The value corresponds to a property of a memory slice selected from a plurality of memory slices into which the memory is partitioned.

Abstract: Techniques for use with a processor configured to function as at least a Mapper in a MapReduce system include generating a set of [key, value] pairs by executing a Map function on input data. The set of [key, value] pairs may be stored in a storage system implemented on at least one data storage medium, the storage system being organized into a plurality of divisions with different divisions of the storage system storing [key, value] pairs corresponding to different keys. A first [key, value] pair corresponding to a first key handled by a first Reducer in the MapReduce system and a second [key, value] pair corresponding to a second key handled by a second Reducer in the MapReduce system may both be stored in a first division of the plurality of divisions.

Abstract: Systems and methods are provided for a hardware-implemented multi-buffer. A system includes a buffer memory comprising a shared memory space, where the memory space is shared between a first buffer and a second buffer, and where a dynamic delineation of the memory space between the first buffer and the second buffer is identified by a divider address. A dynamic buffer control circuit includes a control memory that is configured to store the divider address, a first memory utilization metric associated with the first buffer, and a second memory utilization metric associated with the second buffer. A system further includes one or more comparator circuits configured to compare the first memory utilization metric and the second memory utilization metric, where the dynamic buffer control circuit changes the divider address based on the comparison.

Abstract: A method for writing updated data into a flash memory module having a plurality of physical pages is provided, wherein each physical page is the smallest writing unit of the flash memory module. The method includes partitioning a physical page into storage segments and configuring a state mark for each storage segment, wherein the state marks indicate the validity of data stored in the storage segments. The method also includes writing the updated data into at least one of the storage segments and changing the state mark corresponding to the storage segment containing the updated data, wherein the state mark corresponding to the storage segment containing the updated data indicates a valid state, and the state marks corresponding to the other storage segments of the physical page not containing the updated data indicate an invalid state. Thereby, the time for writing data into a physical page is effectively shortened.

Abstract: System and method for managing updates at clients used by a user to access a cloud-based collaboration service are disclosed. In one aspect, embodiments of the present disclosure include a method, which may be implemented on a system, for storing a representation of the action to queues of clients associated with the user in a distributed database cluster based on an action type of an action performed by a collaborator of the user. The clients of the user are selected based on the client category and the action type of the action, to receive a notification as a result of the action or to perform a synchronization with changes that occurred as a result of the action.