Access Limiting Patents (Class 711/163)
  • Patent number: 11513856
    Abstract: Embodiments of the present disclosure relates to managing resources. The embodiment include receiving a first request from a first application to process first data using a target resource and a second request from a second application to process second data using the target resource and determining a first quantity and a second quantity based on the first request and the second request, the first quantity indicating an amount of data in the first data to be processed using the target resource, the second quantity indicating an amount of data in the second data to be processed using the target resource. The method further comprises causing the first application to process the first quantity of data in the first data using the target resource and causing the second application to process the second quantity of data in the second data using the target resource.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: November 29, 2022
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Bing Liu, Tao Chen
  • Patent number: 11507611
    Abstract: A system and method provide unstructured data to a client device based on permissions possessed by the device user and required by the data for access. Items of unstructured data stored in a data storage device are organized into data segments based on classifications assigned to them by their creators using a content management system. When a user later requests access to the data via a cloud-based service, such as a search service, the user privileges are converted into data segment identifiers which are then searched, and only the items of unstructured data that correspond to matching identifiers are returned. Data segment identifiers may be provided illustratively as a hash function to facilitate searching and to guarantee non-collision of data segment identifiers.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: November 22, 2022
    Assignee: Dell Products L.P.
    Inventors: Kalyan Palagummi, Hung Dinh
  • Patent number: 11507554
    Abstract: Disclosed are embodiments for generating metadata files for composite datasets. In one embodiment, a method is disclosed comprising generating a tree representing a plurality of datasets; parsing the tree into an algebraic representation of the tree; identifying a plurality of terms in the algebraic representation, each term in the terms comprising at least two factors, each of the two factors associated with a dataset in the plurality of datasets; generating a metadata object of the plurality of terms; serializing the metadata object to generate serialized terms; and storing the serialized terms in a metadata file associated with the plurality of datasets.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: November 22, 2022
    Assignee: YAHOO ASSETS LLC
    Inventors: George Aleksandrovich, Allie K. Watfa, Robin Sahner, Mike Pippin
  • Patent number: 11500745
    Abstract: Managing connectivity to synchronously replicated storage systems, including: identifying a plurality of storage systems across which a dataset is synchronously replicated; identifying a host that can issue I/O operations directed to the dataset; identifying a plurality of data communications paths between the host and the plurality of storage systems across which a dataset is synchronously replicated; identifying, from amongst the plurality of data communications paths between the host and the plurality of storage systems across which a dataset is synchronously replicated, one or more optimal paths; and issuing, to the host, an identification of the one or more optimal paths.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: November 15, 2022
    Assignee: PURE STORAGE, INC.
    Inventors: John Colgrove, Roland Dreier, David Grunwald, Steven Hodgson, Ronald Karr, Daquan Zuo
  • Patent number: 11494355
    Abstract: A size associated with a content file is determined to be greater than a threshold size. In response to the determination, file metadata of the content file split and stored across a plurality of component file metadata structures. The file metadata of the content file specifies tree structure organizing data components of the content file and each component file metadata structure of the plurality of component file metadata structures stores a portion of the tree structure. A snapshot tree is updated to reference the plurality of component file metadata structures for the content file.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: November 8, 2022
    Assignee: Cohesity, Inc.
    Inventors: Zhihuan Qiu, Ganesha Shanmuganathan
  • Patent number: 11487523
    Abstract: A method for hot updating machine emulator including requesting specified memory which is used to store the virtual machine memory address and virtual machine status information and is not released when updating a machine emulator; restoring the virtual machine status information from the specified memory after the machine emulator is updated. Thus, the techniques of the present disclosure accelerate recovery speed and shorten updating time.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: November 1, 2022
    Assignee: Alibaba Group Holding Limited
    Inventors: Xiantao Zhang, Junkang Fu
  • Patent number: 11481316
    Abstract: An embodiment includes a system, comprising: a processor configured to: read a stride parameter from a device coupled to the processor; and map registers associated with the device into virtual memory based on the stride parameter; wherein: the stride parameter is configured to indicate a stride between the registers associated with the device; and the processor is configured to map at least one of the registers to user space virtual memory in response to the stride parameter.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: October 25, 2022
    Inventor: Oscar Prem Pinto
  • Patent number: 11477232
    Abstract: Disclosed herein are systems and method for anti-virus scanning of backup data at a centralized storage. In an exemplary aspect, a method may receive, at the centralized storage, a backup slice from each respective computing device in a plurality of computing devices, wherein the centralized storage comprises, for each respective computing device, a respective backup archive including a plurality of backup slices. The method may mount the received backup slice as a virtual disk. The method may detect, for the respective computing device, a change between the mounted virtual disk and any number of previous backup slices and may evaluate the change against behavioral rules to identify malicious behavior. In response to determining that the change exhibits malicious behavior, the method may execute a remediation action to prevent an attack on the plurality of computing devices or the centralized storage.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: October 18, 2022
    Assignee: Acronis International GmbH
    Inventors: Andrey Kulaga, Vladimir Strogov, Sergey Ulasen, Oleg Ishanov, Igor Kornachev, Nikolay Grebennikov, Stanislav Protasov, Serguei Beloussov
  • Patent number: 11467916
    Abstract: Embodiments of the present disclosure provide a method, a device and a computer program product for storage management. The method comprises: obtaining time information related to a removal time point for a backup storage system, the time information indicating that a chunk in the backup storage system whose expiration time does not exceed the removal time point is to be removed; determining, from a removal period list, a target removal period whose end time does not exceed the removal time point, each removal period in the removal period list being mapped to at least one chunk element, the at least one chunk element representing at least one chunk in the backup storage system whose expiration time is within the removal period to which the at least one chunk element is mapped; determining at least one target chunk element to which the target removal period is mapped; and removing, from the backup storage system, at least one target chunk corresponding to the at least one target chunk element.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: October 11, 2022
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Haitao Li, Yi Wang, Qingxiao Zheng, Ke Li
  • Patent number: 11468034
    Abstract: The disclosure herein describes processing deletion requests using sequencing numbers with change feed updates. When a deletion occurs on the source data store, a deletion notification is created in a change feed on the source server. The deletion notification includes a set of deletion record IDs identifying a set of records to be deleted, a tombstone sequence number (TSN) identifying a sequence of the deletion notification within a set of deletion notifications and/or a deletion sequence number (DSN). The DSN is incremented by one each time a new deletion notification is created. A deletion notification can represent deletion of a single record or a set of records. Each deletion notification is assigned a time-to-live (TTL) value. The deletion notification is deleted at expiration of the TTL. The TSN and the DSN entries are used to determine whether any deletion updates have been missed to prevent silent failures.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: October 11, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Kapil Agarwal, Vaibhav Sharma
  • Patent number: 11461490
    Abstract: A combination default write-blocking system may include a host computer. The host computer may include at least one general storage device storing program instructions for a blocking driver assembly and a host processor configured as the blocking driver assembly while executing the program instructions for the blocking driver assembly. A connection interface device physically separate from the host processor, and the connection interface device is configured to be operatively coupled to the host processor and to a protected storage device physically separate from the general storage device, receive a communication from the blocking driver assembly, and establish communication between the protected storage device and the host processor after receiving the communication from the blocking driver assembly. The blocking driver assembly is further configured to communicate with the connection interface device and conditionally allow a host computer process to alter data stored on the protected storage device.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: October 4, 2022
    Assignee: CRU Data Security Group, LLC
    Inventors: William Livengood, William M. Head, II, Dean L. Mehler
  • Patent number: 11461485
    Abstract: Provided is a process, including: accessing, with a processor of an embedded computing device, immutable executable code stored in read-only memory of the embedded computing device; executing, with the processor of the embedded computing device, instructions of the immutable executable code that retrieve, from the read-only memory, a network-layer address of a tamper-evident, immutable data repository and an application-layer address of firmware of the embedded computing device stored in the tamper-evident, immutable data repository; executing, with the processor of the embedded computing device, instructions of the immutable executable code that, using the network-layer address and the application-layer address, download the firmware of the embedded computing device from the tamper-evident, immutable data repository; and executing, with the processor of the embedded computing device, instructions of the immutable executable code that store the downloaded firmware in re-writeable memory of the embedded comput
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: October 4, 2022
    Assignee: ALTR Solutions, Inc.
    Inventor: James Douglas Beecham
  • Patent number: 11455401
    Abstract: A data-processing device is provided. The data-processing device includes: a flash memory, a computation unit, and a flash-memory controller. The flash-memory controller is electrically connected to the computation unit, and configured to control access to the flash memory. The flash-memory controller allocates a first execute-only memory (XOM) setting and a second XOM setting in a first memory bank and a second memory bank of the flash memory, respectively. The flash-memory controller allocates one or more XOM spaces in the flash memory according to the first XOM setting or the second XOM setting.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: September 27, 2022
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Ming-Ying Liu, Kun-Yi Wu, Chun-Chi Chen
  • Patent number: 11455433
    Abstract: In one embodiment, a system on chip includes a dynamic voltage and frequency scaling (DVFS) power supply, a secure environment, a non-secure environment, and a power supply management control module. The secure environment is configured to generate a secure instruction defining a permitted operating point of voltage and frequency for the DVFS power supply. The non-secure environment is configured to generate a request to modify the DVFS power supply, where the request to modify includes a voltage-frequency operating point. The power supply management control module is configured to scale the DVFS power supply to the permitted operating point, in response to the request to modify the DVFS power supply.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: September 27, 2022
    Assignee: STMICROELECTRONICS (GRAND OUEST) SAS
    Inventors: Arnaud Rosay, Gerald Lejeune, Jean Nicolas Graux, Olivier Claude LeBreton
  • Patent number: 11455102
    Abstract: An electronic device is provided. A storage device includes a memory device and a memory controller. The memory device includes a write protection area. The memory controller controls the memory device to perform a read operation on the write protection area, in response to a series of requests regarding security read that are received from a host, provides read data received from the memory device to the host, and generates a device authentication code based on the read data. The memory controller performs generation of the device authentication code in parallel with provision of the read data to the host.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: September 27, 2022
    Assignee: SK hynix Inc.
    Inventor: Gun Wook Lee
  • Patent number: 11455182
    Abstract: Systems and methods are described for encrypting a swap file in a computer system. The swap file can be encrypted by a background process executing on the computer system. Processing of paging swapping operations occurs independently and separately of the background encryption of the swap file. Processing a page swapping operation can include decrypting or encrypting data to be swapped involved in the paging operation depending on the paging operation and whether or not the data to be swapped is encrypted or not.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: September 27, 2022
    Assignee: VMware, Inc.
    Inventors: Ishan Banerjee, Preeti Agarwal, Valeriy Zhuravlev, Nick M Ryan, Mohammed Junaid Ahmed
  • Patent number: 11450372
    Abstract: A device implementing purgeable memory mapped files includes at least one processor configured to receive a first request to store a first data object in volatile memory in association with a copy of the first data object stored in non-volatile memory, the first request indicating to lock the copy in the non-volatile memory. The processor is further configured to provide for storing the first data object in the volatile memory, and lock the copy stored in the non-volatile memory. The processor is further configured to receive a second request associated with clearing a portion of the non-volatile memory, provide an indication that a second data object is available for deletion from the non-volatile memory when the first data object is locked, and provide an indication that the first data object is available for deletion from the non-volatile memory when the first data object has been unlocked.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: September 20, 2022
    Assignee: Apple Inc.
    Inventor: Mark A. Pauley
  • Patent number: 11443031
    Abstract: A method for determining validity of a code of an application. The method is implemented within an electronic device having a processor, a non-secure memory and a secure memory. The method includes at least one iteration of: loading the application in the non-secure memory, delivering a current application code; determining a current footprint of the current application code; obtaining, within the secure memory, a reference footprint associated with the application; comparing the current footprint with the reference footprint; and when the current footprint is identical to the reference footprint, validating the current application code, including: executing an optimization process of the current application code, delivering an optimized application code; determining a post-optimization footprint of the optimized application code; and recording the post-optimization footprint in the secure memory as a new reference footprint associated with the application.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: September 13, 2022
    Assignee: BANKS AND ACQUIRERS INTERNATIONAL HOLDING
    Inventors: Christian Rolin, Maxime Bernelas
  • Patent number: 11436317
    Abstract: Examples of the present disclosure are related to systems and methods for assuring integrity of operating system and software components at runtime. More specifically, embodiments are directed towards a hardware module configured to monitor a kernel start and drivers being loaded into the kernel, and to continually scan the kernel and drivers for undesired modification after load. Further embodiments extend the monitoring capability to userspace processes.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: September 6, 2022
    Assignee: Raptor Engineering LLC
    Inventor: Timothy Raymond Pearson
  • Patent number: 11435955
    Abstract: A method, computer program product, and computing system for receiving, at a host computing device, a request to copy data from a source Non-Volatile Memory Express (NVMe) namespace directly accessible by a source storage controller to a destination NVMe namespace directly accessible by a destination storage controller and may determine whether the destination storage controller can directly access the source NVMe namespace. In response to determining that the destination storage controller cannot directly access the source NVMe namespace, a first identifier associated with the data may be generated via the source storage controller. The first identifier may be provided to the host computing device. A data handle associated with the first identifier may be generated via the destination storage controller. The data may be copied, via the destination storage controller, from the source NVMe namespace to the destination NVMe namespace based upon, at least in part, the data handle.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: September 6, 2022
    Assignee: EMC IP HOLDING COMPANY, LLC
    Inventors: Prakash Venkatanarayanan, David Lionel Black, Dmitry Tylik
  • Patent number: 11430174
    Abstract: Techniques are disclosed relating to specifying memory consistency constraints. In some embodiments, an instruction may specify, for a memory operation, a type of memory consistency and a scope at which to enforce the type of consistency. For example, these fields may specify whether to sequence memory accesses relative to the operation at one or more of multiple different cache levels based on the type of memory consistency and the scope.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: August 30, 2022
    Assignee: Apple Inc.
    Inventors: Terence M. Potter, Richard W. Schreyer, James J. Ding, Alexander K. Kan, Michael Imbrogno
  • Patent number: 11422793
    Abstract: Disclosed embodiments relate to reporting Electronic Control Unit (ECU) errors or faults to a remote monitoring server. Operations may include receiving operational data from a plurality of ECUs in the vehicle, the operational data being indicative of a plurality of runtime attributes of the plurality of ECUs; generating, through a machine learning process, a statistical model of the operational data; receiving live, runtime updates from the plurality of ECUs in the communications network of the vehicle; identifying an ECU error associated with an ECU in the communications network of the vehicle, the ECU error being determined by a comparison of the live, runtime updates with the statistical model of the operational data to identify at least one deviation from the operational data; and wirelessly sending a report to the remote monitoring server based on the live, runtime updates, the report identifying the ECU and the identified ECU error.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: August 23, 2022
    Assignee: Aurora Labs Ltd.
    Inventor: Zohar Fox
  • Patent number: 11416626
    Abstract: A method comprises: maintaining a database (120, 130) of access control events; dividing a portion (138) of the database into shares (140A, 140B, 140C); passing the respective shares to respective third party servers (44A, 44B, 44C); processing the shares in the respective third party servers; passing output of the processing to a further server (40) in common; and processing the output on the further server.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: August 16, 2022
    Assignee: Carrier Corporation
    Inventors: Shaunak D. Bopardikar, Alberto Speranzon, Marina V. Blanton
  • Patent number: 11398904
    Abstract: A method for allocating to a resource, in a system of addressable resources, a hybrid deterministic/random key for access to a second resource, includes maintaining a table of storage positions for key values, searching the table for an available storage position, determining an index, in the table, of the available storage position, generating a random key value associated with location of the second resource, storing the random key value in the storage position, and assembling the index and the random key value into the hybrid key. The index may be most significant bits of the hybrid key, with the random key value being the least significant bits. Alternatively, the index may be least significant bits of the hybrid key, with the random key value being the most significant bits, or the bits of the index may be distributed among bits of the random key value.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: July 26, 2022
    Assignee: Marvell Asia Pte, Ltd.
    Inventors: Adi Katz, Ruven Torok
  • Patent number: 11397541
    Abstract: An apparatus comprises memory access circuitry to perform a tag-guarded memory access in response to a target address, the tag-guarded memory access comprising a guard-tag check of comparing an address tag associated with the target address with a guard tag stored in association with a block of one or more memory locations comprising an addressed location identified by the target address. The memory access circuitry is responsive to a sequence of received target addresses specifying a sequence of addressed locations to perform a non-tag-guarded memory access that does not perform the guard-tag check to a subset of the sequence of addressed locations.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: July 26, 2022
    Assignee: Arm Limited
    Inventor: Graeme Peter Barnes
  • Patent number: 11392511
    Abstract: Embodiments are directed to providing a secure address translation service. An embodiment of a system includes DRAM for storage of data, an IOMMU coupled to the DRAM, and a host-to-device link to couple the IOMMU with one or more devices and to operate as a translation agent on behalf of one or more devices in connection with memory operations relating to the DRAM, including receiving a translated request from a discrete device via the host-to-device link specifying a memory operation and a physical address within the DRAM pertaining to the memory operation, determining page access permissions assigned to a context of the discrete device for a physical page of the DRAM within which the physical address resides, allowing the memory operation to proceed when the page access permissions permit the memory operation, and blocking the memory operation when the page access permissions do not permit the memory operation.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: July 19, 2022
    Assignee: Intel Corporation
    Inventors: David Koufaty, Rajesh Sankaran, Anna Trikalinou, Rupin Vakharwala
  • Patent number: 11392313
    Abstract: A memory controller according to an aspect of the present invention includes a BIST (built-in self-tester) configured to test a memory, a scheduler configured to change an execution order of memory commands to be transmitted to the memory, a main controller configured to control the memory, and a switch configured to connect one of an output of the scheduler and an output of the BIST to an input of the main controller in response to a control signal output from the BIST.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: July 19, 2022
    Assignee: SILICON WORKS CO., LTD.
    Inventor: Jang Won Seo
  • Patent number: 11379385
    Abstract: Mechanisms to protect the integrity of memory of a virtual machine are provided. The mechanisms involve utilizing certain capabilities of the hypervisor underlying the virtual machine to monitor writes to memory pages of the virtual machine. A guest integrity driver communicates with the hypervisor to request such functionality. Additional protections are provided for protecting the guest integrity driver and associated data, as well as for preventing use of these mechanisms by malicious software. These additional protections include an elevated execution mode, termed “integrity mode,” which can only be entered from a specified entry point, as well as protections on the memory pages that store the guest integrity driver and associated data.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: July 5, 2022
    Assignee: VMware, Inc.
    Inventors: Alok Nemchand Kataria, Wei Xu, Radu Rugina, Jeffrey W. Sheldon, James S. Mattson, Rakesh Agarwal, David Dunn
  • Patent number: 11372952
    Abstract: Systems and methods for managing access data are disclosed. One method can comprise receiving prediction information relating to one or more content options and requesting access information associated with the prediction information. At least a portion of the received access information can be processed to provide a preliminary access decision. A request for access relating to the one or more data options can be received and an access decision based at least in part on the preliminary access decision can be provided.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: June 28, 2022
    Assignee: COMCAST CABLE COMMUNICATIONS, LLC
    Inventors: Alfred Joseph Stappenbeck, Joseph Lesh
  • Patent number: 11372681
    Abstract: Embodiments for allocating and reclaiming memory using dynamic buffer allocation for a slab memory allocator. The method keeps track of a count of a total number of worker threads and a count of a total number of quiesced threads, and determines if there is any free slab memory. If there is no free slab memory, the method triggers an out of memory event and increments the count of the total number of quiesced threads. It reclaims all objects currently allocated in an object pool, and allocates a buffer of a next smaller size than an original buffer until a sufficient amount of slab memory is freed.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: June 28, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Tony Wong, Abhinav Duggal, Hemanth Satyanarayana
  • Patent number: 11372573
    Abstract: A method, computer program product, and computer system for receiving, at a computing device, a write request from a host, wherein a first portion of a process may receive the write request. A callback and context may be set in the write request by the first portion of the process. The write request may be passed to a second portion of the process. The first process may be provided with the context. The first process may use the context to replicate the write request data to a destination.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: June 28, 2022
    Assignee: EMC IP HOLDING COMPANY, LLC
    Inventors: Alan L. Taylor, Michael C. Brundage, Nagapraveen Veeravenkata Seela, William C. Davenport, Xiangping Chen, Xunce Zhou
  • Patent number: 11363058
    Abstract: A first storage device or first storage disk including first executable instructions that, when executed, cause a processor to at least: in response to determining a variable associated with a memory page that (1) has been loaded into local memory from a second storage device and (2) has been accessed from the local memory, has a first state, identify the memory page as a modified memory page, the memory page including second executable instructions. The first instructions also cause the processor to, in response to determining the second executable instructions of the modified memory page have been changed since a previous analysis of the modified memory page, perform anti-malware analysis of at least a portion of the modified memory page.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: June 14, 2022
    Assignee: MCAFEE, LLC
    Inventors: Venkata Ramanan Sambandam, Carl D. Woodward, Dmitri Rubakha, Steven L. Grobman
  • Patent number: 11347413
    Abstract: An opportunistic storage service, or system, identifies currently unused storage capacity on a plurality of physical storage components of computing devices dispersed throughout a provider network. In some embodiments, the currently unused storage capacity is provisioned as primary storage, but is not currently being used to store primary storage data. The opportunistic storage service advertises at least a portion of the currently unused storage capacity as opportunistic storage capacity and provisions the opportunistic storage capacity subject to revocation if additional storage capacity of the physical storage components is needed to store primary storage data to fulfill a primary storage commitment.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: May 31, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Christopher Nathan Watson, Leonid Baryudin, Tyler Huston Doornenbal, Truong Nguyen, Phillip Peterson, Wenzhou Chen, Christopher J. Douglass
  • Patent number: 11347712
    Abstract: In one embodiment, a method includes receiving, at a job control manager, a command specifying execution of a batch application. The method also includes receiving, at the job control manager, a commit count associated with the batch application, and initiating the batch application, with the batch application processing a group of records. The method also includes locking a first record of the group of records in response to the first record being processed by the batch application with the proviso that the batch application does not cause the first record to be unlocked unless the batch application has finished processing a last record in the group of records. Moreover, the method includes committing, in response to the batch application having completed processing of an nth record of the group of records, all records of the group of records that are locked resulting from execution of the batch application.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: May 31, 2022
    Assignee: International Business Machines Corporation
    Inventors: Terri A. Menendez, Roity Prieto Perez
  • Patent number: 11340684
    Abstract: An information handling system includes an embedded controller to capture a current battery power level of a battery that is a sole source of power of the information handling system. A service module may update a configuration table with anticipated power consumption associated with a component of the information handling system, wherein the anticipated power consumption is based on an operation, and predict whether the current battery power level is sufficient to complete the operation, including comparing the current battery power level with the anticipated power consumption of the component. If the current battery power level is sufficient to complete the operation, then the service module may execute the operation. If the current battery power level is insufficient to complete the operation, then the service module may provide one or more options associated with the operation based on a power management policy.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: May 24, 2022
    Assignee: Dell Products L.P.
    Inventors: Shekar Babu Suryanarayana, Daniel L. Hamlin
  • Patent number: 11340883
    Abstract: An application can be installed, updated or reconfigured without disabling a write filter. When a package is to be deployed to a client terminal to install, update or reconfigure an application, an overlay optimizer can be instructed to start a session. During the session, the overlay optimizer can analyze I/O requests to identify any I/O request that pertains to the deployment of the package. The overlay optimizer can then redirect the identified I/O requests to a session overlay that the overlay optimizer has created for the session rather than passing the I/O requests to the write filter. As a result, the artifacts that are affected by the deployment of the package will be stored in the session overlay rather than the write filter's overlay. Once the session is completed, the overlay optimizer can copy the artifacts from the session overlay to the write filter's overlay and commit them.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: May 24, 2022
    Assignee: Dell Products L.P.
    Inventors: Gokul Thiruchengode Vajravel, Jyothi Bandakka
  • Patent number: 11341285
    Abstract: An integrated circuit device includes a shuffler, a logic unit and registers each including two or more bit storages. The shuffler receives an address indicating one of the registers and data bits, selects target bit storages at which the data bits are to be stored from among bit storages of the registers depending on a shuffle configuration and the address, stores the data bits into the target bit storages, and transfers the data bits from the target bit storages depending on the shuffle configuration. The logic unit receives the data bits transferred from the shuffler and operates using the received data bits. The shuffle configuration is adjusted when a reset operation is performed.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: May 24, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Gijin Kang
  • Patent number: 11341268
    Abstract: The present invention provides a storage device (100) which consists of multiple access levels to access data or information depending on its importance, usefulness, severity, criticality and vulnerability. Further, the storage device (100) ensures data protection through confidentiality, integrity and accessibility for information security by disabling any connection with external communication channels such as Wi-Fi, Bluetooth and so on. Further, the storage device (100) is designed to erasing all the credentials data after 5 unsuccessful attempts ensuring security of the data or information. Authenticated data or information stored on the device can only be accessed by the owner of the device thereby preserving the integrity of the stored data. Reminders may be set for authentication related data which helps change the authentication credentials in time.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: May 24, 2022
    Assignee: Rajesh Tergaon Munavalli Demanna
    Inventor: Rajesh Tergaon Munavalli Demanna
  • Patent number: 11327673
    Abstract: Techniques for persisting user data across secure shell instances are provided. The techniques include a method wherein a computer system receives a request to reserve a block volume, the request being received from a session manager service. The method also includes reserving the block volume, identifying a data center identifier of the block volume, returning the data center identifier of the block volume to the session manager service, attaching the block volume to a volume management fleet machine, receiving an instruction from the session manager service to release the block volume, creating a backup of the block volume comprising the data stored in the block volume, and releasing the block volume.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: May 10, 2022
    Assignee: Oracle International Corporation
    Inventors: Christopher S. Kasso, Peter Grant Gavares, Shih-Chang Chen, Devasena Kiruba Sagar, Michael William Gilbode
  • Patent number: 11316706
    Abstract: A method for validating access to data files using a combination of secure data values includes: storing at least a first check value and a seed value in an account profile; receiving a data request message including at least a first data value, a second data value, a timestamp, and a data file request from a computing device; identifying a second check value using a predetermined algorithm applied to at least the seed value and the timestamp; validating the first data value using the first check value and the second data value using the second check value; and transmitting one or more data files indicated in the data file request to the computing device upon successful validation of the first data value and the second data value.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: April 26, 2022
    Assignee: MASTERCARD INTERNATIONAL INCORPORATED
    Inventors: Chandan Garg, Ankur Arora, Jaipal Singh Kumawat
  • Patent number: 11316873
    Abstract: The system collects startup commands associated with network-attached computing devices. A startup command is automatically executed by a device on which the startup command is stored upon startup of the device and is associated with a device identifier for the device. For each startup command, a corresponding command tag is determined for the startup command using a verb list. Using the device identifier associated with each startup command and the command tag determined for each startup command, a proportion of the plurality of devices is determined that are associated with each command tag. Based on the determined proportion of the plurality of devices that are associated with each command tag, a suspicious command tag is determined. A report is stored that includes the suspicious command tag, suspicious startup command(s) associated with the suspicious command tag, and the device identifier associated with each suspicious startup command.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: April 26, 2022
    Assignee: Bank of America Corporation
    Inventors: Matthew E. Kelly, Jeffrey Dye, Dan E. Summers, David Arnett, Michael E. H. Dunten
  • Patent number: 11314430
    Abstract: Techniques read data. Such techniques involve: in response to receiving a read request from the user for data on a physical data block, determining whether there is data state information corresponding to the physical data block. The data state information may include a plurality of units for respectively indicating availability of data stored in a plurality of sub-blocks of the physical data block. Such techniques further involve: in response to determining that there is data state information, selecting a target sub-block from the plurality of sub-blocks of the physical storage block based on the data state information. Such techniques further involve: providing the user with data stored in the target sub-block. Such techniques are capable of determining the availability of data at a finer granularity.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: April 26, 2022
    Assignee: EMC IP Holding Company LLC
    Inventors: Lifeng Yang, Xiongcheng Li, Xinlei Xu
  • Patent number: 11307779
    Abstract: The present invention is an controller for dynamically allocating RAM between powersave code copied from ROM and transient RAM memory used for storing packets. When the utilization of the transient RAM memory is low, code segments are copied from ROM and executed from RAM using a RAM pointer table which is updated after the code segments are copied over from ROM, and when the utilization of the transient RAM memory is high, code segments are deallocated from RAM and the pointer table is updated to point to the corresponding location in flash ROM.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: April 19, 2022
    Assignee: Ceremorphic, Inc.
    Inventors: Subba Reddy Kallam, Partha Sarathy Murali, Venkata Siva Prasad Pulagam, Anusha Biyyani, Venkatesh Vinjamuri, Shahabuddin Mohammed, Rahul Kumar Gurram, Akhil Soni
  • Patent number: 11303641
    Abstract: A method includes retrieving, by a workspace client on a computing device, a first set of resource associations from a workspace server. The first set of resource associations identify one or more data file-types executable by each application on a virtualization server. The method also includes generating, by the workspace client, from the first set of resource associations, a second set of resource associations. The second set of resource associations identify a subset of applications on the virtualization server operable to perform operations on each of the one or more data file-types. The method further includes obtaining, by a storage provider client on the computing device, the second set of resource associations. The storage provider client is configured to enable one or more applications on the virtualization server to execute at least one data file accessible from a storage provider.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: April 12, 2022
    Assignee: Citrix Systems, Inc.
    Inventors: Georgy Momchilov, Mukund Ingale
  • Patent number: 11281810
    Abstract: Examples described herein provide for memory access protection in programmable logic devices. In an example, an integrated circuit includes a programmable logic region, control logic, an interconnect, and a memory controller. The control logic is communicatively coupled to the programmable logic region. The control logic is configurable to generate one or more transaction attributes of a memory transaction request, and the memory transaction request is communicated from the programmable logic region. The interconnect is communicatively coupled to the control logic. The interconnect is operable to communicate the memory transaction request therethrough. The memory controller is communicatively coupled to the interconnect. The memory controller is operable to receive the memory transaction request. The memory controller is configurable to determine whether the memory transaction request is permitted based on the one or more transaction attributes.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: March 22, 2022
    Assignee: XILINX, INC.
    Inventor: Ian A. Swarbrick
  • Patent number: 11282033
    Abstract: There is provided an inter-company information sharing system in which a communication connection is made with a plurality of computers individually corresponding to a plurality of companies, including information disclosure request receiving means for receiving an information disclosure request from each of the computers, information registration request receiving means for receiving an information registration request from each of the computers, information storage means for storing information regarding the information registration request, and disclosure control means for controlling a disclosure of the information stored in the information storage means on the basis of information regarding the company corresponding to the computer that has transmitted the information registration request and the information regarding the company corresponding to the computer that has transmitted the information disclosure request.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: March 22, 2022
    Assignee: Sony Interactive Entertainment Inc.
    Inventors: Taku Tanabe, Kensaku Ishizuka, Naoyuki Miyada
  • Patent number: 11275637
    Abstract: A processor of an aspect includes an instruction pipeline to process a multiple memory address instruction that indicates multiple memory addresses. The processor also includes multiple page fault aggregation logic coupled with the instruction pipeline. The multiple page fault aggregation logic is to aggregate page fault information for multiple page faults that are each associated with one of the multiple memory addresses of the instruction. The multiple page fault aggregation logic is to provide the aggregated page fault information to a page fault communication interface. Other processors, apparatus, methods, and systems are also disclosed.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: March 15, 2022
    Assignee: Intel Corporation
    Inventors: Boris Ginzburg, Ronny Ronen, Ilya Osadchiy
  • Patent number: 11269802
    Abstract: An apparatus, system, and method are disclosed that service SCSI commands, including SCSI PGR commands in the standby node of a storage system that operates in an Asymmetric Logic Unit Access (ALUA) mode. The apparatus, system, and method service SCSI PGR commands without maintaining peer/proxy port information. The apparatus, system, and method service SCSI commands by forwarding/proxying commands between the active node and standby node, in both directions and use a modified command descriptor block (MCDB) message to conduct the communications between the nodes.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: March 8, 2022
    Inventor: Vikash Mehta
  • Patent number: 11269649
    Abstract: Processing circuitry performs multiple beats of processing in response to a vector instruction, each beat comprising processing corresponding to a portion of a vector value comprising multiple data elements. The processing circuitry sets beat status information indicating which beats of a group of two or more vector instructions have completed. In response to a return-from-event request indicating a return to processing of a given vector instruction, the processing circuitry resumes processing of the group of uncompleted vector instructions while suppressing beats already completed, based on the beat status information.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: March 8, 2022
    Assignee: ARM LIMITED
    Inventor: Thomas Christopher Grocutt
  • Patent number: 11258599
    Abstract: A system and method use a physical unclonable function in a PUF circuit on an integrated circuit to generate a security key, and stabilize the security key by storage in a set of nonvolatile memory cells. The stabilized security key is moved from the set of nonvolatile memory cells to a cache memory, and utilized as stored in the cache memory in a security protocol. Also, data transfer from the PUF circuit to the set of nonvolatile memory cells can be disabled after using the PUF circuit to produce the security key, at a safe time, such as after the security key has been moved from the set of nonvolatile memory cells to the cache memory.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: February 22, 2022
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chun-Hsiung Hung, Kuen-Long Chang, Ken-Hui Chen, Shih-Chang Huang, Chin-Hung Chang, Chen-Chia Fan