Memory Partitioning Patents (Class 711/173)
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Patent number: 10282232Abstract: A method, computer program product, and computer system for physical memory allocation of a computer system, the method including collecting computer system architecture specifications, a configuration, and user requirements, identifying a plurality of memory intervals to be allocated, based on the computer system architecture specification, the configuration, and the user requirements, grouping memory intervals into a plurality of color groups, wherein each memory interval within each of the plurality of color groups comprise identical memory attributes, dividing memory into sets of memory segments, wherein each set of memory segment is assigned a color of the plurality of color groups, allocating a memory interval of the plurality of memory intervals within the set of memory segments of corresponding color, and selecting a page size for a translation of a memory interval of the plurality of memory intervals, depending upon the allocation of the memory interval and the sets of memory segments.Type: GrantFiled: June 12, 2017Date of Patent: May 7, 2019Assignee: International Business Machines CorporationInventors: Shai Doron, Wesam Saleem Ibraheem, Hernan Theiler, Vitali Sokhin, Hagai Hadad
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Patent number: 10223125Abstract: An execution slice circuit for a processor core has multiple parallel instruction execution slices and provides flexible and efficient use of internal resources. The execution slice circuit includes a master execution slice for receiving instructions of a first instruction stream and a slave execution slice for receiving instructions of a second instruction stream and instructions of the first instruction stream that require an execution width greater than a width of the slices. The execution slice circuit also includes a control logic that detects when a first instruction of the first instruction stream has the greater width and controls the slave execution slice to reserve a first issue cycle for issuing the first instruction in parallel across the master execution slice and the slave execution slice.Type: GrantFiled: July 30, 2018Date of Patent: March 5, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jeffrey Carl Brownscheidle, Sundeep Chadha, Maureen Anne Delaney, Hung Qui Le, Dung Quoc Nguyen, Brian William Thompto
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Patent number: 10223253Abstract: A memory allocation system is provided and includes nodes, one or more memories, and an allocation interface. Each of the nodes includes a respective set of processors. The one or more memories include memory elements for storing threads. The memory elements refer to respective portions of the one or more memories and are accessible to at least one of the nodes. The allocation interface is configured to allocate the memory elements to lockless list structures. Each of the lockless list structures is allocated to a respective set of the memory elements. The lockless list structures are partitioned for the processors. The allocation interface is configured to receive requests from the processors for the memory elements and adjust allocation of the memory elements between the lockless list structures according to a balancing metric.Type: GrantFiled: May 15, 2017Date of Patent: March 5, 2019Assignee: Microsoft Technology Licensing, LLCInventors: Amol Dilip Dixit, Bradley Michael Waters
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Patent number: 10198274Abstract: Technologies for hybrid sleep power management include a computing device with a processor supporting a low-power idle state. In a pre-boot firmware environment, the computing device reserves a memory block for firmware use and copies platform wake code to a secure memory location, such as system management RAM (SMRAM). At runtime, an operating system may execute with the processor in protected mode. In response to a request to enter a sleep or suspend state, the computing device generates a system management interrupt (SMI). In an SMI handler, the computing device copies the wake code from SMRAM to the reserved memory block. The computing device resumes from the SMI handler to the wake code with the processor in real mode. The wake code enters the low-power idle state and then jumps to a wake vector of the operating system after receiving a wake event. Other embodiments are described and claimed.Type: GrantFiled: March 27, 2015Date of Patent: February 5, 2019Assignee: Intel CorporationInventors: Nicholas J. Adams, Erik C. Bjorge, Giri P. Mudusuru
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Patent number: 10191773Abstract: A distributed computing system for automatic constraint-based data resource arrangement, comprising a plurality of computing components being communicatively coupled to each other, each computing component comprising the following data resources: data storage media for storing client-related digital information, a data processor for processing said client-related digital information, and a network communications interface for communicating said client-related digital information; and a constraint engine for automatically determining alternate arrangements of said data resource assignments, said constraint engine comprising a constraint processor and a constraint database, said constraint database for receiving and storing changeable digital constraint parameters indicative of permissible operational constraints on said data resources, wherein said alternate arrangements comply with at least a first set of said changeable digital constraint parameters; wherein said data resource assignments are reassigned fromType: GrantFiled: February 13, 2017Date of Patent: January 29, 2019Assignee: Open Invention Network LLCInventors: Jacob Taylor Wires, Andrew Warfield
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Patent number: 10187178Abstract: Systems, methods, and software technology for partitioning media streams is disclosed herein. In an implementation, an application partitions an encoded media stream into multiple sub-streams having different code rates relative to each other. The sub-streams may then be transmitted to different wireless access points. A change in a monitored performance of at least one of the wireless access points may drive a modification to the partitioning of the media stream such that the code rates change relative to each other.Type: GrantFiled: October 11, 2016Date of Patent: January 22, 2019Assignee: Microsoft Technology Licensing, LLCInventor: Amer Hassan
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Patent number: 10185574Abstract: Live imaging of a device can be performed. A client device can include at least two drives that are alternately employed to store the active OS partition. An imaging solution that executes on the active OS partition on a first drive can perform a live imaging process in which a second drive is fully imaged while the user continues to use the client device. Then, once the imaging of the second drive has been completed, the client device can be rebooted to cause the client device to boot from the second drive. In this way, the only downtime that a user may experience due to the imaging process is during the reboot. In a similar manner, when a client device includes only a single available drive, the drive can be divided into two or more sets of one or more partitions that are alternately employed as the active OS partition(s).Type: GrantFiled: May 19, 2016Date of Patent: January 22, 2019Assignee: Wyse Technology L.L.C.Inventors: Kabilraj Upendran Kamalamma, Jyothi Bandakka Nanjappa
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Patent number: 10185651Abstract: Some examples described herein relate to relocating a virtual address in a persistent memory. An example includes determining whether a base address of a virtual address segment in a persistent memory has changed. In response to the determination that the base address of the virtual address segment has changed, an offset value between the base address of the virtual address segment and a new base address of the virtual address segment is determined. The offset value is used to relocate a virtual address of a primary data structure in the virtual address segment from a present location to a new location in the persistent memory. Then, a present location of a virtual address of an associated data structure of the primary data structure in the virtual address segment is determined. The offset value is used to relocate the virtual address of the associated data structure of the primary data structure from a current location to another location in the persistent memory.Type: GrantFiled: July 10, 2014Date of Patent: January 22, 2019Assignee: Hewlett Packard Enterprise Development LPInventor: Pramod Kumar Mangalore
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Patent number: 10146700Abstract: One apparatus includes a storage division selection module configured to select a storage division of a solid-state storage medium for recovery. The solid-state storage medium includes a plurality of storage divisions. Each storage division includes a plurality of storage locations. The apparatus also includes an erase module configured to erase the selected storage division. The apparatus includes a storage division recovery module configured to store a sequence indicator in the erased storage division. The sequence indicator is indicative of an ordered sequence of the plurality of storage divisions, and the sequence indicator is determined by reading information stored with data on the plurality of storage divisions.Type: GrantFiled: September 15, 2016Date of Patent: December 4, 2018Assignee: LONGITUDE ENTERPRISE FLASH S.A.R.L.Inventors: David Flynn, Bert Lagerstedt, John Strasser, Jonathan Thatcher, John Walker, Michael Zappe
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Patent number: 10148788Abstract: A method for selecting a substantially optimized scheduler from a plurality of schedulers for executing dispersed storage error functions on a distributed storage network begins with a computing device receiving a dispersed storage error functions along with an indication of measured throughput and measured latency from a requesting device. The method resumes when a scheduler is selected from the plurality of schedulers based on desired latency and throughput, while considering the characteristics of the dispersed error function being executed. The method continues with the computing device receiving a different dispersed error function and selecting a different scheduler.Type: GrantFiled: June 5, 2017Date of Patent: December 4, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ethan S. Wozniak, Manish Motwani
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Patent number: 10133581Abstract: An execution slice circuit for a processor core has multiple parallel instruction execution slices and provides flexible and efficient use of internal resources. The execution slice circuit includes a master execution slice for receiving instructions of a first instruction stream and a slave execution slice for receiving instructions of a second instruction stream and instructions of the first instruction stream that require an execution width greater than a width of the slices. The execution slice circuit also includes a control logic that detects when a first instruction of the first instruction stream has the greater width and controls the slave execution slice to reserve a first issue cycle for issuing the first instruction in parallel across the master execution slice and the slave execution slice.Type: GrantFiled: January 13, 2015Date of Patent: November 20, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jeffrey Carl Brownscheidle, Sundeep Chadha, Maureen Anne Delaney, Hung Qui Le, Dung Quoc Nguyen, Brian William Thompto
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Patent number: 10101942Abstract: A system and method is disclosed for managing data in a garbage collection operation using a hybrid push-pull technique. The system includes multiple non-volatile memory sub-drives associated with a specific data type and shared volatile memory garbage collection buffer sized to only receive a predetermined amount of host data of a single data type and associated large data chunk correction data. A controller identifies and accumulates valid data of a single data type from the source block and combines it with XOR data for that valid data to generate a protected data stripe in the buffer. The controller writes the protected data stripe to the sub-drive containing data of the same data type. Only after writing the protected data stripe to the appropriate sub-drive, the controller repeats the process in the same source block for the same or different data type of data.Type: GrantFiled: April 17, 2017Date of Patent: October 16, 2018Assignee: SanDisk Technologies LLCInventors: Liam Michael Parker, Sergey Anatolievich Gorobets
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Patent number: 10104158Abstract: A data storage system may generally have a controller connected to multiple separate data storage devices in a distributed network. Each data storage device may be configured with a user invisible diagnostic region where diagnostic information is stored in logical block addresses (LBA) beyond a storage capacity of the respective data storage devices and the diagnostic information can be accessible via read and write requests to LBA beyond the storage capacity of the respective data storage devices.Type: GrantFiled: July 17, 2013Date of Patent: October 16, 2018Assignee: Seagate Technology LLCInventors: Thomas R. Prohofsky, Sumanth Jannyavula Venkata
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Patent number: 10084770Abstract: A method begins by a processing module storing a plurality of encoded data slices in a plurality of memory devices of a dispersed storage (DS) unit of a dispersed storage network (DSN) memory using a quantity load balancing function to substantially balance a quantity of encoded data slices stored within each of the plurality of memory devices, wherein data size of at least some of the plurality of encoded data slices is different. The method continues with the processing module determining whether an available memory imbalance exists between a first memory device of the plurality of memory devices and a second memory device of the plurality of memory devices. The method continues with the processing module migrating one or more encoded data slices between the first and second memory devices to reduce the available memory imbalance when the available memory imbalance exists.Type: GrantFiled: November 4, 2011Date of Patent: September 25, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Manish Motwani, Andrew Baptist
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Patent number: 10067868Abstract: A memory architecture for storing information units, the memory architecture comprising a plurality of memory banks or a plurality of memory devices and a memory controller for initiating storage of an information unit and a number of replicas of the information unit in the memory banks or in the memory devices, the memory controller discriminating the replicas in dependence on a size of the information unit.Type: GrantFiled: September 19, 2014Date of Patent: September 4, 2018Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventor: Shlomo Reches
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Patent number: 10055136Abstract: Systems and methods for maintaining guest input/output (I/O) tables in a swappable memory. An example method comprises: allocating, by a hypervisor running on a host computer system, one or more memory pages mapped into a memory space of a virtual machine running on the host computer system, to store a guest input/output (I/O) table comprising a plurality of I/O table entries, wherein each I/O table entry maps a device identifier of an I/O device to a memory address of a memory buffer associated with the I/O device; determining, by a processing device of the host computer system, that a memory page comprises one or more I/O table entries that reference memory buffers that are marked as being not accessible by associated I/O devices; and swapping out the memory page to a backing storage.Type: GrantFiled: July 29, 2015Date of Patent: August 21, 2018Assignee: Red Hat Israel, Ltd.Inventors: Michael Tsirkin, Andrea Arcangeli
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Patent number: 10048967Abstract: Methods of running a 32-bit operating system on a 64-bit processor are described. In an embodiment, the processor comprises 64-bit hardware and when running a 64-bit operating system operates as a single-threaded processor. However, when running a 32-bit operating system (which may be a guest operating system running on a virtual machine), the processor operates as a two-threaded core. The register file is logically divided into two portions, one for each thread, and logic within a functional unit may be split between threads, shared between threads or duplicated to provide an instance of the logic for each thread. Configuration bits may be set to indicate whether the processor should operate as a single-threaded or multi-threaded device.Type: GrantFiled: July 14, 2015Date of Patent: August 14, 2018Assignee: MIPS Tech, LLCInventor: Hugh Jackson
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Patent number: 10031801Abstract: Technology relating to configurable reliability schemes for memory devices is disclosed. The technology includes a memory controller that selectively controls at least a type or an extent of a reliability scheme for at least a portion of a memory device. The technology also includes a computing device that can dynamically select and employ reliability schemes from a collection of different reliability schemes. A reliability scheme may be selected on a per-process, per-allocation request, per-page, per-cache-line, or other basis. The reliability schemes may include use of parity, use of data mirroring, use of an error correction code (ECC), storage of data without redundancy, etc.Type: GrantFiled: December 1, 2015Date of Patent: July 24, 2018Assignee: Microsoft Technology Licensing, LLCInventors: Sriram Govindan, Bryan Kelly
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Patent number: 10025513Abstract: An application execution method for improving the operation speed of the application in executing or in the middle of running the application is provided. The application execution method includes detecting a launch of an application, preloading Input/Outputs (I/Os) requested at the launch based on profile data with I/Os requested at a previous launch of the application, and updating the profile data based on at least one of the I/Os requested at current and previous launches of the application.Type: GrantFiled: March 1, 2017Date of Patent: July 17, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Kwonsik Kim, Hyojeong Lee, Seyoun Lim, Sangbok Han, Myungsun Kim, Jongchul Park
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Patent number: 10009184Abstract: A server computer provides centralized key management services to several computers having encrypted files or file systems. The server computer receives key requests from the computers. The server computer issues a key to a computer that passes an integrity check. The key is used to unlock an encrypted file or file system in the computer. When the computer fails another integrity check after receiving the key, indicating a change in the security posture of the computer, the server computer may revoke the key automatically or upon receipt of an instruction from a key administrator.Type: GrantFiled: August 29, 2014Date of Patent: June 26, 2018Assignee: Trend Micro IncorporatedInventors: Matthew Graham Baldwin, Bharath Kumar Chandrasekhar
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Patent number: 9990305Abstract: A memory management component arranged to receive memory access transactions and provide memory management functionality therefor, and a method of providing memory management functionality within a processing system are disclosed. The memory management component comprises a first memory management module arranged to provide memory management functionality for received memory access transactions in accordance with a paging memory management scheme, and at least one further memory management module arranged to provide memory management functionality for received memory access transactions in accordance with an address range memory management scheme.Type: GrantFiled: September 19, 2014Date of Patent: June 5, 2018Assignee: NXP USA, Inc.Inventors: Nir Baruch, Nir Atzmon, David W. Todd
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Patent number: 9990259Abstract: The present disclosure provides a system and method for online brand continuity. Online brand continuity can include a number of Internet or intranet access points via which one or more network addresses can be advertised. A client can be provided with availability of a business image application via at least one of the Internet or intranet access points.Type: GrantFiled: September 1, 2014Date of Patent: June 5, 2018Assignee: United Services Automobile Association (USAA)Inventors: David M. Niedzielski, Christopher S. Trost, Roger Pena, Tommy Lavelle, Donald E. Clemons
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Patent number: 9934163Abstract: A technique for managing storage in a data storage system includes ingesting host data into a data log backed by pages in a cache. The host data are addressed to specified locations in a data object stored in persistent storage devices. When mapping pages in cache to respective target locations in the persistent storage devices, a flag is selectively asserted to indicate whether there is contiguous free space at the target locations. The cache responds to the flag by delaying flushing of flagged pages, which provides more time for the cache to aggregate pages that map to contiguous free space. Meanwhile, pages that are not flagged can be flushed more quickly, enabling the cache to operate efficiently even though flushing of some pages is delayed.Type: GrantFiled: September 30, 2016Date of Patent: April 3, 2018Assignee: EMC IP Holding Company LLCInventors: Philippe Armangau, Chris Seibel, Henry Austin Spang, IV, David John Agans
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Patent number: 9912962Abstract: An image coding method includes: deriving a candidate for a motion vector predictor from a co-located motion vector; adding the candidate to a list; selecting the motion vector predictor from the list; and coding a current block and coding a current motion vector, wherein the deriving includes: deriving the candidate by a first derivation scheme in the case of determining that each of a current reference picture and a co-located reference picture is a long-term reference picture; and deriving the candidate by a second derivation scheme in the case of determining that each of the current reference picture and the co-located reference picture is a short-term reference picture.Type: GrantFiled: May 26, 2017Date of Patent: March 6, 2018Assignee: SUN PATENT TRUSTInventors: Viktor Wahadaniah, Chong Soon Lim, Sue Mon Thet Naing, Hai Wei Sun, Toshiyasu Sugio, Takahiro Nishi, Hisao Sasai, Youji Shibahara, Kyoko Tanikawa, Toru Matsunobu, Kengo Terada
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Patent number: 9904474Abstract: A control device includes a processor. The processor is configured to collect plural types of performance information regarding a first data unit. The processor is configured to determine, on basis of the collected plural types of performance information, whether to transfer the first data unit from a first storage device which is under control of a first controller to a second storage device which is positioned as higher than the first storage device. The processor is configured to transfer the first data unit from the first storage device to the second storage device depending on a result of the determination.Type: GrantFiled: August 10, 2015Date of Patent: February 27, 2018Assignee: FUJITSU LIMITEDInventors: Takuro Kumabe, Akihito Kobayashi, Motohiro Sakai, Shinichiro Matsumura, Takahiro Ohyama
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Patent number: 9891836Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: GrantFiled: July 19, 2017Date of Patent: February 13, 2018Assignee: International Business Machines CorporationInventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Patent number: 9891893Abstract: An improved system and method are disclosed for creating a configuration for a platform instance using a development environment that has a graphical user interface (GUI). The method includes creating a service to be run by the platform instance and providing a graphical representation of a block library containing available blocks that are available for use by the service. Input is received via the GUI identifying at least some of the available blocks as selected blocks, where the selected blocks are to be run by the service. Input is received via the GUI arranging the selected blocks into an order of execution. The development environment generates and stores at least one configuration file containing the order of execution for use by the platform instance.Type: GrantFiled: March 30, 2016Date of Patent: February 13, 2018Assignee: n.io Innovation, LLCInventors: Douglas A. Standley, Matthew R. Dodge, Randall E. Bye
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Patent number: 9886198Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: GrantFiled: March 27, 2017Date of Patent: February 6, 2018Assignee: International Business Machines CorporationInventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda
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Patent number: 9875024Abstract: Lockless allocation of a block from a page is initiated by computing a needed block size from an original block header value. Thereafter, a currently used block size and a capacity of the page are determined. A new block size is then computed based on the currently used block size and the needed block size and a remaining capacity of the page. A new block header value is subsequently generated that includes the determined new block size and the determined remaining capacity of the page The original block header value is then replaced with the new block header value. Related apparatus, systems, techniques and articles are also described.Type: GrantFiled: November 25, 2014Date of Patent: January 23, 2018Assignee: SAP SEInventors: Ivan Schreter, Amarnadh Sai Eluri
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Patent number: 9852139Abstract: Various systems and methods for partitioning a directory while allowing concurrent access to the directory. For example, a method involves receiving a request to partition an original directory that comprises a plurality of entries and creating a partitioned directory in response to receiving the request. The method also involves distributing the entries from the original directory to the partitioned directory. Distributing the entries involves sequentially copying each entry from the original directory to the partitioned directory. The method also involves performing an operation on the original directory while the entries are being distributed. Performing the operation involves accessing and/or updating the original directory.Type: GrantFiled: July 2, 2012Date of Patent: December 26, 2017Assignee: Veritas Technologies LLCInventors: Sudheer Keshav Chepa, Anindya Banerjee, Upendra Pratap Singh
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Patent number: 9846641Abstract: Techniques are presented that include determining, for data to be written to a nonvolatile memory, a location in the nonvolatile memory to which the data should be written based at least on one or more wear metrics corresponding to the location. The one or more wear metrics are based on measurements of the location. The measurements estimate physical wear of the location. The techniques further include writing the data to the determined location in the nonvolatile memory. The techniques may be performed by methods, apparatus (e.g., a memory controller), and computer program products.Type: GrantFiled: June 18, 2012Date of Patent: December 19, 2017Assignee: International Business Machines CorporationInventors: Michele Franceschini, Ashish Jagmohan, Moinuddin K. Qureshi, Luis A. Lastras
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Patent number: 9836478Abstract: File system sharing in multi-host computing system (100) running multiple operating systems is described herein. A file systems stored on different data partitions (110-1) and (110-1), of different operating systems (106-1) and (106-2), running on a multi-host computing system (100) may be shared based on file server-client architecture. According to the implementation, an operating system (106-1) may share its file system as file server and other operating system (106-2) may access the shared file system as file client. In one implementation, the sharing of data between multiple hosts is enabled by a dedicated high speed, low latency, inter processor communication bus, FiRE (124).Type: GrantFiled: April 9, 2012Date of Patent: December 5, 2017Assignee: Ineda Systems Inc.Inventors: Balaji Kanigicherla, Krishna Mohan Tandaboina, Siva Raghuram Voleti, Surya Narayana Dommeti, Sridhar Adusumilli
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Patent number: 9813485Abstract: At least one of a method, a client computing device, and a server computing device for communicating data associated with a virtual machine are described. In one example, a client computing device is communicatively coupled to a network. A first set of data representative of at least a portion of a virtual machine disk image accessible on the network is determined, the first set of data comprising data arranged in a first sequence. From this first set of data, a second set of data is determined for communication to the client computing device over the network, the second set of data comprising at least a portion of the first set of data arranged in a second sequence, the second sequence being different from the first sequence.Type: GrantFiled: June 14, 2013Date of Patent: November 7, 2017Assignee: 1E LIMITEDInventors: Mark Blackburn, Mick Saxton, Sumir Karayi
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Patent number: 9811281Abstract: A memory management service occupies a configurable portion of an overall memory system in a disaggregate compute environment. The service provides optimized data organization capabilities over the pool of real memory accessible to the system. The service enables various types of data stores to be implemented in hardware, including at a data structure level. Storage capacity conservation is enabled through the creation and management of high-performance, re-usable data structure implementations across the memory pool, and then using analytics (e.g., multi-tenant similarity and duplicate detection) to determine when data organizations should be used. The service also may re-align memory to different data structures that may be more efficient given data usage and distribution patterns. The service also advantageously manages automated backups efficiently.Type: GrantFiled: April 7, 2016Date of Patent: November 7, 2017Assignee: International Business Machines CorporationInventors: John Alan Bivens, Koushik K. Das, Min Li, Ruchi Mahindru, Harigovind V. Ramasamy, Yaoping Ruan, Valentina Salapura, Eugen Schenfeld
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Patent number: 9792459Abstract: A policy arbitration system manages the fundamental communications and isolation between executable components and shared system resources of a computing device, and controls the use of the shared resources by the executable components. Some versions of the policy arbitration system operate on a virtualized mobile computing device to dynamically compile and implement policy rules that are issued periodically by multiple different independent execution environments that are running on the computing device. Semi-dynamic policy changes allow for context enabled policy changes that enforce the desired system and component “purpose” while simultaneously denying the “anti-purpose”.Type: GrantFiled: October 11, 2013Date of Patent: October 17, 2017Assignee: SRI INTERNATIONALInventors: Sean M. Forsberg, Scott A. Oberg, Christopher S. Lockett, Hassen Saidi, Jeffrey E. Casper, Michael Deleo
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Patent number: 9779121Abstract: A system, a computer-implemented method, and a computer readable medium having stored thereon a computer executable program code for providing access to a database on the system. The database comprises entries stored across partitions. The system comprises a first storage device, a second storage device, and a computing device. The first storage device comprises one partition of the partitions. The second storage device comprises the other partitions except the one of the first storage device. Each of the partitions has a respective partition identification. Each of the entries comprises at least one data value indicative of allocation of the each of the entries in one of the partitions. Each of the entries is stored in one or more data rows of data tables stored in the database. Each of the data rows comprises a respective primary key for identification of that data row.Type: GrantFiled: June 27, 2014Date of Patent: October 3, 2017Assignee: SAP SEInventor: Veit Bolik
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Patent number: 9779263Abstract: A access right estimation apparatus includes an extraction unit that extracts at least one first component from a first object which forms a first document, an access right being set up for the first document; an association unit that associates the extracted first component with access right information which indicates a user who is capable of accessing the first component based on the access right which is set up for the first document; and an access right estimation unit that estimates an access right that should be set up for a second document, which includes at least one second component extracted from a second object that forms the second document, an access right being not set up for the second document, the access right estimation unit estimating the access right based on the second component and the access right information which is associated with the first component.Type: GrantFiled: July 7, 2015Date of Patent: October 3, 2017Assignee: FUJI XEROX CO., LTD.Inventors: Motoyuki Takaai, Hiroyuki Sayuda
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Patent number: 9779124Abstract: The present disclosure relates to a mobile terminal, and more particularly, to a mobile terminal for updating data files stored in a memory on a database and a control method thereof, and a mobile terminal for updating data files on a database according to the media transfer protocol (MTP) may include a memory configured to store the data files, and a controller configured to divide the data files stored in the memory into a first group composed of files to which the priority order of update is given and a second group composed of files other than those of the first group, and sequentially update the first group and the second group on the database to implement an application using data files contained in the first.Type: GrantFiled: July 30, 2013Date of Patent: October 3, 2017Assignee: LG ELECTRONICS INC.Inventor: Dongwook Seo
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Patent number: 9766808Abstract: A set of data storage values is received. It is determined that a data storage value in the set will not fit in an available memory segment including variable data column widths based at least in part on data sizes specified in a plurality of segment layout maps. A memory segment is selected for which a column width of a column will be expanded. A column width of the selected memory segment is expanded. A segment layout map corresponding to the selected memory segment is updated. The set of data storage values is stored in the selected memory segment.Type: GrantFiled: April 8, 2015Date of Patent: September 19, 2017Assignee: Medallia, Inc.Inventor: Thorvald Natvig
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Patent number: 9767276Abstract: A method and apparatus for detecting kernel data structure tampering are disclosed. In the method and apparatus, a memory region of a computer system is scanned for one or more characteristics of a kernel data structure of an operating system kernel. It is then determined, based at least in part on identifying whether the one or more characteristics are found in the memory region, whether the kernel data structure is stored in the memory region of the computer system for tampering with the kernel data structure.Type: GrantFiled: August 26, 2014Date of Patent: September 19, 2017Assignee: AMAZON TECHNOLOGIES, INC.Inventor: Nicholas Alexander Allen
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Patent number: 9762602Abstract: In some examples, a set of events is received. A row-based chunk includes the set of events and metadata about the set of events is generated, and a column-based chunk that includes metadata about the set of events and, for each event in the set of events, a value of a first field of the multiple fields. The metadata about the set of events includes at least one of a minimum value or a maximum value of the first field over the events in the set of events.Type: GrantFiled: September 4, 2015Date of Patent: September 12, 2017Assignee: EntIT Software LLCInventors: Wei Huang, Yizheng Zhou, Bin Yu, Wenting Tang, Christian F. Beedgen
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Patent number: 9723068Abstract: A computer-implemented method includes identifying a primary computing platform, identifying one or more secondary computing platforms, and identifying a requesting virtual server. The requesting virtual server resides on the primary computing platform and is associated with one or more requesting clients. One or more donating virtual servers are identified. The donating virtual servers reside on the primary computing platform and are associated with one or more donating clients. One or more external virtual servers are identified. The external virtual servers reside on the secondary computing platforms. A resource donation scenario is determined. The resource donation scenario includes one or more resource exchanges between the requesting virtual server and the donating virtual servers. A resource adjustment scenario is determined. The resource adjustment scenario includes one or more resource exchanges between the external virtual servers.Type: GrantFiled: September 20, 2016Date of Patent: August 1, 2017Assignee: International Business Machines CorporationInventors: Victor G. Alonzo, Yuk L. Chan, Gisela C. Cheng, Kin Ng, Vaughn C. Page
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Patent number: 9721121Abstract: Certain embodiments employ an “out-of-band” mechanism to remove the physical controls for activating input peripherals from a portable device operating system and instead controlled by a separate peripheral control domain, isolated from the operating system domain by a machine virtualization/isolation technology. No additional hardware may be required. An adjunct I/O virtualization mechanism may also be included to abstract the guarded input peripheral interfaces, such that all attempts to turn them on from within the operating system are automatically redirected by the I/O virtualization mechanism to the peripheral control domain. The peripheral control domain may then conduct a policy-driven decision process to either allow, disallow, or request manual/explicit authorization of an access attempts. Physical access may be performed within the peripheral control domain.Type: GrantFiled: June 16, 2014Date of Patent: August 1, 2017Assignee: Green Hills Software, Inc.Inventors: Daniel O'Dowd, David Kleidermacher, Thomas Cantrell, Dennis Kou, Daniel Hettena
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Patent number: 9716747Abstract: A computer-implemented method includes identifying a primary computing platform, identifying one or more secondary computing platforms, and identifying a requesting virtual server. The requesting virtual server resides on the primary computing platform and is associated with one or more requesting clients. One or more donating virtual servers are identified. The donating virtual servers reside on the primary computing platform and are associated with one or more donating clients. One or more external virtual servers are identified. The external virtual servers reside on the secondary computing platforms. A resource donation scenario is determined. The resource donation scenario includes one or more resource exchanges between the requesting virtual server and the donating virtual servers. A resource adjustment scenario is determined. The resource adjustment scenario includes one or more resource exchanges between the external virtual servers.Type: GrantFiled: September 20, 2016Date of Patent: July 25, 2017Assignee: International Business Machines CorporationInventors: Victor G. Alonzo, Yuk L. Chan, Gisela C. Cheng, Kin Ng, Vaughn C. Page
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Patent number: 9710039Abstract: A method of calculating a processing power available from a supervisor of a multi-programmed computing system by a first partition of a plurality of partitions, the method comprising collecting, by the first partition, state data from the supervisor, the state data including a processing capacity of the multi-programmed computing system. The method further comprises initializing a remaining capacity variable to the processing capacity of the multi-programmed computing system; initializing variables, including setting a binary variable to a first logic value for each of the plurality of partitions; iteratively computing an entitlement and amount of power to award for each of the plurality of partitions having their respective binary variables set to the first logic value; and requesting the processing power from the supervisor, based on the iterative computation.Type: GrantFiled: July 17, 2014Date of Patent: July 18, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Brian K. Wade
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Patent number: 9710040Abstract: A method of calculating a processing power available from a supervisor of a multi-programmed computing system by a first partition of a plurality of partitions, the method comprising collecting, by the first partition, state data from the supervisor, the state data including a processing capacity of the multi-programmed computing system. The method further comprises initializing a remaining capacity variable to the processing capacity of the multi-programmed computing system; initializing variables, including setting a binary variable to a first logic value for each of the plurality of partitions; iteratively computing an entitlement and amount of power to award for each of the plurality of partitions having their respective binary variables set to the first logic value; and requesting the processing power from the supervisor, based on the iterative computation.Type: GrantFiled: December 21, 2016Date of Patent: July 18, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Brian K. Wade
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Patent number: 9697010Abstract: This patent relates to user devices that have user-selectable operating systems. One implementation can include primary storage having multiple compressed operating systems stored thereon in inoperable form. This implementation can also include a processor configured to execute a multi-option boot loader configured to receive a user selection of an individual operating system. The multi-option boot loader is configured to install a file folder structure on the primary storage in a configuration specific to the individual operating system and to install the individual operating system in an operable form on the primary storage relative to the file folder structure.Type: GrantFiled: March 25, 2014Date of Patent: July 4, 2017Assignee: Microsoft Technology Licensing, LLCInventors: Jeffrey M. Paul, Ross F. Hewit, Robert Zhu, Heonmin Lim
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Patent number: 9690943Abstract: A Basic Input/Output System (BIOS) secure data management system includes a BIOS that is configured to perform a boot process. At least one memory system is configured to provide a System Management (SM) memory location that is only accessible by the BIOS. A trusted platform module (TPM) includes at least one register and is configured to store sealed first secure data. The TPM is configured to use at least one first value in the at least one register that depends on the boot process to unseal the sealed first secure data to provide unsealed first secure data, and provide that unsealed first secure data to the BIOS for storage in the SM memory location. The BIOS is configured to retrieve the unsealed first secure data from the SM memory location and use the unsealed first secure data to perform a security function.Type: GrantFiled: June 4, 2014Date of Patent: June 27, 2017Assignee: Dell Products L.P.Inventors: Jonathan Bret Barkelew, Kurt David Gillespie
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Patent number: 9684452Abstract: The system includes host computers, file servers and a storage system having automated page-based management means. The storage system interface receives instructions to change the condition for decision for migration regarding particular parts or the whole volume. The host computer can control execution of the migration performed by the storage system by specifying areas or volumes with the condition via the interface. Highly optimized, appropriate data placement and data relocation in computer system can be achieved when the application, host computer or management computer can recognize or predict the usage of the data or files. The storage system having automated page-based management may include compression/decompression and a control method for the compression and decompression process.Type: GrantFiled: June 30, 2016Date of Patent: June 20, 2017Assignee: Hitachi, Ltd.Inventor: Hiroshi Arakawa
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Patent number: 9678888Abstract: A page compression strategy classifies uncompressed pages selected for compression. Similarly classified pages are compressed and bound into a single logical page. For logical pages having pages with more than one classification, a weighting factor is determined for the logical page.Type: GrantFiled: September 19, 2016Date of Patent: June 13, 2017Assignee: International Business Machines CorporationInventors: Suma M. B. Bhat, Chetan L. Gaonkar, Vamshi K. Thatikonda